/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerBplInline.xml -i ../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/prod-cons3.wvr.bpl -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-faa7b7a-m [2024-04-27 09:20:29,366 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-04-27 09:20:29,434 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-04-27 09:20:29,440 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-04-27 09:20:29,440 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-04-27 09:20:29,469 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-04-27 09:20:29,469 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-04-27 09:20:29,470 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-04-27 09:20:29,470 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-04-27 09:20:29,471 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-04-27 09:20:29,471 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-04-27 09:20:29,471 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-04-27 09:20:29,472 INFO L153 SettingsManager]: * Use SBE=true [2024-04-27 09:20:29,472 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-04-27 09:20:29,472 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-04-27 09:20:29,473 INFO L153 SettingsManager]: * sizeof long=4 [2024-04-27 09:20:29,473 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-04-27 09:20:29,473 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-04-27 09:20:29,473 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-04-27 09:20:29,474 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-04-27 09:20:29,474 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-04-27 09:20:29,475 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-04-27 09:20:29,476 INFO L153 SettingsManager]: * sizeof long double=12 [2024-04-27 09:20:29,476 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-04-27 09:20:29,476 INFO L153 SettingsManager]: * Use constant arrays=true [2024-04-27 09:20:29,476 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-04-27 09:20:29,476 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-04-27 09:20:29,477 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-04-27 09:20:29,477 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-04-27 09:20:29,478 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-04-27 09:20:29,478 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-04-27 09:20:29,478 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-04-27 09:20:29,478 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-04-27 09:20:29,479 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-04-27 09:20:29,479 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-04-27 09:20:29,479 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-04-27 09:20:29,479 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-04-27 09:20:29,479 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-04-27 09:20:29,480 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-04-27 09:20:29,480 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT [2024-04-27 09:20:29,775 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-04-27 09:20:29,804 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-04-27 09:20:29,806 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-04-27 09:20:29,807 INFO L270 PluginConnector]: Initializing Boogie PL CUP Parser... [2024-04-27 09:20:29,808 INFO L274 PluginConnector]: Boogie PL CUP Parser initialized [2024-04-27 09:20:29,809 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/prod-cons3.wvr.bpl [2024-04-27 09:20:29,810 INFO L110 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/prod-cons3.wvr.bpl' [2024-04-27 09:20:29,854 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-04-27 09:20:29,856 INFO L133 ToolchainWalker]: Walking toolchain with 4 elements. [2024-04-27 09:20:29,860 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-04-27 09:20:29,860 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-04-27 09:20:29,860 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-04-27 09:20:29,898 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 09:20:29" (1/1) ... [2024-04-27 09:20:29,905 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 09:20:29" (1/1) ... [2024-04-27 09:20:29,910 INFO L138 Inliner]: procedures = 5, calls = 4, calls flagged for inlining = 0, calls inlined = 0, statements flattened = 0 [2024-04-27 09:20:29,911 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-04-27 09:20:29,912 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-04-27 09:20:29,913 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-04-27 09:20:29,913 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-04-27 09:20:29,921 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 09:20:29" (1/1) ... [2024-04-27 09:20:29,921 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 09:20:29" (1/1) ... [2024-04-27 09:20:29,924 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 09:20:29" (1/1) ... [2024-04-27 09:20:29,924 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 09:20:29" (1/1) ... [2024-04-27 09:20:29,932 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 09:20:29" (1/1) ... [2024-04-27 09:20:29,936 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 09:20:29" (1/1) ... [2024-04-27 09:20:29,937 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 09:20:29" (1/1) ... [2024-04-27 09:20:29,937 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 09:20:29" (1/1) ... [2024-04-27 09:20:29,943 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-04-27 09:20:29,944 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-04-27 09:20:29,944 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-04-27 09:20:29,944 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-04-27 09:20:29,945 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 09:20:29" (1/1) ... [2024-04-27 09:20:29,950 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-04-27 09:20:29,958 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-04-27 09:20:29,974 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-04-27 09:20:29,977 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-04-27 09:20:30,018 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread1 given in one single declaration [2024-04-27 09:20:30,019 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-04-27 09:20:30,019 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-04-27 09:20:30,019 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread2 given in one single declaration [2024-04-27 09:20:30,019 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-04-27 09:20:30,019 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-04-27 09:20:30,019 INFO L124 BoogieDeclarations]: Specification and implementation of procedure ULTIMATE.start given in one single declaration [2024-04-27 09:20:30,019 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-04-27 09:20:30,020 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-04-27 09:20:30,020 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread3 given in one single declaration [2024-04-27 09:20:30,020 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-04-27 09:20:30,020 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-04-27 09:20:30,020 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread4 given in one single declaration [2024-04-27 09:20:30,020 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-04-27 09:20:30,020 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-04-27 09:20:30,021 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-04-27 09:20:30,066 INFO L241 CfgBuilder]: Building ICFG [2024-04-27 09:20:30,068 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-04-27 09:20:30,184 INFO L282 CfgBuilder]: Performing block encoding [2024-04-27 09:20:30,207 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-04-27 09:20:30,208 INFO L309 CfgBuilder]: Removed 0 assume(true) statements. [2024-04-27 09:20:30,209 INFO L201 PluginConnector]: Adding new model prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:20:30 BoogieIcfgContainer [2024-04-27 09:20:30,209 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-04-27 09:20:30,211 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-04-27 09:20:30,212 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-04-27 09:20:30,223 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-04-27 09:20:30,224 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 09:20:29" (1/2) ... [2024-04-27 09:20:30,224 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@363de48e and model type prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:20:30, skipping insertion in model container [2024-04-27 09:20:30,225 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "prod-cons3.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:20:30" (2/2) ... [2024-04-27 09:20:30,226 INFO L112 eAbstractionObserver]: Analyzing ICFG prod-cons3.wvr.bpl [2024-04-27 09:20:30,235 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-04-27 09:20:30,243 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-04-27 09:20:30,244 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-04-27 09:20:30,244 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-04-27 09:20:30,295 INFO L144 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2024-04-27 09:20:30,329 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-04-27 09:20:30,329 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-04-27 09:20:30,329 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-04-27 09:20:30,330 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-04-27 09:20:30,332 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-04-27 09:20:30,362 INFO L187 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-04-27 09:20:30,374 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 09:20:30,376 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-04-27 09:20:30,383 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1d44c6e6, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=false, mConComCheckerCriterionLimit=1, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-04-27 09:20:30,383 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-04-27 09:20:30,614 INFO L85 PathProgramCache]: Analyzing trace with hash 971526535, now seen corresponding path program 1 times [2024-04-27 09:20:30,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:30,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:30,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:30,694 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:30,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:30,849 INFO L85 PathProgramCache]: Analyzing trace with hash 971526535, now seen corresponding path program 2 times [2024-04-27 09:20:30,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:30,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:30,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:30,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:20:30,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:30,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:30,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:31,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:20:31,029 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-04-27 09:20:31,029 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-04-27 09:20:31,344 INFO L85 PathProgramCache]: Analyzing trace with hash 971526535, now seen corresponding path program 3 times [2024-04-27 09:20:31,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:31,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:31,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:31,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:20:31,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:31,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:31,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:31,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:20:31,378 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-04-27 09:20:31,378 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-04-27 09:20:31,507 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-04-27 09:20:31,509 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 09:20:31,509 INFO L85 PathProgramCache]: Analyzing trace with hash -1357080485, now seen corresponding path program 1 times [2024-04-27 09:20:31,514 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 09:20:31,514 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661436054] [2024-04-27 09:20:31,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:31,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:31,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:31,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:20:31,580 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 09:20:31,580 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661436054] [2024-04-27 09:20:31,581 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [661436054] provided 1 perfect and 0 imperfect interpolant sequences [2024-04-27 09:20:31,581 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-04-27 09:20:31,581 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-04-27 09:20:31,583 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041448406] [2024-04-27 09:20:31,583 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-04-27 09:20:31,585 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-04-27 09:20:31,586 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 09:20:31,588 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-04-27 09:20:31,588 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-04-27 09:20:31,589 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 09:20:31,590 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 09:20:31,590 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.8) internal successors, (24), 4 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 09:20:31,591 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 09:20:31,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:31,906 INFO L85 PathProgramCache]: Analyzing trace with hash 679443726, now seen corresponding path program 1 times [2024-04-27 09:20:31,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:31,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:31,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:31,964 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:31,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:31,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:31,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:32,018 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:32,019 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-04-27 09:20:32,020 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2024-04-27 09:20:32,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:32,297 INFO L85 PathProgramCache]: Analyzing trace with hash 1964882435, now seen corresponding path program 1 times [2024-04-27 09:20:32,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:32,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:32,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:32,387 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:32,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:32,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:32,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:32,430 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:32,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:32,561 INFO L85 PathProgramCache]: Analyzing trace with hash 1989003458, now seen corresponding path program 2 times [2024-04-27 09:20:32,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:32,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:32,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:32,615 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:32,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:32,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:32,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:32,647 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:32,734 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:32,774 INFO L85 PathProgramCache]: Analyzing trace with hash 521223542, now seen corresponding path program 1 times [2024-04-27 09:20:32,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:32,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:32,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:32,834 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:32,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:32,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:32,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:32,896 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:32,897 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-04-27 09:20:32,898 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2024-04-27 09:20:33,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:33,221 INFO L85 PathProgramCache]: Analyzing trace with hash -603263642, now seen corresponding path program 3 times [2024-04-27 09:20:33,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:33,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:33,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:33,303 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:33,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:33,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:33,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:33,336 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:33,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:33,452 INFO L85 PathProgramCache]: Analyzing trace with hash 258788709, now seen corresponding path program 4 times [2024-04-27 09:20:33,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:33,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:33,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:33,486 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:33,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:33,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:33,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:33,520 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:33,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:33,642 INFO L85 PathProgramCache]: Analyzing trace with hash 1989003458, now seen corresponding path program 5 times [2024-04-27 09:20:33,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:33,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:33,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:33,670 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:33,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:33,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:33,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:33,697 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:33,854 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:33,893 INFO L85 PathProgramCache]: Analyzing trace with hash -1864794279, now seen corresponding path program 2 times [2024-04-27 09:20:33,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:33,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:33,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:33,924 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:33,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:33,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:33,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:33,953 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:34,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:34,074 INFO L85 PathProgramCache]: Analyzing trace with hash 470201362, now seen corresponding path program 3 times [2024-04-27 09:20:34,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:34,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:34,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:34,111 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:34,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:34,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:34,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:34,145 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:34,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:34,270 INFO L85 PathProgramCache]: Analyzing trace with hash 618331573, now seen corresponding path program 4 times [2024-04-27 09:20:34,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:34,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:34,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:34,296 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:34,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:34,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:34,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:34,319 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:34,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:34,504 INFO L85 PathProgramCache]: Analyzing trace with hash -281533154, now seen corresponding path program 1 times [2024-04-27 09:20:34,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:34,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:34,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:34,531 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:34,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:34,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:34,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:34,557 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:34,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:34,666 INFO L85 PathProgramCache]: Analyzing trace with hash -1977878867, now seen corresponding path program 2 times [2024-04-27 09:20:34,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:34,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:34,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:34,695 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:34,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:34,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:34,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:34,725 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:34,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:34,852 INFO L85 PathProgramCache]: Analyzing trace with hash -395691910, now seen corresponding path program 3 times [2024-04-27 09:20:34,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:34,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:34,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:34,874 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:34,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:34,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:34,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:34,895 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:35,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:35,034 INFO L85 PathProgramCache]: Analyzing trace with hash 1507242054, now seen corresponding path program 1 times [2024-04-27 09:20:35,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:35,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:35,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:35,049 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:35,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:35,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:35,184 INFO L85 PathProgramCache]: Analyzing trace with hash 1890118777, now seen corresponding path program 2 times [2024-04-27 09:20:35,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:35,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:35,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:35,202 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:35,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:35,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:35,391 INFO L85 PathProgramCache]: Analyzing trace with hash 1452216748, now seen corresponding path program 3 times [2024-04-27 09:20:35,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:35,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:35,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:35,410 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:35,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:35,515 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:35,570 INFO L85 PathProgramCache]: Analyzing trace with hash 1930196179, now seen corresponding path program 4 times [2024-04-27 09:20:35,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:35,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:35,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:35,579 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:35,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:35,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:35,716 INFO L85 PathProgramCache]: Analyzing trace with hash 275306246, now seen corresponding path program 5 times [2024-04-27 09:20:35,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:35,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:35,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:35,727 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:35,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:35,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:35,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:35,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:35,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:35,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:35,948 INFO L85 PathProgramCache]: Analyzing trace with hash -102351431, now seen corresponding path program 6 times [2024-04-27 09:20:35,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:35,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:35,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:35,955 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:35,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:36,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:36,185 INFO L85 PathProgramCache]: Analyzing trace with hash -902274410, now seen corresponding path program 7 times [2024-04-27 09:20:36,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:36,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:36,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:36,289 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:36,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:36,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:36,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:36,349 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:36,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:36,440 INFO L85 PathProgramCache]: Analyzing trace with hash 1537807481, now seen corresponding path program 8 times [2024-04-27 09:20:36,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:36,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:36,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:36,501 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:20:36,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:36,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:36,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:36,562 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:20:36,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:36,724 INFO L85 PathProgramCache]: Analyzing trace with hash -46525770, now seen corresponding path program 9 times [2024-04-27 09:20:36,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:36,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:36,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:37,077 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:37,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:37,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:37,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:37,239 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:37,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:37,340 INFO L85 PathProgramCache]: Analyzing trace with hash 1704663794, now seen corresponding path program 10 times [2024-04-27 09:20:37,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:37,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:37,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:37,541 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:37,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:37,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:37,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:37,717 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:37,795 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:37,825 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264455, now seen corresponding path program 4 times [2024-04-27 09:20:37,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:37,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:37,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:37,877 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:37,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:37,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:37,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:37,926 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:37,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:38,022 INFO L85 PathProgramCache]: Analyzing trace with hash 497688760, now seen corresponding path program 5 times [2024-04-27 09:20:38,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:38,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:38,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:38,069 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:38,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:38,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:38,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:38,123 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:38,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:38,232 INFO L85 PathProgramCache]: Analyzing trace with hash -1751517505, now seen corresponding path program 6 times [2024-04-27 09:20:38,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:38,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:38,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:38,281 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:38,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:38,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:38,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:38,327 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:38,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:38,453 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264456, now seen corresponding path program 11 times [2024-04-27 09:20:38,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:38,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:38,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:38,498 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:38,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:38,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:38,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:38,551 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:38,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:38,645 INFO L85 PathProgramCache]: Analyzing trace with hash 497688792, now seen corresponding path program 12 times [2024-04-27 09:20:38,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:38,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:38,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:38,700 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:38,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:38,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:38,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:38,743 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:38,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:38,840 INFO L85 PathProgramCache]: Analyzing trace with hash -1751516535, now seen corresponding path program 13 times [2024-04-27 09:20:38,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:38,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:38,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:38,882 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:38,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:38,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:38,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:38,923 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:38,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:39,013 INFO L85 PathProgramCache]: Analyzing trace with hash -902274417, now seen corresponding path program 14 times [2024-04-27 09:20:39,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:39,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:39,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:39,055 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:20:39,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:39,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:39,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:39,079 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:20:39,143 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:39,173 INFO L85 PathProgramCache]: Analyzing trace with hash 497682132, now seen corresponding path program 15 times [2024-04-27 09:20:39,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:39,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:39,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:39,253 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:39,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:39,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:39,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:39,296 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:39,359 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:39,391 INFO L85 PathProgramCache]: Analyzing trace with hash -1726846537, now seen corresponding path program 16 times [2024-04-27 09:20:39,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:39,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:39,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:39,443 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 19 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:39,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:39,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:39,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:39,493 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 19 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:39,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:39,649 INFO L85 PathProgramCache]: Analyzing trace with hash 1243640436, now seen corresponding path program 17 times [2024-04-27 09:20:39,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:39,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:39,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:39,735 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:20:39,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:39,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:39,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:39,813 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:20:39,882 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:39,911 INFO L85 PathProgramCache]: Analyzing trace with hash -595524620, now seen corresponding path program 18 times [2024-04-27 09:20:39,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:39,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:39,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:40,015 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-04-27 09:20:40,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:40,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:40,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:40,088 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-04-27 09:20:40,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:40,173 INFO L85 PathProgramCache]: Analyzing trace with hash 420513488, now seen corresponding path program 19 times [2024-04-27 09:20:40,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:40,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:40,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:40,183 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:40,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:40,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:40,291 INFO L85 PathProgramCache]: Analyzing trace with hash 151016341, now seen corresponding path program 20 times [2024-04-27 09:20:40,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:40,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:40,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:40,333 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:20:40,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:40,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:40,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:40,375 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:20:40,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:40,493 INFO L85 PathProgramCache]: Analyzing trace with hash -1024670290, now seen corresponding path program 21 times [2024-04-27 09:20:40,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:40,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:40,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:40,537 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:20:40,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:40,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:40,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:40,579 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:20:40,671 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:40,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:40,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:40,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:40,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:40,769 INFO L85 PathProgramCache]: Analyzing trace with hash -1980708206, now seen corresponding path program 22 times [2024-04-27 09:20:40,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:40,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:40,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:40,822 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:20:40,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:40,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:40,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:40,876 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:20:41,034 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:41,053 INFO L85 PathProgramCache]: Analyzing trace with hash 1321579499, now seen corresponding path program 23 times [2024-04-27 09:20:41,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:41,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:41,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:41,125 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 8 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:20:41,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:41,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:41,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:41,175 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 8 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:20:41,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:41,263 INFO L85 PathProgramCache]: Analyzing trace with hash 1272134568, now seen corresponding path program 24 times [2024-04-27 09:20:41,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:41,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:41,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:41,314 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:20:41,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:41,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:41,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:41,363 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:20:41,432 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:41,460 INFO L85 PathProgramCache]: Analyzing trace with hash -1160634670, now seen corresponding path program 25 times [2024-04-27 09:20:41,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:41,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:41,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:41,570 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 15 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:20:41,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:41,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:41,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:41,634 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 15 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:20:41,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:41,786 INFO L85 PathProgramCache]: Analyzing trace with hash -1700007813, now seen corresponding path program 26 times [2024-04-27 09:20:41,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:41,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:41,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:41,828 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:20:41,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:41,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:41,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:41,889 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:20:41,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:42,022 INFO L85 PathProgramCache]: Analyzing trace with hash -1160634544, now seen corresponding path program 27 times [2024-04-27 09:20:42,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:42,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:42,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:42,079 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:20:42,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:42,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:42,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:42,128 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:20:42,235 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:42,256 INFO L85 PathProgramCache]: Analyzing trace with hash -1619932388, now seen corresponding path program 28 times [2024-04-27 09:20:42,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:42,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:42,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:42,304 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:20:42,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:42,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:42,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:42,348 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:20:42,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:42,456 INFO L85 PathProgramCache]: Analyzing trace with hash 1817926127, now seen corresponding path program 29 times [2024-04-27 09:20:42,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:42,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:42,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:42,497 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:20:42,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:42,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:42,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:42,537 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:20:42,604 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:42,635 INFO L85 PathProgramCache]: Analyzing trace with hash 521135190, now seen corresponding path program 30 times [2024-04-27 09:20:42,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:42,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:42,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:42,766 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 17 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:42,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:42,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:42,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:42,856 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 17 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:42,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:43,010 INFO L85 PathProgramCache]: Analyzing trace with hash 1028474094, now seen corresponding path program 31 times [2024-04-27 09:20:43,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:43,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:43,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:43,050 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:20:43,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:43,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:43,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:43,100 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:20:43,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:43,643 INFO L85 PathProgramCache]: Analyzing trace with hash 412577667, now seen corresponding path program 32 times [2024-04-27 09:20:43,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:43,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:43,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:43,665 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-04-27 09:20:43,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:43,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:43,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:43,686 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-04-27 09:20:43,687 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-04-27 09:20:43,687 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=185, Invalid=1147, Unknown=0, NotChecked=0, Total=1332 [2024-04-27 09:20:43,937 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:43,997 INFO L85 PathProgramCache]: Analyzing trace with hash -603263642, now seen corresponding path program 7 times [2024-04-27 09:20:43,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:43,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:44,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:44,018 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:44,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:44,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:44,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:44,039 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:44,120 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:44,183 INFO L85 PathProgramCache]: Analyzing trace with hash 258788709, now seen corresponding path program 8 times [2024-04-27 09:20:44,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:44,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:44,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:44,207 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:44,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:44,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:44,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:44,237 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:44,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:44,391 INFO L85 PathProgramCache]: Analyzing trace with hash 1989003458, now seen corresponding path program 9 times [2024-04-27 09:20:44,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:44,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:44,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:44,409 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:44,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:44,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:44,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:44,427 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:44,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:44,646 INFO L85 PathProgramCache]: Analyzing trace with hash -1864794279, now seen corresponding path program 6 times [2024-04-27 09:20:44,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:44,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:44,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:44,668 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:44,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:44,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:44,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:44,690 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:44,772 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:44,835 INFO L85 PathProgramCache]: Analyzing trace with hash 470201362, now seen corresponding path program 7 times [2024-04-27 09:20:44,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:44,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:44,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:44,863 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:44,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:44,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:44,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:44,885 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:44,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:45,029 INFO L85 PathProgramCache]: Analyzing trace with hash 618331573, now seen corresponding path program 8 times [2024-04-27 09:20:45,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:45,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:45,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:45,046 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:45,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:45,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:45,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:45,061 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:45,217 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:45,312 INFO L85 PathProgramCache]: Analyzing trace with hash -281533154, now seen corresponding path program 5 times [2024-04-27 09:20:45,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:45,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:45,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:45,334 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:45,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:45,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:45,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:45,358 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:45,444 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:45,493 INFO L85 PathProgramCache]: Analyzing trace with hash -1977878867, now seen corresponding path program 6 times [2024-04-27 09:20:45,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:45,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:45,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:45,518 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:45,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:45,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:45,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:45,543 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:45,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:45,679 INFO L85 PathProgramCache]: Analyzing trace with hash -395691910, now seen corresponding path program 7 times [2024-04-27 09:20:45,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:45,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:45,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:45,699 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:45,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:45,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:45,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:45,718 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:45,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:45,888 INFO L85 PathProgramCache]: Analyzing trace with hash -1634953609, now seen corresponding path program 33 times [2024-04-27 09:20:45,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:45,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:45,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:45,899 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:45,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:45,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:46,007 INFO L85 PathProgramCache]: Analyzing trace with hash -295183137, now seen corresponding path program 34 times [2024-04-27 09:20:46,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:46,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:46,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:46,019 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:46,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:46,126 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:46,134 INFO L85 PathProgramCache]: Analyzing trace with hash 1890118777, now seen corresponding path program 35 times [2024-04-27 09:20:46,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:46,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:46,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:46,146 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:46,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:46,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:46,355 INFO L85 PathProgramCache]: Analyzing trace with hash -216337583, now seen corresponding path program 36 times [2024-04-27 09:20:46,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:46,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:46,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:46,432 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:20:46,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:46,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:46,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:46,466 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:20:46,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:46,591 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:46,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:46,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:46,637 INFO L85 PathProgramCache]: Analyzing trace with hash 1930196179, now seen corresponding path program 37 times [2024-04-27 09:20:46,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:46,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:46,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:46,645 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:46,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:46,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:46,901 INFO L85 PathProgramCache]: Analyzing trace with hash -1739065417, now seen corresponding path program 38 times [2024-04-27 09:20:46,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:46,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:46,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:46,907 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:46,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:47,072 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:47,098 INFO L85 PathProgramCache]: Analyzing trace with hash -1266117729, now seen corresponding path program 39 times [2024-04-27 09:20:47,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:47,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:47,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:47,106 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:47,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:47,198 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:47,255 INFO L85 PathProgramCache]: Analyzing trace with hash -102351431, now seen corresponding path program 40 times [2024-04-27 09:20:47,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:47,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:47,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:47,260 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:47,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:47,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:47,486 INFO L85 PathProgramCache]: Analyzing trace with hash -902274410, now seen corresponding path program 41 times [2024-04-27 09:20:47,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:47,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:47,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:47,519 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:47,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:47,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:47,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:47,553 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:47,632 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:47,689 INFO L85 PathProgramCache]: Analyzing trace with hash 1537807481, now seen corresponding path program 42 times [2024-04-27 09:20:47,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:47,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:47,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:47,730 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:20:47,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:47,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:47,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:47,771 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:20:47,937 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:47,992 INFO L85 PathProgramCache]: Analyzing trace with hash -46525770, now seen corresponding path program 43 times [2024-04-27 09:20:47,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:47,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:47,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:48,104 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:48,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:48,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:48,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:48,209 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:48,292 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:48,401 INFO L85 PathProgramCache]: Analyzing trace with hash 1704663794, now seen corresponding path program 44 times [2024-04-27 09:20:48,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:48,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:48,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:48,496 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:48,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:48,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:48,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:48,595 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:48,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:48,752 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264455, now seen corresponding path program 8 times [2024-04-27 09:20:48,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:48,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:48,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:48,788 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:48,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:48,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:48,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:48,827 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:48,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:48,963 INFO L85 PathProgramCache]: Analyzing trace with hash 497688760, now seen corresponding path program 9 times [2024-04-27 09:20:48,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:48,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:48,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:48,997 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:48,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:48,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:49,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:49,030 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:49,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:49,169 INFO L85 PathProgramCache]: Analyzing trace with hash -1751517505, now seen corresponding path program 10 times [2024-04-27 09:20:49,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:49,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:49,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:49,205 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:49,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:49,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:49,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:49,249 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:49,329 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:49,389 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264456, now seen corresponding path program 45 times [2024-04-27 09:20:49,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:49,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:49,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:49,420 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:49,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:49,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:49,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:49,451 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:49,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:49,649 INFO L85 PathProgramCache]: Analyzing trace with hash 497688792, now seen corresponding path program 46 times [2024-04-27 09:20:49,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:49,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:49,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:49,681 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:49,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:49,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:49,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:49,711 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:49,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:49,842 INFO L85 PathProgramCache]: Analyzing trace with hash -1751516535, now seen corresponding path program 47 times [2024-04-27 09:20:49,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:49,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:49,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:49,874 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:49,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:49,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:49,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:49,905 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:49,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:50,034 INFO L85 PathProgramCache]: Analyzing trace with hash 1537562356, now seen corresponding path program 9 times [2024-04-27 09:20:50,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:50,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:50,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:50,071 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:50,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:50,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:50,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:50,113 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:50,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:50,239 INFO L85 PathProgramCache]: Analyzing trace with hash 419792875, now seen corresponding path program 10 times [2024-04-27 09:20:50,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:50,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:50,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:50,273 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:50,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:50,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:50,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:50,308 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:50,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:50,434 INFO L85 PathProgramCache]: Analyzing trace with hash 128677356, now seen corresponding path program 11 times [2024-04-27 09:20:50,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:50,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:50,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:50,469 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:50,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:50,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:50,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:50,502 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:50,582 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:50,629 INFO L85 PathProgramCache]: Analyzing trace with hash 1537562357, now seen corresponding path program 48 times [2024-04-27 09:20:50,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:50,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:50,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:50,661 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:50,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:50,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:50,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:50,694 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:50,760 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:50,850 INFO L85 PathProgramCache]: Analyzing trace with hash 419792907, now seen corresponding path program 49 times [2024-04-27 09:20:50,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:50,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:50,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:50,896 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:20:50,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:50,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:50,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:50,938 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:20:51,008 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:51,035 INFO L85 PathProgramCache]: Analyzing trace with hash 128678326, now seen corresponding path program 50 times [2024-04-27 09:20:51,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:51,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:51,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:51,074 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:20:51,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:51,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:51,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:51,119 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:20:51,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:51,216 INFO L85 PathProgramCache]: Analyzing trace with hash -305939097, now seen corresponding path program 10 times [2024-04-27 09:20:51,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:51,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:51,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:51,257 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:51,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:51,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:51,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:51,297 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:51,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:51,393 INFO L85 PathProgramCache]: Analyzing trace with hash -894177320, now seen corresponding path program 11 times [2024-04-27 09:20:51,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:51,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:51,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:51,442 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:51,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:51,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:51,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:51,481 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:51,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:51,574 INFO L85 PathProgramCache]: Analyzing trace with hash -1949693025, now seen corresponding path program 12 times [2024-04-27 09:20:51,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:51,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:51,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:51,617 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:51,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:51,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:51,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:51,660 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:51,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:51,762 INFO L85 PathProgramCache]: Analyzing trace with hash -305939096, now seen corresponding path program 51 times [2024-04-27 09:20:51,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:51,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:51,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:51,801 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:51,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:51,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:51,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:51,840 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:51,953 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:51,983 INFO L85 PathProgramCache]: Analyzing trace with hash -1751723122, now seen corresponding path program 52 times [2024-04-27 09:20:51,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:51,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:51,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:52,012 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:20:52,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:52,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:52,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:52,042 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:20:52,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:52,158 INFO L85 PathProgramCache]: Analyzing trace with hash 221262867, now seen corresponding path program 53 times [2024-04-27 09:20:52,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:52,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:52,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:52,195 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:20:52,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:52,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:52,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:52,226 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:20:52,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:52,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:52,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:52,373 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:52,379 INFO L85 PathProgramCache]: Analyzing trace with hash 917338603, now seen corresponding path program 54 times [2024-04-27 09:20:52,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:52,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:52,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:52,456 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:20:52,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:52,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:52,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:52,491 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:20:52,492 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-04-27 09:20:52,493 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=209, Invalid=1431, Unknown=0, NotChecked=0, Total=1640 [2024-04-27 09:20:52,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:52,819 INFO L85 PathProgramCache]: Analyzing trace with hash -603263642, now seen corresponding path program 13 times [2024-04-27 09:20:52,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:52,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:52,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:52,836 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:52,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:52,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:52,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:52,852 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:52,931 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:52,995 INFO L85 PathProgramCache]: Analyzing trace with hash 258788709, now seen corresponding path program 14 times [2024-04-27 09:20:52,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:52,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:52,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:53,013 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:53,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:53,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:53,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:53,032 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:53,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:53,147 INFO L85 PathProgramCache]: Analyzing trace with hash 1989003458, now seen corresponding path program 15 times [2024-04-27 09:20:53,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:53,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:53,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:53,161 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:53,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:53,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:53,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:53,175 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:53,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:53,355 INFO L85 PathProgramCache]: Analyzing trace with hash -1864794279, now seen corresponding path program 12 times [2024-04-27 09:20:53,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:53,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:53,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:53,372 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:53,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:53,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:53,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:53,389 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:53,475 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:53,525 INFO L85 PathProgramCache]: Analyzing trace with hash 470201362, now seen corresponding path program 13 times [2024-04-27 09:20:53,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:53,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:53,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:53,545 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:53,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:53,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:53,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:53,564 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:53,639 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:53,681 INFO L85 PathProgramCache]: Analyzing trace with hash 618331573, now seen corresponding path program 14 times [2024-04-27 09:20:53,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:53,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:53,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:53,697 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:53,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:53,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:53,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:53,713 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:53,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:53,895 INFO L85 PathProgramCache]: Analyzing trace with hash -281533154, now seen corresponding path program 11 times [2024-04-27 09:20:53,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:53,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:53,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:53,911 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:53,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:53,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:53,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:53,928 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:54,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:54,046 INFO L85 PathProgramCache]: Analyzing trace with hash -1977878867, now seen corresponding path program 12 times [2024-04-27 09:20:54,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:54,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:54,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:54,064 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:54,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:54,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:54,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:54,082 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:20:54,153 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:54,201 INFO L85 PathProgramCache]: Analyzing trace with hash -395691910, now seen corresponding path program 13 times [2024-04-27 09:20:54,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:54,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:54,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:54,215 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:54,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:54,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:54,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:54,228 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:20:54,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:54,431 INFO L85 PathProgramCache]: Analyzing trace with hash 1890118777, now seen corresponding path program 55 times [2024-04-27 09:20:54,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:54,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:54,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:54,449 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:54,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:54,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:54,732 INFO L85 PathProgramCache]: Analyzing trace with hash 1930196179, now seen corresponding path program 56 times [2024-04-27 09:20:54,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:54,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:54,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:54,739 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:54,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:54,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:20:54,990 INFO L85 PathProgramCache]: Analyzing trace with hash -102351431, now seen corresponding path program 57 times [2024-04-27 09:20:54,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:54,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:54,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:54,996 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:20:55,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:20:55,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:55,273 INFO L85 PathProgramCache]: Analyzing trace with hash -902274410, now seen corresponding path program 58 times [2024-04-27 09:20:55,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:55,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:55,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:55,303 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:55,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:55,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:55,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:55,334 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:55,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:55,451 INFO L85 PathProgramCache]: Analyzing trace with hash 1537807481, now seen corresponding path program 59 times [2024-04-27 09:20:55,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:55,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:55,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:55,488 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:20:55,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:55,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:55,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:55,522 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:20:55,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:55,703 INFO L85 PathProgramCache]: Analyzing trace with hash -46525770, now seen corresponding path program 60 times [2024-04-27 09:20:55,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:55,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:55,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:55,796 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:55,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:55,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:55,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:55,889 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:55,960 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:56,006 INFO L85 PathProgramCache]: Analyzing trace with hash 1704663794, now seen corresponding path program 61 times [2024-04-27 09:20:56,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:56,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:56,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:56,090 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:56,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:56,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:56,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:56,175 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:56,254 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:56,298 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264455, now seen corresponding path program 14 times [2024-04-27 09:20:56,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:56,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:56,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:56,326 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:56,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:56,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:56,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:56,355 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:56,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:56,465 INFO L85 PathProgramCache]: Analyzing trace with hash 497688760, now seen corresponding path program 15 times [2024-04-27 09:20:56,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:56,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:56,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:56,494 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:56,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:56,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:56,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:56,539 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:56,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:56,700 INFO L85 PathProgramCache]: Analyzing trace with hash -1751517505, now seen corresponding path program 16 times [2024-04-27 09:20:56,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:56,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:56,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:56,732 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:56,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:56,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:56,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:56,762 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:56,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:56,897 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264456, now seen corresponding path program 62 times [2024-04-27 09:20:56,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:56,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:56,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:56,925 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:56,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:56,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:56,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:56,953 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:57,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:57,142 INFO L85 PathProgramCache]: Analyzing trace with hash 497688792, now seen corresponding path program 63 times [2024-04-27 09:20:57,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:57,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:57,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:57,172 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:57,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:57,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:57,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:57,201 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:57,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:57,312 INFO L85 PathProgramCache]: Analyzing trace with hash -1751516535, now seen corresponding path program 64 times [2024-04-27 09:20:57,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:57,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:57,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:57,343 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:57,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:57,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:57,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:57,372 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:57,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:57,484 INFO L85 PathProgramCache]: Analyzing trace with hash 1537562356, now seen corresponding path program 15 times [2024-04-27 09:20:57,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:57,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:57,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:57,513 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:57,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:57,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:57,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:57,545 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:57,620 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:57,662 INFO L85 PathProgramCache]: Analyzing trace with hash 419792875, now seen corresponding path program 16 times [2024-04-27 09:20:57,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:57,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:57,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:57,692 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:57,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:57,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:57,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:57,722 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:57,792 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:57,833 INFO L85 PathProgramCache]: Analyzing trace with hash 128677356, now seen corresponding path program 17 times [2024-04-27 09:20:57,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:57,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:57,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:57,863 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:57,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:57,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:57,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:57,893 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:57,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:58,026 INFO L85 PathProgramCache]: Analyzing trace with hash 1537562357, now seen corresponding path program 65 times [2024-04-27 09:20:58,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:58,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:58,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:58,065 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:58,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:58,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:58,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:58,097 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:20:58,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:58,224 INFO L85 PathProgramCache]: Analyzing trace with hash 419792907, now seen corresponding path program 66 times [2024-04-27 09:20:58,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:58,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:58,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:58,253 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:20:58,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:58,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:58,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:58,284 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:20:58,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:58,443 INFO L85 PathProgramCache]: Analyzing trace with hash 128678326, now seen corresponding path program 67 times [2024-04-27 09:20:58,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:58,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:58,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:58,479 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:20:58,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:58,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:58,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:58,511 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:20:58,587 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:58,630 INFO L85 PathProgramCache]: Analyzing trace with hash -305939097, now seen corresponding path program 16 times [2024-04-27 09:20:58,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:58,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:58,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:58,667 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:58,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:58,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:58,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:58,705 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:58,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:58,834 INFO L85 PathProgramCache]: Analyzing trace with hash -894177320, now seen corresponding path program 17 times [2024-04-27 09:20:58,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:58,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:58,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:58,872 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:58,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:58,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:58,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:58,914 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:58,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:59,029 INFO L85 PathProgramCache]: Analyzing trace with hash -1949693025, now seen corresponding path program 18 times [2024-04-27 09:20:59,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:59,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:59,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:59,064 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:59,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:59,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:59,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:59,094 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:59,162 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:59,206 INFO L85 PathProgramCache]: Analyzing trace with hash -305939096, now seen corresponding path program 68 times [2024-04-27 09:20:59,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:59,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:59,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:59,237 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:59,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:59,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:59,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:59,264 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:20:59,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:59,481 INFO L85 PathProgramCache]: Analyzing trace with hash 386536431, now seen corresponding path program 69 times [2024-04-27 09:20:59,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:59,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:59,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:59,506 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:59,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:59,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:59,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:59,532 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:20:59,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:59,715 INFO L85 PathProgramCache]: Analyzing trace with hash 1880274604, now seen corresponding path program 70 times [2024-04-27 09:20:59,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:59,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:59,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:59,751 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:20:59,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:59,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:59,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:59,787 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:20:59,861 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:20:59,901 INFO L85 PathProgramCache]: Analyzing trace with hash 1270344380, now seen corresponding path program 71 times [2024-04-27 09:20:59,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:59,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:59,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:59,935 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:20:59,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:20:59,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:20:59,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:20:59,969 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:00,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:00,055 INFO L85 PathProgramCache]: Analyzing trace with hash 420513488, now seen corresponding path program 72 times [2024-04-27 09:21:00,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:00,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:00,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:00,062 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:00,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:00,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:00,202 INFO L85 PathProgramCache]: Analyzing trace with hash 151016341, now seen corresponding path program 73 times [2024-04-27 09:21:00,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:00,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:00,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:00,228 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:21:00,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:00,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:00,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:00,256 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:21:00,334 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:00,385 INFO L85 PathProgramCache]: Analyzing trace with hash -1024670290, now seen corresponding path program 74 times [2024-04-27 09:21:00,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:00,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:00,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:00,415 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:00,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:00,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:00,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:00,442 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:00,598 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:00,640 INFO L85 PathProgramCache]: Analyzing trace with hash -1980708206, now seen corresponding path program 75 times [2024-04-27 09:21:00,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:00,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:00,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:00,676 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 9 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:00,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:00,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:00,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:00,711 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 9 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:00,857 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:00,896 INFO L85 PathProgramCache]: Analyzing trace with hash 1321579499, now seen corresponding path program 76 times [2024-04-27 09:21:00,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:00,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:00,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:00,930 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 8 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:00,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:00,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:00,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:00,965 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 8 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:01,038 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,040 INFO L85 PathProgramCache]: Analyzing trace with hash 1272134568, now seen corresponding path program 77 times [2024-04-27 09:21:01,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:01,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:01,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:01,097 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 8 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:01,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:01,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:01,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:01,137 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 8 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:01,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:01,260 INFO L85 PathProgramCache]: Analyzing trace with hash -1160634670, now seen corresponding path program 78 times [2024-04-27 09:21:01,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:01,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:01,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:01,299 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 15 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:01,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:01,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:01,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:01,338 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 15 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:01,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,459 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,482 INFO L85 PathProgramCache]: Analyzing trace with hash -1700007813, now seen corresponding path program 79 times [2024-04-27 09:21:01,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:01,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:01,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:01,514 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:01,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:01,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:01,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:01,548 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:01,637 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,646 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,702 INFO L85 PathProgramCache]: Analyzing trace with hash -1160634544, now seen corresponding path program 80 times [2024-04-27 09:21:01,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:01,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:01,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:01,733 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:01,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:01,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:01,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:01,766 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:01,861 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,906 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:01,935 INFO L85 PathProgramCache]: Analyzing trace with hash -1619932388, now seen corresponding path program 81 times [2024-04-27 09:21:01,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:01,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:01,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:01,967 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:01,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:01,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:01,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:02,009 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:02,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:02,122 INFO L85 PathProgramCache]: Analyzing trace with hash 1817926127, now seen corresponding path program 82 times [2024-04-27 09:21:02,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:02,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:02,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:02,150 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:21:02,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:02,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:02,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:02,176 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:21:02,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:02,317 INFO L85 PathProgramCache]: Analyzing trace with hash 521135190, now seen corresponding path program 83 times [2024-04-27 09:21:02,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:02,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:02,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:02,382 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 17 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:02,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:02,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:02,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:02,454 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 17 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:02,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:02,626 INFO L85 PathProgramCache]: Analyzing trace with hash 1028474094, now seen corresponding path program 84 times [2024-04-27 09:21:02,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:02,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:02,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:02,654 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:21:02,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:02,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:02,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:02,681 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:21:04,188 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:04,241 INFO L85 PathProgramCache]: Analyzing trace with hash 2017900728, now seen corresponding path program 85 times [2024-04-27 09:21:04,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:04,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:04,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:04,245 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:04,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:04,324 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:04,366 INFO L85 PathProgramCache]: Analyzing trace with hash -393481469, now seen corresponding path program 86 times [2024-04-27 09:21:04,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:04,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:04,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:04,413 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:04,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:04,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:04,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:04,428 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:04,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:04,537 INFO L85 PathProgramCache]: Analyzing trace with hash -101674088, now seen corresponding path program 19 times [2024-04-27 09:21:04,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:04,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:04,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:04,550 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:04,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:04,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:04,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:04,565 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:04,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:04,673 INFO L85 PathProgramCache]: Analyzing trace with hash 1797835491, now seen corresponding path program 18 times [2024-04-27 09:21:04,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:04,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:04,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:04,691 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:04,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:04,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:04,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:04,707 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:04,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:04,833 INFO L85 PathProgramCache]: Analyzing trace with hash 196542032, now seen corresponding path program 17 times [2024-04-27 09:21:04,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:04,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:04,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:04,847 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:04,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:04,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:04,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:04,861 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:04,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:04,980 INFO L85 PathProgramCache]: Analyzing trace with hash -101644018, now seen corresponding path program 87 times [2024-04-27 09:21:04,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:04,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:04,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:04,993 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:04,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:04,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:04,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,011 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:05,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:05,124 INFO L85 PathProgramCache]: Analyzing trace with hash -1164855965, now seen corresponding path program 20 times [2024-04-27 09:21:05,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:05,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:05,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,144 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:05,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:05,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:05,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,161 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:05,230 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:05,273 INFO L85 PathProgramCache]: Analyzing trace with hash 239518648, now seen corresponding path program 19 times [2024-04-27 09:21:05,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:05,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:05,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,350 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:05,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:05,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:05,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,363 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:05,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:05,481 INFO L85 PathProgramCache]: Analyzing trace with hash 423368411, now seen corresponding path program 18 times [2024-04-27 09:21:05,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:05,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:05,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,495 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:05,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:05,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:05,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,510 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:05,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:05,617 INFO L85 PathProgramCache]: Analyzing trace with hash 423368442, now seen corresponding path program 88 times [2024-04-27 09:21:05,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:05,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:05,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,632 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:21:05,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:05,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:05,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,647 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:21:05,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:05,758 INFO L85 PathProgramCache]: Analyzing trace with hash -124890278, now seen corresponding path program 89 times [2024-04-27 09:21:05,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:05,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:05,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,778 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:05,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:05,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:05,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,791 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:05,860 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:05,904 INFO L85 PathProgramCache]: Analyzing trace with hash 1144002831, now seen corresponding path program 19 times [2024-04-27 09:21:05,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:05,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:05,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,930 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:05,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:05,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:05,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:05,947 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:06,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:06,067 INFO L85 PathProgramCache]: Analyzing trace with hash 1104349488, now seen corresponding path program 20 times [2024-04-27 09:21:06,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,084 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:06,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,099 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:06,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:06,207 INFO L85 PathProgramCache]: Analyzing trace with hash -124904121, now seen corresponding path program 21 times [2024-04-27 09:21:06,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,224 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:06,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,237 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:06,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:06,346 INFO L85 PathProgramCache]: Analyzing trace with hash 1144002832, now seen corresponding path program 90 times [2024-04-27 09:21:06,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,359 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:06,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,372 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:06,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:06,482 INFO L85 PathProgramCache]: Analyzing trace with hash 1104349520, now seen corresponding path program 91 times [2024-04-27 09:21:06,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,496 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:06,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,509 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:06,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:06,632 INFO L85 PathProgramCache]: Analyzing trace with hash -124903151, now seen corresponding path program 92 times [2024-04-27 09:21:06,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,651 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:06,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,690 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:06,759 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:06,799 INFO L85 PathProgramCache]: Analyzing trace with hash 1797836483, now seen corresponding path program 93 times [2024-04-27 09:21:06,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,813 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:21:06,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,829 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:21:06,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:06,937 INFO L85 PathProgramCache]: Analyzing trace with hash 196542063, now seen corresponding path program 94 times [2024-04-27 09:21:06,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,949 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 09:21:06,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:06,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:06,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:06,961 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 09:21:07,029 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:07,083 INFO L85 PathProgramCache]: Analyzing trace with hash -1240585915, now seen corresponding path program 95 times [2024-04-27 09:21:07,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:07,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:07,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:07,099 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:07,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:07,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:07,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:07,112 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:07,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:07,223 INFO L85 PathProgramCache]: Analyzing trace with hash 686976442, now seen corresponding path program 20 times [2024-04-27 09:21:07,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:07,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:07,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:07,236 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:07,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:07,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:07,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:07,247 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:07,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:07,359 INFO L85 PathProgramCache]: Analyzing trace with hash -178566683, now seen corresponding path program 21 times [2024-04-27 09:21:07,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:07,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:07,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:07,372 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:07,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:07,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:07,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:07,384 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:07,528 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:07,572 INFO L85 PathProgramCache]: Analyzing trace with hash -1240599758, now seen corresponding path program 22 times [2024-04-27 09:21:07,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:07,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:07,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:07,587 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:07,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:07,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:07,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:07,603 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:07,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:07,743 INFO L85 PathProgramCache]: Analyzing trace with hash 686976443, now seen corresponding path program 96 times [2024-04-27 09:21:07,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:07,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:07,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:07,762 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:07,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:07,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:07,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:07,780 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:07,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:07,896 INFO L85 PathProgramCache]: Analyzing trace with hash -12692946, now seen corresponding path program 97 times [2024-04-27 09:21:07,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:07,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:07,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:07,909 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:07,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:07,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:07,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:07,925 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:07,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:08,046 INFO L85 PathProgramCache]: Analyzing trace with hash -1869586779, now seen corresponding path program 21 times [2024-04-27 09:21:08,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:08,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:08,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:08,049 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:08,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:08,126 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:08,170 INFO L85 PathProgramCache]: Analyzing trace with hash -2122615206, now seen corresponding path program 22 times [2024-04-27 09:21:08,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:08,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:08,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:08,174 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:08,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:08,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:08,296 INFO L85 PathProgramCache]: Analyzing trace with hash -1376561827, now seen corresponding path program 23 times [2024-04-27 09:21:08,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:08,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:08,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:08,299 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:08,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:08,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:08,418 INFO L85 PathProgramCache]: Analyzing trace with hash -1869586778, now seen corresponding path program 98 times [2024-04-27 09:21:08,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:08,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:08,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:08,421 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:08,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:08,511 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:08,558 INFO L85 PathProgramCache]: Analyzing trace with hash -2122615174, now seen corresponding path program 99 times [2024-04-27 09:21:08,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:08,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:08,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:08,561 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:08,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:08,632 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:08,683 INFO L85 PathProgramCache]: Analyzing trace with hash -1376560857, now seen corresponding path program 100 times [2024-04-27 09:21:08,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:08,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:08,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:08,686 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:08,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:09,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:09,549 INFO L85 PathProgramCache]: Analyzing trace with hash -865846335, now seen corresponding path program 1 times [2024-04-27 09:21:09,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:09,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:09,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:09,555 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:09,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:09,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:09,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:09,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:09,842 INFO L85 PathProgramCache]: Analyzing trace with hash 1844201099, now seen corresponding path program 2 times [2024-04-27 09:21:09,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:09,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:09,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:09,845 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:09,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:10,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:10,098 INFO L85 PathProgramCache]: Analyzing trace with hash 2017356545, now seen corresponding path program 3 times [2024-04-27 09:21:10,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:10,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:10,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:10,101 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:10,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:10,254 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:10,308 INFO L85 PathProgramCache]: Analyzing trace with hash 1580669547, now seen corresponding path program 1 times [2024-04-27 09:21:10,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:10,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:10,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:10,320 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:10,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:10,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:10,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:10,339 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:10,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:10,543 INFO L85 PathProgramCache]: Analyzing trace with hash 588662646, now seen corresponding path program 1 times [2024-04-27 09:21:10,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:10,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:10,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:10,554 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:10,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:10,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:10,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:10,565 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:10,703 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:10,759 INFO L85 PathProgramCache]: Analyzing trace with hash 828120051, now seen corresponding path program 1 times [2024-04-27 09:21:10,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:10,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:10,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:10,770 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:10,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:10,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:10,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:10,783 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:10,915 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:11,048 INFO L85 PathProgramCache]: Analyzing trace with hash -1939167666, now seen corresponding path program 1 times [2024-04-27 09:21:11,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:11,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:11,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:11,060 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:11,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:11,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:11,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:11,071 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:11,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:11,213 INFO L85 PathProgramCache]: Analyzing trace with hash 1864547377, now seen corresponding path program 2 times [2024-04-27 09:21:11,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:11,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:11,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:11,234 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:11,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:11,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:11,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:11,261 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:11,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:11,396 INFO L85 PathProgramCache]: Analyzing trace with hash 15344591, now seen corresponding path program 2 times [2024-04-27 09:21:11,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:11,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:11,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:11,412 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:11,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:11,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:11,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:11,429 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:11,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:11,557 INFO L85 PathProgramCache]: Analyzing trace with hash 475682416, now seen corresponding path program 2 times [2024-04-27 09:21:11,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:11,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:11,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:11,573 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:11,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:11,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:11,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:11,585 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:11,654 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:11,713 INFO L85 PathProgramCache]: Analyzing trace with hash 1861253127, now seen corresponding path program 2 times [2024-04-27 09:21:11,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:11,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:11,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:11,728 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:11,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:11,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:11,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:11,740 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:11,813 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:11,863 INFO L85 PathProgramCache]: Analyzing trace with hash 15344592, now seen corresponding path program 3 times [2024-04-27 09:21:11,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:11,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:11,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:11,874 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:11,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:11,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:11,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:11,885 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:11,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:12,015 INFO L85 PathProgramCache]: Analyzing trace with hash 475682448, now seen corresponding path program 4 times [2024-04-27 09:21:12,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,027 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:12,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,043 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:12,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:12,174 INFO L85 PathProgramCache]: Analyzing trace with hash 1861254097, now seen corresponding path program 5 times [2024-04-27 09:21:12,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,195 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:12,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,211 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:12,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:12,352 INFO L85 PathProgramCache]: Analyzing trace with hash 1864302252, now seen corresponding path program 3 times [2024-04-27 09:21:12,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,364 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:12,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,374 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:12,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:12,505 INFO L85 PathProgramCache]: Analyzing trace with hash 1958795059, now seen corresponding path program 3 times [2024-04-27 09:21:12,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,517 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:12,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,532 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:12,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:12,665 INFO L85 PathProgramCache]: Analyzing trace with hash 593104804, now seen corresponding path program 3 times [2024-04-27 09:21:12,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,683 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:12,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,696 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:12,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:12,826 INFO L85 PathProgramCache]: Analyzing trace with hash 1864302253, now seen corresponding path program 6 times [2024-04-27 09:21:12,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,838 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:12,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,849 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:12,918 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:12,977 INFO L85 PathProgramCache]: Analyzing trace with hash 1958795091, now seen corresponding path program 7 times [2024-04-27 09:21:12,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:12,989 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:12,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:12,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:12,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:13,002 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:13,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:13,128 INFO L85 PathProgramCache]: Analyzing trace with hash 593105774, now seen corresponding path program 8 times [2024-04-27 09:21:13,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:13,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:13,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:13,140 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:13,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:13,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:13,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:13,152 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:13,221 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:13,286 INFO L85 PathProgramCache]: Analyzing trace with hash 1206409903, now seen corresponding path program 4 times [2024-04-27 09:21:13,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:13,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:13,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:13,300 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:13,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:13,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:13,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:13,312 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:13,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:13,436 INFO L85 PathProgramCache]: Analyzing trace with hash -1255998576, now seen corresponding path program 4 times [2024-04-27 09:21:13,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:13,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:13,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:13,453 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:13,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:13,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:13,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:13,468 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:13,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:13,598 INFO L85 PathProgramCache]: Analyzing trace with hash -281250073, now seen corresponding path program 4 times [2024-04-27 09:21:13,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:13,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:13,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:13,689 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:13,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:13,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:13,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:13,704 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:13,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:13,834 INFO L85 PathProgramCache]: Analyzing trace with hash 1206409904, now seen corresponding path program 9 times [2024-04-27 09:21:13,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:13,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:13,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:13,846 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:13,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:13,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:13,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:13,863 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:14,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:14,120 INFO L85 PathProgramCache]: Analyzing trace with hash 2015656247, now seen corresponding path program 10 times [2024-04-27 09:21:14,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:14,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:14,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:14,132 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:14,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:14,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:14,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:14,142 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:14,234 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:14,254 INFO L85 PathProgramCache]: Analyzing trace with hash -829186536, now seen corresponding path program 11 times [2024-04-27 09:21:14,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:14,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:14,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:14,257 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:14,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:14,349 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:14,408 INFO L85 PathProgramCache]: Analyzing trace with hash 65021261, now seen corresponding path program 12 times [2024-04-27 09:21:14,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:14,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:14,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:14,420 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:14,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:14,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:14,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:14,430 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:15,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:15,768 INFO L85 PathProgramCache]: Analyzing trace with hash -350566380, now seen corresponding path program 13 times [2024-04-27 09:21:15,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:15,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:15,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:15,772 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:15,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:16,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:16,148 INFO L85 PathProgramCache]: Analyzing trace with hash 1704296173, now seen corresponding path program 1 times [2024-04-27 09:21:16,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:16,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:16,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:16,151 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:16,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:16,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-04-27 09:21:16,415 INFO L85 PathProgramCache]: Analyzing trace with hash -981140257, now seen corresponding path program 2 times [2024-04-27 09:21:16,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:16,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:16,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:16,417 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:16,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:16,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:16,549 INFO L85 PathProgramCache]: Analyzing trace with hash 1154047600, now seen corresponding path program 1 times [2024-04-27 09:21:16,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:16,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:16,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:16,552 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:16,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:16,626 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:16,687 INFO L85 PathProgramCache]: Analyzing trace with hash 1415737325, now seen corresponding path program 1 times [2024-04-27 09:21:16,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:16,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:16,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:16,689 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:16,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:16,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:16,817 INFO L85 PathProgramCache]: Analyzing trace with hash 938184210, now seen corresponding path program 1 times [2024-04-27 09:21:16,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:16,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:16,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:16,819 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:16,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:16,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:16,958 INFO L85 PathProgramCache]: Analyzing trace with hash -981060443, now seen corresponding path program 1 times [2024-04-27 09:21:16,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:16,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:16,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:16,960 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:16,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:17,166 INFO L85 PathProgramCache]: Analyzing trace with hash 1415737326, now seen corresponding path program 2 times [2024-04-27 09:21:17,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:17,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:17,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,168 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:17,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,258 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:17,315 INFO L85 PathProgramCache]: Analyzing trace with hash 938184242, now seen corresponding path program 3 times [2024-04-27 09:21:17,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:17,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:17,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,318 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:17,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:17,451 INFO L85 PathProgramCache]: Analyzing trace with hash -981059473, now seen corresponding path program 4 times [2024-04-27 09:21:17,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:17,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:17,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,453 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:17,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:17,583 INFO L85 PathProgramCache]: Analyzing trace with hash -348072498, now seen corresponding path program 2 times [2024-04-27 09:21:17,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:17,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:17,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,585 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:17,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,663 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:17,723 INFO L85 PathProgramCache]: Analyzing trace with hash 2094654545, now seen corresponding path program 2 times [2024-04-27 09:21:17,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:17,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:17,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,725 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:17,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:17,856 INFO L85 PathProgramCache]: Analyzing trace with hash 509781574, now seen corresponding path program 2 times [2024-04-27 09:21:17,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:17,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:17,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,859 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:17,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,931 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:17,995 INFO L85 PathProgramCache]: Analyzing trace with hash -348072497, now seen corresponding path program 5 times [2024-04-27 09:21:17,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:17,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:17,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:17,997 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:17,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:18,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:18,128 INFO L85 PathProgramCache]: Analyzing trace with hash 2094654577, now seen corresponding path program 6 times [2024-04-27 09:21:18,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:18,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:18,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:18,130 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:18,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:18,218 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:18,275 INFO L85 PathProgramCache]: Analyzing trace with hash 509782544, now seen corresponding path program 7 times [2024-04-27 09:21:18,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:18,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:18,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:18,278 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:18,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:18,380 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:18,437 INFO L85 PathProgramCache]: Analyzing trace with hash -1376610227, now seen corresponding path program 3 times [2024-04-27 09:21:18,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:18,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:18,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:18,440 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:18,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:18,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:18,572 INFO L85 PathProgramCache]: Analyzing trace with hash 274756018, now seen corresponding path program 3 times [2024-04-27 09:21:18,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:18,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:18,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:18,576 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:18,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:18,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:18,715 INFO L85 PathProgramCache]: Analyzing trace with hash -72497915, now seen corresponding path program 3 times [2024-04-27 09:21:18,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:18,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:18,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:18,718 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:18,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:18,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:18,852 INFO L85 PathProgramCache]: Analyzing trace with hash -1376610226, now seen corresponding path program 8 times [2024-04-27 09:21:18,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:18,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:18,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:18,855 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:18,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:19,164 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:19,214 INFO L85 PathProgramCache]: Analyzing trace with hash -1625338659, now seen corresponding path program 1 times [2024-04-27 09:21:19,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:19,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:19,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:19,216 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:19,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:19,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:19,419 INFO L85 PathProgramCache]: Analyzing trace with hash 2120022468, now seen corresponding path program 1 times [2024-04-27 09:21:19,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:19,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:19,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:19,433 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:19,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:19,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:19,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:19,446 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:19,447 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-04-27 09:21:19,448 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=242, Invalid=1738, Unknown=0, NotChecked=0, Total=1980 [2024-04-27 09:21:20,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:20,054 INFO L85 PathProgramCache]: Analyzing trace with hash -902274410, now seen corresponding path program 101 times [2024-04-27 09:21:20,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:20,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:20,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:20,075 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:20,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:20,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:20,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:20,101 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:20,181 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:20,225 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264455, now seen corresponding path program 22 times [2024-04-27 09:21:20,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:20,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:20,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:20,252 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:20,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:20,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:20,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:20,278 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:20,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:20,388 INFO L85 PathProgramCache]: Analyzing trace with hash 497688760, now seen corresponding path program 23 times [2024-04-27 09:21:20,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:20,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:20,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:20,407 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:20,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:20,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:20,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:20,511 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:20,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:20,620 INFO L85 PathProgramCache]: Analyzing trace with hash -1751517505, now seen corresponding path program 24 times [2024-04-27 09:21:20,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:20,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:20,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:20,646 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:20,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:20,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:20,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:20,669 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:20,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:20,779 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264456, now seen corresponding path program 102 times [2024-04-27 09:21:20,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:20,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:20,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:20,803 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:20,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:20,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:20,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:20,828 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:20,902 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:20,965 INFO L85 PathProgramCache]: Analyzing trace with hash 497688792, now seen corresponding path program 103 times [2024-04-27 09:21:20,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:20,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:20,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:20,990 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:20,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:20,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:20,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,016 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:21,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:21,133 INFO L85 PathProgramCache]: Analyzing trace with hash -1751516535, now seen corresponding path program 104 times [2024-04-27 09:21:21,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:21,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:21,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,161 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:21,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:21,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:21,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,185 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:21,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:21,296 INFO L85 PathProgramCache]: Analyzing trace with hash 1537562356, now seen corresponding path program 23 times [2024-04-27 09:21:21,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:21,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:21,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,321 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:21,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:21,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:21,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,346 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:21,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:21,454 INFO L85 PathProgramCache]: Analyzing trace with hash 419792875, now seen corresponding path program 24 times [2024-04-27 09:21:21,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:21,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:21,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,482 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:21,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:21,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:21,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,503 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:21,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:21,611 INFO L85 PathProgramCache]: Analyzing trace with hash 128677356, now seen corresponding path program 25 times [2024-04-27 09:21:21,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:21,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:21,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,631 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:21,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:21,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:21,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,652 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:21,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:21,761 INFO L85 PathProgramCache]: Analyzing trace with hash 1537562357, now seen corresponding path program 105 times [2024-04-27 09:21:21,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:21,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:21,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,781 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:21,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:21,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:21,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,802 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:21,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:21,907 INFO L85 PathProgramCache]: Analyzing trace with hash 419792907, now seen corresponding path program 106 times [2024-04-27 09:21:21,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:21,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:21,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,927 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:21,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:21,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:21,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:21,948 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:22,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:22,078 INFO L85 PathProgramCache]: Analyzing trace with hash 128678326, now seen corresponding path program 107 times [2024-04-27 09:21:22,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:22,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:22,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:22,099 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:22,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:22,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:22,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:22,120 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:22,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:22,232 INFO L85 PathProgramCache]: Analyzing trace with hash -305939097, now seen corresponding path program 24 times [2024-04-27 09:21:22,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:22,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:22,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:22,253 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:22,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:22,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:22,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:22,274 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:22,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:22,381 INFO L85 PathProgramCache]: Analyzing trace with hash -894177320, now seen corresponding path program 25 times [2024-04-27 09:21:22,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:22,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:22,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:22,403 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:22,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:22,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:22,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:22,428 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:22,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:22,533 INFO L85 PathProgramCache]: Analyzing trace with hash -1949693025, now seen corresponding path program 26 times [2024-04-27 09:21:22,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:22,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:22,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:22,557 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:22,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:22,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:22,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:22,588 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:22,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:22,719 INFO L85 PathProgramCache]: Analyzing trace with hash -305939096, now seen corresponding path program 108 times [2024-04-27 09:21:22,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:22,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:22,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:22,747 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:22,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:22,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:22,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:22,776 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:22,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:23,040 INFO L85 PathProgramCache]: Analyzing trace with hash 386536431, now seen corresponding path program 109 times [2024-04-27 09:21:23,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:23,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:23,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:23,065 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:23,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:23,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:23,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:23,088 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:24,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:24,585 INFO L85 PathProgramCache]: Analyzing trace with hash 2017900728, now seen corresponding path program 110 times [2024-04-27 09:21:24,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:24,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:24,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:24,588 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:24,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:24,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:24,704 INFO L85 PathProgramCache]: Analyzing trace with hash -393511539, now seen corresponding path program 27 times [2024-04-27 09:21:24,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:24,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:24,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:24,716 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:24,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:24,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:24,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:24,739 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:24,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:24,857 INFO L85 PathProgramCache]: Analyzing trace with hash -12693938, now seen corresponding path program 26 times [2024-04-27 09:21:24,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:24,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:24,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:24,869 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:24,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:24,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:24,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:24,886 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:24,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:24,992 INFO L85 PathProgramCache]: Analyzing trace with hash 276685189, now seen corresponding path program 25 times [2024-04-27 09:21:24,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:24,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:24,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,002 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:25,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,013 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:25,081 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:25,127 INFO L85 PathProgramCache]: Analyzing trace with hash -393481469, now seen corresponding path program 111 times [2024-04-27 09:21:25,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,143 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:25,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,158 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:25,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:25,282 INFO L85 PathProgramCache]: Analyzing trace with hash -101674088, now seen corresponding path program 28 times [2024-04-27 09:21:25,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,295 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:25,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,307 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:25,373 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:25,421 INFO L85 PathProgramCache]: Analyzing trace with hash 1797835491, now seen corresponding path program 27 times [2024-04-27 09:21:25,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,437 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:25,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,449 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:25,518 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:25,563 INFO L85 PathProgramCache]: Analyzing trace with hash 196542032, now seen corresponding path program 26 times [2024-04-27 09:21:25,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,578 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:25,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,589 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:25,654 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:25,697 INFO L85 PathProgramCache]: Analyzing trace with hash -101644018, now seen corresponding path program 112 times [2024-04-27 09:21:25,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,710 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:25,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,722 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:25,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:25,828 INFO L85 PathProgramCache]: Analyzing trace with hash -1164855965, now seen corresponding path program 29 times [2024-04-27 09:21:25,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,843 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:25,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,864 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:25,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:25,976 INFO L85 PathProgramCache]: Analyzing trace with hash 239518648, now seen corresponding path program 28 times [2024-04-27 09:21:25,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:25,992 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:25,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:25,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:25,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,007 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:26,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:26,124 INFO L85 PathProgramCache]: Analyzing trace with hash 423368411, now seen corresponding path program 27 times [2024-04-27 09:21:26,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:26,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:26,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,137 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:26,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:26,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:26,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,152 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:26,226 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:26,264 INFO L85 PathProgramCache]: Analyzing trace with hash 423368442, now seen corresponding path program 113 times [2024-04-27 09:21:26,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:26,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:26,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,279 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:21:26,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:26,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:26,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,294 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:21:26,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:26,399 INFO L85 PathProgramCache]: Analyzing trace with hash -124890278, now seen corresponding path program 114 times [2024-04-27 09:21:26,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:26,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:26,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,412 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:26,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:26,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:26,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,425 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:21:26,491 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:26,532 INFO L85 PathProgramCache]: Analyzing trace with hash 1144002831, now seen corresponding path program 28 times [2024-04-27 09:21:26,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:26,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:26,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,545 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:26,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:26,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:26,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,558 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:26,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:26,675 INFO L85 PathProgramCache]: Analyzing trace with hash 1104349488, now seen corresponding path program 29 times [2024-04-27 09:21:26,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:26,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:26,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,780 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:26,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:26,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:26,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,797 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:26,863 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:26,906 INFO L85 PathProgramCache]: Analyzing trace with hash -124904121, now seen corresponding path program 30 times [2024-04-27 09:21:26,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:26,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:26,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,922 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:26,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:26,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:26,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:26,938 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:27,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:27,055 INFO L85 PathProgramCache]: Analyzing trace with hash 1144002832, now seen corresponding path program 115 times [2024-04-27 09:21:27,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,069 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:27,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,081 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:27,147 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:27,190 INFO L85 PathProgramCache]: Analyzing trace with hash 1104349520, now seen corresponding path program 116 times [2024-04-27 09:21:27,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,203 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:27,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,216 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:27,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:27,323 INFO L85 PathProgramCache]: Analyzing trace with hash -124903151, now seen corresponding path program 117 times [2024-04-27 09:21:27,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,336 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:27,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,350 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:21:27,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:27,457 INFO L85 PathProgramCache]: Analyzing trace with hash 1797836483, now seen corresponding path program 118 times [2024-04-27 09:21:27,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,469 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:21:27,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,481 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:21:27,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:27,589 INFO L85 PathProgramCache]: Analyzing trace with hash 196542063, now seen corresponding path program 119 times [2024-04-27 09:21:27,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,601 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 09:21:27,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,614 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 09:21:27,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:27,723 INFO L85 PathProgramCache]: Analyzing trace with hash -1240585915, now seen corresponding path program 120 times [2024-04-27 09:21:27,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,736 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:27,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,754 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:27,822 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:27,863 INFO L85 PathProgramCache]: Analyzing trace with hash 686976442, now seen corresponding path program 29 times [2024-04-27 09:21:27,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,875 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:27,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:27,886 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:27,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:27,995 INFO L85 PathProgramCache]: Analyzing trace with hash -178566683, now seen corresponding path program 30 times [2024-04-27 09:21:27,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:27,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:27,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:28,007 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:28,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:28,018 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:28,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:28,127 INFO L85 PathProgramCache]: Analyzing trace with hash -1240599758, now seen corresponding path program 31 times [2024-04-27 09:21:28,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:28,139 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:28,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:28,150 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:28,214 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:28,266 INFO L85 PathProgramCache]: Analyzing trace with hash 686976443, now seen corresponding path program 121 times [2024-04-27 09:21:28,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:28,278 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:28,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:28,289 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:28,355 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:28,401 INFO L85 PathProgramCache]: Analyzing trace with hash -12692946, now seen corresponding path program 122 times [2024-04-27 09:21:28,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:28,412 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:28,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:28,423 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:28,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:28,535 INFO L85 PathProgramCache]: Analyzing trace with hash 276685220, now seen corresponding path program 123 times [2024-04-27 09:21:28,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:28,549 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:28,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:28,564 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:28,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:28,675 INFO L85 PathProgramCache]: Analyzing trace with hash -1376547984, now seen corresponding path program 124 times [2024-04-27 09:21:28,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:28,688 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:28,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:28,699 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:28,766 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:28,825 INFO L85 PathProgramCache]: Analyzing trace with hash -1869586779, now seen corresponding path program 30 times [2024-04-27 09:21:28,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:28,828 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:28,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:28,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:28,938 INFO L85 PathProgramCache]: Analyzing trace with hash -2122615206, now seen corresponding path program 31 times [2024-04-27 09:21:28,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:28,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:28,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:28,940 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:28,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:29,014 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:29,055 INFO L85 PathProgramCache]: Analyzing trace with hash -1376561827, now seen corresponding path program 32 times [2024-04-27 09:21:29,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:29,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:29,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:29,058 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:29,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:29,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:29,169 INFO L85 PathProgramCache]: Analyzing trace with hash -1869586778, now seen corresponding path program 125 times [2024-04-27 09:21:29,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:29,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:29,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:29,172 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:29,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:29,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:29,324 INFO L85 PathProgramCache]: Analyzing trace with hash -2122615174, now seen corresponding path program 126 times [2024-04-27 09:21:29,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:29,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:29,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:29,327 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:29,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:29,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:29,454 INFO L85 PathProgramCache]: Analyzing trace with hash -1376560857, now seen corresponding path program 127 times [2024-04-27 09:21:29,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:29,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:29,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:29,457 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:29,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:30,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:30,335 INFO L85 PathProgramCache]: Analyzing trace with hash 619284885, now seen corresponding path program 128 times [2024-04-27 09:21:30,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:30,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:30,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:30,338 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:30,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:30,898 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:30,956 INFO L85 PathProgramCache]: Analyzing trace with hash -1939167666, now seen corresponding path program 14 times [2024-04-27 09:21:30,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:30,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:30,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:30,967 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:30,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:30,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:30,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:30,983 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,058 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:31,115 INFO L85 PathProgramCache]: Analyzing trace with hash 15344591, now seen corresponding path program 5 times [2024-04-27 09:21:31,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:31,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:31,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:31,126 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:31,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:31,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:31,137 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:31,268 INFO L85 PathProgramCache]: Analyzing trace with hash 475682416, now seen corresponding path program 5 times [2024-04-27 09:21:31,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:31,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:31,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:31,285 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:31,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:31,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:31,296 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:31,425 INFO L85 PathProgramCache]: Analyzing trace with hash 1861253127, now seen corresponding path program 5 times [2024-04-27 09:21:31,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:31,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:31,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:31,437 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:31,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:31,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:31,449 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:31,595 INFO L85 PathProgramCache]: Analyzing trace with hash 15344592, now seen corresponding path program 15 times [2024-04-27 09:21:31,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:31,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:31,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:31,607 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:31,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:31,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:31,617 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:31,744 INFO L85 PathProgramCache]: Analyzing trace with hash 475682448, now seen corresponding path program 16 times [2024-04-27 09:21:31,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:31,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:31,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:31,756 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:31,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:31,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:31,767 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:31,892 INFO L85 PathProgramCache]: Analyzing trace with hash 1861254097, now seen corresponding path program 17 times [2024-04-27 09:21:31,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:31,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:31,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:31,904 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:31,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:31,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:31,916 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:31,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:32,047 INFO L85 PathProgramCache]: Analyzing trace with hash 1864302252, now seen corresponding path program 6 times [2024-04-27 09:21:32,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:32,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:32,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:32,058 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:32,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:32,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:32,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:32,073 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:32,143 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:32,206 INFO L85 PathProgramCache]: Analyzing trace with hash 1958795059, now seen corresponding path program 6 times [2024-04-27 09:21:32,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:32,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:32,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:32,220 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:32,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:32,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:32,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:32,233 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:32,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:32,357 INFO L85 PathProgramCache]: Analyzing trace with hash 593104804, now seen corresponding path program 6 times [2024-04-27 09:21:32,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:32,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:32,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:32,379 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:32,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:32,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:32,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:32,394 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:32,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:32,526 INFO L85 PathProgramCache]: Analyzing trace with hash 1864302253, now seen corresponding path program 18 times [2024-04-27 09:21:32,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:32,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:32,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:32,547 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:32,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:32,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:32,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:32,564 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:32,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:32,694 INFO L85 PathProgramCache]: Analyzing trace with hash 1958795091, now seen corresponding path program 19 times [2024-04-27 09:21:32,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:32,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:32,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:32,706 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:32,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:32,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:32,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:32,719 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:32,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:32,850 INFO L85 PathProgramCache]: Analyzing trace with hash 593105774, now seen corresponding path program 20 times [2024-04-27 09:21:32,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:32,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:32,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:32,864 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:32,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:32,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:32,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:32,876 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:32,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:33,024 INFO L85 PathProgramCache]: Analyzing trace with hash 1206409903, now seen corresponding path program 7 times [2024-04-27 09:21:33,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:33,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:33,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:33,041 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:33,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:33,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:33,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:33,054 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:33,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:33,186 INFO L85 PathProgramCache]: Analyzing trace with hash -1255998576, now seen corresponding path program 7 times [2024-04-27 09:21:33,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:33,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:33,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:33,199 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:33,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:33,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:33,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:33,211 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:33,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:33,360 INFO L85 PathProgramCache]: Analyzing trace with hash -281250073, now seen corresponding path program 7 times [2024-04-27 09:21:33,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:33,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:33,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:33,372 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:33,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:33,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:33,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:33,385 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:33,453 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:33,512 INFO L85 PathProgramCache]: Analyzing trace with hash 1206409904, now seen corresponding path program 21 times [2024-04-27 09:21:33,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:33,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:33,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:33,525 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:33,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:33,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:33,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:33,634 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:33,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:33,873 INFO L85 PathProgramCache]: Analyzing trace with hash 2015656247, now seen corresponding path program 22 times [2024-04-27 09:21:33,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:33,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:33,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:33,891 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:33,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:33,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:33,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:33,904 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:35,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:35,484 INFO L85 PathProgramCache]: Analyzing trace with hash 1154047600, now seen corresponding path program 9 times [2024-04-27 09:21:35,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:35,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:35,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:35,486 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:35,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:35,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:35,614 INFO L85 PathProgramCache]: Analyzing trace with hash 1415737325, now seen corresponding path program 4 times [2024-04-27 09:21:35,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:35,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:35,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:35,616 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:35,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:35,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:35,752 INFO L85 PathProgramCache]: Analyzing trace with hash 938184210, now seen corresponding path program 4 times [2024-04-27 09:21:35,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:35,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:35,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:35,754 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:35,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:35,829 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:35,885 INFO L85 PathProgramCache]: Analyzing trace with hash -981060443, now seen corresponding path program 4 times [2024-04-27 09:21:35,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:35,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:35,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:35,887 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:35,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:35,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:36,019 INFO L85 PathProgramCache]: Analyzing trace with hash 1415737326, now seen corresponding path program 10 times [2024-04-27 09:21:36,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:36,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:36,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,021 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:36,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:36,157 INFO L85 PathProgramCache]: Analyzing trace with hash 938184242, now seen corresponding path program 11 times [2024-04-27 09:21:36,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:36,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:36,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,159 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:36,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:36,294 INFO L85 PathProgramCache]: Analyzing trace with hash -981059473, now seen corresponding path program 12 times [2024-04-27 09:21:36,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:36,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:36,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,297 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:36,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:36,432 INFO L85 PathProgramCache]: Analyzing trace with hash -348072498, now seen corresponding path program 5 times [2024-04-27 09:21:36,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:36,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:36,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,434 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:36,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,517 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:36,564 INFO L85 PathProgramCache]: Analyzing trace with hash 2094654545, now seen corresponding path program 5 times [2024-04-27 09:21:36,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:36,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:36,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,566 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:36,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:36,698 INFO L85 PathProgramCache]: Analyzing trace with hash 509781574, now seen corresponding path program 5 times [2024-04-27 09:21:36,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:36,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:36,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,700 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:36,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:36,832 INFO L85 PathProgramCache]: Analyzing trace with hash -348072497, now seen corresponding path program 13 times [2024-04-27 09:21:36,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:36,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:36,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,834 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:36,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,913 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:36,962 INFO L85 PathProgramCache]: Analyzing trace with hash 2094654577, now seen corresponding path program 14 times [2024-04-27 09:21:36,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:36,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:36,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:36,964 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:36,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:37,045 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:37,103 INFO L85 PathProgramCache]: Analyzing trace with hash 509782544, now seen corresponding path program 15 times [2024-04-27 09:21:37,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:37,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:37,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:37,105 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:37,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:37,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:37,250 INFO L85 PathProgramCache]: Analyzing trace with hash -1376610227, now seen corresponding path program 6 times [2024-04-27 09:21:37,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:37,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:37,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:37,252 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:37,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:37,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:37,383 INFO L85 PathProgramCache]: Analyzing trace with hash 274756018, now seen corresponding path program 6 times [2024-04-27 09:21:37,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:37,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:37,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:37,386 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:37,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:37,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:37,520 INFO L85 PathProgramCache]: Analyzing trace with hash -72497915, now seen corresponding path program 6 times [2024-04-27 09:21:37,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:37,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:37,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:37,523 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:37,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:37,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:37,657 INFO L85 PathProgramCache]: Analyzing trace with hash -1376610226, now seen corresponding path program 16 times [2024-04-27 09:21:37,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:37,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:37,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:37,661 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:37,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:37,978 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:38,035 INFO L85 PathProgramCache]: Analyzing trace with hash -1625338659, now seen corresponding path program 2 times [2024-04-27 09:21:38,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:38,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:38,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:38,037 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:38,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:38,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:38,636 INFO L85 PathProgramCache]: Analyzing trace with hash 509292660, now seen corresponding path program 1 times [2024-04-27 09:21:38,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:38,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:38,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:38,655 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:38,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:38,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:38,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:38,678 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:38,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:38,803 INFO L85 PathProgramCache]: Analyzing trace with hash -1391796631, now seen corresponding path program 1 times [2024-04-27 09:21:38,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:38,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:38,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:38,822 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:38,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:38,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:38,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:38,841 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:38,910 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:38,950 INFO L85 PathProgramCache]: Analyzing trace with hash -196022506, now seen corresponding path program 1 times [2024-04-27 09:21:38,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:38,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:38,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:38,969 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:38,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:38,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:38,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:38,988 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:39,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:39,090 INFO L85 PathProgramCache]: Analyzing trace with hash -1781730271, now seen corresponding path program 2 times [2024-04-27 09:21:39,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:39,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:39,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:39,117 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:39,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:39,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:39,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:39,143 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:39,218 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:39,262 INFO L85 PathProgramCache]: Analyzing trace with hash -1391796630, now seen corresponding path program 2 times [2024-04-27 09:21:39,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:39,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:39,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:39,280 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:39,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:39,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:39,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:39,299 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:39,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:39,403 INFO L85 PathProgramCache]: Analyzing trace with hash -196022474, now seen corresponding path program 3 times [2024-04-27 09:21:39,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:39,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:39,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:39,422 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:39,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:39,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:39,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:39,441 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:39,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:39,552 INFO L85 PathProgramCache]: Analyzing trace with hash -1781729301, now seen corresponding path program 4 times [2024-04-27 09:21:39,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:39,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:39,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:39,572 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:39,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:39,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:39,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:39,591 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:39,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:39,701 INFO L85 PathProgramCache]: Analyzing trace with hash 600966610, now seen corresponding path program 2 times [2024-04-27 09:21:39,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:39,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:39,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:39,733 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:39,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:39,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:39,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:39,766 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:39,853 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:39,901 INFO L85 PathProgramCache]: Analyzing trace with hash 1450095821, now seen corresponding path program 2 times [2024-04-27 09:21:39,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:39,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:39,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:39,922 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:39,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:39,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:39,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:39,943 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:40,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:40,050 INFO L85 PathProgramCache]: Analyzing trace with hash 2003297610, now seen corresponding path program 3 times [2024-04-27 09:21:40,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,071 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:40,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,091 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:40,154 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:40,197 INFO L85 PathProgramCache]: Analyzing trace with hash 600966611, now seen corresponding path program 5 times [2024-04-27 09:21:40,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,217 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:40,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,235 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:40,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:40,346 INFO L85 PathProgramCache]: Analyzing trace with hash 1450095853, now seen corresponding path program 6 times [2024-04-27 09:21:40,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,374 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:40,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,402 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:40,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:40,506 INFO L85 PathProgramCache]: Analyzing trace with hash 2003298580, now seen corresponding path program 7 times [2024-04-27 09:21:40,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,528 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:40,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,549 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:40,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:40,658 INFO L85 PathProgramCache]: Analyzing trace with hash 1972713929, now seen corresponding path program 3 times [2024-04-27 09:21:40,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,680 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:40,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,701 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:40,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:40,804 INFO L85 PathProgramCache]: Analyzing trace with hash 1024589750, now seen corresponding path program 3 times [2024-04-27 09:21:40,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,824 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:40,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,844 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:40,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:40,949 INFO L85 PathProgramCache]: Analyzing trace with hash 1697511297, now seen corresponding path program 4 times [2024-04-27 09:21:40,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,971 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:40,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:40,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:40,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:40,993 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:41,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:41,105 INFO L85 PathProgramCache]: Analyzing trace with hash 1972713930, now seen corresponding path program 8 times [2024-04-27 09:21:41,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:41,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:41,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:41,126 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:41,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:41,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:41,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:41,153 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:41,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:41,368 INFO L85 PathProgramCache]: Analyzing trace with hash 847712849, now seen corresponding path program 9 times [2024-04-27 09:21:41,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:41,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:41,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:41,389 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:41,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:41,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:41,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:41,413 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:42,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:42,915 INFO L85 PathProgramCache]: Analyzing trace with hash 744620822, now seen corresponding path program 10 times [2024-04-27 09:21:42,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:42,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:42,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:42,918 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:42,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:42,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:43,028 INFO L85 PathProgramCache]: Analyzing trace with hash -703526549, now seen corresponding path program 5 times [2024-04-27 09:21:43,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,040 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:43,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,050 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:43,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:43,155 INFO L85 PathProgramCache]: Analyzing trace with hash -1962357072, now seen corresponding path program 4 times [2024-04-27 09:21:43,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,166 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:43,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,176 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:43,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:43,280 INFO L85 PathProgramCache]: Analyzing trace with hash 1460718819, now seen corresponding path program 4 times [2024-04-27 09:21:43,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,291 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:43,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,301 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:43,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:43,410 INFO L85 PathProgramCache]: Analyzing trace with hash -703496479, now seen corresponding path program 11 times [2024-04-27 09:21:43,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,421 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:43,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,434 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:43,503 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:43,540 INFO L85 PathProgramCache]: Analyzing trace with hash -779534090, now seen corresponding path program 6 times [2024-04-27 09:21:43,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,553 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:43,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,564 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:43,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:43,671 INFO L85 PathProgramCache]: Analyzing trace with hash -717882939, now seen corresponding path program 5 times [2024-04-27 09:21:43,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,682 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:43,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,694 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:43,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:43,803 INFO L85 PathProgramCache]: Analyzing trace with hash 1639410478, now seen corresponding path program 5 times [2024-04-27 09:21:43,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,815 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:43,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,826 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:43,895 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:43,933 INFO L85 PathProgramCache]: Analyzing trace with hash -779504020, now seen corresponding path program 12 times [2024-04-27 09:21:43,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,945 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:21:43,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:43,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:43,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:43,975 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:21:44,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:44,094 INFO L85 PathProgramCache]: Analyzing trace with hash -2101451711, now seen corresponding path program 7 times [2024-04-27 09:21:44,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,107 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:21:44,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,119 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:21:44,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:44,231 INFO L85 PathProgramCache]: Analyzing trace with hash 209305882, now seen corresponding path program 6 times [2024-04-27 09:21:44,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,244 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:21:44,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,257 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:21:44,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:44,367 INFO L85 PathProgramCache]: Analyzing trace with hash -270342855, now seen corresponding path program 6 times [2024-04-27 09:21:44,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,380 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:21:44,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,392 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:21:44,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:44,499 INFO L85 PathProgramCache]: Analyzing trace with hash -270342824, now seen corresponding path program 13 times [2024-04-27 09:21:44,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,511 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:21:44,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,523 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:21:44,590 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:44,628 INFO L85 PathProgramCache]: Analyzing trace with hash 684015932, now seen corresponding path program 14 times [2024-04-27 09:21:44,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,641 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:21:44,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,653 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:21:44,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:44,764 INFO L85 PathProgramCache]: Analyzing trace with hash 1605179249, now seen corresponding path program 7 times [2024-04-27 09:21:44,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,777 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:44,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,790 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:44,854 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:44,902 INFO L85 PathProgramCache]: Analyzing trace with hash -1779050738, now seen corresponding path program 7 times [2024-04-27 09:21:44,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,917 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:44,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:44,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:44,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:44,930 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:44,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:45,040 INFO L85 PathProgramCache]: Analyzing trace with hash 684002089, now seen corresponding path program 8 times [2024-04-27 09:21:45,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,053 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:45,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,066 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:45,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:45,178 INFO L85 PathProgramCache]: Analyzing trace with hash 1605179250, now seen corresponding path program 15 times [2024-04-27 09:21:45,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,191 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:45,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,210 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:45,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:45,321 INFO L85 PathProgramCache]: Analyzing trace with hash -1779050706, now seen corresponding path program 16 times [2024-04-27 09:21:45,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,334 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:45,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,347 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:45,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:45,454 INFO L85 PathProgramCache]: Analyzing trace with hash 684003059, now seen corresponding path program 17 times [2024-04-27 09:21:45,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,466 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:45,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,590 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:21:45,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:45,696 INFO L85 PathProgramCache]: Analyzing trace with hash -717881947, now seen corresponding path program 18 times [2024-04-27 09:21:45,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,708 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 09:21:45,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,719 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 09:21:45,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:45,828 INFO L85 PathProgramCache]: Analyzing trace with hash 1639410509, now seen corresponding path program 19 times [2024-04-27 09:21:45,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,839 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:45,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,850 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:45,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:45,958 INFO L85 PathProgramCache]: Analyzing trace with hash 1576904871, now seen corresponding path program 20 times [2024-04-27 09:21:45,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,972 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:45,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:45,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:45,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:45,983 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:46,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:46,093 INFO L85 PathProgramCache]: Analyzing trace with hash -333554276, now seen corresponding path program 8 times [2024-04-27 09:21:46,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,104 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:46,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,115 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:46,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:46,224 INFO L85 PathProgramCache]: Analyzing trace with hash -1750247869, now seen corresponding path program 8 times [2024-04-27 09:21:46,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,235 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:46,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,246 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:46,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:46,354 INFO L85 PathProgramCache]: Analyzing trace with hash 1576891028, now seen corresponding path program 9 times [2024-04-27 09:21:46,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,365 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:46,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,376 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:46,441 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:46,481 INFO L85 PathProgramCache]: Analyzing trace with hash -333554275, now seen corresponding path program 21 times [2024-04-27 09:21:46,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,492 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:46,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,502 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:46,565 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:46,611 INFO L85 PathProgramCache]: Analyzing trace with hash -1962356080, now seen corresponding path program 22 times [2024-04-27 09:21:46,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,622 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:46,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,632 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:46,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:46,735 INFO L85 PathProgramCache]: Analyzing trace with hash 1460718850, now seen corresponding path program 23 times [2024-04-27 09:21:46,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,747 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:46,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,763 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:46,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:46,875 INFO L85 PathProgramCache]: Analyzing trace with hash -507069358, now seen corresponding path program 24 times [2024-04-27 09:21:46,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,888 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:46,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:46,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:46,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:46,899 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:46,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:47,004 INFO L85 PathProgramCache]: Analyzing trace with hash 1608409095, now seen corresponding path program 9 times [2024-04-27 09:21:47,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:47,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:47,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:47,008 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:47,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:47,094 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:47,133 INFO L85 PathProgramCache]: Analyzing trace with hash -1678925512, now seen corresponding path program 9 times [2024-04-27 09:21:47,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:47,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:47,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:47,135 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:47,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:47,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:47,246 INFO L85 PathProgramCache]: Analyzing trace with hash -507083201, now seen corresponding path program 10 times [2024-04-27 09:21:47,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:47,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:47,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:47,249 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:47,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:47,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:47,355 INFO L85 PathProgramCache]: Analyzing trace with hash 1608409096, now seen corresponding path program 25 times [2024-04-27 09:21:47,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:47,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:47,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:47,358 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:47,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:47,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:47,474 INFO L85 PathProgramCache]: Analyzing trace with hash -1678925480, now seen corresponding path program 26 times [2024-04-27 09:21:47,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:47,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:47,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:47,477 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:47,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:47,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:47,593 INFO L85 PathProgramCache]: Analyzing trace with hash -507082231, now seen corresponding path program 27 times [2024-04-27 09:21:47,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:47,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:47,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:47,597 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:47,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:48,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:48,350 INFO L85 PathProgramCache]: Analyzing trace with hash -114525321, now seen corresponding path program 28 times [2024-04-27 09:21:48,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:48,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:48,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:48,352 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:48,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:48,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:48,880 INFO L85 PathProgramCache]: Analyzing trace with hash -755134036, now seen corresponding path program 1 times [2024-04-27 09:21:48,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:48,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:48,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:48,891 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:48,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:48,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:48,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:48,902 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:48,974 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:49,025 INFO L85 PathProgramCache]: Analyzing trace with hash -1934318543, now seen corresponding path program 1 times [2024-04-27 09:21:49,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:49,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:49,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:49,036 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:49,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:49,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:49,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:49,047 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:49,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:49,175 INFO L85 PathProgramCache]: Analyzing trace with hash 165667406, now seen corresponding path program 1 times [2024-04-27 09:21:49,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:49,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:49,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:49,186 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:49,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:49,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:49,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:49,197 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:49,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:49,323 INFO L85 PathProgramCache]: Analyzing trace with hash 840722409, now seen corresponding path program 1 times [2024-04-27 09:21:49,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:49,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:49,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:49,334 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:49,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:49,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:49,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:49,344 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:49,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:49,475 INFO L85 PathProgramCache]: Analyzing trace with hash -1934318542, now seen corresponding path program 2 times [2024-04-27 09:21:49,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:49,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:49,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:49,486 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:49,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:49,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:49,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:49,497 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:49,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:49,743 INFO L85 PathProgramCache]: Analyzing trace with hash 165667438, now seen corresponding path program 3 times [2024-04-27 09:21:49,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:49,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:49,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:49,754 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:49,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:49,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:49,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:49,765 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:49,841 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:49,895 INFO L85 PathProgramCache]: Analyzing trace with hash 840723379, now seen corresponding path program 4 times [2024-04-27 09:21:49,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:49,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:49,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:49,907 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:49,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:49,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:49,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:49,918 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:49,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:50,050 INFO L85 PathProgramCache]: Analyzing trace with hash 292621066, now seen corresponding path program 2 times [2024-04-27 09:21:50,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:50,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:50,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:50,062 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:50,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:50,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:50,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:50,073 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:50,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:50,198 INFO L85 PathProgramCache]: Analyzing trace with hash 481318549, now seen corresponding path program 2 times [2024-04-27 09:21:50,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:50,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:50,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:50,210 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:50,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:50,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:50,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:50,222 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:50,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:50,345 INFO L85 PathProgramCache]: Analyzing trace with hash 2035973250, now seen corresponding path program 2 times [2024-04-27 09:21:50,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:50,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:50,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:50,357 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:50,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:50,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:50,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:50,369 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:50,442 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:50,494 INFO L85 PathProgramCache]: Analyzing trace with hash 292621067, now seen corresponding path program 5 times [2024-04-27 09:21:50,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:50,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:50,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:50,506 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:50,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:50,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:50,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:50,517 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:21:50,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:50,653 INFO L85 PathProgramCache]: Analyzing trace with hash 481318581, now seen corresponding path program 6 times [2024-04-27 09:21:50,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:50,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:50,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:50,669 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:50,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:50,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:50,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:50,684 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:50,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:50,859 INFO L85 PathProgramCache]: Analyzing trace with hash 2035974220, now seen corresponding path program 7 times [2024-04-27 09:21:50,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:50,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:50,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:50,875 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:50,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:50,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:50,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:50,891 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:50,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:51,056 INFO L85 PathProgramCache]: Analyzing trace with hash -1309308527, now seen corresponding path program 3 times [2024-04-27 09:21:51,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:51,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:51,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:51,071 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:51,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:51,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:51,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:51,087 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:51,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:51,241 INFO L85 PathProgramCache]: Analyzing trace with hash -1933858578, now seen corresponding path program 3 times [2024-04-27 09:21:51,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:51,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:51,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:51,253 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:51,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:51,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:51,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:51,264 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:51,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:51,396 INFO L85 PathProgramCache]: Analyzing trace with hash 179926345, now seen corresponding path program 3 times [2024-04-27 09:21:51,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:51,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:51,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:51,408 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:51,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:51,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:51,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:51,420 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:51,490 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:51,543 INFO L85 PathProgramCache]: Analyzing trace with hash -1309308526, now seen corresponding path program 8 times [2024-04-27 09:21:51,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:51,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:51,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:51,555 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:51,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:51,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:51,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:51,567 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:51,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:51,801 INFO L85 PathProgramCache]: Analyzing trace with hash -1409832423, now seen corresponding path program 9 times [2024-04-27 09:21:51,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:51,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:51,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:51,815 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:21:51,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:51,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:51,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:51,825 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:21:53,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:53,477 INFO L85 PathProgramCache]: Analyzing trace with hash -2081528242, now seen corresponding path program 1 times [2024-04-27 09:21:53,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:53,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:53,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:53,479 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:53,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:53,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:53,609 INFO L85 PathProgramCache]: Analyzing trace with hash -102865969, now seen corresponding path program 1 times [2024-04-27 09:21:53,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:53,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:53,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:53,611 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:53,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:53,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:53,741 INFO L85 PathProgramCache]: Analyzing trace with hash 1106122352, now seen corresponding path program 1 times [2024-04-27 09:21:53,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:53,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:53,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:53,743 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:53,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:53,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:53,869 INFO L85 PathProgramCache]: Analyzing trace with hash -69945337, now seen corresponding path program 1 times [2024-04-27 09:21:53,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:53,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:53,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:53,871 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:53,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:53,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:54,115 INFO L85 PathProgramCache]: Analyzing trace with hash -102865968, now seen corresponding path program 2 times [2024-04-27 09:21:54,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:54,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:54,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,117 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:54,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:54,246 INFO L85 PathProgramCache]: Analyzing trace with hash 1106122384, now seen corresponding path program 3 times [2024-04-27 09:21:54,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:54,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:54,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,247 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:54,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:54,377 INFO L85 PathProgramCache]: Analyzing trace with hash -69944367, now seen corresponding path program 4 times [2024-04-27 09:21:54,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:54,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:54,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,379 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:54,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,455 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:54,509 INFO L85 PathProgramCache]: Analyzing trace with hash 2126692012, now seen corresponding path program 2 times [2024-04-27 09:21:54,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:54,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:54,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,511 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:54,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,591 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:54,641 INFO L85 PathProgramCache]: Analyzing trace with hash 1502943027, now seen corresponding path program 2 times [2024-04-27 09:21:54,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:54,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:54,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,643 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:54,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:54,773 INFO L85 PathProgramCache]: Analyzing trace with hash -653406300, now seen corresponding path program 2 times [2024-04-27 09:21:54,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:54,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:54,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,774 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:54,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:54,904 INFO L85 PathProgramCache]: Analyzing trace with hash 2126692013, now seen corresponding path program 5 times [2024-04-27 09:21:54,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:54,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:54,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,907 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:54,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:54,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:55,037 INFO L85 PathProgramCache]: Analyzing trace with hash 1502943059, now seen corresponding path program 6 times [2024-04-27 09:21:55,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:55,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:55,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:55,039 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:55,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:55,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:55,166 INFO L85 PathProgramCache]: Analyzing trace with hash -653405330, now seen corresponding path program 7 times [2024-04-27 09:21:55,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:55,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:55,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:55,168 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:55,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:55,245 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:55,300 INFO L85 PathProgramCache]: Analyzing trace with hash 1219271343, now seen corresponding path program 3 times [2024-04-27 09:21:55,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:55,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:55,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:55,302 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:55,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:55,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:55,433 INFO L85 PathProgramCache]: Analyzing trace with hash -857293936, now seen corresponding path program 3 times [2024-04-27 09:21:55,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:55,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:55,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:55,435 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:55,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:55,508 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:55,564 INFO L85 PathProgramCache]: Analyzing trace with hash -806308121, now seen corresponding path program 3 times [2024-04-27 09:21:55,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:55,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:55,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:55,566 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:55,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:55,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:55,700 INFO L85 PathProgramCache]: Analyzing trace with hash 1219271344, now seen corresponding path program 8 times [2024-04-27 09:21:55,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:55,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:55,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:55,702 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:55,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:56,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:56,097 INFO L85 PathProgramCache]: Analyzing trace with hash -1452617409, now seen corresponding path program 1 times [2024-04-27 09:21:56,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:56,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:56,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:56,098 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:21:56,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:21:56,247 INFO L85 PathProgramCache]: Analyzing trace with hash -1909074985, now seen corresponding path program 1 times [2024-04-27 09:21:56,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:56,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:56,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:56,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:21:56,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:56,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:56,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:56,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:21:56,259 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-04-27 09:21:56,261 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=244, Invalid=1826, Unknown=0, NotChecked=0, Total=2070 [2024-04-27 09:21:56,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:56,806 INFO L85 PathProgramCache]: Analyzing trace with hash -902274410, now seen corresponding path program 129 times [2024-04-27 09:21:56,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:56,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:56,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:56,825 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:56,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:56,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:56,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:56,846 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:56,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:56,968 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264455, now seen corresponding path program 31 times [2024-04-27 09:21:56,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:56,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:56,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:56,994 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:56,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:56,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:56,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,019 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:57,135 INFO L85 PathProgramCache]: Analyzing trace with hash 497688760, now seen corresponding path program 32 times [2024-04-27 09:21:57,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:57,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:57,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,160 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:57,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:57,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,184 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,248 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:57,293 INFO L85 PathProgramCache]: Analyzing trace with hash -1751517505, now seen corresponding path program 33 times [2024-04-27 09:21:57,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:57,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:57,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,312 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:57,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:57,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,331 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:57,433 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264456, now seen corresponding path program 130 times [2024-04-27 09:21:57,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:57,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:57,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,459 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:57,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:57,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,477 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,542 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:57,583 INFO L85 PathProgramCache]: Analyzing trace with hash 497688792, now seen corresponding path program 131 times [2024-04-27 09:21:57,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:57,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:57,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,606 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:57,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:57,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,625 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:57,737 INFO L85 PathProgramCache]: Analyzing trace with hash -1751516535, now seen corresponding path program 132 times [2024-04-27 09:21:57,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:57,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:57,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,756 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:57,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:57,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,783 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:57,888 INFO L85 PathProgramCache]: Analyzing trace with hash 1537562356, now seen corresponding path program 32 times [2024-04-27 09:21:57,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:57,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:57,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,908 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:57,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:57,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:57,932 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:57,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:58,039 INFO L85 PathProgramCache]: Analyzing trace with hash 419792875, now seen corresponding path program 33 times [2024-04-27 09:21:58,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:58,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:58,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:58,059 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:58,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:58,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:58,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:58,190 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:58,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:58,296 INFO L85 PathProgramCache]: Analyzing trace with hash 128677356, now seen corresponding path program 34 times [2024-04-27 09:21:58,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:58,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:58,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:58,316 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:58,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:58,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:58,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:58,335 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:58,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:58,443 INFO L85 PathProgramCache]: Analyzing trace with hash 1537562357, now seen corresponding path program 133 times [2024-04-27 09:21:58,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:58,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:58,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:58,463 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:58,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:58,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:58,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:58,483 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:21:58,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:58,590 INFO L85 PathProgramCache]: Analyzing trace with hash 419792907, now seen corresponding path program 134 times [2024-04-27 09:21:58,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:58,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:58,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:58,609 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:58,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:58,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:58,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:58,629 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:21:58,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:58,734 INFO L85 PathProgramCache]: Analyzing trace with hash 128678326, now seen corresponding path program 135 times [2024-04-27 09:21:58,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:58,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:58,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:58,754 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:58,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:58,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:58,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:58,773 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:21:58,838 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:58,884 INFO L85 PathProgramCache]: Analyzing trace with hash -305939097, now seen corresponding path program 33 times [2024-04-27 09:21:58,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:58,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:58,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:58,905 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:58,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:58,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:58,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:58,924 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:58,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:59,028 INFO L85 PathProgramCache]: Analyzing trace with hash -894177320, now seen corresponding path program 34 times [2024-04-27 09:21:59,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:59,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:59,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:59,049 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:59,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:59,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:59,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:59,069 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:59,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:59,171 INFO L85 PathProgramCache]: Analyzing trace with hash -1949693025, now seen corresponding path program 35 times [2024-04-27 09:21:59,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:59,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:59,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:59,192 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:59,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:59,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:59,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:59,221 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:59,286 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:59,329 INFO L85 PathProgramCache]: Analyzing trace with hash -305939096, now seen corresponding path program 136 times [2024-04-27 09:21:59,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:59,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:59,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:59,350 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:59,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:59,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:59,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:59,373 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:21:59,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:21:59,586 INFO L85 PathProgramCache]: Analyzing trace with hash 386536431, now seen corresponding path program 137 times [2024-04-27 09:21:59,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:59,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:59,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:59,604 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:21:59,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:21:59,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:21:59,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:21:59,622 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:00,960 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:01,000 INFO L85 PathProgramCache]: Analyzing trace with hash 2017900728, now seen corresponding path program 138 times [2024-04-27 09:22:01,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:01,002 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:01,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:01,068 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:01,108 INFO L85 PathProgramCache]: Analyzing trace with hash -393511539, now seen corresponding path program 36 times [2024-04-27 09:22:01,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:01,119 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:01,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:01,129 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:01,191 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:01,231 INFO L85 PathProgramCache]: Analyzing trace with hash -12693938, now seen corresponding path program 35 times [2024-04-27 09:22:01,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:01,242 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:01,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:01,252 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:01,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:01,358 INFO L85 PathProgramCache]: Analyzing trace with hash 276685189, now seen corresponding path program 34 times [2024-04-27 09:22:01,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:01,370 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:01,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:01,380 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:01,455 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:01,500 INFO L85 PathProgramCache]: Analyzing trace with hash -393481469, now seen corresponding path program 139 times [2024-04-27 09:22:01,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:01,512 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:01,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:01,522 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:01,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:01,630 INFO L85 PathProgramCache]: Analyzing trace with hash -101674088, now seen corresponding path program 37 times [2024-04-27 09:22:01,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:01,642 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:01,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:01,653 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:01,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:01,869 INFO L85 PathProgramCache]: Analyzing trace with hash 1797835491, now seen corresponding path program 36 times [2024-04-27 09:22:01,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:01,883 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:01,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:01,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:01,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:01,896 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:01,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:02,006 INFO L85 PathProgramCache]: Analyzing trace with hash 196542032, now seen corresponding path program 35 times [2024-04-27 09:22:02,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,018 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:02,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,029 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:02,093 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:02,137 INFO L85 PathProgramCache]: Analyzing trace with hash -101644018, now seen corresponding path program 140 times [2024-04-27 09:22:02,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,149 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:02,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,161 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:02,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:02,269 INFO L85 PathProgramCache]: Analyzing trace with hash -1164855965, now seen corresponding path program 38 times [2024-04-27 09:22:02,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,282 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:22:02,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,303 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:22:02,381 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:02,426 INFO L85 PathProgramCache]: Analyzing trace with hash 239518648, now seen corresponding path program 37 times [2024-04-27 09:22:02,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,438 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:22:02,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,450 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:22:02,517 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:02,555 INFO L85 PathProgramCache]: Analyzing trace with hash 423368411, now seen corresponding path program 36 times [2024-04-27 09:22:02,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,569 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:22:02,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,581 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:22:02,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:02,689 INFO L85 PathProgramCache]: Analyzing trace with hash 423368442, now seen corresponding path program 141 times [2024-04-27 09:22:02,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,702 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:22:02,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,714 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:22:02,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:02,824 INFO L85 PathProgramCache]: Analyzing trace with hash -124890278, now seen corresponding path program 142 times [2024-04-27 09:22:02,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,837 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:22:02,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,849 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:22:02,924 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:02,965 INFO L85 PathProgramCache]: Analyzing trace with hash 1144002831, now seen corresponding path program 37 times [2024-04-27 09:22:02,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,979 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:22:02,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:02,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:02,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:02,991 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:22:03,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:03,096 INFO L85 PathProgramCache]: Analyzing trace with hash 1104349488, now seen corresponding path program 38 times [2024-04-27 09:22:03,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,109 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:22:03,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,138 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:22:03,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:03,244 INFO L85 PathProgramCache]: Analyzing trace with hash -124904121, now seen corresponding path program 39 times [2024-04-27 09:22:03,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,257 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:22:03,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,268 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:22:03,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:03,378 INFO L85 PathProgramCache]: Analyzing trace with hash 1144002832, now seen corresponding path program 143 times [2024-04-27 09:22:03,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,390 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:22:03,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,402 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:22:03,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:03,509 INFO L85 PathProgramCache]: Analyzing trace with hash 1104349520, now seen corresponding path program 144 times [2024-04-27 09:22:03,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,522 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:22:03,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,533 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:22:03,598 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:03,641 INFO L85 PathProgramCache]: Analyzing trace with hash -124903151, now seen corresponding path program 145 times [2024-04-27 09:22:03,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,653 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:22:03,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,665 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-04-27 09:22:03,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:03,773 INFO L85 PathProgramCache]: Analyzing trace with hash 1797836483, now seen corresponding path program 146 times [2024-04-27 09:22:03,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,785 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:22:03,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,796 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 09:22:03,861 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:03,901 INFO L85 PathProgramCache]: Analyzing trace with hash 196542063, now seen corresponding path program 147 times [2024-04-27 09:22:03,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,913 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 09:22:03,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:03,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:03,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:03,924 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 09:22:03,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:04,031 INFO L85 PathProgramCache]: Analyzing trace with hash -1240585915, now seen corresponding path program 148 times [2024-04-27 09:22:04,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,043 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:04,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,054 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:04,121 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:04,162 INFO L85 PathProgramCache]: Analyzing trace with hash 686976442, now seen corresponding path program 38 times [2024-04-27 09:22:04,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,173 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:04,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,184 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:04,248 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:04,288 INFO L85 PathProgramCache]: Analyzing trace with hash -178566683, now seen corresponding path program 39 times [2024-04-27 09:22:04,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,300 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:04,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,311 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:04,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:04,417 INFO L85 PathProgramCache]: Analyzing trace with hash -1240599758, now seen corresponding path program 40 times [2024-04-27 09:22:04,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,428 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:04,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,438 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:04,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:04,545 INFO L85 PathProgramCache]: Analyzing trace with hash 686976443, now seen corresponding path program 149 times [2024-04-27 09:22:04,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,556 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:04,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,567 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:04,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:04,677 INFO L85 PathProgramCache]: Analyzing trace with hash -12692946, now seen corresponding path program 150 times [2024-04-27 09:22:04,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,687 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:04,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,697 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:04,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:04,805 INFO L85 PathProgramCache]: Analyzing trace with hash 276685220, now seen corresponding path program 151 times [2024-04-27 09:22:04,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,816 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:04,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,826 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:04,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:04,960 INFO L85 PathProgramCache]: Analyzing trace with hash -1376547984, now seen corresponding path program 152 times [2024-04-27 09:22:04,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,974 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:04,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:04,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:04,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:04,989 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:05,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:05,113 INFO L85 PathProgramCache]: Analyzing trace with hash -1869586779, now seen corresponding path program 39 times [2024-04-27 09:22:05,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:05,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:05,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:05,116 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:05,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:05,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:05,237 INFO L85 PathProgramCache]: Analyzing trace with hash -2122615206, now seen corresponding path program 40 times [2024-04-27 09:22:05,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:05,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:05,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:05,240 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:05,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:05,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:05,470 INFO L85 PathProgramCache]: Analyzing trace with hash -1376561827, now seen corresponding path program 41 times [2024-04-27 09:22:05,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:05,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:05,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:05,472 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:05,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:05,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:05,584 INFO L85 PathProgramCache]: Analyzing trace with hash -1869586778, now seen corresponding path program 153 times [2024-04-27 09:22:05,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:05,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:05,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:05,586 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:05,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:05,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:05,721 INFO L85 PathProgramCache]: Analyzing trace with hash -2122615174, now seen corresponding path program 154 times [2024-04-27 09:22:05,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:05,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:05,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:05,724 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:05,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:05,792 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:05,837 INFO L85 PathProgramCache]: Analyzing trace with hash -1376560857, now seen corresponding path program 155 times [2024-04-27 09:22:05,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:05,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:05,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:05,840 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:05,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:06,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:06,580 INFO L85 PathProgramCache]: Analyzing trace with hash 619284885, now seen corresponding path program 156 times [2024-04-27 09:22:06,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:06,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:06,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:06,583 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:06,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:07,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:07,111 INFO L85 PathProgramCache]: Analyzing trace with hash -1939167666, now seen corresponding path program 23 times [2024-04-27 09:22:07,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:07,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:07,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:07,122 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:07,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:07,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:07,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:07,132 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:07,203 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:07,262 INFO L85 PathProgramCache]: Analyzing trace with hash 15344591, now seen corresponding path program 8 times [2024-04-27 09:22:07,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:07,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:07,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:07,273 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:07,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:07,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:07,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:07,283 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:07,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:07,413 INFO L85 PathProgramCache]: Analyzing trace with hash 475682416, now seen corresponding path program 8 times [2024-04-27 09:22:07,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:07,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:07,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:07,424 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:07,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:07,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:07,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:07,439 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:07,515 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:07,572 INFO L85 PathProgramCache]: Analyzing trace with hash 1861253127, now seen corresponding path program 8 times [2024-04-27 09:22:07,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:07,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:07,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:07,585 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:07,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:07,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:07,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:07,596 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:07,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:07,729 INFO L85 PathProgramCache]: Analyzing trace with hash 15344592, now seen corresponding path program 24 times [2024-04-27 09:22:07,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:07,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:07,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:07,740 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:07,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:07,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:07,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:07,751 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:07,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:07,885 INFO L85 PathProgramCache]: Analyzing trace with hash 475682448, now seen corresponding path program 25 times [2024-04-27 09:22:07,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:07,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:07,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:07,896 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:07,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:07,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:07,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:07,907 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:07,976 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:08,035 INFO L85 PathProgramCache]: Analyzing trace with hash 1861254097, now seen corresponding path program 26 times [2024-04-27 09:22:08,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,047 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:08,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,058 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:08,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:08,184 INFO L85 PathProgramCache]: Analyzing trace with hash 1864302252, now seen corresponding path program 9 times [2024-04-27 09:22:08,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,196 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:08,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,207 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:08,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:08,332 INFO L85 PathProgramCache]: Analyzing trace with hash 1958795059, now seen corresponding path program 9 times [2024-04-27 09:22:08,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,343 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:08,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,355 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:08,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:08,486 INFO L85 PathProgramCache]: Analyzing trace with hash 593104804, now seen corresponding path program 9 times [2024-04-27 09:22:08,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,498 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:08,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,509 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:08,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:08,634 INFO L85 PathProgramCache]: Analyzing trace with hash 1864302253, now seen corresponding path program 27 times [2024-04-27 09:22:08,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,645 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:08,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,657 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:08,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:08,781 INFO L85 PathProgramCache]: Analyzing trace with hash 1958795091, now seen corresponding path program 28 times [2024-04-27 09:22:08,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,792 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:08,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,804 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:08,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:08,930 INFO L85 PathProgramCache]: Analyzing trace with hash 593105774, now seen corresponding path program 29 times [2024-04-27 09:22:08,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,942 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:08,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:08,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:08,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:08,953 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:09,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:09,080 INFO L85 PathProgramCache]: Analyzing trace with hash 1206409903, now seen corresponding path program 10 times [2024-04-27 09:22:09,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:09,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:09,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:09,092 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:09,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:09,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:09,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:09,103 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:09,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:09,228 INFO L85 PathProgramCache]: Analyzing trace with hash -1255998576, now seen corresponding path program 10 times [2024-04-27 09:22:09,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:09,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:09,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:09,240 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:09,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:09,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:09,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:09,251 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:09,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:09,509 INFO L85 PathProgramCache]: Analyzing trace with hash -281250073, now seen corresponding path program 10 times [2024-04-27 09:22:09,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:09,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:09,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:09,521 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:09,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:09,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:09,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:09,533 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:09,602 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:09,663 INFO L85 PathProgramCache]: Analyzing trace with hash 1206409904, now seen corresponding path program 30 times [2024-04-27 09:22:09,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:09,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:09,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:09,675 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:09,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:09,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:09,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:09,686 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:09,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:09,907 INFO L85 PathProgramCache]: Analyzing trace with hash 2015656247, now seen corresponding path program 31 times [2024-04-27 09:22:09,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:09,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:09,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:09,920 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:09,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:09,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:09,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:09,932 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:12,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:12,057 INFO L85 PathProgramCache]: Analyzing trace with hash 509292660, now seen corresponding path program 29 times [2024-04-27 09:22:12,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,075 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,094 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:12,212 INFO L85 PathProgramCache]: Analyzing trace with hash -1391796631, now seen corresponding path program 10 times [2024-04-27 09:22:12,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,230 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,249 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:12,352 INFO L85 PathProgramCache]: Analyzing trace with hash -196022506, now seen corresponding path program 10 times [2024-04-27 09:22:12,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,371 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,391 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,454 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:12,499 INFO L85 PathProgramCache]: Analyzing trace with hash -1781730271, now seen corresponding path program 11 times [2024-04-27 09:22:12,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,519 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,545 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:12,653 INFO L85 PathProgramCache]: Analyzing trace with hash -1391796630, now seen corresponding path program 30 times [2024-04-27 09:22:12,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,672 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,690 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:12,797 INFO L85 PathProgramCache]: Analyzing trace with hash -196022474, now seen corresponding path program 31 times [2024-04-27 09:22:12,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,816 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,835 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:12,943 INFO L85 PathProgramCache]: Analyzing trace with hash -1781729301, now seen corresponding path program 32 times [2024-04-27 09:22:12,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,963 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:12,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:12,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:12,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:12,983 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:13,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:13,091 INFO L85 PathProgramCache]: Analyzing trace with hash 600966610, now seen corresponding path program 11 times [2024-04-27 09:22:13,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:13,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:13,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:13,110 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:13,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:13,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:13,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:13,129 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:13,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:13,349 INFO L85 PathProgramCache]: Analyzing trace with hash 1450095821, now seen corresponding path program 11 times [2024-04-27 09:22:13,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:13,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:13,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:13,368 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:13,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:13,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:13,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:13,388 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:13,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:13,493 INFO L85 PathProgramCache]: Analyzing trace with hash 2003297610, now seen corresponding path program 12 times [2024-04-27 09:22:13,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:13,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:13,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:13,512 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:13,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:13,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:13,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:13,532 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:13,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:13,638 INFO L85 PathProgramCache]: Analyzing trace with hash 600966611, now seen corresponding path program 33 times [2024-04-27 09:22:13,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:13,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:13,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:13,664 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:13,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:13,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:13,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:13,691 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:13,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:13,799 INFO L85 PathProgramCache]: Analyzing trace with hash 1450095853, now seen corresponding path program 34 times [2024-04-27 09:22:13,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:13,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:13,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:13,819 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:13,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:13,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:13,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:13,846 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:13,925 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:13,972 INFO L85 PathProgramCache]: Analyzing trace with hash 2003298580, now seen corresponding path program 35 times [2024-04-27 09:22:13,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:13,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:13,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:14,000 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:14,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:14,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:14,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:14,026 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:14,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:14,143 INFO L85 PathProgramCache]: Analyzing trace with hash 1972713929, now seen corresponding path program 12 times [2024-04-27 09:22:14,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:14,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:14,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:14,170 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:14,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:14,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:14,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:14,197 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:14,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:14,334 INFO L85 PathProgramCache]: Analyzing trace with hash 1024589750, now seen corresponding path program 12 times [2024-04-27 09:22:14,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:14,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:14,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:14,360 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:14,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:14,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:14,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:14,386 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:14,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:14,493 INFO L85 PathProgramCache]: Analyzing trace with hash 1697511297, now seen corresponding path program 13 times [2024-04-27 09:22:14,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:14,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:14,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:14,520 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:14,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:14,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:14,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:14,548 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:14,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:14,662 INFO L85 PathProgramCache]: Analyzing trace with hash 1972713930, now seen corresponding path program 36 times [2024-04-27 09:22:14,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:14,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:14,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:14,689 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:14,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:14,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:14,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:14,716 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:14,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:14,910 INFO L85 PathProgramCache]: Analyzing trace with hash 847712849, now seen corresponding path program 37 times [2024-04-27 09:22:14,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:14,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:14,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:14,928 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:14,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:14,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:14,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:14,947 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:16,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:16,357 INFO L85 PathProgramCache]: Analyzing trace with hash 744620822, now seen corresponding path program 38 times [2024-04-27 09:22:16,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:16,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:16,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:16,361 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:16,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:16,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:16,476 INFO L85 PathProgramCache]: Analyzing trace with hash -703526549, now seen corresponding path program 14 times [2024-04-27 09:22:16,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:16,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:16,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:16,487 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:16,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:16,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:16,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:16,498 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:16,564 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:16,602 INFO L85 PathProgramCache]: Analyzing trace with hash -1962357072, now seen corresponding path program 13 times [2024-04-27 09:22:16,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:16,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:16,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:16,612 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:16,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:16,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:16,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:16,622 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:16,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:16,728 INFO L85 PathProgramCache]: Analyzing trace with hash 1460718819, now seen corresponding path program 13 times [2024-04-27 09:22:16,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:16,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:16,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:16,739 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:16,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:16,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:16,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:16,749 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:16,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:16,856 INFO L85 PathProgramCache]: Analyzing trace with hash -703496479, now seen corresponding path program 39 times [2024-04-27 09:22:16,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:16,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:16,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:16,867 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:16,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:16,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:16,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:16,877 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:16,941 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:17,097 INFO L85 PathProgramCache]: Analyzing trace with hash -779534090, now seen corresponding path program 15 times [2024-04-27 09:22:17,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,109 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:17,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,121 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:17,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:17,227 INFO L85 PathProgramCache]: Analyzing trace with hash -717882939, now seen corresponding path program 14 times [2024-04-27 09:22:17,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,238 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:17,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,249 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:17,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:17,357 INFO L85 PathProgramCache]: Analyzing trace with hash 1639410478, now seen corresponding path program 14 times [2024-04-27 09:22:17,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,369 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:17,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,379 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:17,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:17,493 INFO L85 PathProgramCache]: Analyzing trace with hash -779504020, now seen corresponding path program 40 times [2024-04-27 09:22:17,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,505 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:22:17,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,518 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 09:22:17,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:17,628 INFO L85 PathProgramCache]: Analyzing trace with hash -2101451711, now seen corresponding path program 16 times [2024-04-27 09:22:17,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,641 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:22:17,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,654 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:22:17,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:17,764 INFO L85 PathProgramCache]: Analyzing trace with hash 209305882, now seen corresponding path program 15 times [2024-04-27 09:22:17,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,783 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:22:17,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,795 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:22:17,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:17,905 INFO L85 PathProgramCache]: Analyzing trace with hash -270342855, now seen corresponding path program 15 times [2024-04-27 09:22:17,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,918 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:22:17,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:17,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:17,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:17,932 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:22:17,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:18,040 INFO L85 PathProgramCache]: Analyzing trace with hash -270342824, now seen corresponding path program 41 times [2024-04-27 09:22:18,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,053 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:18,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,065 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:18,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:18,173 INFO L85 PathProgramCache]: Analyzing trace with hash 684015932, now seen corresponding path program 42 times [2024-04-27 09:22:18,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,186 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:22:18,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,199 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:22:18,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:18,309 INFO L85 PathProgramCache]: Analyzing trace with hash 1605179249, now seen corresponding path program 16 times [2024-04-27 09:22:18,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,322 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:18,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,339 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:18,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:18,446 INFO L85 PathProgramCache]: Analyzing trace with hash -1779050738, now seen corresponding path program 16 times [2024-04-27 09:22:18,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,458 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:18,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,470 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:18,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:18,580 INFO L85 PathProgramCache]: Analyzing trace with hash 684002089, now seen corresponding path program 17 times [2024-04-27 09:22:18,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,592 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:18,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,605 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:18,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:18,712 INFO L85 PathProgramCache]: Analyzing trace with hash 1605179250, now seen corresponding path program 43 times [2024-04-27 09:22:18,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,724 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:18,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,737 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:18,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:18,848 INFO L85 PathProgramCache]: Analyzing trace with hash -1779050706, now seen corresponding path program 44 times [2024-04-27 09:22:18,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,861 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:18,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,874 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:18,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:18,983 INFO L85 PathProgramCache]: Analyzing trace with hash 684003059, now seen corresponding path program 45 times [2024-04-27 09:22:18,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:18,996 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:18,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:18,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:18,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,015 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-04-27 09:22:19,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:19,166 INFO L85 PathProgramCache]: Analyzing trace with hash -717881947, now seen corresponding path program 46 times [2024-04-27 09:22:19,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:19,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:19,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,182 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 09:22:19,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:19,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:19,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,198 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 09:22:19,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:19,340 INFO L85 PathProgramCache]: Analyzing trace with hash 1639410509, now seen corresponding path program 47 times [2024-04-27 09:22:19,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:19,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:19,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,356 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:19,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:19,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:19,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,371 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:19,455 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:19,509 INFO L85 PathProgramCache]: Analyzing trace with hash 1576904871, now seen corresponding path program 48 times [2024-04-27 09:22:19,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:19,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:19,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,523 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:19,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:19,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:19,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,538 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:19,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:19,648 INFO L85 PathProgramCache]: Analyzing trace with hash -333554276, now seen corresponding path program 17 times [2024-04-27 09:22:19,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:19,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:19,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,659 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:19,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:19,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:19,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,670 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:19,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:19,780 INFO L85 PathProgramCache]: Analyzing trace with hash -1750247869, now seen corresponding path program 17 times [2024-04-27 09:22:19,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:19,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:19,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,792 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:19,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:19,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:19,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,803 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:19,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:19,911 INFO L85 PathProgramCache]: Analyzing trace with hash 1576891028, now seen corresponding path program 18 times [2024-04-27 09:22:19,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:19,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:19,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,923 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:19,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:19,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:19,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:19,934 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:20,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:20,049 INFO L85 PathProgramCache]: Analyzing trace with hash -333554275, now seen corresponding path program 49 times [2024-04-27 09:22:20,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:20,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:20,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:20,060 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:20,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:20,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:20,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:20,071 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:20,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:20,180 INFO L85 PathProgramCache]: Analyzing trace with hash -1962356080, now seen corresponding path program 50 times [2024-04-27 09:22:20,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:20,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:20,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:20,191 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:20,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:20,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:20,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:20,202 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:20,268 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:20,309 INFO L85 PathProgramCache]: Analyzing trace with hash 1460718850, now seen corresponding path program 51 times [2024-04-27 09:22:20,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:20,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:20,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:20,323 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:20,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:20,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:20,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:20,334 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:20,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:20,437 INFO L85 PathProgramCache]: Analyzing trace with hash -507069358, now seen corresponding path program 52 times [2024-04-27 09:22:20,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:20,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:20,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:20,448 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:20,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:20,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:20,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:20,458 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:20,523 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:20,678 INFO L85 PathProgramCache]: Analyzing trace with hash 1608409095, now seen corresponding path program 18 times [2024-04-27 09:22:20,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:20,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:20,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:20,680 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:20,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:20,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:20,789 INFO L85 PathProgramCache]: Analyzing trace with hash -1678925512, now seen corresponding path program 18 times [2024-04-27 09:22:20,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:20,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:20,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:20,791 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:20,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:20,857 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:20,900 INFO L85 PathProgramCache]: Analyzing trace with hash -507083201, now seen corresponding path program 19 times [2024-04-27 09:22:20,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:20,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:20,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:20,903 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:20,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:20,978 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:21,022 INFO L85 PathProgramCache]: Analyzing trace with hash 1608409096, now seen corresponding path program 53 times [2024-04-27 09:22:21,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:21,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:21,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:21,024 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:21,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:21,092 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:21,135 INFO L85 PathProgramCache]: Analyzing trace with hash -1678925480, now seen corresponding path program 54 times [2024-04-27 09:22:21,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:21,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:21,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:21,138 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:21,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:21,206 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:21,246 INFO L85 PathProgramCache]: Analyzing trace with hash -507082231, now seen corresponding path program 55 times [2024-04-27 09:22:21,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:21,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:21,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:21,250 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:21,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:21,943 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:21,983 INFO L85 PathProgramCache]: Analyzing trace with hash -114525321, now seen corresponding path program 56 times [2024-04-27 09:22:21,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:21,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:21,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:21,985 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:21,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:22,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:22,546 INFO L85 PathProgramCache]: Analyzing trace with hash -755134036, now seen corresponding path program 10 times [2024-04-27 09:22:22,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:22,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:22,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:22,557 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:22,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:22,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:22,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:22,568 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:22,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:22,710 INFO L85 PathProgramCache]: Analyzing trace with hash -1934318543, now seen corresponding path program 4 times [2024-04-27 09:22:22,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:22,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:22,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:22,721 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:22,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:22,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:22,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:22,731 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:22,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:22,855 INFO L85 PathProgramCache]: Analyzing trace with hash 165667406, now seen corresponding path program 4 times [2024-04-27 09:22:22,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:22,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:22,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:22,866 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:22,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:22,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:22,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:22,883 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:22,971 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:23,028 INFO L85 PathProgramCache]: Analyzing trace with hash 840722409, now seen corresponding path program 4 times [2024-04-27 09:22:23,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,039 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,049 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,117 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:23,173 INFO L85 PathProgramCache]: Analyzing trace with hash -1934318542, now seen corresponding path program 11 times [2024-04-27 09:22:23,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,184 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,195 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:23,323 INFO L85 PathProgramCache]: Analyzing trace with hash 165667438, now seen corresponding path program 12 times [2024-04-27 09:22:23,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,337 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,347 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:23,472 INFO L85 PathProgramCache]: Analyzing trace with hash 840723379, now seen corresponding path program 13 times [2024-04-27 09:22:23,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,483 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,494 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:23,621 INFO L85 PathProgramCache]: Analyzing trace with hash 292621066, now seen corresponding path program 5 times [2024-04-27 09:22:23,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,631 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,642 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:23,770 INFO L85 PathProgramCache]: Analyzing trace with hash 481318549, now seen corresponding path program 5 times [2024-04-27 09:22:23,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,782 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,793 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,863 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:23,919 INFO L85 PathProgramCache]: Analyzing trace with hash 2035973250, now seen corresponding path program 5 times [2024-04-27 09:22:23,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,930 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:23,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:23,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:23,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:23,943 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:24,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:24,067 INFO L85 PathProgramCache]: Analyzing trace with hash 292621067, now seen corresponding path program 14 times [2024-04-27 09:22:24,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:24,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:24,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:24,078 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:24,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:24,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:24,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:24,089 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:22:24,181 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:24,229 INFO L85 PathProgramCache]: Analyzing trace with hash 481318581, now seen corresponding path program 15 times [2024-04-27 09:22:24,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:24,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:24,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:24,241 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:24,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:24,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:24,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:24,252 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:24,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:24,383 INFO L85 PathProgramCache]: Analyzing trace with hash 2035974220, now seen corresponding path program 16 times [2024-04-27 09:22:24,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:24,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:24,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:24,394 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:24,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:24,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:24,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:24,406 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:24,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:24,540 INFO L85 PathProgramCache]: Analyzing trace with hash -1309308527, now seen corresponding path program 6 times [2024-04-27 09:22:24,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:24,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:24,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:24,555 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:24,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:24,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:24,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:24,569 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:24,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:24,706 INFO L85 PathProgramCache]: Analyzing trace with hash -1933858578, now seen corresponding path program 6 times [2024-04-27 09:22:24,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:24,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:24,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:24,722 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:24,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:24,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:24,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:24,855 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:24,947 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:25,028 INFO L85 PathProgramCache]: Analyzing trace with hash 179926345, now seen corresponding path program 6 times [2024-04-27 09:22:25,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:25,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:25,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:25,043 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:25,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:25,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:25,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:25,059 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:25,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:25,215 INFO L85 PathProgramCache]: Analyzing trace with hash -1309308526, now seen corresponding path program 17 times [2024-04-27 09:22:25,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:25,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:25,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:25,227 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:25,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:25,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:25,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:25,238 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:25,409 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:25,469 INFO L85 PathProgramCache]: Analyzing trace with hash -1409832423, now seen corresponding path program 18 times [2024-04-27 09:22:25,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:25,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:25,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:25,479 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:22:25,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:25,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:25,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:25,489 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:22:27,459 INFO L85 PathProgramCache]: Analyzing trace with hash -1709541123, now seen corresponding path program 1 times [2024-04-27 09:22:27,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:27,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:27,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:27,461 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:27,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:27,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-04-27 09:22:27,618 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 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[2024-04-27 09:22:27,619 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-04-27 09:22:27,619 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 09:22:27,619 INFO L85 PathProgramCache]: Analyzing trace with hash 4235235, now seen corresponding path program 1 times [2024-04-27 09:22:27,619 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 09:22:27,619 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [480049455] [2024-04-27 09:22:27,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:27,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:27,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:27,785 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:22:27,785 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 09:22:27,785 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [480049455] [2024-04-27 09:22:27,785 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [480049455] provided 0 perfect and 1 imperfect interpolant sequences [2024-04-27 09:22:27,786 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1701906247] [2024-04-27 09:22:27,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:27,786 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-04-27 09:22:27,786 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-04-27 09:22:27,788 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-04-27 09:22:27,829 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-04-27 09:22:27,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:27,897 INFO L262 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 15 conjunts are in the unsatisfiable core [2024-04-27 09:22:27,899 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-04-27 09:22:28,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-04-27 09:22:28,123 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-04-27 09:22:28,182 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:22:28,182 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-04-27 09:22:28,232 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:22:28,233 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 23 [2024-04-27 09:22:28,298 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:22:28,298 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 24 [2024-04-27 09:22:28,441 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:22:28,442 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1701906247] provided 0 perfect and 2 imperfect interpolant sequences [2024-04-27 09:22:28,442 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-04-27 09:22:28,442 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 29 [2024-04-27 09:22:28,443 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1317903526] [2024-04-27 09:22:28,443 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-04-27 09:22:28,444 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2024-04-27 09:22:28,444 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 09:22:28,445 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2024-04-27 09:22:28,445 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=681, Unknown=0, NotChecked=0, Total=812 [2024-04-27 09:22:28,445 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 09:22:28,445 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 09:22:28,445 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 2.3793103448275863) internal successors, (69), 29 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 09:22:28,445 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-04-27 09:22:28,445 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 09:22:29,640 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:29,695 INFO L85 PathProgramCache]: Analyzing trace with hash -1084398370, now seen corresponding path program 157 times [2024-04-27 09:22:29,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:29,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:29,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:29,721 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 31 proven. 7 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:29,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:29,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:29,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:29,746 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 31 proven. 7 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:29,861 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:29,941 INFO L85 PathProgramCache]: Analyzing trace with hash 743388991, now seen corresponding path program 40 times [2024-04-27 09:22:29,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:29,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:29,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:30,033 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:30,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:30,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:30,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:30,059 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:30,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:30,253 INFO L85 PathProgramCache]: Analyzing trace with hash 1570222336, now seen corresponding path program 41 times [2024-04-27 09:22:30,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:30,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:30,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:30,271 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:30,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:30,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:30,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:30,288 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:30,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:30,470 INFO L85 PathProgramCache]: Analyzing trace with hash 1432252279, now seen corresponding path program 42 times [2024-04-27 09:22:30,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:30,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:30,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:30,492 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:30,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:30,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:30,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:30,510 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:30,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:30,638 INFO L85 PathProgramCache]: Analyzing trace with hash 743388992, now seen corresponding path program 158 times [2024-04-27 09:22:30,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:30,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:30,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:30,663 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:30,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:30,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:30,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:30,687 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:30,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:30,826 INFO L85 PathProgramCache]: Analyzing trace with hash 1570222368, now seen corresponding path program 159 times [2024-04-27 09:22:30,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:30,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:30,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:30,851 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:30,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:30,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:30,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:30,875 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:30,949 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:31,006 INFO L85 PathProgramCache]: Analyzing trace with hash 1432253249, now seen corresponding path program 160 times [2024-04-27 09:22:31,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:31,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:31,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:31,035 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:31,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:31,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:31,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:31,061 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:31,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:31,197 INFO L85 PathProgramCache]: Analyzing trace with hash 1450177852, now seen corresponding path program 41 times [2024-04-27 09:22:31,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:31,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:31,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:31,216 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:31,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:31,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:31,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:31,240 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:31,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:31,383 INFO L85 PathProgramCache]: Analyzing trace with hash 2005840547, now seen corresponding path program 42 times [2024-04-27 09:22:31,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:31,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:31,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:31,417 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:31,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:31,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:31,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:31,443 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:31,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:31,599 INFO L85 PathProgramCache]: Analyzing trace with hash 2051514932, now seen corresponding path program 43 times [2024-04-27 09:22:31,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:31,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:31,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:31,625 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:31,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:31,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:31,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:31,650 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:31,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:31,809 INFO L85 PathProgramCache]: Analyzing trace with hash 1450177853, now seen corresponding path program 161 times [2024-04-27 09:22:31,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:31,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:31,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:31,834 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:31,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:31,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:31,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:31,859 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:22:31,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:32,021 INFO L85 PathProgramCache]: Analyzing trace with hash 2005840579, now seen corresponding path program 162 times [2024-04-27 09:22:32,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:32,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:32,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:32,046 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:22:32,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:32,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:32,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:32,071 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:22:32,149 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:32,215 INFO L85 PathProgramCache]: Analyzing trace with hash 2051515902, now seen corresponding path program 163 times [2024-04-27 09:22:32,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:32,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:32,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:32,238 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:32,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:32,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:32,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:32,263 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:32,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:32,414 INFO L85 PathProgramCache]: Analyzing trace with hash -827516385, now seen corresponding path program 42 times [2024-04-27 09:22:32,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:32,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:32,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:32,439 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:22:32,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:32,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:32,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:32,464 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:22:32,542 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:32,602 INFO L85 PathProgramCache]: Analyzing trace with hash 116795936, now seen corresponding path program 43 times [2024-04-27 09:22:32,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:32,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:32,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:32,628 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:22:32,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:32,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:32,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:32,653 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:22:32,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:32,797 INFO L85 PathProgramCache]: Analyzing trace with hash -674293161, now seen corresponding path program 44 times [2024-04-27 09:22:32,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:32,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:32,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:32,823 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:22:32,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:32,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:32,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:32,849 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:22:32,924 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:32,983 INFO L85 PathProgramCache]: Analyzing trace with hash -827516384, now seen corresponding path program 164 times [2024-04-27 09:22:32,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:32,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:32,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:33,008 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:22:33,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:33,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:33,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:33,035 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:22:33,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:33,298 INFO L85 PathProgramCache]: Analyzing trace with hash -1281906521, now seen corresponding path program 165 times [2024-04-27 09:22:33,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:33,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:33,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:33,320 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 31 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-04-27 09:22:33,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:33,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:33,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:33,339 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 31 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-04-27 09:22:35,011 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:35,077 INFO L85 PathProgramCache]: Analyzing trace with hash 2058213632, now seen corresponding path program 166 times [2024-04-27 09:22:35,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:35,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:35,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:35,080 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:35,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:35,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:35,269 INFO L85 PathProgramCache]: Analyzing trace with hash -371505195, now seen corresponding path program 45 times [2024-04-27 09:22:35,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:35,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:35,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:35,295 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:35,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:35,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:35,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:35,318 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:35,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:35,486 INFO L85 PathProgramCache]: Analyzing trace with hash 619563827, now seen corresponding path program 46 times [2024-04-27 09:22:35,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:35,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:35,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:35,509 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:22:35,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:35,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:35,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:35,533 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:22:35,644 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:35,722 INFO L85 PathProgramCache]: Analyzing trace with hash 2066225926, now seen corresponding path program 44 times [2024-04-27 09:22:35,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:35,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:35,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:35,743 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:35,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:35,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:35,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:35,765 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:35,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:35,891 INFO L85 PathProgramCache]: Analyzing trace with hash -534618526, now seen corresponding path program 45 times [2024-04-27 09:22:35,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:35,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:35,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:35,908 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:35,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:35,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:35,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:35,928 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:36,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:36,108 INFO L85 PathProgramCache]: Analyzing trace with hash 1313578445, now seen corresponding path program 43 times [2024-04-27 09:22:36,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:36,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:36,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:36,124 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:36,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:36,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:36,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:36,140 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:36,222 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:36,277 INFO L85 PathProgramCache]: Analyzing trace with hash 1368527419, now seen corresponding path program 44 times [2024-04-27 09:22:36,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:36,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:36,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:36,294 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:36,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:36,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:36,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:36,311 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:36,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:36,446 INFO L85 PathProgramCache]: Analyzing trace with hash -371475125, now seen corresponding path program 167 times [2024-04-27 09:22:36,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:36,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:36,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:36,464 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:22:36,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:36,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:36,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:36,487 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:22:36,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:36,641 INFO L85 PathProgramCache]: Analyzing trace with hash 260147168, now seen corresponding path program 47 times [2024-04-27 09:22:36,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:36,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:36,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:36,661 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:36,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:36,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:36,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:36,679 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:36,754 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:36,807 INFO L85 PathProgramCache]: Analyzing trace with hash 1923386184, now seen corresponding path program 48 times [2024-04-27 09:22:36,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:36,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:36,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:36,826 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:22:36,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:36,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:36,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:36,845 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:22:36,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:36,979 INFO L85 PathProgramCache]: Analyzing trace with hash 285486491, now seen corresponding path program 46 times [2024-04-27 09:22:36,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:36,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:36,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:36,997 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:36,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:36,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:37,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:37,025 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:37,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:37,159 INFO L85 PathProgramCache]: Analyzing trace with hash 892913581, now seen corresponding path program 47 times [2024-04-27 09:22:37,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:37,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:37,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:37,178 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:37,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:37,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:37,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:37,197 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:37,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:37,332 INFO L85 PathProgramCache]: Analyzing trace with hash -267885416, now seen corresponding path program 45 times [2024-04-27 09:22:37,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:37,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:37,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:37,350 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:37,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:37,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:37,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:37,368 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:37,513 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:37,562 INFO L85 PathProgramCache]: Analyzing trace with hash -525085808, now seen corresponding path program 46 times [2024-04-27 09:22:37,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:37,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:37,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:37,580 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:37,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:37,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:37,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:37,605 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:37,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:37,780 INFO L85 PathProgramCache]: Analyzing trace with hash 260177238, now seen corresponding path program 168 times [2024-04-27 09:22:37,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:37,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:37,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:37,805 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:22:37,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:37,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:37,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:37,829 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:22:37,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:37,982 INFO L85 PathProgramCache]: Analyzing trace with hash -1252240469, now seen corresponding path program 49 times [2024-04-27 09:22:37,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:37,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:37,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:38,007 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:22:38,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:38,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:38,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:38,031 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:22:38,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:38,172 INFO L85 PathProgramCache]: Analyzing trace with hash 590227357, now seen corresponding path program 50 times [2024-04-27 09:22:38,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:38,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:38,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:38,199 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-04-27 09:22:38,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:38,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:38,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:38,225 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-04-27 09:22:38,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:38,371 INFO L85 PathProgramCache]: Analyzing trace with hash -871678864, now seen corresponding path program 48 times [2024-04-27 09:22:38,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:38,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:38,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:38,397 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:22:38,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:38,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:38,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:38,424 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:22:38,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:38,560 INFO L85 PathProgramCache]: Analyzing trace with hash -812659528, now seen corresponding path program 49 times [2024-04-27 09:22:38,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:38,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:38,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:38,580 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:22:38,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:38,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:38,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:38,600 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:22:38,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:38,734 INFO L85 PathProgramCache]: Analyzing trace with hash 1495901987, now seen corresponding path program 47 times [2024-04-27 09:22:38,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:38,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:38,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:38,753 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:22:38,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:38,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:38,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:38,773 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:22:38,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:38,921 INFO L85 PathProgramCache]: Analyzing trace with hash -164462299, now seen corresponding path program 48 times [2024-04-27 09:22:38,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:38,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:38,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:38,941 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:22:38,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:38,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:38,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:38,961 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:22:39,034 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:39,089 INFO L85 PathProgramCache]: Analyzing trace with hash 1495902018, now seen corresponding path program 169 times [2024-04-27 09:22:39,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:39,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:39,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:39,108 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:22:39,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:39,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:39,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:39,126 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:22:39,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:39,254 INFO L85 PathProgramCache]: Analyzing trace with hash -1475765742, now seen corresponding path program 170 times [2024-04-27 09:22:39,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:39,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:39,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:39,273 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:22:39,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:39,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:39,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:39,292 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:22:39,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:39,424 INFO L85 PathProgramCache]: Analyzing trace with hash -524440121, now seen corresponding path program 49 times [2024-04-27 09:22:39,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:39,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:39,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:39,443 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:39,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:39,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:39,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:39,460 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:39,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:39,593 INFO L85 PathProgramCache]: Analyzing trace with hash 922225528, now seen corresponding path program 50 times [2024-04-27 09:22:39,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:39,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:39,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:39,611 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:39,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:39,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:39,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:39,629 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:39,708 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:39,759 INFO L85 PathProgramCache]: Analyzing trace with hash -1475779585, now seen corresponding path program 51 times [2024-04-27 09:22:39,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:39,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:39,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:39,778 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:39,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:39,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:39,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:39,803 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:39,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:39,954 INFO L85 PathProgramCache]: Analyzing trace with hash -524440120, now seen corresponding path program 171 times [2024-04-27 09:22:39,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:39,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:39,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:39,979 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:39,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:39,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:39,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:40,003 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:40,081 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:40,139 INFO L85 PathProgramCache]: Analyzing trace with hash 922225560, now seen corresponding path program 172 times [2024-04-27 09:22:40,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:40,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:40,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:40,165 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:40,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:40,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:40,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:40,190 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:40,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:40,321 INFO L85 PathProgramCache]: Analyzing trace with hash -1475778615, now seen corresponding path program 173 times [2024-04-27 09:22:40,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:40,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:40,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:40,339 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:40,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:40,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:40,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:40,358 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:22:40,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:40,491 INFO L85 PathProgramCache]: Analyzing trace with hash 285487483, now seen corresponding path program 174 times [2024-04-27 09:22:40,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:40,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:40,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:40,516 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:22:40,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:40,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:40,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:40,540 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:22:40,626 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:40,683 INFO L85 PathProgramCache]: Analyzing trace with hash -267885385, now seen corresponding path program 175 times [2024-04-27 09:22:40,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:40,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:40,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:40,701 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:22:40,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:40,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:40,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:40,718 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:22:40,864 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:40,920 INFO L85 PathProgramCache]: Analyzing trace with hash 1515379197, now seen corresponding path program 176 times [2024-04-27 09:22:40,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:40,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:40,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:40,938 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:40,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:40,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:40,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:40,958 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:22:41,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:41,092 INFO L85 PathProgramCache]: Analyzing trace with hash 1369173106, now seen corresponding path program 50 times [2024-04-27 09:22:41,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:41,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:41,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:41,110 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:22:41,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:41,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:41,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:41,126 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:22:41,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:41,262 INFO L85 PathProgramCache]: Analyzing trace with hash -505306579, now seen corresponding path program 51 times [2024-04-27 09:22:41,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:41,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:41,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:41,279 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:22:41,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:41,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:41,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:41,295 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:22:41,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:41,439 INFO L85 PathProgramCache]: Analyzing trace with hash 1515365354, now seen corresponding path program 52 times [2024-04-27 09:22:41,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:41,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:41,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:41,457 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:22:41,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:41,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:41,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:41,482 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:22:41,566 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:41,631 INFO L85 PathProgramCache]: Analyzing trace with hash 1369173107, now seen corresponding path program 177 times [2024-04-27 09:22:41,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:41,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:41,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:41,649 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:22:41,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:41,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:41,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:41,666 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-04-27 09:22:41,743 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:41,798 INFO L85 PathProgramCache]: Analyzing trace with hash 2066226918, now seen corresponding path program 178 times [2024-04-27 09:22:41,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:41,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:41,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:41,815 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:41,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:41,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:41,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:41,832 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:41,914 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:41,987 INFO L85 PathProgramCache]: Analyzing trace with hash 1313578476, now seen corresponding path program 179 times [2024-04-27 09:22:41,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:41,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:41,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:42,010 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:42,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:42,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:42,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:42,032 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:42,120 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:42,205 INFO L85 PathProgramCache]: Analyzing trace with hash 1289299496, now seen corresponding path program 180 times [2024-04-27 09:22:42,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:42,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:42,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:42,226 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:42,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:42,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:42,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:42,247 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:22:42,355 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:42,429 INFO L85 PathProgramCache]: Analyzing trace with hash -619886755, now seen corresponding path program 51 times [2024-04-27 09:22:42,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:42,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:42,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:42,432 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:42,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:42,528 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:42,625 INFO L85 PathProgramCache]: Analyzing trace with hash -2036620126, now seen corresponding path program 52 times [2024-04-27 09:22:42,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:42,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:42,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:42,628 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:42,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:42,761 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:42,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:42,870 INFO L85 PathProgramCache]: Analyzing trace with hash 1289285653, now seen corresponding path program 53 times [2024-04-27 09:22:42,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:42,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:42,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:42,874 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:42,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:42,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:43,004 INFO L85 PathProgramCache]: Analyzing trace with hash -619886754, now seen corresponding path program 181 times [2024-04-27 09:22:43,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:43,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:43,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:43,007 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:43,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:43,085 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:43,145 INFO L85 PathProgramCache]: Analyzing trace with hash -2036620094, now seen corresponding path program 182 times [2024-04-27 09:22:43,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:43,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:43,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:43,148 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:43,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:43,227 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:43,284 INFO L85 PathProgramCache]: Analyzing trace with hash 1289286623, now seen corresponding path program 183 times [2024-04-27 09:22:43,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:43,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:43,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:43,287 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:43,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:44,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:44,107 INFO L85 PathProgramCache]: Analyzing trace with hash 343490637, now seen corresponding path program 184 times [2024-04-27 09:22:44,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:44,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:44,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:44,110 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:44,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:44,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:44,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:44,867 INFO L85 PathProgramCache]: Analyzing trace with hash -902274410, now seen corresponding path program 185 times [2024-04-27 09:22:44,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:44,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:44,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:44,886 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:44,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:44,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:44,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:44,905 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:45,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,168 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264455, now seen corresponding path program 52 times [2024-04-27 09:22:45,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:45,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:45,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:45,187 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:45,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:45,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:45,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:45,209 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:45,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,359 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,418 INFO L85 PathProgramCache]: Analyzing trace with hash 497688760, now seen corresponding path program 53 times [2024-04-27 09:22:45,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:45,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:45,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:45,436 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:45,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:45,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:45,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:45,455 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:45,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,600 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,673 INFO L85 PathProgramCache]: Analyzing trace with hash -1751517505, now seen corresponding path program 54 times [2024-04-27 09:22:45,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:45,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:45,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:45,692 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:45,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:45,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:45,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:45,710 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:45,836 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,838 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:45,915 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264456, now seen corresponding path program 186 times [2024-04-27 09:22:45,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:45,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:45,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:45,935 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:45,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:45,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:45,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:45,954 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:46,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:46,126 INFO L85 PathProgramCache]: Analyzing trace with hash 497688792, now seen corresponding path program 187 times [2024-04-27 09:22:46,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:46,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:46,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:46,145 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:46,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:46,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:46,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:46,164 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:46,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:46,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:46,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:46,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:46,380 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:46,388 INFO L85 PathProgramCache]: Analyzing trace with hash -1751516535, now seen corresponding path program 188 times [2024-04-27 09:22:46,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:46,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:46,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:46,411 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:46,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:46,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:46,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:46,430 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:46,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:46,589 INFO L85 PathProgramCache]: Analyzing trace with hash 1537562356, now seen corresponding path program 53 times [2024-04-27 09:22:46,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:46,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:46,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:46,609 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:46,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:46,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:46,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:46,631 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:46,713 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:46,795 INFO L85 PathProgramCache]: Analyzing trace with hash 419792875, now seen corresponding path program 54 times [2024-04-27 09:22:46,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:46,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:46,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:46,815 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:46,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:46,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:46,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:46,835 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:46,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:46,996 INFO L85 PathProgramCache]: Analyzing trace with hash 128677356, now seen corresponding path program 55 times [2024-04-27 09:22:46,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:46,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:46,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:47,016 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:47,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:47,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:47,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:47,036 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:47,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:47,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:47,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:47,323 INFO L85 PathProgramCache]: Analyzing trace with hash 1537562357, now seen corresponding path program 189 times [2024-04-27 09:22:47,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:47,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:47,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:47,349 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:47,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:47,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:47,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:47,375 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:22:47,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:47,600 INFO L85 PathProgramCache]: Analyzing trace with hash 419792907, now seen corresponding path program 190 times [2024-04-27 09:22:47,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:47,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:47,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:47,626 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:47,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:47,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:47,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:47,652 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:22:47,752 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:47,842 INFO L85 PathProgramCache]: Analyzing trace with hash 128678326, now seen corresponding path program 191 times [2024-04-27 09:22:47,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:47,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:47,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:47,869 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:47,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:47,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:47,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:47,894 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:22:47,974 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:48,053 INFO L85 PathProgramCache]: Analyzing trace with hash -305939097, now seen corresponding path program 54 times [2024-04-27 09:22:48,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:48,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:48,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:48,074 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:48,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:48,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:48,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:48,094 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:48,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:48,249 INFO L85 PathProgramCache]: Analyzing trace with hash -894177320, now seen corresponding path program 55 times [2024-04-27 09:22:48,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:48,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:48,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:48,270 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:48,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:48,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:48,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:48,291 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:48,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:48,447 INFO L85 PathProgramCache]: Analyzing trace with hash -1949693025, now seen corresponding path program 56 times [2024-04-27 09:22:48,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:48,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:48,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:48,552 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:48,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:48,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:48,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:48,573 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:48,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:48,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:48,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:48,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:48,778 INFO L85 PathProgramCache]: Analyzing trace with hash -305939096, now seen corresponding path program 192 times [2024-04-27 09:22:48,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:48,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:48,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:48,798 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:48,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:48,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:48,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:48,819 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:22:49,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:49,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:49,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:49,162 INFO L85 PathProgramCache]: Analyzing trace with hash 386536431, now seen corresponding path program 193 times [2024-04-27 09:22:49,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:49,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:49,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:49,180 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:49,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:49,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:49,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:22:49,205 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:22:50,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:50,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:50,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,055 INFO L85 PathProgramCache]: Analyzing trace with hash 2017900728, now seen corresponding path program 194 times [2024-04-27 09:22:51,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:51,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:51,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:51,057 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:51,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:51,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,247 INFO L85 PathProgramCache]: Analyzing trace with hash -1869586779, now seen corresponding path program 55 times [2024-04-27 09:22:51,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:51,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:51,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:51,249 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:51,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:51,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,428 INFO L85 PathProgramCache]: Analyzing trace with hash -2122615206, now seen corresponding path program 56 times [2024-04-27 09:22:51,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:51,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:51,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:51,430 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:51,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:51,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,581 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,649 INFO L85 PathProgramCache]: Analyzing trace with hash -1376561827, now seen corresponding path program 57 times [2024-04-27 09:22:51,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:51,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:51,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:51,652 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:51,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:51,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,818 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,826 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,838 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,861 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,887 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:51,936 INFO L85 PathProgramCache]: Analyzing trace with hash -1869586778, now seen corresponding path program 195 times [2024-04-27 09:22:51,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:51,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:51,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:51,938 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:51,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:52,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:52,076 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:52,183 INFO L85 PathProgramCache]: Analyzing trace with hash -2122615174, now seen corresponding path program 196 times [2024-04-27 09:22:52,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:52,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:52,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:52,185 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:52,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:52,274 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:52,369 INFO L85 PathProgramCache]: Analyzing trace with hash -1376560857, now seen corresponding path program 197 times [2024-04-27 09:22:52,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:52,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:52,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:52,372 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:52,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:52,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:52,539 INFO L85 PathProgramCache]: Analyzing trace with hash 276286486, now seen corresponding path program 56 times [2024-04-27 09:22:52,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:52,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:52,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:52,542 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:52,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:52,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:52,756 INFO L85 PathProgramCache]: Analyzing trace with hash -25053431, now seen corresponding path program 57 times [2024-04-27 09:22:52,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:52,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:52,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:52,759 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:52,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:52,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:52,974 INFO L85 PathProgramCache]: Analyzing trace with hash -776656242, now seen corresponding path program 58 times [2024-04-27 09:22:52,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:52,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:52,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:52,978 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:52,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:53,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,233 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,244 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,268 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,351 INFO L85 PathProgramCache]: Analyzing trace with hash 276286487, now seen corresponding path program 198 times [2024-04-27 09:22:53,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:53,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:53,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:53,354 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:53,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:53,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,515 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,612 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,619 INFO L85 PathProgramCache]: Analyzing trace with hash -25053399, now seen corresponding path program 199 times [2024-04-27 09:22:53,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:53,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:53,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:53,623 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:53,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:53,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,795 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:53,852 INFO L85 PathProgramCache]: Analyzing trace with hash -776655272, now seen corresponding path program 200 times [2024-04-27 09:22:53,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:53,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:53,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:53,859 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:53,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:53,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:54,028 INFO L85 PathProgramCache]: Analyzing trace with hash 1693490437, now seen corresponding path program 57 times [2024-04-27 09:22:54,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:54,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:54,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:54,031 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:54,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:54,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:54,198 INFO L85 PathProgramCache]: Analyzing trace with hash 958596090, now seen corresponding path program 58 times [2024-04-27 09:22:54,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:54,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:54,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:54,200 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:54,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:54,291 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:54,366 INFO L85 PathProgramCache]: Analyzing trace with hash -348292163, now seen corresponding path program 59 times [2024-04-27 09:22:54,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:54,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:54,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:54,369 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:54,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:54,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:54,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:54,558 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:54,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:54,604 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:54,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:54,652 INFO L85 PathProgramCache]: Analyzing trace with hash 1693490438, now seen corresponding path program 201 times [2024-04-27 09:22:54,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:54,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:54,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:54,654 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:54,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:55,029 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:22:55,092 INFO L85 PathProgramCache]: Analyzing trace with hash 619284885, now seen corresponding path program 202 times [2024-04-27 09:22:55,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:55,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:55,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:55,094 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:55,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:55,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:55,970 INFO L85 PathProgramCache]: Analyzing trace with hash -1939167666, now seen corresponding path program 32 times [2024-04-27 09:22:55,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:55,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:55,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:55,974 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:55,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:56,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:56,168 INFO L85 PathProgramCache]: Analyzing trace with hash 15344591, now seen corresponding path program 11 times [2024-04-27 09:22:56,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:56,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:56,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:56,171 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:56,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:56,270 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:56,329 INFO L85 PathProgramCache]: Analyzing trace with hash 475682416, now seen corresponding path program 11 times [2024-04-27 09:22:56,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:56,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:56,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:56,332 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:56,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:56,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:56,493 INFO L85 PathProgramCache]: Analyzing trace with hash 1861253127, now seen corresponding path program 11 times [2024-04-27 09:22:56,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:56,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:56,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:56,495 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:56,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:56,583 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:56,649 INFO L85 PathProgramCache]: Analyzing trace with hash 15344592, now seen corresponding path program 33 times [2024-04-27 09:22:56,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:56,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:56,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:56,651 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:56,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:56,743 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:56,802 INFO L85 PathProgramCache]: Analyzing trace with hash 475682448, now seen corresponding path program 34 times [2024-04-27 09:22:56,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:56,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:56,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:56,805 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:56,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:56,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:56,962 INFO L85 PathProgramCache]: Analyzing trace with hash 1861254097, now seen corresponding path program 35 times [2024-04-27 09:22:56,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:56,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:56,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:56,964 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:56,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:57,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:57,122 INFO L85 PathProgramCache]: Analyzing trace with hash 1864302252, now seen corresponding path program 12 times [2024-04-27 09:22:57,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:57,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:57,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:57,125 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:57,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:57,223 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:57,282 INFO L85 PathProgramCache]: Analyzing trace with hash 1958795059, now seen corresponding path program 12 times [2024-04-27 09:22:57,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:57,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:57,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:57,284 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:57,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:57,377 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:57,440 INFO L85 PathProgramCache]: Analyzing trace with hash 593104804, now seen corresponding path program 12 times [2024-04-27 09:22:57,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:57,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:57,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:57,443 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:57,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:57,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:57,594 INFO L85 PathProgramCache]: Analyzing trace with hash 1864302253, now seen corresponding path program 36 times [2024-04-27 09:22:57,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:57,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:57,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:57,597 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:57,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:57,711 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:57,778 INFO L85 PathProgramCache]: Analyzing trace with hash 1958795091, now seen corresponding path program 37 times [2024-04-27 09:22:57,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:57,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:57,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:57,782 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:57,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:57,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:57,971 INFO L85 PathProgramCache]: Analyzing trace with hash 593105774, now seen corresponding path program 38 times [2024-04-27 09:22:57,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:57,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:57,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:57,974 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:57,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:58,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:58,125 INFO L85 PathProgramCache]: Analyzing trace with hash 1206409903, now seen corresponding path program 13 times [2024-04-27 09:22:58,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:58,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:58,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:58,128 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:58,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:58,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:58,405 INFO L85 PathProgramCache]: Analyzing trace with hash -1255998576, now seen corresponding path program 13 times [2024-04-27 09:22:58,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:58,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:58,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:58,408 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:58,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:58,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:58,568 INFO L85 PathProgramCache]: Analyzing trace with hash -281250073, now seen corresponding path program 13 times [2024-04-27 09:22:58,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:58,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:58,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:58,571 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:58,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:58,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:58,724 INFO L85 PathProgramCache]: Analyzing trace with hash 1206409904, now seen corresponding path program 39 times [2024-04-27 09:22:58,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:58,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:58,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:58,727 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:58,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:58,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:22:59,004 INFO L85 PathProgramCache]: Analyzing trace with hash 2015656247, now seen corresponding path program 40 times [2024-04-27 09:22:59,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:22:59,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:22:59,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:22:59,007 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:22:59,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:01,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:01,701 INFO L85 PathProgramCache]: Analyzing trace with hash 309785916, now seen corresponding path program 57 times [2024-04-27 09:23:01,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:01,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:01,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:01,720 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 28 proven. 7 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:01,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:01,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:01,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:01,737 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 28 proven. 7 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:01,838 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:01,929 INFO L85 PathProgramCache]: Analyzing trace with hash 1013428897, now seen corresponding path program 19 times [2024-04-27 09:23:01,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:01,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:01,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:01,947 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:01,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:01,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:01,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:01,963 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:02,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:02,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:02,161 INFO L85 PathProgramCache]: Analyzing trace with hash 1351524830, now seen corresponding path program 19 times [2024-04-27 09:23:02,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:02,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:02,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:02,178 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:02,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:02,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:02,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:02,194 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:02,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:02,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:02,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:02,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:02,396 INFO L85 PathProgramCache]: Analyzing trace with hash -1052403111, now seen corresponding path program 20 times [2024-04-27 09:23:02,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:02,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:02,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:02,413 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:02,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:02,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:02,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:02,429 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:02,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:02,554 INFO L85 PathProgramCache]: Analyzing trace with hash 1013428898, now seen corresponding path program 58 times [2024-04-27 09:23:02,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:02,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:02,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:02,666 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:02,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:02,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:02,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:02,683 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:02,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:02,821 INFO L85 PathProgramCache]: Analyzing trace with hash 1351524862, now seen corresponding path program 59 times [2024-04-27 09:23:02,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:02,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:02,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:02,840 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:02,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:02,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:02,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:02,857 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:02,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:02,983 INFO L85 PathProgramCache]: Analyzing trace with hash -1052402141, now seen corresponding path program 60 times [2024-04-27 09:23:02,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:02,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:02,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:03,001 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:03,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:03,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:03,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:03,025 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:03,100 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:03,159 INFO L85 PathProgramCache]: Analyzing trace with hash 1735272090, now seen corresponding path program 20 times [2024-04-27 09:23:03,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:03,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:03,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:03,178 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:03,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:03,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:03,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:03,196 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:03,267 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:03,324 INFO L85 PathProgramCache]: Analyzing trace with hash -2041139963, now seen corresponding path program 20 times [2024-04-27 09:23:03,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:03,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:03,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:03,342 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:03,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:03,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:03,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:03,360 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:03,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:03,494 INFO L85 PathProgramCache]: Analyzing trace with hash 1149170706, now seen corresponding path program 21 times [2024-04-27 09:23:03,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:03,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:03,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:03,518 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:03,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:03,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:03,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:03,543 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:03,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:03,669 INFO L85 PathProgramCache]: Analyzing trace with hash 1735272091, now seen corresponding path program 61 times [2024-04-27 09:23:03,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:03,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:03,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:03,695 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:03,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:03,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:03,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:03,714 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:03,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:03,837 INFO L85 PathProgramCache]: Analyzing trace with hash -2041139931, now seen corresponding path program 62 times [2024-04-27 09:23:03,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:03,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:03,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:03,855 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:23:03,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:03,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:03,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:03,875 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:23:03,943 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:03,997 INFO L85 PathProgramCache]: Analyzing trace with hash 1149171676, now seen corresponding path program 63 times [2024-04-27 09:23:03,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:03,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:04,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:04,016 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:23:04,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:04,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:04,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:04,035 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:23:04,107 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:04,166 INFO L85 PathProgramCache]: Analyzing trace with hash 1264583681, now seen corresponding path program 21 times [2024-04-27 09:23:04,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:04,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:04,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:04,187 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:23:04,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:04,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:04,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:04,213 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:23:04,297 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:04,361 INFO L85 PathProgramCache]: Analyzing trace with hash 547388542, now seen corresponding path program 21 times [2024-04-27 09:23:04,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:04,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:04,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:04,380 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:23:04,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:04,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:04,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:04,398 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:23:04,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:04,530 INFO L85 PathProgramCache]: Analyzing trace with hash -210824263, now seen corresponding path program 22 times [2024-04-27 09:23:04,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:04,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:04,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:04,550 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:23:04,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:04,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:04,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:04,570 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:23:04,639 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:04,695 INFO L85 PathProgramCache]: Analyzing trace with hash 1264583682, now seen corresponding path program 64 times [2024-04-27 09:23:04,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:04,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:04,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:04,714 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:23:04,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:04,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:04,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:04,738 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:23:04,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:04,970 INFO L85 PathProgramCache]: Analyzing trace with hash -1929669495, now seen corresponding path program 65 times [2024-04-27 09:23:04,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:04,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:04,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:04,986 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 28 proven. 5 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:23:04,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:04,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:04,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:05,002 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 28 proven. 5 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:23:06,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:06,647 INFO L85 PathProgramCache]: Analyzing trace with hash -793885218, now seen corresponding path program 66 times [2024-04-27 09:23:06,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:06,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:06,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:06,650 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:06,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:06,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:06,834 INFO L85 PathProgramCache]: Analyzing trace with hash -1065216461, now seen corresponding path program 23 times [2024-04-27 09:23:06,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:06,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:06,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:06,850 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:06,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:06,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:06,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:06,867 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:06,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:06,991 INFO L85 PathProgramCache]: Analyzing trace with hash 1649866773, now seen corresponding path program 24 times [2024-04-27 09:23:06,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:06,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:06,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:07,008 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:23:07,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:07,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:07,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:07,026 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:23:07,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:07,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1419835160, now seen corresponding path program 22 times [2024-04-27 09:23:07,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:07,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:07,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:07,213 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:07,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:07,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:07,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:07,229 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:07,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:07,358 INFO L85 PathProgramCache]: Analyzing trace with hash -1471214272, now seen corresponding path program 23 times [2024-04-27 09:23:07,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:07,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:07,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:07,393 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:07,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:07,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:07,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:07,414 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:07,554 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:07,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:07,560 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:07,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:07,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:07,653 INFO L85 PathProgramCache]: Analyzing trace with hash -1569821781, now seen corresponding path program 22 times [2024-04-27 09:23:07,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:07,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:07,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:07,669 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:07,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:07,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:07,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:07,685 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:07,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:07,813 INFO L85 PathProgramCache]: Analyzing trace with hash 1338314653, now seen corresponding path program 23 times [2024-04-27 09:23:07,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:07,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:07,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:07,830 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:07,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:07,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:07,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:07,846 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:07,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:07,971 INFO L85 PathProgramCache]: Analyzing trace with hash -1065186391, now seen corresponding path program 67 times [2024-04-27 09:23:07,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:07,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:07,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:07,987 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:23:07,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:07,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:07,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:08,003 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:23:08,083 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:08,141 INFO L85 PathProgramCache]: Analyzing trace with hash -2116053058, now seen corresponding path program 25 times [2024-04-27 09:23:08,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:08,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:08,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:08,158 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:08,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:08,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:08,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:08,176 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:08,251 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:08,311 INFO L85 PathProgramCache]: Analyzing trace with hash -2101541206, now seen corresponding path program 26 times [2024-04-27 09:23:08,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:08,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:08,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:08,329 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:23:08,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:08,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:08,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:08,347 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:23:08,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:08,483 INFO L85 PathProgramCache]: Analyzing trace with hash -1730827779, now seen corresponding path program 24 times [2024-04-27 09:23:08,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:08,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:08,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:08,501 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:08,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:08,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:08,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:08,519 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:08,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:08,654 INFO L85 PathProgramCache]: Analyzing trace with hash -2007869429, now seen corresponding path program 25 times [2024-04-27 09:23:08,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:08,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:08,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:08,672 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:08,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:08,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:08,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:08,690 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:08,769 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:08,825 INFO L85 PathProgramCache]: Analyzing trace with hash 1606734838, now seen corresponding path program 24 times [2024-04-27 09:23:08,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:08,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:08,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:08,842 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:08,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:08,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:08,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:08,859 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:08,937 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:08,989 INFO L85 PathProgramCache]: Analyzing trace with hash -1172848782, now seen corresponding path program 25 times [2024-04-27 09:23:08,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:08,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:08,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:09,008 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:09,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:09,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:09,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:09,026 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:09,100 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:09,153 INFO L85 PathProgramCache]: Analyzing trace with hash -2116022988, now seen corresponding path program 68 times [2024-04-27 09:23:09,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:09,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:09,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:09,170 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:09,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:09,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:09,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:09,188 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:09,261 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:09,320 INFO L85 PathProgramCache]: Analyzing trace with hash -967146231, now seen corresponding path program 27 times [2024-04-27 09:23:09,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:09,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:09,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:09,339 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-04-27 09:23:09,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:09,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:09,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:09,363 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-04-27 09:23:09,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:09,597 INFO L85 PathProgramCache]: Analyzing trace with hash -1612639873, now seen corresponding path program 28 times [2024-04-27 09:23:09,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:09,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:09,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:09,624 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:23:09,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:09,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:09,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:09,648 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-04-27 09:23:09,740 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:09,841 INFO L85 PathProgramCache]: Analyzing trace with hash 938633042, now seen corresponding path program 26 times [2024-04-27 09:23:09,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:09,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:09,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:09,865 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-04-27 09:23:09,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:09,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:09,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:09,889 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-04-27 09:23:09,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:10,050 INFO L85 PathProgramCache]: Analyzing trace with hash -1715003754, now seen corresponding path program 27 times [2024-04-27 09:23:10,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:10,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:10,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:10,069 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-04-27 09:23:10,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:10,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:10,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:10,088 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-04-27 09:23:10,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:10,243 INFO L85 PathProgramCache]: Analyzing trace with hash 1277204481, now seen corresponding path program 26 times [2024-04-27 09:23:10,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:10,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:10,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:10,266 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-04-27 09:23:10,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:10,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:10,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:10,292 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-04-27 09:23:10,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:10,430 INFO L85 PathProgramCache]: Analyzing trace with hash 83524487, now seen corresponding path program 27 times [2024-04-27 09:23:10,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:10,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:10,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:10,452 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-04-27 09:23:10,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:10,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:10,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:10,480 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-04-27 09:23:10,573 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:10,631 INFO L85 PathProgramCache]: Analyzing trace with hash 1277204512, now seen corresponding path program 69 times [2024-04-27 09:23:10,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:10,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:10,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:10,651 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-04-27 09:23:10,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:10,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:10,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:10,670 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-04-27 09:23:10,741 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:10,800 INFO L85 PathProgramCache]: Analyzing trace with hash -1205725836, now seen corresponding path program 70 times [2024-04-27 09:23:10,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:10,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:10,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:10,818 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-04-27 09:23:10,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:10,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:10,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:10,837 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-04-27 09:23:10,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:11,002 INFO L85 PathProgramCache]: Analyzing trace with hash -1172203095, now seen corresponding path program 28 times [2024-04-27 09:23:11,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:11,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:11,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:11,030 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:11,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:11,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:11,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:11,048 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:11,123 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:11,181 INFO L85 PathProgramCache]: Analyzing trace with hash -1978557482, now seen corresponding path program 28 times [2024-04-27 09:23:11,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:11,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:11,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:11,199 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:11,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:11,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:11,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:11,220 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:11,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:11,358 INFO L85 PathProgramCache]: Analyzing trace with hash -1205739679, now seen corresponding path program 29 times [2024-04-27 09:23:11,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:11,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:11,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:11,377 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:11,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:11,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:11,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:11,396 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:11,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:11,532 INFO L85 PathProgramCache]: Analyzing trace with hash -1172203094, now seen corresponding path program 71 times [2024-04-27 09:23:11,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:11,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:11,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:11,551 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:11,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:11,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:11,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:11,569 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:11,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:11,697 INFO L85 PathProgramCache]: Analyzing trace with hash -1978557450, now seen corresponding path program 72 times [2024-04-27 09:23:11,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:11,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:11,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:11,716 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:11,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:11,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:11,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:11,735 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:11,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:11,867 INFO L85 PathProgramCache]: Analyzing trace with hash -1205738709, now seen corresponding path program 73 times [2024-04-27 09:23:11,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:11,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:11,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:11,888 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:11,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:11,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:11,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:11,913 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 8 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:11,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:12,048 INFO L85 PathProgramCache]: Analyzing trace with hash -1730826787, now seen corresponding path program 74 times [2024-04-27 09:23:12,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:12,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:12,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:12,066 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:23:12,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:12,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:12,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:12,084 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:23:12,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:12,220 INFO L85 PathProgramCache]: Analyzing trace with hash 1606734869, now seen corresponding path program 75 times [2024-04-27 09:23:12,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:12,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:12,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:12,237 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:23:12,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:12,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:12,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:12,254 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:23:12,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:12,388 INFO L85 PathProgramCache]: Analyzing trace with hash -1749285153, now seen corresponding path program 76 times [2024-04-27 09:23:12,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:12,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:12,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:12,405 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:12,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:12,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:12,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:12,422 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:23:12,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:12,555 INFO L85 PathProgramCache]: Analyzing trace with hash 1338960340, now seen corresponding path program 29 times [2024-04-27 09:23:12,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:12,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:12,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:12,572 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:23:12,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:12,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:12,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:12,588 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:23:12,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:12,722 INFO L85 PathProgramCache]: Analyzing trace with hash -1441902325, now seen corresponding path program 29 times [2024-04-27 09:23:12,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:12,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:12,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:12,739 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:23:12,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:12,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:12,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:12,855 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:23:12,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:12,984 INFO L85 PathProgramCache]: Analyzing trace with hash -1749298996, now seen corresponding path program 30 times [2024-04-27 09:23:12,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:12,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:12,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:13,001 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:23:13,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:13,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:13,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:13,018 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:23:13,094 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:13,142 INFO L85 PathProgramCache]: Analyzing trace with hash 1338960341, now seen corresponding path program 77 times [2024-04-27 09:23:13,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:13,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:13,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:13,159 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:23:13,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:13,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:13,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:13,176 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-04-27 09:23:13,280 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:13,350 INFO L85 PathProgramCache]: Analyzing trace with hash -1419834168, now seen corresponding path program 78 times [2024-04-27 09:23:13,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:13,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:13,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:13,367 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:13,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:13,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:13,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:13,384 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:13,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:13,507 INFO L85 PathProgramCache]: Analyzing trace with hash -1569821750, now seen corresponding path program 79 times [2024-04-27 09:23:13,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:13,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:13,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:13,523 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:13,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:13,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:13,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:13,539 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:13,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:13,671 INFO L85 PathProgramCache]: Analyzing trace with hash 1750475914, now seen corresponding path program 80 times [2024-04-27 09:23:13,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:13,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:13,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:13,687 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:13,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:13,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:13,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:13,703 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-04-27 09:23:13,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:13,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:13,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:13,857 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:13,923 INFO L85 PathProgramCache]: Analyzing trace with hash 1159362111, now seen corresponding path program 30 times [2024-04-27 09:23:13,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:13,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:13,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:13,926 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:13,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:14,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:14,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:14,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:14,131 INFO L85 PathProgramCache]: Analyzing trace with hash 1580487168, now seen corresponding path program 30 times [2024-04-27 09:23:14,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:14,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:14,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:14,134 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:14,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:14,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:14,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:14,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:14,336 INFO L85 PathProgramCache]: Analyzing trace with hash 1750462071, now seen corresponding path program 31 times [2024-04-27 09:23:14,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:14,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:14,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:14,339 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:14,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:14,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:14,468 INFO L85 PathProgramCache]: Analyzing trace with hash 1159362112, now seen corresponding path program 81 times [2024-04-27 09:23:14,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:14,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:14,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:14,471 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:14,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:14,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:14,653 INFO L85 PathProgramCache]: Analyzing trace with hash 1580487200, now seen corresponding path program 82 times [2024-04-27 09:23:14,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:14,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:14,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:14,657 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:14,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:14,752 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:14,834 INFO L85 PathProgramCache]: Analyzing trace with hash 1750463041, now seen corresponding path program 83 times [2024-04-27 09:23:14,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:14,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:14,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:14,838 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:14,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:15,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:15,661 INFO L85 PathProgramCache]: Analyzing trace with hash -1133985873, now seen corresponding path program 84 times [2024-04-27 09:23:15,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:15,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:15,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:15,664 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:15,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:16,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:16,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:16,267 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:16,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:16,346 INFO L85 PathProgramCache]: Analyzing trace with hash 509292660, now seen corresponding path program 85 times [2024-04-27 09:23:16,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:16,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:16,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:16,365 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:16,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:16,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:16,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:16,384 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:16,515 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:16,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:16,600 INFO L85 PathProgramCache]: Analyzing trace with hash -1391796631, now seen corresponding path program 31 times [2024-04-27 09:23:16,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:16,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:16,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:16,619 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:16,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:16,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:16,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:16,638 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:16,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:16,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:16,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:16,797 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:16,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:16,863 INFO L85 PathProgramCache]: Analyzing trace with hash -196022506, now seen corresponding path program 31 times [2024-04-27 09:23:16,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:16,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:16,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:16,883 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:16,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:16,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:16,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:17,013 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:17,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:17,195 INFO L85 PathProgramCache]: Analyzing trace with hash -1781730271, now seen corresponding path program 32 times [2024-04-27 09:23:17,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:17,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:17,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:17,214 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:17,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:17,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:17,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:17,232 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:17,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:17,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:17,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:17,458 INFO L85 PathProgramCache]: Analyzing trace with hash -1391796630, now seen corresponding path program 86 times [2024-04-27 09:23:17,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:17,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:17,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:17,484 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:17,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:17,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:17,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:17,509 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:17,617 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:17,707 INFO L85 PathProgramCache]: Analyzing trace with hash -196022474, now seen corresponding path program 87 times [2024-04-27 09:23:17,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:17,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:17,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:17,732 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:17,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:17,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:17,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:17,756 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:17,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:17,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:18,012 INFO L85 PathProgramCache]: Analyzing trace with hash -1781729301, now seen corresponding path program 88 times [2024-04-27 09:23:18,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:18,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:18,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:18,037 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:18,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:18,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:18,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:18,063 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:18,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:18,270 INFO L85 PathProgramCache]: Analyzing trace with hash 600966610, now seen corresponding path program 32 times [2024-04-27 09:23:18,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:18,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:18,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:18,291 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:18,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:18,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:18,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:18,311 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:18,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:18,495 INFO L85 PathProgramCache]: Analyzing trace with hash 1450095821, now seen corresponding path program 32 times [2024-04-27 09:23:18,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:18,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:18,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:18,516 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:18,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:18,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:18,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:18,541 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:18,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:18,707 INFO L85 PathProgramCache]: Analyzing trace with hash 2003297610, now seen corresponding path program 33 times [2024-04-27 09:23:18,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:18,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:18,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:18,727 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:18,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:18,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:18,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:18,746 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:18,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:18,938 INFO L85 PathProgramCache]: Analyzing trace with hash 600966611, now seen corresponding path program 89 times [2024-04-27 09:23:18,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:18,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:18,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:18,957 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:18,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:18,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:18,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:18,980 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:19,123 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:19,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:19,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:19,191 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:19,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:19,235 INFO L85 PathProgramCache]: Analyzing trace with hash 1450095853, now seen corresponding path program 90 times [2024-04-27 09:23:19,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:19,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:19,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:19,258 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:19,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:19,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:19,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:19,278 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:19,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:19,452 INFO L85 PathProgramCache]: Analyzing trace with hash 2003298580, now seen corresponding path program 91 times [2024-04-27 09:23:19,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:19,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:19,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:19,472 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:23:19,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:19,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:19,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:19,491 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:23:19,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:19,656 INFO L85 PathProgramCache]: Analyzing trace with hash 1972713929, now seen corresponding path program 33 times [2024-04-27 09:23:19,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:19,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:19,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:19,676 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:23:19,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:19,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:19,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:19,695 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:23:19,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:19,855 INFO L85 PathProgramCache]: Analyzing trace with hash 1024589750, now seen corresponding path program 33 times [2024-04-27 09:23:19,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:19,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:19,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:19,875 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:23:19,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:19,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:19,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:19,895 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:23:19,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:20,051 INFO L85 PathProgramCache]: Analyzing trace with hash 1697511297, now seen corresponding path program 34 times [2024-04-27 09:23:20,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:20,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:20,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:20,071 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:23:20,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:20,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:20,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:20,091 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:23:20,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:20,267 INFO L85 PathProgramCache]: Analyzing trace with hash 1972713930, now seen corresponding path program 92 times [2024-04-27 09:23:20,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:20,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:20,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:20,287 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:23:20,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:20,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:20,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:20,316 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:23:20,702 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:20,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:20,820 INFO L85 PathProgramCache]: Analyzing trace with hash 847712849, now seen corresponding path program 93 times [2024-04-27 09:23:20,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:20,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:20,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:20,846 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:23:20,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:20,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:20,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:20,878 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:23:22,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:22,786 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:22,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:22,819 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:22,844 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:22,882 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:22,892 INFO L85 PathProgramCache]: Analyzing trace with hash 744620822, now seen corresponding path program 94 times [2024-04-27 09:23:22,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:22,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:22,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:22,894 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:22,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:22,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,085 INFO L85 PathProgramCache]: Analyzing trace with hash 1608409095, now seen corresponding path program 34 times [2024-04-27 09:23:23,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:23,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:23,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:23,089 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:23,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:23,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,460 INFO L85 PathProgramCache]: Analyzing trace with hash -1678925512, now seen corresponding path program 34 times [2024-04-27 09:23:23,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:23,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:23,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:23,465 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:23,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:23,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,737 INFO L85 PathProgramCache]: Analyzing trace with hash -507083201, now seen corresponding path program 35 times [2024-04-27 09:23:23,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:23,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:23,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:23,740 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:23,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:23,863 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:23,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:24,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:24,009 INFO L85 PathProgramCache]: Analyzing trace with hash 1608409096, now seen corresponding path program 95 times [2024-04-27 09:23:24,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:24,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:24,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:24,012 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:24,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:24,134 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:24,231 INFO L85 PathProgramCache]: Analyzing trace with hash -1678925480, now seen corresponding path program 96 times [2024-04-27 09:23:24,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:24,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:24,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:24,233 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:24,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:24,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:24,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:24,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:24,521 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:24,542 INFO L85 PathProgramCache]: Analyzing trace with hash -507082231, now seen corresponding path program 97 times [2024-04-27 09:23:24,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:24,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:24,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:24,544 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:24,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:24,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:24,745 INFO L85 PathProgramCache]: Analyzing trace with hash 1460320116, now seen corresponding path program 35 times [2024-04-27 09:23:24,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:24,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:24,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:24,748 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:24,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:24,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:25,008 INFO L85 PathProgramCache]: Analyzing trace with hash -1974716565, now seen corresponding path program 35 times [2024-04-27 09:23:25,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:25,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:25,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:25,011 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:25,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:25,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:25,202 INFO L85 PathProgramCache]: Analyzing trace with hash -1086671252, now seen corresponding path program 36 times [2024-04-27 09:23:25,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:25,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:25,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:25,204 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:25,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:25,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:25,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:25,473 INFO L85 PathProgramCache]: Analyzing trace with hash 1460320117, now seen corresponding path program 98 times [2024-04-27 09:23:25,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:25,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:25,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:25,478 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:25,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:25,591 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:25,683 INFO L85 PathProgramCache]: Analyzing trace with hash -1974716533, now seen corresponding path program 99 times [2024-04-27 09:23:25,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:25,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:25,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:25,687 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:25,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:25,822 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:25,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:25,843 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:25,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:26,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:26,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:26,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:26,150 INFO L85 PathProgramCache]: Analyzing trace with hash -1086670282, now seen corresponding path program 100 times [2024-04-27 09:23:26,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:26,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:26,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:26,154 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:26,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:26,252 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:26,333 INFO L85 PathProgramCache]: Analyzing trace with hash 672959719, now seen corresponding path program 36 times [2024-04-27 09:23:26,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:26,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:26,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:26,337 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:26,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:26,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:26,604 INFO L85 PathProgramCache]: Analyzing trace with hash -613085096, now seen corresponding path program 36 times [2024-04-27 09:23:26,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:26,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:26,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:26,607 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:26,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:26,746 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:26,863 INFO L85 PathProgramCache]: Analyzing trace with hash -1825768673, now seen corresponding path program 37 times [2024-04-27 09:23:26,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:26,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:26,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:26,866 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:26,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:26,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:27,080 INFO L85 PathProgramCache]: Analyzing trace with hash 672959720, now seen corresponding path program 101 times [2024-04-27 09:23:27,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:27,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:27,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:27,082 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:27,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:27,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:27,516 INFO L85 PathProgramCache]: Analyzing trace with hash -114525321, now seen corresponding path program 102 times [2024-04-27 09:23:27,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:27,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:27,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:27,518 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:27,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:28,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:28,146 INFO L85 PathProgramCache]: Analyzing trace with hash -755134036, now seen corresponding path program 19 times [2024-04-27 09:23:28,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:28,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:28,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:28,148 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:28,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:28,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:28,310 INFO L85 PathProgramCache]: Analyzing trace with hash -1934318543, now seen corresponding path program 7 times [2024-04-27 09:23:28,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:28,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:28,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:28,313 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:28,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:28,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:28,506 INFO L85 PathProgramCache]: Analyzing trace with hash 165667406, now seen corresponding path program 7 times [2024-04-27 09:23:28,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:28,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:28,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:28,509 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:28,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:28,632 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:28,693 INFO L85 PathProgramCache]: Analyzing trace with hash 840722409, now seen corresponding path program 7 times [2024-04-27 09:23:28,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:28,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:28,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:28,696 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:28,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:28,781 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:28,843 INFO L85 PathProgramCache]: Analyzing trace with hash -1934318542, now seen corresponding path program 20 times [2024-04-27 09:23:28,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:28,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:28,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:28,845 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:28,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:28,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:28,995 INFO L85 PathProgramCache]: Analyzing trace with hash 165667438, now seen corresponding path program 21 times [2024-04-27 09:23:28,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:28,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:28,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:28,997 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:28,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:29,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:29,142 INFO L85 PathProgramCache]: Analyzing trace with hash 840723379, now seen corresponding path program 22 times [2024-04-27 09:23:29,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:29,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:29,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:29,145 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:29,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:29,240 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:29,316 INFO L85 PathProgramCache]: Analyzing trace with hash 292621066, now seen corresponding path program 8 times [2024-04-27 09:23:29,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:29,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:29,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:29,320 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:29,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:29,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:29,492 INFO L85 PathProgramCache]: Analyzing trace with hash 481318549, now seen corresponding path program 8 times [2024-04-27 09:23:29,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:29,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:29,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:29,495 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:29,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:29,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:29,653 INFO L85 PathProgramCache]: Analyzing trace with hash 2035973250, now seen corresponding path program 8 times [2024-04-27 09:23:29,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:29,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:29,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:29,656 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:29,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:29,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:29,834 INFO L85 PathProgramCache]: Analyzing trace with hash 292621067, now seen corresponding path program 23 times [2024-04-27 09:23:29,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:29,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:29,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:29,837 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:29,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:29,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:29,990 INFO L85 PathProgramCache]: Analyzing trace with hash 481318581, now seen corresponding path program 24 times [2024-04-27 09:23:29,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:29,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:29,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:29,994 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:29,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:30,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:30,168 INFO L85 PathProgramCache]: Analyzing trace with hash 2035974220, now seen corresponding path program 25 times [2024-04-27 09:23:30,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:30,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:30,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:30,171 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:30,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:30,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:30,346 INFO L85 PathProgramCache]: Analyzing trace with hash -1309308527, now seen corresponding path program 9 times [2024-04-27 09:23:30,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:30,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:30,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:30,349 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:30,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:30,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:30,500 INFO L85 PathProgramCache]: Analyzing trace with hash -1933858578, now seen corresponding path program 9 times [2024-04-27 09:23:30,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:30,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:30,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:30,503 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:30,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:30,600 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:30,653 INFO L85 PathProgramCache]: Analyzing trace with hash 179926345, now seen corresponding path program 9 times [2024-04-27 09:23:30,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:30,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:30,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:30,656 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:30,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:30,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:30,807 INFO L85 PathProgramCache]: Analyzing trace with hash -1309308526, now seen corresponding path program 26 times [2024-04-27 09:23:30,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:30,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:30,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:30,811 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:30,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:31,143 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:23:31,204 INFO L85 PathProgramCache]: Analyzing trace with hash -1409832423, now seen corresponding path program 27 times [2024-04-27 09:23:31,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:31,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:31,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:31,207 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:31,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:33,874 INFO L85 PathProgramCache]: Analyzing trace with hash -528620705, now seen corresponding path program 1 times [2024-04-27 09:23:33,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:33,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:33,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:33,883 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:23:33,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:33,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:33,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:33,892 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:23:34,049 INFO L85 PathProgramCache]: Analyzing trace with hash 1505758927, now seen corresponding path program 2 times [2024-04-27 09:23:34,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:34,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:34,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:34,067 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:23:34,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:34,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:34,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:34,078 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:23:34,235 INFO L85 PathProgramCache]: Analyzing trace with hash 260042568, now seen corresponding path program 3 times [2024-04-27 09:23:34,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:34,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:34,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:34,244 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:23:34,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:34,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:34,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:34,252 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:23:34,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-04-27 09:23:34,279 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2024-04-27 09:23:34,287 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-04-27 09:23:34,480 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1340,SelfDestructingSolverStorable1109,SelfDestructingSolverStorable1108,SelfDestructingSolverStorable1229,SelfDestructingSolverStorable1107,SelfDestructingSolverStorable1228,SelfDestructingSolverStorable1349,SelfDestructingSolverStorable1106,SelfDestructingSolverStorable1227,SelfDestructingSolverStorable1348,SelfDestructingSolverStorable1105,SelfDestructingSolverStorable1226,SelfDestructingSolverStorable1347,SelfDestructingSolverStorable1104,SelfDestructingSolverStorable1225,SelfDestructingSolverStorable1346,SelfDestructingSolverStorable1103,SelfDestructingSolverStorable1224,SelfDestructingSolverStorable1345,SelfDestructingSolverStorable1102,SelfDestructingSolverStorable1223,SelfDestructingSolverStorable1344,SelfDestructingSolverStorable1101,SelfDestructingSolverStorable1222,SelfDestructingSolverStorable1343,SelfDestructingSolverStorable1100,SelfDestructingSolverStorable1221,SelfDestructingSolverStorable1342,SelfDestructingSolverStorable1220,SelfDestructingSolverStorable1341,SelfDestructingSolverStorable1230,SelfDestructingSolverStorable1351,SelfDestructingSolverStorable1350,SelfDestructingSolverStorable1119,SelfDestructingSolverStorable1118,SelfDestructingSolverStorable1239,SelfDestructingSolverStorable1117,SelfDestructingSolverStorable1238,SelfDestructingSolverStorable1359,SelfDestructingSolverStorable1116,SelfDestructingSolverStorable1237,SelfDestructingSolverStorable1358,SelfDestructingSolverStorable1115,SelfDestructingSolverStorable1236,SelfDestructingSolverStorable1357,SelfDestructingSolverStorable1114,SelfDestructingSolverStorable1235,SelfDestructingSolverStorable1356,SelfDestructingSolverStorable1113,SelfDestructingSolverStorable1234,SelfDestructingSolverStorable1355,SelfDestructingSolverStorable1112,SelfDestructingSolverStorable1233,SelfDestructingSolverStorable1354,SelfDestructingSolverStorable1111,SelfDestructingSolverStorable1232,SelfDestructingSolverStorable1353,SelfDestructingSolverStorable1110,SelfDestructingSolverStorable1231,SelfDestructingSolverStorable1352,SelfDestructingSolverStorable1209,SelfDestructingSolverStorable1208,SelfDestructingSolverStorable1329,SelfDestructingSolverStorable1207,SelfDestructingSolverStorable1328,SelfDestructingSolverStorable1206,SelfDestructingSolverStorable1327,SelfDestructingSolverStorable1205,SelfDestructingSolverStorable1326,SelfDestructingSolverStorable1204,SelfDestructingSolverStorable1325,SelfDestructingSolverStorable1203,SelfDestructingSolverStorable1324,SelfDestructingSolverStorable1202,SelfDestructingSolverStorable1323,SelfDestructingSolverStorable1201,SelfDestructingSolverStorable1322,SelfDestructingSolverStorable1200,SelfDestructingSolverStorable1321,SelfDestructingSolverStorable1320,SelfDestructingSolverStorable1219,SelfDestructingSolverStorable1218,SelfDestructingSolverStorable1339,SelfDestructingSolverStorable1217,SelfDestructingSolverStorable1338,SelfDestructingSolverStorable1216,SelfDestructingSolverStorable1337,SelfDestructingSolverStorable1215,SelfDestructingSolverStorable1336,SelfDestructingSolverStorable1214,SelfDestructingSolverStorable1335,SelfDestructingSolverStorable1213,SelfDestructingSolverStorable1334,SelfDestructingSolverStorable1212,SelfDestructingSolverStorable1333,SelfDestructingSolverStorable1211,SelfDestructingSolverStorable1332,SelfDestructingSolverStorable1210,SelfDestructingSolverStorable1331,SelfDestructingSolverStorable1330,SelfDestructingSolverStorable990,SelfDestructingSolverStorable1309,SelfDestructingSolverStorable988,SelfDestructingSolverStorable1308,SelfDestructingSolverStorable989,SelfDestructingSolverStorable1307,SelfDestructingSolverStorable1306,SelfDestructingSolverStorable1305,SelfDestructingSolverStorable984,SelfDestructingSolverStorable1304,SelfDestructingSolverStorable985,SelfDestructingSolverStorable1303,SelfDestructingSolverStorable986,SelfDestructingSolverStorable1302,SelfDestructingSolverStorable987,SelfDestructingSolverStorable1301,SelfDestructingSolverStorable980,SelfDestructingSolverStorable1300,SelfDestructingSolverStorable981,SelfDestructingSolverStorable982,SelfDestructingSolverStorable983,SelfDestructingSolverStorable1319,SelfDestructingSolverStorable1318,SelfDestructingSolverStorable979,SelfDestructingSolverStorable1317,SelfDestructingSolverStorable1316,SelfDestructingSolverStorable1315,SelfDestructingSolverStorable1314,SelfDestructingSolverStorable1313,SelfDestructingSolverStorable1312,SelfDestructingSolverStorable1311,SelfDestructingSolverStorable1310,SelfDestructingSolverStorable999,SelfDestructingSolverStorable995,SelfDestructingSolverStorable996,SelfDestructingSolverStorable997,SelfDestructingSolverStorable998,SelfDestructingSolverStorable991,SelfDestructingSolverStorable992,SelfDestructingSolverStorable993,SelfDestructingSolverStorable994,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable1087,SelfDestructingSolverStorable1086,SelfDestructingSolverStorable1085,SelfDestructingSolverStorable1084,SelfDestructingSolverStorable1083,SelfDestructingSolverStorable1082,SelfDestructingSolverStorable1081,SelfDestructingSolverStorable1080,SelfDestructingSolverStorable1089,SelfDestructingSolverStorable1088,SelfDestructingSolverStorable1098,SelfDestructingSolverStorable1097,SelfDestructingSolverStorable1096,SelfDestructingSolverStorable1095,SelfDestructingSolverStorable1094,SelfDestructingSolverStorable1093,SelfDestructingSolverStorable1092,SelfDestructingSolverStorable1091,SelfDestructingSolverStorable1090,SelfDestructingSolverStorable1099,SelfDestructingSolverStorable1065,SelfDestructingSolverStorable1186,SelfDestructingSolverStorable1064,SelfDestructingSolverStorable1185,SelfDestructingSolverStorable1063,SelfDestructingSolverStorable1184,SelfDestructingSolverStorable1062,SelfDestructingSolverStorable1183,SelfDestructingSolverStorable1061,SelfDestructingSolverStorable1182,SelfDestructingSolverStorable1060,SelfDestructingSolverStorable1181,SelfDestructingSolverStorable1180,SelfDestructingSolverStorable1069,SelfDestructingSolverStorable1068,SelfDestructingSolverStorable1189,SelfDestructingSolverStorable1067,SelfDestructingSolverStorable1188,SelfDestructingSolverStorable1066,SelfDestructingSolverStorable1187,SelfDestructingSolverStorable1076,SelfDestructingSolverStorable1197,SelfDestructingSolverStorable1075,SelfDestructingSolverStorable1196,SelfDestructingSolverStorable1074,SelfDestructingSolverStorable1195,SelfDestructingSolverStorable1073,SelfDestructingSolverStorable1194,SelfDestructingSolverStorable1072,SelfDestructingSolverStorable1193,SelfDestructingSolverStorable1071,SelfDestructingSolverStorable1192,SelfDestructingSolverStorable1070,SelfDestructingSolverStorable1191,SelfDestructingSolverStorable1190,SelfDestructingSolverStorable1079,SelfDestructingSolverStorable1078,SelfDestructingSolverStorable1199,SelfDestructingSolverStorable1077,SelfDestructingSolverStorable1198,SelfDestructingSolverStorable1043,SelfDestructingSolverStorable1164,SelfDestructingSolverStorable1285,SelfDestructingSolverStorable1042,SelfDestructingSolverStorable1163,SelfDestructingSolverStorable1284,SelfDestructingSolverStorable1041,SelfDestructingSolverStorable1162,SelfDestructingSolverStorable1283,SelfDestructingSolverStorable1040,SelfDestructingSolverStorable1161,SelfDestructingSolverStorable1282,SelfDestructingSolverStorable1160,SelfDestructingSolverStorable1281,SelfDestructingSolverStorable1280,SelfDestructingSolverStorable1049,SelfDestructingSolverStorable1048,SelfDestructingSolverStorable1169,SelfDestructingSolverStorable1047,SelfDestructingSolverStorable1168,SelfDestructingSolverStorable1289,SelfDestructingSolverStorable1046,SelfDestructingSolverStorable1167,SelfDestructingSolverStorable1288,SelfDestructingSolverStorable1045,SelfDestructingSolverStorable1166,SelfDestructingSolverStorable1287,SelfDestructingSolverStorable1044,SelfDestructingSolverStorable1165,SelfDestructingSolverStorable1286,SelfDestructingSolverStorable1054,SelfDestructingSolverStorable1175,SelfDestructingSolverStorable1296,SelfDestructingSolverStorable1053,SelfDestructingSolverStorable1174,SelfDestructingSolverStorable1295,SelfDestructingSolverStorable1052,SelfDestructingSolverStorable1173,SelfDestructingSolverStorable1294,SelfDestructingSolverStorable1051,SelfDestructingSolverStorable1172,SelfDestructingSolverStorable1293,SelfDestructingSolverStorable1050,SelfDestructingSolverStorable1171,SelfDestructingSolverStorable1292,SelfDestructingSolverStorable1170,SelfDestructingSolverStorable1291,SelfDestructingSolverStorable1290,SelfDestructingSolverStorable1059,SelfDestructingSolverStorable1058,SelfDestructingSolverStorable1179,SelfDestructingSolverStorable1057,SelfDestructingSolverStorable1178,SelfDestructingSolverStorable1299,SelfDestructingSolverStorable1056,SelfDestructingSolverStorable1177,SelfDestructingSolverStorable1298,SelfDestructingSolverStorable1055,SelfDestructingSolverStorable1176,SelfDestructingSolverStorable1297,SelfDestructingSolverStorable1021,SelfDestructingSolverStorable1142,SelfDestructingSolverStorable1263,SelfDestructingSolverStorable1020,SelfDestructingSolverStorable1141,SelfDestructingSolverStorable1262,SelfDestructingSolverStorable1140,SelfDestructingSolverStorable1261,SelfDestructingSolverStorable1260,SelfDestructingSolverStorable1029,SelfDestructingSolverStorable1028,SelfDestructingSolverStorable1149,SelfDestructingSolverStorable1027,SelfDestructingSolverStorable1148,SelfDestructingSolverStorable1269,SelfDestructingSolverStorable1026,SelfDestructingSolverStorable1147,SelfDestructingSolverStorable1268,SelfDestructingSolverStorable1025,SelfDestructingSolverStorable1146,SelfDestructingSolverStorable1267,SelfDestructingSolverStorable1024,SelfDestructingSolverStorable1145,SelfDestructingSolverStorable1266,SelfDestructingSolverStorable1023,SelfDestructingSolverStorable1144,SelfDestructingSolverStorable1265,SelfDestructingSolverStorable1022,SelfDestructingSolverStorable1143,SelfDestructingSolverStorable1264,SelfDestructingSolverStorable1032,SelfDestructingSolverStorable1153,SelfDestructingSolverStorable1274,SelfDestructingSolverStorable1031,SelfDestructingSolverStorable1152,SelfDestructingSolverStorable1273,SelfDestructingSolverStorable1030,SelfDestructingSolverStorable1151,SelfDestructingSolverStorable1272,SelfDestructingSolverStorable1150,SelfDestructingSolverStorable1271,SelfDestructingSolverStorable1270,SelfDestructingSolverStorable1039,SelfDestructingSolverStorable1038,SelfDestructingSolverStorable1159,SelfDestructingSolverStorable1037,SelfDestructingSolverStorable1158,SelfDestructingSolverStorable1279,SelfDestructingSolverStorable1036,SelfDestructingSolverStorable1157,SelfDestructingSolverStorable1278,SelfDestructingSolverStorable1035,SelfDestructingSolverStorable1156,SelfDestructingSolverStorable1277,SelfDestructingSolverStorable1034,SelfDestructingSolverStorable1155,SelfDestructingSolverStorable1276,SelfDestructingSolverStorable1033,SelfDestructingSolverStorable1154,SelfDestructingSolverStorable1275,SelfDestructingSolverStorable1120,SelfDestructingSolverStorable1241,SelfDestructingSolverStorable1362,SelfDestructingSolverStorable1240,SelfDestructingSolverStorable1361,SelfDestructingSolverStorable1360,SelfDestructingSolverStorable1009,SelfDestructingSolverStorable1008,SelfDestructingSolverStorable1129,SelfDestructingSolverStorable1007,SelfDestructingSolverStorable1128,SelfDestructingSolverStorable1249,SelfDestructingSolverStorable1006,SelfDestructingSolverStorable1127,SelfDestructingSolverStorable1248,SelfDestructingSolverStorable1369,SelfDestructingSolverStorable1005,SelfDestructingSolverStorable1126,SelfDestructingSolverStorable1247,SelfDestructingSolverStorable1368,SelfDestructingSolverStorable1004,SelfDestructingSolverStorable1125,SelfDestructingSolverStorable1246,SelfDestructingSolverStorable1367,SelfDestructingSolverStorable1003,SelfDestructingSolverStorable1124,SelfDestructingSolverStorable1245,SelfDestructingSolverStorable1366,SelfDestructingSolverStorable1002,SelfDestructingSolverStorable1123,SelfDestructingSolverStorable1244,SelfDestructingSolverStorable1365,SelfDestructingSolverStorable1001,SelfDestructingSolverStorable1122,SelfDestructingSolverStorable1243,SelfDestructingSolverStorable1364,SelfDestructingSolverStorable1000,SelfDestructingSolverStorable1121,SelfDestructingSolverStorable1242,SelfDestructingSolverStorable1363,SelfDestructingSolverStorable1010,SelfDestructingSolverStorable1131,SelfDestructingSolverStorable1252,SelfDestructingSolverStorable1130,SelfDestructingSolverStorable1251,SelfDestructingSolverStorable1250,SelfDestructingSolverStorable1019,SelfDestructingSolverStorable1018,SelfDestructingSolverStorable1139,SelfDestructingSolverStorable1017,SelfDestructingSolverStorable1138,SelfDestructingSolverStorable1259,SelfDestructingSolverStorable1016,SelfDestructingSolverStorable1137,SelfDestructingSolverStorable1258,SelfDestructingSolverStorable1015,SelfDestructingSolverStorable1136,SelfDestructingSolverStorable1257,SelfDestructingSolverStorable1014,SelfDestructingSolverStorable1135,SelfDestructingSolverStorable1256,SelfDestructingSolverStorable1013,SelfDestructingSolverStorable1134,SelfDestructingSolverStorable1255,SelfDestructingSolverStorable1012,SelfDestructingSolverStorable1133,SelfDestructingSolverStorable1254,SelfDestructingSolverStorable1011,SelfDestructingSolverStorable1132,SelfDestructingSolverStorable1253 [2024-04-27 09:23:34,480 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-04-27 09:23:34,480 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 09:23:34,481 INFO L85 PathProgramCache]: Analyzing trace with hash -1503257789, now seen corresponding path program 2 times [2024-04-27 09:23:34,481 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 09:23:34,481 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [550905122] [2024-04-27 09:23:34,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:34,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:34,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:34,501 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:23:34,501 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 09:23:34,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [550905122] [2024-04-27 09:23:34,501 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [550905122] provided 0 perfect and 1 imperfect interpolant sequences [2024-04-27 09:23:34,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1288412670] [2024-04-27 09:23:34,501 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-04-27 09:23:34,501 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-04-27 09:23:34,501 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-04-27 09:23:34,502 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-04-27 09:23:34,504 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-04-27 09:23:34,549 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-04-27 09:23:34,550 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-04-27 09:23:34,550 INFO L262 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 4 conjunts are in the unsatisfiable core [2024-04-27 09:23:34,551 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-04-27 09:23:34,571 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:23:34,571 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-04-27 09:23:34,571 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1288412670] provided 1 perfect and 0 imperfect interpolant sequences [2024-04-27 09:23:34,571 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-04-27 09:23:34,571 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [5] total 5 [2024-04-27 09:23:34,571 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1844535700] [2024-04-27 09:23:34,572 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-04-27 09:23:34,572 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-04-27 09:23:34,572 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 09:23:34,572 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-04-27 09:23:34,572 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2024-04-27 09:23:34,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 09:23:34,573 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 09:23:34,573 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.25) internal successors, (37), 4 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 09:23:34,573 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-04-27 09:23:34,573 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2024-04-27 09:23:34,573 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 09:23:35,149 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:35,200 INFO L85 PathProgramCache]: Analyzing trace with hash -1084398370, now seen corresponding path program 203 times [2024-04-27 09:23:35,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:35,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:35,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:35,217 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 31 proven. 7 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:35,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:35,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:35,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:35,239 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 31 proven. 7 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:36,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:36,929 INFO L85 PathProgramCache]: Analyzing trace with hash -1037314360, now seen corresponding path program 204 times [2024-04-27 09:23:36,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:36,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:36,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:36,953 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:36,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:36,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:36,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:36,977 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:37,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:37,127 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:37,143 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:37,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:37,183 INFO L85 PathProgramCache]: Analyzing trace with hash -1140469859, now seen corresponding path program 60 times [2024-04-27 09:23:37,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:37,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:37,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:37,212 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:37,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:37,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:37,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:37,242 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:37,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:37,377 INFO L85 PathProgramCache]: Analyzing trace with hash 1748815467, now seen corresponding path program 61 times [2024-04-27 09:23:37,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:37,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:37,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:37,383 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:37,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:37,494 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:37,578 INFO L85 PathProgramCache]: Analyzing trace with hash 1764325950, now seen corresponding path program 59 times [2024-04-27 09:23:37,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:37,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:37,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:37,617 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:37,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:37,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:37,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:37,646 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:37,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:37,779 INFO L85 PathProgramCache]: Analyzing trace with hash -775285718, now seen corresponding path program 60 times [2024-04-27 09:23:37,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:37,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:37,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:37,785 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:37,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:37,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:38,032 INFO L85 PathProgramCache]: Analyzing trace with hash -2021296235, now seen corresponding path program 58 times [2024-04-27 09:23:38,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:38,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:38,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:38,065 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:38,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:38,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:38,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:38,102 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:38,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:38,258 INFO L85 PathProgramCache]: Analyzing trace with hash -994540685, now seen corresponding path program 59 times [2024-04-27 09:23:38,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:38,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:38,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:38,265 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:38,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:38,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:38,417 INFO L85 PathProgramCache]: Analyzing trace with hash -1140439789, now seen corresponding path program 205 times [2024-04-27 09:23:38,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:38,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:38,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:38,446 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:38,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:38,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:38,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:38,478 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:38,552 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:38,611 INFO L85 PathProgramCache]: Analyzing trace with hash -683075160, now seen corresponding path program 62 times [2024-04-27 09:23:38,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:38,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:38,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:38,617 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:38,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:38,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:38,758 INFO L85 PathProgramCache]: Analyzing trace with hash 63063168, now seen corresponding path program 63 times [2024-04-27 09:23:38,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:38,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:38,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:38,862 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 11 proven. 69 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:38,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:38,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:38,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:38,907 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 11 proven. 69 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:38,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:39,049 INFO L85 PathProgramCache]: Analyzing trace with hash -1130413357, now seen corresponding path program 61 times [2024-04-27 09:23:39,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:39,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:39,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:39,056 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:39,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:39,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:39,200 INFO L85 PathProgramCache]: Analyzing trace with hash 694355829, now seen corresponding path program 62 times [2024-04-27 09:23:39,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:39,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:39,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:39,311 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 10 proven. 69 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:39,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:39,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:39,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:39,362 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 10 proven. 69 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:39,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:39,520 INFO L85 PathProgramCache]: Analyzing trace with hash 379177056, now seen corresponding path program 60 times [2024-04-27 09:23:39,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:39,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:39,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:39,526 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:39,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:39,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:39,662 INFO L85 PathProgramCache]: Analyzing trace with hash 299793096, now seen corresponding path program 61 times [2024-04-27 09:23:39,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:39,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:39,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:39,703 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 10 proven. 69 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:39,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:39,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:39,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:39,743 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 10 proven. 69 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:39,819 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:39,878 INFO L85 PathProgramCache]: Analyzing trace with hash -683045090, now seen corresponding path program 206 times [2024-04-27 09:23:39,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:39,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:39,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:39,884 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:39,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:39,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:40,028 INFO L85 PathProgramCache]: Analyzing trace with hash 122777459, now seen corresponding path program 64 times [2024-04-27 09:23:40,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:40,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:40,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:40,070 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:40,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:40,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:40,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:40,113 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:40,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:40,246 INFO L85 PathProgramCache]: Analyzing trace with hash -1648748843, now seen corresponding path program 65 times [2024-04-27 09:23:40,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:40,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:40,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:40,289 INFO L134 CoverageAnalysis]: Checked inductivity of 117 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:23:40,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:40,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:40,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:40,332 INFO L134 CoverageAnalysis]: Checked inductivity of 117 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:23:40,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:40,464 INFO L85 PathProgramCache]: Analyzing trace with hash -1935702104, now seen corresponding path program 63 times [2024-04-27 09:23:40,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:40,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:40,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:40,506 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:40,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:40,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:40,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:40,547 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:40,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:40,677 INFO L85 PathProgramCache]: Analyzing trace with hash 2024609408, now seen corresponding path program 64 times [2024-04-27 09:23:40,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:40,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:40,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:40,720 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:40,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:40,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:40,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:40,771 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:40,854 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:40,919 INFO L85 PathProgramCache]: Analyzing trace with hash -339536661, now seen corresponding path program 62 times [2024-04-27 09:23:40,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:40,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:40,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:40,976 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:40,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:40,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:40,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:41,033 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:41,115 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:41,173 INFO L85 PathProgramCache]: Analyzing trace with hash -488579491, now seen corresponding path program 63 times [2024-04-27 09:23:41,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:41,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:41,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:41,229 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:41,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:41,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:41,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:41,284 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:41,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:41,429 INFO L85 PathProgramCache]: Analyzing trace with hash -339536630, now seen corresponding path program 207 times [2024-04-27 09:23:41,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:41,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:41,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:41,474 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 24 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:41,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:41,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:41,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:41,515 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 24 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:41,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:41,641 INFO L85 PathProgramCache]: Analyzing trace with hash 958878538, now seen corresponding path program 208 times [2024-04-27 09:23:41,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:41,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:41,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:41,699 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:41,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:41,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:41,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:41,812 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 22 proven. 69 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:41,893 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:41,954 INFO L85 PathProgramCache]: Analyzing trace with hash 300438783, now seen corresponding path program 64 times [2024-04-27 09:23:41,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:41,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:41,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:41,962 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:41,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,055 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:42,118 INFO L85 PathProgramCache]: Analyzing trace with hash 723667776, now seen corresponding path program 65 times [2024-04-27 09:23:42,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:42,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:42,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,126 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:42,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,222 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:42,290 INFO L85 PathProgramCache]: Analyzing trace with hash 958864695, now seen corresponding path program 66 times [2024-04-27 09:23:42,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:42,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:42,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,298 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:42,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:42,439 INFO L85 PathProgramCache]: Analyzing trace with hash 300438784, now seen corresponding path program 209 times [2024-04-27 09:23:42,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:42,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:42,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,445 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:42,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:42,589 INFO L85 PathProgramCache]: Analyzing trace with hash 723667808, now seen corresponding path program 210 times [2024-04-27 09:23:42,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:42,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:42,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,595 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:42,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,672 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:42,727 INFO L85 PathProgramCache]: Analyzing trace with hash 958865665, now seen corresponding path program 211 times [2024-04-27 09:23:42,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:42,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:42,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,733 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:42,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:42,863 INFO L85 PathProgramCache]: Analyzing trace with hash -1130412365, now seen corresponding path program 212 times [2024-04-27 09:23:42,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:42,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:42,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,869 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:42,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:42,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:43,005 INFO L85 PathProgramCache]: Analyzing trace with hash 379177087, now seen corresponding path program 213 times [2024-04-27 09:23:43,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:43,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:43,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:43,011 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:43,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:43,096 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:43,148 INFO L85 PathProgramCache]: Analyzing trace with hash -1650336459, now seen corresponding path program 214 times [2024-04-27 09:23:43,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:43,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:43,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:43,154 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:23:43,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:23:43,245 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:43,303 INFO L85 PathProgramCache]: Analyzing trace with hash -993894998, now seen corresponding path program 65 times [2024-04-27 09:23:43,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:43,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:43,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:43,334 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 63 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:43,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:43,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:43,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:43,364 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 63 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:43,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:43,504 INFO L85 PathProgramCache]: Analyzing trace with hash -745973771, now seen corresponding path program 66 times [2024-04-27 09:23:43,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:43,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:43,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:43,541 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 63 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:43,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:43,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:43,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:43,577 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 63 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:43,659 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:43,720 INFO L85 PathProgramCache]: Analyzing trace with hash -1650350302, now seen corresponding path program 67 times [2024-04-27 09:23:43,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:43,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:43,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:43,749 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 63 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:43,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:43,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:43,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:43,778 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 63 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:43,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:43,910 INFO L85 PathProgramCache]: Analyzing trace with hash -993894997, now seen corresponding path program 215 times [2024-04-27 09:23:43,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:43,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:43,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:43,939 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 63 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:43,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:43,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:43,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:43,969 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 63 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:44,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:44,108 INFO L85 PathProgramCache]: Analyzing trace with hash 1764326942, now seen corresponding path program 216 times [2024-04-27 09:23:44,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:44,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:44,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:44,138 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:44,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:44,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:44,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:44,167 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:44,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:44,296 INFO L85 PathProgramCache]: Analyzing trace with hash -2021296204, now seen corresponding path program 217 times [2024-04-27 09:23:44,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:44,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:44,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:44,332 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:44,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:44,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:44,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:44,366 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:44,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:44,493 INFO L85 PathProgramCache]: Analyzing trace with hash -342297760, now seen corresponding path program 218 times [2024-04-27 09:23:44,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:44,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:44,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:44,530 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:44,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:44,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:44,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:44,559 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 63 proven. 11 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:44,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:44,760 INFO L85 PathProgramCache]: Analyzing trace with hash -2091973995, now seen corresponding path program 66 times [2024-04-27 09:23:44,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:44,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:44,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:44,784 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:44,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:44,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:44,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:44,808 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:44,933 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:44,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:44,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:44,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:45,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:45,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:45,078 INFO L85 PathProgramCache]: Analyzing trace with hash -426684310, now seen corresponding path program 67 times [2024-04-27 09:23:45,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:45,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:45,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:45,166 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:45,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:45,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:45,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:45,190 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:45,298 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:45,378 INFO L85 PathProgramCache]: Analyzing trace with hash -342311603, now seen corresponding path program 68 times [2024-04-27 09:23:45,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:45,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:45,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:45,409 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:45,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:45,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:45,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:45,442 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:45,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:45,582 INFO L85 PathProgramCache]: Analyzing trace with hash -2091973994, now seen corresponding path program 219 times [2024-04-27 09:23:45,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:45,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:45,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:45,615 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:45,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:45,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:45,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:45,648 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:45,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:45,787 INFO L85 PathProgramCache]: Analyzing trace with hash -426684278, now seen corresponding path program 220 times [2024-04-27 09:23:45,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:45,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:45,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:45,820 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:45,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:45,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:45,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:45,852 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:45,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:45,989 INFO L85 PathProgramCache]: Analyzing trace with hash -342310633, now seen corresponding path program 221 times [2024-04-27 09:23:45,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:45,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:45,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:46,014 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:46,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:46,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:46,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:46,043 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 62 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:46,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:47,007 INFO L85 PathProgramCache]: Analyzing trace with hash 2044750213, now seen corresponding path program 222 times [2024-04-27 09:23:47,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:47,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:47,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:47,040 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 52 proven. 7 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:47,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:47,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:47,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:47,072 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 52 proven. 7 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:47,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:47,372 INFO L85 PathProgramCache]: Analyzing trace with hash 743388991, now seen corresponding path program 67 times [2024-04-27 09:23:47,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:47,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:47,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:47,389 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:47,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:47,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:47,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:47,413 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:47,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:47,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:47,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:47,646 INFO L85 PathProgramCache]: Analyzing trace with hash 1570222336, now seen corresponding path program 68 times [2024-04-27 09:23:47,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:47,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:47,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:47,664 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:47,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:47,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:47,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:47,681 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:47,807 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:47,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:47,823 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:47,847 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:47,864 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:47,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:47,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:47,950 INFO L85 PathProgramCache]: Analyzing trace with hash 1432252279, now seen corresponding path program 69 times [2024-04-27 09:23:47,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:47,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:47,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:47,983 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:47,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:47,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:47,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:48,005 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:48,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:48,140 INFO L85 PathProgramCache]: Analyzing trace with hash 743388992, now seen corresponding path program 223 times [2024-04-27 09:23:48,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:48,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:48,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:48,157 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:48,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:48,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:48,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:48,174 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:48,249 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:48,301 INFO L85 PathProgramCache]: Analyzing trace with hash 1570222368, now seen corresponding path program 224 times [2024-04-27 09:23:48,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:48,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:48,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:48,319 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:48,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:48,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:48,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:48,336 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:48,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:48,466 INFO L85 PathProgramCache]: Analyzing trace with hash 1432253249, now seen corresponding path program 225 times [2024-04-27 09:23:48,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:48,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:48,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:48,483 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:48,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:48,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:48,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:48,501 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:48,573 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:48,634 INFO L85 PathProgramCache]: Analyzing trace with hash 1450177852, now seen corresponding path program 68 times [2024-04-27 09:23:48,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:48,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:48,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:48,723 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:48,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:48,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:48,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:48,741 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:48,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:48,876 INFO L85 PathProgramCache]: Analyzing trace with hash 2005840547, now seen corresponding path program 69 times [2024-04-27 09:23:48,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:48,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:48,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:48,893 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:48,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:48,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:48,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:48,910 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:48,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:49,044 INFO L85 PathProgramCache]: Analyzing trace with hash 2051514932, now seen corresponding path program 70 times [2024-04-27 09:23:49,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:49,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:49,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:49,062 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:49,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:49,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:49,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:49,080 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:49,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:49,234 INFO L85 PathProgramCache]: Analyzing trace with hash 1450177853, now seen corresponding path program 226 times [2024-04-27 09:23:49,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:49,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:49,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:49,258 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:49,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:49,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:49,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:49,283 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:23:49,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:49,432 INFO L85 PathProgramCache]: Analyzing trace with hash 2005840579, now seen corresponding path program 227 times [2024-04-27 09:23:49,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:49,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:49,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:49,450 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:49,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:49,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:49,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:49,468 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:23:49,544 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:49,613 INFO L85 PathProgramCache]: Analyzing trace with hash 2051515902, now seen corresponding path program 228 times [2024-04-27 09:23:49,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:49,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:49,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:49,633 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:49,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:49,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:49,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:49,659 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:23:49,740 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:49,801 INFO L85 PathProgramCache]: Analyzing trace with hash -827516385, now seen corresponding path program 69 times [2024-04-27 09:23:49,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:49,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:49,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:49,827 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:23:49,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:49,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:49,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:49,849 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:23:49,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:49,980 INFO L85 PathProgramCache]: Analyzing trace with hash 116795936, now seen corresponding path program 70 times [2024-04-27 09:23:49,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:49,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:49,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:49,999 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:23:49,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:49,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:50,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:50,019 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:23:50,093 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:50,149 INFO L85 PathProgramCache]: Analyzing trace with hash -674293161, now seen corresponding path program 71 times [2024-04-27 09:23:50,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:50,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:50,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:50,168 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:23:50,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:50,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:50,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:50,186 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:23:50,258 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:50,309 INFO L85 PathProgramCache]: Analyzing trace with hash -827516384, now seen corresponding path program 229 times [2024-04-27 09:23:50,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:50,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:50,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:50,329 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:23:50,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:50,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:50,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:50,347 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:23:50,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:50,566 INFO L85 PathProgramCache]: Analyzing trace with hash -1281906521, now seen corresponding path program 230 times [2024-04-27 09:23:50,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:50,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:50,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:50,583 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 31 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-04-27 09:23:50,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:50,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:50,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:50,599 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 31 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-04-27 09:23:53,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:53,096 INFO L85 PathProgramCache]: Analyzing trace with hash -902274410, now seen corresponding path program 231 times [2024-04-27 09:23:53,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:53,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:53,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:53,114 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:53,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:53,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:53,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:53,132 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:53,515 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:53,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:53,566 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:53,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:53,627 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264455, now seen corresponding path program 70 times [2024-04-27 09:23:53,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:53,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:53,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:53,652 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:53,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:53,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:53,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:53,678 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:53,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:53,827 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:53,833 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:53,926 INFO L85 PathProgramCache]: Analyzing trace with hash 497688760, now seen corresponding path program 71 times [2024-04-27 09:23:53,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:53,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:53,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:53,945 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:53,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:53,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:53,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:53,964 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:54,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:54,146 INFO L85 PathProgramCache]: Analyzing trace with hash -1751517505, now seen corresponding path program 72 times [2024-04-27 09:23:54,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:54,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:54,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:54,165 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:54,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:54,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:54,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:54,184 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:54,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:54,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:54,418 INFO L85 PathProgramCache]: Analyzing trace with hash 2094264456, now seen corresponding path program 232 times [2024-04-27 09:23:54,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:54,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:54,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:54,436 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:54,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:54,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:54,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:54,454 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:54,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:54,582 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:54,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:54,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:54,666 INFO L85 PathProgramCache]: Analyzing trace with hash 497688792, now seen corresponding path program 233 times [2024-04-27 09:23:54,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:54,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:54,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:54,685 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:54,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:54,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:54,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:54,704 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:54,790 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:54,876 INFO L85 PathProgramCache]: Analyzing trace with hash -1751516535, now seen corresponding path program 234 times [2024-04-27 09:23:54,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:54,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:54,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:54,895 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:54,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:54,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:54,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:54,914 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:55,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:55,073 INFO L85 PathProgramCache]: Analyzing trace with hash 1537562356, now seen corresponding path program 71 times [2024-04-27 09:23:55,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:55,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:55,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:55,093 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:55,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:55,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:55,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:55,112 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:55,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:55,266 INFO L85 PathProgramCache]: Analyzing trace with hash 419792875, now seen corresponding path program 72 times [2024-04-27 09:23:55,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:55,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:55,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:55,290 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:55,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:55,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:55,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:55,310 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:55,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:55,474 INFO L85 PathProgramCache]: Analyzing trace with hash 128677356, now seen corresponding path program 73 times [2024-04-27 09:23:55,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:55,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:55,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:55,494 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:55,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:55,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:55,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:55,513 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:55,642 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:55,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:55,649 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:55,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:55,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:55,724 INFO L85 PathProgramCache]: Analyzing trace with hash 1537562357, now seen corresponding path program 235 times [2024-04-27 09:23:55,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:55,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:55,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:55,748 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:55,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:55,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:55,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:55,767 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:23:55,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:55,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:55,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:56,035 INFO L85 PathProgramCache]: Analyzing trace with hash 419792907, now seen corresponding path program 236 times [2024-04-27 09:23:56,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:56,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:56,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:56,060 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:23:56,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:56,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:56,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:56,084 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:23:56,302 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:56,308 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:56,404 INFO L85 PathProgramCache]: Analyzing trace with hash 128678326, now seen corresponding path program 237 times [2024-04-27 09:23:56,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:56,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:56,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:56,427 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:23:56,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:56,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:56,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:56,446 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:23:56,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:56,611 INFO L85 PathProgramCache]: Analyzing trace with hash -305939097, now seen corresponding path program 72 times [2024-04-27 09:23:56,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:56,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:56,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:56,632 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:23:56,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:56,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:56,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:56,652 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:23:56,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:56,812 INFO L85 PathProgramCache]: Analyzing trace with hash -894177320, now seen corresponding path program 73 times [2024-04-27 09:23:56,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:56,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:56,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:56,835 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:23:56,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:56,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:56,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:56,855 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:23:56,941 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:57,010 INFO L85 PathProgramCache]: Analyzing trace with hash -1949693025, now seen corresponding path program 74 times [2024-04-27 09:23:57,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:57,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:57,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:57,030 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:23:57,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:57,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:57,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:57,050 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:23:57,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:57,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:57,206 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:57,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:57,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:57,299 INFO L85 PathProgramCache]: Analyzing trace with hash -305939096, now seen corresponding path program 238 times [2024-04-27 09:23:57,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:57,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:57,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:57,327 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:23:57,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:57,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:57,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:57,354 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:23:57,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:57,654 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:57,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:57,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:57,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:23:57,733 INFO L85 PathProgramCache]: Analyzing trace with hash 386536431, now seen corresponding path program 239 times [2024-04-27 09:23:57,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:57,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:57,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:57,751 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:23:57,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:23:57,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:23:57,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:23:57,768 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:00,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:00,605 INFO L85 PathProgramCache]: Analyzing trace with hash -1939167666, now seen corresponding path program 41 times [2024-04-27 09:24:00,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:00,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:00,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:00,608 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:00,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:02,361 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:02,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:02,469 INFO L85 PathProgramCache]: Analyzing trace with hash -1737880520, now seen corresponding path program 240 times [2024-04-27 09:24:02,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:02,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:02,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:02,488 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:02,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:02,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:02,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:02,506 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:02,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:02,687 INFO L85 PathProgramCache]: Analyzing trace with hash 1960278821, now seen corresponding path program 73 times [2024-04-27 09:24:02,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:02,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:02,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:02,712 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:02,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:02,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:02,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:02,739 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:02,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:02,935 INFO L85 PathProgramCache]: Analyzing trace with hash 639101402, now seen corresponding path program 74 times [2024-04-27 09:24:02,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:02,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:02,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:02,954 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:02,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:02,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:02,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:02,972 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:03,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:03,157 INFO L85 PathProgramCache]: Analyzing trace with hash -1662692899, now seen corresponding path program 75 times [2024-04-27 09:24:03,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:03,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:03,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:03,176 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:03,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:03,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:03,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:03,195 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:03,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:03,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:03,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:03,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:03,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:03,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:03,437 INFO L85 PathProgramCache]: Analyzing trace with hash 1960278822, now seen corresponding path program 241 times [2024-04-27 09:24:03,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:03,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:03,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:03,456 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:03,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:03,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:03,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:03,474 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:03,564 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:03,650 INFO L85 PathProgramCache]: Analyzing trace with hash 639101434, now seen corresponding path program 242 times [2024-04-27 09:24:03,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:03,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:03,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:03,669 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:03,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:03,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:03,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:03,687 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:03,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:03,822 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:03,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:03,841 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:03,896 INFO L85 PathProgramCache]: Analyzing trace with hash -1662691929, now seen corresponding path program 243 times [2024-04-27 09:24:03,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:03,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:03,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:03,921 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:03,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:03,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:03,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:03,940 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:04,024 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:04,097 INFO L85 PathProgramCache]: Analyzing trace with hash -3842154, now seen corresponding path program 74 times [2024-04-27 09:24:04,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:04,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:04,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:04,117 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:04,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:04,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:04,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:04,137 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:04,226 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:04,298 INFO L85 PathProgramCache]: Analyzing trace with hash -119106679, now seen corresponding path program 75 times [2024-04-27 09:24:04,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:04,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:04,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:04,317 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:04,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:04,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:04,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:04,424 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:04,513 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:04,584 INFO L85 PathProgramCache]: Analyzing trace with hash 602660366, now seen corresponding path program 76 times [2024-04-27 09:24:04,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:04,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:04,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:04,604 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:04,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:04,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:04,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:04,623 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:04,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:04,795 INFO L85 PathProgramCache]: Analyzing trace with hash -3842153, now seen corresponding path program 244 times [2024-04-27 09:24:04,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:04,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:04,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:04,814 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:04,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:04,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:04,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:04,833 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:04,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:05,010 INFO L85 PathProgramCache]: Analyzing trace with hash -119106647, now seen corresponding path program 245 times [2024-04-27 09:24:05,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:05,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:05,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:05,030 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:24:05,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:05,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:05,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:05,050 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:24:05,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:05,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:05,297 INFO L85 PathProgramCache]: Analyzing trace with hash 602661336, now seen corresponding path program 246 times [2024-04-27 09:24:05,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:05,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:05,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:05,318 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:05,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:05,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:05,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:05,337 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:05,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:05,504 INFO L85 PathProgramCache]: Analyzing trace with hash 1502632325, now seen corresponding path program 75 times [2024-04-27 09:24:05,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:05,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:05,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:05,524 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:24:05,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:05,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:05,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:05,546 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:24:05,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:05,706 INFO L85 PathProgramCache]: Analyzing trace with hash -663038086, now seen corresponding path program 76 times [2024-04-27 09:24:05,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:05,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:05,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:05,726 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:24:05,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:05,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:05,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:05,747 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:24:05,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:05,908 INFO L85 PathProgramCache]: Analyzing trace with hash 920655933, now seen corresponding path program 77 times [2024-04-27 09:24:05,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:05,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:05,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:05,929 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:24:05,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:05,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:05,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:05,949 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:24:06,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:06,121 INFO L85 PathProgramCache]: Analyzing trace with hash 1502632326, now seen corresponding path program 247 times [2024-04-27 09:24:06,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:06,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:06,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:06,141 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:24:06,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:06,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:06,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:06,162 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 09:24:06,533 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:06,606 INFO L85 PathProgramCache]: Analyzing trace with hash -1857173995, now seen corresponding path program 248 times [2024-04-27 09:24:06,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:06,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:06,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:06,625 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:06,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:06,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:06,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:06,651 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:07,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:07,087 INFO L85 PathProgramCache]: Analyzing trace with hash 15344591, now seen corresponding path program 14 times [2024-04-27 09:24:07,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:07,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:07,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:07,094 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:07,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:07,197 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:07,255 INFO L85 PathProgramCache]: Analyzing trace with hash 475682416, now seen corresponding path program 14 times [2024-04-27 09:24:07,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:07,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:07,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:07,257 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:07,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:07,355 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:07,418 INFO L85 PathProgramCache]: Analyzing trace with hash 1861253127, now seen corresponding path program 14 times [2024-04-27 09:24:07,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:07,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:07,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:07,421 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:07,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:07,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:07,565 INFO L85 PathProgramCache]: Analyzing trace with hash 15344592, now seen corresponding path program 42 times [2024-04-27 09:24:07,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:07,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:07,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:07,568 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:07,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:07,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:07,716 INFO L85 PathProgramCache]: Analyzing trace with hash 475682448, now seen corresponding path program 43 times [2024-04-27 09:24:07,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:07,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:07,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:07,719 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:07,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:07,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:07,870 INFO L85 PathProgramCache]: Analyzing trace with hash 1861254097, now seen corresponding path program 44 times [2024-04-27 09:24:07,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:07,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:07,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:07,873 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:07,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:07,970 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:08,029 INFO L85 PathProgramCache]: Analyzing trace with hash 1864302252, now seen corresponding path program 15 times [2024-04-27 09:24:08,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:08,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:08,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:08,032 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:08,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:08,223 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:08,293 INFO L85 PathProgramCache]: Analyzing trace with hash 1958795059, now seen corresponding path program 15 times [2024-04-27 09:24:08,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:08,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:08,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:08,296 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:08,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:08,390 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:08,456 INFO L85 PathProgramCache]: Analyzing trace with hash 593104804, now seen corresponding path program 15 times [2024-04-27 09:24:08,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:08,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:08,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:08,459 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:08,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:08,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:08,614 INFO L85 PathProgramCache]: Analyzing trace with hash 1864302253, now seen corresponding path program 45 times [2024-04-27 09:24:08,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:08,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:08,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:08,616 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:08,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:08,712 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:08,766 INFO L85 PathProgramCache]: Analyzing trace with hash 1958795091, now seen corresponding path program 46 times [2024-04-27 09:24:08,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:08,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:08,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:08,769 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:08,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:08,857 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:08,918 INFO L85 PathProgramCache]: Analyzing trace with hash 593105774, now seen corresponding path program 47 times [2024-04-27 09:24:08,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:08,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:08,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:08,921 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:08,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:09,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:09,080 INFO L85 PathProgramCache]: Analyzing trace with hash 1206409903, now seen corresponding path program 16 times [2024-04-27 09:24:09,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:09,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:09,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:09,083 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:09,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:09,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:09,240 INFO L85 PathProgramCache]: Analyzing trace with hash -1255998576, now seen corresponding path program 16 times [2024-04-27 09:24:09,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:09,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:09,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:09,243 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:09,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:09,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:09,394 INFO L85 PathProgramCache]: Analyzing trace with hash -281250073, now seen corresponding path program 16 times [2024-04-27 09:24:09,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:09,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:09,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:09,397 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:09,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:09,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:09,547 INFO L85 PathProgramCache]: Analyzing trace with hash 1206409904, now seen corresponding path program 48 times [2024-04-27 09:24:09,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:09,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:09,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:09,550 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:09,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:09,769 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:09,832 INFO L85 PathProgramCache]: Analyzing trace with hash 2015656247, now seen corresponding path program 49 times [2024-04-27 09:24:09,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:09,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:09,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:09,834 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:09,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:12,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:12,497 INFO L85 PathProgramCache]: Analyzing trace with hash 309785916, now seen corresponding path program 103 times [2024-04-27 09:24:12,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:12,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:12,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:12,514 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 28 proven. 7 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:12,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:12,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:12,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:12,530 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 28 proven. 7 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:14,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:14,213 INFO L85 PathProgramCache]: Analyzing trace with hash 445319590, now seen corresponding path program 104 times [2024-04-27 09:24:14,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:14,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:14,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:14,235 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:14,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:14,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:14,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:14,258 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:14,355 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:14,441 INFO L85 PathProgramCache]: Analyzing trace with hash -396434437, now seen corresponding path program 38 times [2024-04-27 09:24:14,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:14,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:14,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:14,468 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:14,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:14,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:14,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:14,495 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:14,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:14,624 INFO L85 PathProgramCache]: Analyzing trace with hash 981857613, now seen corresponding path program 39 times [2024-04-27 09:24:14,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:14,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:14,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:14,629 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:14,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:14,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:14,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:14,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:14,862 INFO L85 PathProgramCache]: Analyzing trace with hash 1095590432, now seen corresponding path program 37 times [2024-04-27 09:24:14,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:14,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:14,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:14,889 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:14,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:14,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:14,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:14,916 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:14,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:15,042 INFO L85 PathProgramCache]: Analyzing trace with hash 1278183688, now seen corresponding path program 38 times [2024-04-27 09:24:15,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:15,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:15,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:15,048 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:15,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:15,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:15,239 INFO L85 PathProgramCache]: Analyzing trace with hash 1697909619, now seen corresponding path program 37 times [2024-04-27 09:24:15,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:15,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:15,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:15,267 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:15,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:15,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:15,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:15,295 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:15,373 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:15,432 INFO L85 PathProgramCache]: Analyzing trace with hash 595720917, now seen corresponding path program 38 times [2024-04-27 09:24:15,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:15,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:15,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:15,437 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:15,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:15,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:15,572 INFO L85 PathProgramCache]: Analyzing trace with hash -396404367, now seen corresponding path program 105 times [2024-04-27 09:24:15,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:15,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:15,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:15,600 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:24:15,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:15,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:15,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:15,627 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:24:15,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:15,763 INFO L85 PathProgramCache]: Analyzing trace with hash 101511046, now seen corresponding path program 40 times [2024-04-27 09:24:15,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:15,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:15,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:15,769 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:15,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:15,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:15,910 INFO L85 PathProgramCache]: Analyzing trace with hash 458701282, now seen corresponding path program 41 times [2024-04-27 09:24:15,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:15,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:15,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:15,950 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 11 proven. 60 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:24:15,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:15,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:15,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:15,989 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 11 proven. 60 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:24:16,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:16,228 INFO L85 PathProgramCache]: Analyzing trace with hash 557463861, now seen corresponding path program 39 times [2024-04-27 09:24:16,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:16,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:16,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:16,234 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:16,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:16,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:16,377 INFO L85 PathProgramCache]: Analyzing trace with hash -1232544301, now seen corresponding path program 40 times [2024-04-27 09:24:16,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:16,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:16,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:16,418 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 10 proven. 60 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:24:16,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:16,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:16,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:16,458 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 10 proven. 60 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:24:16,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:16,593 INFO L85 PathProgramCache]: Analyzing trace with hash -1921679938, now seen corresponding path program 39 times [2024-04-27 09:24:16,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:16,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:16,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:16,600 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:16,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:16,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:16,733 INFO L85 PathProgramCache]: Analyzing trace with hash -1147838294, now seen corresponding path program 40 times [2024-04-27 09:24:16,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:16,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:16,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:16,773 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 10 proven. 60 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:24:16,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:16,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:16,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:16,815 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 10 proven. 60 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:24:16,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:16,943 INFO L85 PathProgramCache]: Analyzing trace with hash 101541116, now seen corresponding path program 106 times [2024-04-27 09:24:16,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:16,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:16,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:16,951 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:16,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:17,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:17,092 INFO L85 PathProgramCache]: Analyzing trace with hash 1187571409, now seen corresponding path program 42 times [2024-04-27 09:24:17,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:17,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:17,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:17,135 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:17,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:17,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:17,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:17,176 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:17,248 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:17,306 INFO L85 PathProgramCache]: Analyzing trace with hash 1294334647, now seen corresponding path program 43 times [2024-04-27 09:24:17,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:17,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:17,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:17,349 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:24:17,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:17,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:17,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:17,391 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:24:17,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:17,528 INFO L85 PathProgramCache]: Analyzing trace with hash 315403402, now seen corresponding path program 41 times [2024-04-27 09:24:17,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:17,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:17,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:17,570 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:17,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:17,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:17,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:17,611 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:17,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:17,739 INFO L85 PathProgramCache]: Analyzing trace with hash -1205588386, now seen corresponding path program 42 times [2024-04-27 09:24:17,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:17,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:17,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:17,780 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:17,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:17,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:17,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:17,823 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:17,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:17,958 INFO L85 PathProgramCache]: Analyzing trace with hash -959657015, now seen corresponding path program 41 times [2024-04-27 09:24:17,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:17,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:17,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:17,998 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:17,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:17,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:18,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:18,040 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:18,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:18,169 INFO L85 PathProgramCache]: Analyzing trace with hash -1839705409, now seen corresponding path program 42 times [2024-04-27 09:24:18,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:18,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:18,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:18,211 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:18,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:18,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:18,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:18,254 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:18,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:18,383 INFO L85 PathProgramCache]: Analyzing trace with hash -959656984, now seen corresponding path program 107 times [2024-04-27 09:24:18,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:18,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:18,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:18,424 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 24 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:18,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:18,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:18,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:18,557 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 24 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:18,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:18,688 INFO L85 PathProgramCache]: Analyzing trace with hash 1354516652, now seen corresponding path program 108 times [2024-04-27 09:24:18,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:18,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:18,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:18,729 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:18,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:18,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:18,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:18,770 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 22 proven. 60 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:24:18,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:18,907 INFO L85 PathProgramCache]: Analyzing trace with hash -1147192607, now seen corresponding path program 43 times [2024-04-27 09:24:18,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:18,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:18,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:18,913 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:18,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:18,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:19,051 INFO L85 PathProgramCache]: Analyzing trace with hash -1203232354, now seen corresponding path program 43 times [2024-04-27 09:24:19,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:19,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:19,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,058 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:19,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:19,196 INFO L85 PathProgramCache]: Analyzing trace with hash 1354502809, now seen corresponding path program 44 times [2024-04-27 09:24:19,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:19,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:19,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,202 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:19,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:19,337 INFO L85 PathProgramCache]: Analyzing trace with hash -1147192606, now seen corresponding path program 109 times [2024-04-27 09:24:19,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:19,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:19,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,345 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:19,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:19,478 INFO L85 PathProgramCache]: Analyzing trace with hash -1203232322, now seen corresponding path program 110 times [2024-04-27 09:24:19,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:19,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:19,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,484 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:19,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:19,618 INFO L85 PathProgramCache]: Analyzing trace with hash 1354503779, now seen corresponding path program 111 times [2024-04-27 09:24:19,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:19,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:19,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,624 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:19,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,704 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:19,759 INFO L85 PathProgramCache]: Analyzing trace with hash 557464853, now seen corresponding path program 112 times [2024-04-27 09:24:19,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:19,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:19,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,764 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:19,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,846 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:19,901 INFO L85 PathProgramCache]: Analyzing trace with hash -1921679907, now seen corresponding path program 113 times [2024-04-27 09:24:19,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:19,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:19,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:19,909 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:19,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:20,008 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:20,065 INFO L85 PathProgramCache]: Analyzing trace with hash 1877672983, now seen corresponding path program 114 times [2024-04-27 09:24:20,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:20,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:20,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:20,071 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:20,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:20,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:20,213 INFO L85 PathProgramCache]: Analyzing trace with hash 596366604, now seen corresponding path program 44 times [2024-04-27 09:24:20,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:20,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:20,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:20,244 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 58 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:24:20,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:20,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:20,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:20,275 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 58 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:24:20,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:20,448 INFO L85 PathProgramCache]: Analyzing trace with hash 1307495635, now seen corresponding path program 44 times [2024-04-27 09:24:20,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:20,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:20,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:20,480 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 58 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:24:20,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:20,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:20,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:20,508 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 58 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:24:20,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:20,650 INFO L85 PathProgramCache]: Analyzing trace with hash 1877659140, now seen corresponding path program 45 times [2024-04-27 09:24:20,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:20,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:20,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:20,684 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 58 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:24:20,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:20,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:20,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:20,712 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 58 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:24:20,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:20,845 INFO L85 PathProgramCache]: Analyzing trace with hash 596366605, now seen corresponding path program 115 times [2024-04-27 09:24:20,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:20,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:20,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:20,875 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 58 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:24:20,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:20,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:20,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:20,904 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 58 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:24:20,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:21,057 INFO L85 PathProgramCache]: Analyzing trace with hash 1095591424, now seen corresponding path program 116 times [2024-04-27 09:24:21,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:21,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:21,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:21,085 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:21,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:21,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:21,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:21,115 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:21,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:21,271 INFO L85 PathProgramCache]: Analyzing trace with hash 1697909650, now seen corresponding path program 117 times [2024-04-27 09:24:21,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:21,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:21,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:21,305 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:21,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:21,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:21,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:21,335 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:21,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:21,475 INFO L85 PathProgramCache]: Analyzing trace with hash -637965374, now seen corresponding path program 118 times [2024-04-27 09:24:21,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:21,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:21,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:21,502 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:21,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:21,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:21,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:21,537 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 58 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:21,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:21,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:21,944 INFO L85 PathProgramCache]: Analyzing trace with hash 920005495, now seen corresponding path program 45 times [2024-04-27 09:24:21,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:21,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:21,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:21,968 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:21,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:21,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:21,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:21,991 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:22,092 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:22,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1544600632, now seen corresponding path program 45 times [2024-04-27 09:24:22,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:22,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:22,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:22,231 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:22,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:22,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:22,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:22,257 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:22,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:22,450 INFO L85 PathProgramCache]: Analyzing trace with hash -637979217, now seen corresponding path program 46 times [2024-04-27 09:24:22,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:22,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:22,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:22,482 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:22,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:22,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:22,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:22,511 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:22,604 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:22,652 INFO L85 PathProgramCache]: Analyzing trace with hash 920005496, now seen corresponding path program 119 times [2024-04-27 09:24:22,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:22,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:22,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:22,676 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:22,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:22,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:22,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:22,700 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:22,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:22,835 INFO L85 PathProgramCache]: Analyzing trace with hash -1544600600, now seen corresponding path program 120 times [2024-04-27 09:24:22,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:22,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:22,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:22,866 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:22,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:22,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:22,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:22,892 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:22,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:23,016 INFO L85 PathProgramCache]: Analyzing trace with hash -637978247, now seen corresponding path program 121 times [2024-04-27 09:24:23,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:23,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:23,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:23,040 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:23,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:23,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:23,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:23,064 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 57 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:24,197 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:24,277 INFO L85 PathProgramCache]: Analyzing trace with hash -1786748185, now seen corresponding path program 122 times [2024-04-27 09:24:24,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:24,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:24,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:24,305 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 48 proven. 7 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:24,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:24,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:24,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:24,328 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 48 proven. 7 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:24,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:24,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:24,722 INFO L85 PathProgramCache]: Analyzing trace with hash 1013428897, now seen corresponding path program 46 times [2024-04-27 09:24:24,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:24,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:24,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:24,745 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:24,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:24,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:24,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:24,767 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:24,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:24,940 INFO L85 PathProgramCache]: Analyzing trace with hash 1351524830, now seen corresponding path program 46 times [2024-04-27 09:24:24,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:24,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:24,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:24,956 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:24,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:24,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:24,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:24,975 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:25,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:25,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:25,213 INFO L85 PathProgramCache]: Analyzing trace with hash -1052403111, now seen corresponding path program 47 times [2024-04-27 09:24:25,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:25,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:25,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:25,231 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:25,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:25,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:25,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:25,250 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:25,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:25,502 INFO L85 PathProgramCache]: Analyzing trace with hash 1013428898, now seen corresponding path program 123 times [2024-04-27 09:24:25,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:25,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:25,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:25,519 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:25,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:25,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:25,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:25,534 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:25,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:25,663 INFO L85 PathProgramCache]: Analyzing trace with hash 1351524862, now seen corresponding path program 124 times [2024-04-27 09:24:25,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:25,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:25,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:25,679 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:25,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:25,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:25,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:25,697 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:25,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:25,833 INFO L85 PathProgramCache]: Analyzing trace with hash -1052402141, now seen corresponding path program 125 times [2024-04-27 09:24:25,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:25,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:25,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:25,850 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:25,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:25,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:25,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:25,866 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:25,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:26,009 INFO L85 PathProgramCache]: Analyzing trace with hash 1735272090, now seen corresponding path program 47 times [2024-04-27 09:24:26,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:26,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:26,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:26,031 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:26,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:26,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:26,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:26,052 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:26,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:26,184 INFO L85 PathProgramCache]: Analyzing trace with hash -2041139963, now seen corresponding path program 47 times [2024-04-27 09:24:26,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:26,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:26,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:26,202 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:26,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:26,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:26,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:26,219 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:26,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:26,365 INFO L85 PathProgramCache]: Analyzing trace with hash 1149170706, now seen corresponding path program 48 times [2024-04-27 09:24:26,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:26,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:26,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:26,388 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:26,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:26,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:26,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:26,409 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:26,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:26,539 INFO L85 PathProgramCache]: Analyzing trace with hash 1735272091, now seen corresponding path program 126 times [2024-04-27 09:24:26,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:26,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:26,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:26,559 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:26,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:26,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:26,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:26,576 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 09:24:26,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:26,702 INFO L85 PathProgramCache]: Analyzing trace with hash -2041139931, now seen corresponding path program 127 times [2024-04-27 09:24:26,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:26,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:26,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:26,720 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:26,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:26,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:26,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:26,739 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-04-27 09:24:26,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:26,867 INFO L85 PathProgramCache]: Analyzing trace with hash 1149171676, now seen corresponding path program 128 times [2024-04-27 09:24:26,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:26,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:26,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:26,885 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:24:26,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:26,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:26,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:26,904 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-04-27 09:24:26,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:27,035 INFO L85 PathProgramCache]: Analyzing trace with hash 1264583681, now seen corresponding path program 48 times [2024-04-27 09:24:27,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:27,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:27,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:27,053 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:24:27,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:27,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:27,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:27,071 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:24:27,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:27,203 INFO L85 PathProgramCache]: Analyzing trace with hash 547388542, now seen corresponding path program 48 times [2024-04-27 09:24:27,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:27,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:27,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:27,224 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:24:27,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:27,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:27,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:27,242 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:24:27,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:27,372 INFO L85 PathProgramCache]: Analyzing trace with hash -210824263, now seen corresponding path program 49 times [2024-04-27 09:24:27,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:27,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:27,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:27,390 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:24:27,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:27,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:27,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:27,409 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:24:27,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:27,542 INFO L85 PathProgramCache]: Analyzing trace with hash 1264583682, now seen corresponding path program 129 times [2024-04-27 09:24:27,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:27,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:27,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:27,561 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:24:27,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:27,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:27,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:27,579 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-04-27 09:24:27,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:27,802 INFO L85 PathProgramCache]: Analyzing trace with hash -1929669495, now seen corresponding path program 130 times [2024-04-27 09:24:27,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:27,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:27,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:27,819 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 28 proven. 5 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:24:27,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:27,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:27,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:27,834 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 28 proven. 5 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-04-27 09:24:30,213 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:30,293 INFO L85 PathProgramCache]: Analyzing trace with hash 509292660, now seen corresponding path program 131 times [2024-04-27 09:24:30,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:30,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:30,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:30,312 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:30,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:30,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:30,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:30,333 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:30,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:30,791 INFO L85 PathProgramCache]: Analyzing trace with hash -1391796631, now seen corresponding path program 49 times [2024-04-27 09:24:30,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:30,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:30,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:30,810 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:30,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:30,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:30,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:30,828 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:30,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:31,014 INFO L85 PathProgramCache]: Analyzing trace with hash -196022506, now seen corresponding path program 49 times [2024-04-27 09:24:31,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:31,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:31,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:31,032 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:31,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:31,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:31,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:31,051 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:31,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:31,230 INFO L85 PathProgramCache]: Analyzing trace with hash -1781730271, now seen corresponding path program 50 times [2024-04-27 09:24:31,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:31,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:31,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:31,250 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:31,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:31,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:31,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:31,270 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:31,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:31,436 INFO L85 PathProgramCache]: Analyzing trace with hash -1391796630, now seen corresponding path program 132 times [2024-04-27 09:24:31,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:31,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:31,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:31,463 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:31,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:31,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:31,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:31,488 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:31,591 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:31,689 INFO L85 PathProgramCache]: Analyzing trace with hash -196022474, now seen corresponding path program 133 times [2024-04-27 09:24:31,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:31,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:31,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:31,714 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:31,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:31,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:31,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:31,739 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:31,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:31,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:31,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:31,902 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:31,918 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:31,970 INFO L85 PathProgramCache]: Analyzing trace with hash -1781729301, now seen corresponding path program 134 times [2024-04-27 09:24:31,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:31,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:31,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:31,990 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:31,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:31,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:31,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:32,009 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:32,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:32,176 INFO L85 PathProgramCache]: Analyzing trace with hash 600966610, now seen corresponding path program 50 times [2024-04-27 09:24:32,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:32,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:32,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:32,196 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:32,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:32,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:32,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:32,216 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:32,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:32,377 INFO L85 PathProgramCache]: Analyzing trace with hash 1450095821, now seen corresponding path program 50 times [2024-04-27 09:24:32,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:32,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:32,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:32,396 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:32,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:32,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:32,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:32,416 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:32,500 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:32,688 INFO L85 PathProgramCache]: Analyzing trace with hash 2003297610, now seen corresponding path program 51 times [2024-04-27 09:24:32,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:32,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:32,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:32,708 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:32,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:32,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:32,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:32,729 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:32,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:32,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:32,932 INFO L85 PathProgramCache]: Analyzing trace with hash 600966611, now seen corresponding path program 135 times [2024-04-27 09:24:32,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:32,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:32,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:32,951 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:32,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:32,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:32,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:32,977 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:33,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:33,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:33,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:33,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:33,187 INFO L85 PathProgramCache]: Analyzing trace with hash 1450095853, now seen corresponding path program 136 times [2024-04-27 09:24:33,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:33,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:33,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:33,207 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:33,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:33,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:33,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:33,227 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:33,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:33,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:33,358 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:33,367 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:33,437 INFO L85 PathProgramCache]: Analyzing trace with hash 2003298580, now seen corresponding path program 137 times [2024-04-27 09:24:33,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:33,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:33,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:33,457 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:24:33,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:33,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:33,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:33,476 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:24:33,564 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:33,639 INFO L85 PathProgramCache]: Analyzing trace with hash 1972713929, now seen corresponding path program 51 times [2024-04-27 09:24:33,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:33,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:33,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:33,659 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:33,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:33,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:33,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:33,687 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:33,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:33,849 INFO L85 PathProgramCache]: Analyzing trace with hash 1024589750, now seen corresponding path program 51 times [2024-04-27 09:24:33,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:33,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:33,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:33,870 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:33,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:33,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:33,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:33,891 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:33,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:34,050 INFO L85 PathProgramCache]: Analyzing trace with hash 1697511297, now seen corresponding path program 52 times [2024-04-27 09:24:34,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:34,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:34,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:34,070 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:34,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:34,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:34,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:34,091 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:34,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:34,279 INFO L85 PathProgramCache]: Analyzing trace with hash 1972713930, now seen corresponding path program 138 times [2024-04-27 09:24:34,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:34,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:34,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:34,298 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:34,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:34,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:34,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:34,318 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:34,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:34,603 INFO L85 PathProgramCache]: Analyzing trace with hash 847712849, now seen corresponding path program 139 times [2024-04-27 09:24:34,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:34,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:34,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:34,621 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:24:34,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:34,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:34,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:34,640 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:24:37,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:37,777 INFO L85 PathProgramCache]: Analyzing trace with hash -755134036, now seen corresponding path program 28 times [2024-04-27 09:24:37,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:37,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:37,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:37,779 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:37,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:39,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:39,553 INFO L85 PathProgramCache]: Analyzing trace with hash -326313450, now seen corresponding path program 140 times [2024-04-27 09:24:39,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:39,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:39,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:39,576 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:39,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:39,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:39,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:39,594 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:39,729 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:39,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:39,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:39,841 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:39,850 INFO L85 PathProgramCache]: Analyzing trace with hash -1525782265, now seen corresponding path program 52 times [2024-04-27 09:24:39,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:39,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:39,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:39,868 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:39,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:39,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:39,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:39,887 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:40,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:40,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:40,213 INFO L85 PathProgramCache]: Analyzing trace with hash -54609864, now seen corresponding path program 52 times [2024-04-27 09:24:40,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:40,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:40,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:40,236 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:40,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:40,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:40,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:40,262 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:40,414 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:40,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:40,566 INFO L85 PathProgramCache]: Analyzing trace with hash -1692905665, now seen corresponding path program 53 times [2024-04-27 09:24:40,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:40,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:40,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:40,592 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:40,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:40,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:40,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:40,618 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:40,786 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:40,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:40,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:40,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:40,836 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:40,889 INFO L85 PathProgramCache]: Analyzing trace with hash -1525782264, now seen corresponding path program 141 times [2024-04-27 09:24:40,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:40,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:40,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:40,908 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:40,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:40,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:40,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:40,927 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:41,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:41,218 INFO L85 PathProgramCache]: Analyzing trace with hash -54609832, now seen corresponding path program 142 times [2024-04-27 09:24:41,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:41,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:41,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:41,239 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:41,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:41,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:41,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:41,258 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:41,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:41,431 INFO L85 PathProgramCache]: Analyzing trace with hash -1692904695, now seen corresponding path program 143 times [2024-04-27 09:24:41,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:41,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:41,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:41,450 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:41,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:41,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:41,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:41,468 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:41,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:41,651 INFO L85 PathProgramCache]: Analyzing trace with hash -940437900, now seen corresponding path program 53 times [2024-04-27 09:24:41,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:41,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:41,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:41,670 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:41,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:41,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:41,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:41,690 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:41,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:41,860 INFO L85 PathProgramCache]: Analyzing trace with hash 911196267, now seen corresponding path program 53 times [2024-04-27 09:24:41,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:41,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:41,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:41,879 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:41,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:41,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:41,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:41,899 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:41,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:42,071 INFO L85 PathProgramCache]: Analyzing trace with hash -1817686676, now seen corresponding path program 54 times [2024-04-27 09:24:42,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:42,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:42,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:42,091 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:42,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:42,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:42,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:42,110 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:42,202 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:42,286 INFO L85 PathProgramCache]: Analyzing trace with hash -940437899, now seen corresponding path program 144 times [2024-04-27 09:24:42,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:42,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:42,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:42,306 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:42,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:42,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:42,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:42,325 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 09:24:42,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:42,457 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:42,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:42,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:42,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:42,528 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:42,571 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:42,579 INFO L85 PathProgramCache]: Analyzing trace with hash 911196299, now seen corresponding path program 145 times [2024-04-27 09:24:42,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:42,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:42,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:42,599 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:42,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:42,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:42,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:42,619 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 09:24:42,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:42,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:42,837 INFO L85 PathProgramCache]: Analyzing trace with hash -1817685706, now seen corresponding path program 146 times [2024-04-27 09:24:42,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:42,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:42,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:42,858 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:24:42,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:42,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:42,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:42,880 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 09:24:42,969 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:43,046 INFO L85 PathProgramCache]: Analyzing trace with hash -513681945, now seen corresponding path program 54 times [2024-04-27 09:24:43,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:43,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:43,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:43,066 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:43,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:43,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:43,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:43,087 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:43,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:43,252 INFO L85 PathProgramCache]: Analyzing trace with hash 1255728984, now seen corresponding path program 54 times [2024-04-27 09:24:43,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:43,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:43,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:43,273 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:43,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:43,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:43,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:43,293 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:43,379 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:43,454 INFO L85 PathProgramCache]: Analyzing trace with hash 272892959, now seen corresponding path program 55 times [2024-04-27 09:24:43,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:43,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:43,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:43,475 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:43,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:43,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:43,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:43,495 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:43,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:43,669 INFO L85 PathProgramCache]: Analyzing trace with hash -513681944, now seen corresponding path program 147 times [2024-04-27 09:24:43,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:43,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:43,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:43,690 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:43,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:43,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:43,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:43,718 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 09:24:44,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:24:44,145 INFO L85 PathProgramCache]: Analyzing trace with hash -1395997577, now seen corresponding path program 148 times [2024-04-27 09:24:44,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:44,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:44,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:44,163 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:24:44,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:44,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:44,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:44,180 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:24:44,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:44,732 INFO L85 PathProgramCache]: Analyzing trace with hash -1934318543, now seen corresponding path program 10 times [2024-04-27 09:24:44,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:44,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:44,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:44,735 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:44,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:44,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:44,892 INFO L85 PathProgramCache]: Analyzing trace with hash 165667406, now seen corresponding path program 10 times [2024-04-27 09:24:44,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:44,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:44,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:44,895 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:44,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:44,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:45,053 INFO L85 PathProgramCache]: Analyzing trace with hash 840722409, now seen corresponding path program 10 times [2024-04-27 09:24:45,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:45,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:45,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,056 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:45,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,149 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:45,205 INFO L85 PathProgramCache]: Analyzing trace with hash -1934318542, now seen corresponding path program 29 times [2024-04-27 09:24:45,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:45,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:45,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,207 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:45,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:45,362 INFO L85 PathProgramCache]: Analyzing trace with hash 165667438, now seen corresponding path program 30 times [2024-04-27 09:24:45,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:45,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:45,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,364 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:45,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:45,511 INFO L85 PathProgramCache]: Analyzing trace with hash 840723379, now seen corresponding path program 31 times [2024-04-27 09:24:45,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:45,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:45,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,514 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:45,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:45,670 INFO L85 PathProgramCache]: Analyzing trace with hash 292621066, now seen corresponding path program 11 times [2024-04-27 09:24:45,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:45,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:45,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,673 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:45,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:45,828 INFO L85 PathProgramCache]: Analyzing trace with hash 481318549, now seen corresponding path program 11 times [2024-04-27 09:24:45,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:45,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:45,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,831 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:45,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:45,989 INFO L85 PathProgramCache]: Analyzing trace with hash 2035973250, now seen corresponding path program 11 times [2024-04-27 09:24:45,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:45,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:45,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:45,992 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:45,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:46,085 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:46,136 INFO L85 PathProgramCache]: Analyzing trace with hash 292621067, now seen corresponding path program 32 times [2024-04-27 09:24:46,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:46,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:46,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:46,139 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:46,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:46,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:46,294 INFO L85 PathProgramCache]: Analyzing trace with hash 481318581, now seen corresponding path program 33 times [2024-04-27 09:24:46,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:46,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:46,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:46,297 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:46,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:46,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:46,445 INFO L85 PathProgramCache]: Analyzing trace with hash 2035974220, now seen corresponding path program 34 times [2024-04-27 09:24:46,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:46,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:46,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:46,448 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:46,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:46,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:46,601 INFO L85 PathProgramCache]: Analyzing trace with hash -1309308527, now seen corresponding path program 12 times [2024-04-27 09:24:46,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:46,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:46,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:46,604 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:46,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:46,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:46,760 INFO L85 PathProgramCache]: Analyzing trace with hash -1933858578, now seen corresponding path program 12 times [2024-04-27 09:24:46,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:46,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:46,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:46,763 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:46,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:46,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:46,923 INFO L85 PathProgramCache]: Analyzing trace with hash 179926345, now seen corresponding path program 12 times [2024-04-27 09:24:46,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:46,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:46,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:46,926 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:46,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:47,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:47,074 INFO L85 PathProgramCache]: Analyzing trace with hash -1309308526, now seen corresponding path program 35 times [2024-04-27 09:24:47,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:47,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:47,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:47,077 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:47,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:47,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2024-04-27 09:24:47,349 INFO L85 PathProgramCache]: Analyzing trace with hash -1409832423, now seen corresponding path program 36 times [2024-04-27 09:24:47,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:47,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:47,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:47,352 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:47,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:50,585 INFO L85 PathProgramCache]: Analyzing trace with hash -907944843, now seen corresponding path program 1 times [2024-04-27 09:24:50,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:50,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:50,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:50,587 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:24:50,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:24:50,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-04-27 09:24:50,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2024-04-27 09:24:50,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-04-27 09:24:50,707 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-04-27 09:24:50,900 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1461,SelfDestructingSolverStorable1582,SelfDestructingSolverStorable1460,SelfDestructingSolverStorable1581,SelfDestructingSolverStorable1580,SelfDestructingSolverStorable1469,SelfDestructingSolverStorable1468,SelfDestructingSolverStorable1589,SelfDestructingSolverStorable1467,SelfDestructingSolverStorable1588,SelfDestructingSolverStorable1466,SelfDestructingSolverStorable1587,SelfDestructingSolverStorable1465,SelfDestructingSolverStorable1586,SelfDestructingSolverStorable1464,SelfDestructingSolverStorable1585,SelfDestructingSolverStorable1463,SelfDestructingSolverStorable1584,SelfDestructingSolverStorable1462,SelfDestructingSolverStorable1583,SelfDestructingSolverStorable1472,SelfDestructingSolverStorable1593,SelfDestructingSolverStorable1471,SelfDestructingSolverStorable1592,SelfDestructingSolverStorable1470,SelfDestructingSolverStorable1591,SelfDestructingSolverStorable1590,SelfDestructingSolverStorable1479,SelfDestructingSolverStorable1478,SelfDestructingSolverStorable1599,SelfDestructingSolverStorable1477,SelfDestructingSolverStorable1598,SelfDestructingSolverStorable1476,SelfDestructingSolverStorable1597,SelfDestructingSolverStorable1475,SelfDestructingSolverStorable1596,SelfDestructingSolverStorable1474,SelfDestructingSolverStorable1595,SelfDestructingSolverStorable1473,SelfDestructingSolverStorable1594,SelfDestructingSolverStorable1560,SelfDestructingSolverStorable1681,SelfDestructingSolverStorable1680,SelfDestructingSolverStorable1449,SelfDestructingSolverStorable1448,SelfDestructingSolverStorable1569,SelfDestructingSolverStorable1447,SelfDestructingSolverStorable1568,SelfDestructingSolverStorable1689,SelfDestructingSolverStorable1446,SelfDestructingSolverStorable1567,SelfDestructingSolverStorable1688,SelfDestructingSolverStorable1445,SelfDestructingSolverStorable1566,SelfDestructingSolverStorable1687,SelfDestructingSolverStorable1444,SelfDestructingSolverStorable1565,SelfDestructingSolverStorable1686,SelfDestructingSolverStorable1443,SelfDestructingSolverStorable1564,SelfDestructingSolverStorable1685,SelfDestructingSolverStorable1442,SelfDestructingSolverStorable1563,SelfDestructingSolverStorable1684,SelfDestructingSolverStorable1441,SelfDestructingSolverStorable1562,SelfDestructingSolverStorable1683,SelfDestructingSolverStorable1440,SelfDestructingSolverStorable1561,SelfDestructingSolverStorable1682,SelfDestructingSolverStorable1450,SelfDestructingSolverStorable1571,SelfDestructingSolverStorable1692,SelfDestructingSolverStorable1570,SelfDestructingSolverStorable1691,SelfDestructingSolverStorable1690,SelfDestructingSolverStorable1459,SelfDestructingSolverStorable1458,SelfDestructingSolverStorable1579,SelfDestructingSolverStorable1457,SelfDestructingSolverStorable1578,SelfDestructingSolverStorable1699,SelfDestructingSolverStorable1456,SelfDestructingSolverStorable1577,SelfDestructingSolverStorable1698,SelfDestructingSolverStorable1455,SelfDestructingSolverStorable1576,SelfDestructingSolverStorable1697,SelfDestructingSolverStorable1454,SelfDestructingSolverStorable1575,SelfDestructingSolverStorable1696,SelfDestructingSolverStorable1453,SelfDestructingSolverStorable1574,SelfDestructingSolverStorable1695,SelfDestructingSolverStorable1452,SelfDestructingSolverStorable1573,SelfDestructingSolverStorable1694,SelfDestructingSolverStorable1451,SelfDestructingSolverStorable1572,SelfDestructingSolverStorable1693,SelfDestructingSolverStorable1429,SelfDestructingSolverStorable1428,SelfDestructingSolverStorable1549,SelfDestructingSolverStorable1427,SelfDestructingSolverStorable1548,SelfDestructingSolverStorable1669,SelfDestructingSolverStorable1426,SelfDestructingSolverStorable1547,SelfDestructingSolverStorable1668,SelfDestructingSolverStorable1425,SelfDestructingSolverStorable1546,SelfDestructingSolverStorable1667,SelfDestructingSolverStorable1424,SelfDestructingSolverStorable1545,SelfDestructingSolverStorable1666,SelfDestructingSolverStorable1423,SelfDestructingSolverStorable1544,SelfDestructingSolverStorable1665,SelfDestructingSolverStorable1422,SelfDestructingSolverStorable1543,SelfDestructingSolverStorable1664,SelfDestructingSolverStorable1421,SelfDestructingSolverStorable1542,SelfDestructingSolverStorable1663,SelfDestructingSolverStorable1420,SelfDestructingSolverStorable1541,SelfDestructingSolverStorable1662,SelfDestructingSolverStorable1540,SelfDestructingSolverStorable1661,SelfDestructingSolverStorable1660,SelfDestructingSolverStorable1670,SelfDestructingSolverStorable1439,SelfDestructingSolverStorable1438,SelfDestructingSolverStorable1559,SelfDestructingSolverStorable1437,SelfDestructingSolverStorable1558,SelfDestructingSolverStorable1679,SelfDestructingSolverStorable1436,SelfDestructingSolverStorable1557,SelfDestructingSolverStorable1678,SelfDestructingSolverStorable1435,SelfDestructingSolverStorable1556,SelfDestructingSolverStorable1677,SelfDestructingSolverStorable1434,SelfDestructingSolverStorable1555,SelfDestructingSolverStorable1676,SelfDestructingSolverStorable1433,SelfDestructingSolverStorable1554,SelfDestructingSolverStorable1675,SelfDestructingSolverStorable1432,SelfDestructingSolverStorable1553,SelfDestructingSolverStorable1674,SelfDestructingSolverStorable1431,SelfDestructingSolverStorable1552,SelfDestructingSolverStorable1673,SelfDestructingSolverStorable1430,SelfDestructingSolverStorable1551,SelfDestructingSolverStorable1672,SelfDestructingSolverStorable1550,SelfDestructingSolverStorable1671,SelfDestructingSolverStorable1409,SelfDestructingSolverStorable1408,SelfDestructingSolverStorable1529,SelfDestructingSolverStorable1407,SelfDestructingSolverStorable1528,SelfDestructingSolverStorable1649,SelfDestructingSolverStorable1406,SelfDestructingSolverStorable1527,SelfDestructingSolverStorable1648,SelfDestructingSolverStorable1769,SelfDestructingSolverStorable1405,SelfDestructingSolverStorable1526,SelfDestructingSolverStorable1647,SelfDestructingSolverStorable1768,SelfDestructingSolverStorable1404,SelfDestructingSolverStorable1525,SelfDestructingSolverStorable1646,SelfDestructingSolverStorable1767,SelfDestructingSolverStorable1403,SelfDestructingSolverStorable1524,SelfDestructingSolverStorable1645,SelfDestructingSolverStorable1766,SelfDestructingSolverStorable1402,SelfDestructingSolverStorable1523,SelfDestructingSolverStorable1644,SelfDestructingSolverStorable1765,SelfDestructingSolverStorable1401,SelfDestructingSolverStorable1522,SelfDestructingSolverStorable1643,SelfDestructingSolverStorable1764,SelfDestructingSolverStorable1400,SelfDestructingSolverStorable1521,SelfDestructingSolverStorable1642,SelfDestructingSolverStorable1763,SelfDestructingSolverStorable1520,SelfDestructingSolverStorable1641,SelfDestructingSolverStorable1762,SelfDestructingSolverStorable1640,SelfDestructingSolverStorable1761,SelfDestructingSolverStorable1760,SelfDestructingSolverStorable1419,SelfDestructingSolverStorable1418,SelfDestructingSolverStorable1539,SelfDestructingSolverStorable1417,SelfDestructingSolverStorable1538,SelfDestructingSolverStorable1659,SelfDestructingSolverStorable1416,SelfDestructingSolverStorable1537,SelfDestructingSolverStorable1658,SelfDestructingSolverStorable1415,SelfDestructingSolverStorable1536,SelfDestructingSolverStorable1657,SelfDestructingSolverStorable1414,SelfDestructingSolverStorable1535,SelfDestructingSolverStorable1656,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable1413,SelfDestructingSolverStorable1534,SelfDestructingSolverStorable1655,SelfDestructingSolverStorable1412,SelfDestructingSolverStorable1533,SelfDestructingSolverStorable1654,SelfDestructingSolverStorable1775,SelfDestructingSolverStorable1411,SelfDestructingSolverStorable1532,SelfDestructingSolverStorable1653,SelfDestructingSolverStorable1774,SelfDestructingSolverStorable1410,SelfDestructingSolverStorable1531,SelfDestructingSolverStorable1652,SelfDestructingSolverStorable1773,SelfDestructingSolverStorable1530,SelfDestructingSolverStorable1651,SelfDestructingSolverStorable1772,SelfDestructingSolverStorable1650,SelfDestructingSolverStorable1771,SelfDestructingSolverStorable1770,SelfDestructingSolverStorable1509,SelfDestructingSolverStorable1508,SelfDestructingSolverStorable1629,SelfDestructingSolverStorable1507,SelfDestructingSolverStorable1628,SelfDestructingSolverStorable1749,SelfDestructingSolverStorable1506,SelfDestructingSolverStorable1627,SelfDestructingSolverStorable1748,SelfDestructingSolverStorable1505,SelfDestructingSolverStorable1626,SelfDestructingSolverStorable1747,SelfDestructingSolverStorable1504,SelfDestructingSolverStorable1625,SelfDestructingSolverStorable1746,SelfDestructingSolverStorable1503,SelfDestructingSolverStorable1624,SelfDestructingSolverStorable1745,SelfDestructingSolverStorable1502,SelfDestructingSolverStorable1623,SelfDestructingSolverStorable1744,SelfDestructingSolverStorable1501,SelfDestructingSolverStorable1622,SelfDestructingSolverStorable1743,SelfDestructingSolverStorable1500,SelfDestructingSolverStorable1621,SelfDestructingSolverStorable1742,SelfDestructingSolverStorable1620,SelfDestructingSolverStorable1741,SelfDestructingSolverStorable1740,SelfDestructingSolverStorable1519,SelfDestructingSolverStorable1518,SelfDestructingSolverStorable1639,SelfDestructingSolverStorable1517,SelfDestructingSolverStorable1638,SelfDestructingSolverStorable1759,SelfDestructingSolverStorable1516,SelfDestructingSolverStorable1637,SelfDestructingSolverStorable1758,SelfDestructingSolverStorable1515,SelfDestructingSolverStorable1636,SelfDestructingSolverStorable1757,SelfDestructingSolverStorable1514,SelfDestructingSolverStorable1635,SelfDestructingSolverStorable1756,SelfDestructingSolverStorable1513,SelfDestructingSolverStorable1634,SelfDestructingSolverStorable1755,SelfDestructingSolverStorable1512,SelfDestructingSolverStorable1633,SelfDestructingSolverStorable1754,SelfDestructingSolverStorable1511,SelfDestructingSolverStorable1632,SelfDestructingSolverStorable1753,SelfDestructingSolverStorable1510,SelfDestructingSolverStorable1631,SelfDestructingSolverStorable1752,SelfDestructingSolverStorable1630,SelfDestructingSolverStorable1751,SelfDestructingSolverStorable1750,SelfDestructingSolverStorable1609,SelfDestructingSolverStorable1608,SelfDestructingSolverStorable1729,SelfDestructingSolverStorable1607,SelfDestructingSolverStorable1728,SelfDestructingSolverStorable1606,SelfDestructingSolverStorable1727,SelfDestructingSolverStorable1605,SelfDestructingSolverStorable1726,SelfDestructingSolverStorable1604,SelfDestructingSolverStorable1725,SelfDestructingSolverStorable1603,SelfDestructingSolverStorable1724,SelfDestructingSolverStorable1602,SelfDestructingSolverStorable1723,SelfDestructingSolverStorable1601,SelfDestructingSolverStorable1722,SelfDestructingSolverStorable1600,SelfDestructingSolverStorable1721,SelfDestructingSolverStorable1720,SelfDestructingSolverStorable1619,SelfDestructingSolverStorable1618,SelfDestructingSolverStorable1739,SelfDestructingSolverStorable1617,SelfDestructingSolverStorable1738,SelfDestructingSolverStorable1616,SelfDestructingSolverStorable1737,SelfDestructingSolverStorable1615,SelfDestructingSolverStorable1736,SelfDestructingSolverStorable1614,SelfDestructingSolverStorable1735,SelfDestructingSolverStorable1613,SelfDestructingSolverStorable1734,SelfDestructingSolverStorable1612,SelfDestructingSolverStorable1733,SelfDestructingSolverStorable1611,SelfDestructingSolverStorable1732,SelfDestructingSolverStorable1610,SelfDestructingSolverStorable1731,SelfDestructingSolverStorable1730,SelfDestructingSolverStorable1708,SelfDestructingSolverStorable1707,SelfDestructingSolverStorable1706,SelfDestructingSolverStorable1705,SelfDestructingSolverStorable1704,SelfDestructingSolverStorable1703,SelfDestructingSolverStorable1702,SelfDestructingSolverStorable1701,SelfDestructingSolverStorable1700,SelfDestructingSolverStorable1709,SelfDestructingSolverStorable1719,SelfDestructingSolverStorable1718,SelfDestructingSolverStorable1717,SelfDestructingSolverStorable1716,SelfDestructingSolverStorable1715,SelfDestructingSolverStorable1714,SelfDestructingSolverStorable1713,SelfDestructingSolverStorable1712,SelfDestructingSolverStorable1711,SelfDestructingSolverStorable1710,SelfDestructingSolverStorable1384,SelfDestructingSolverStorable1383,SelfDestructingSolverStorable1382,SelfDestructingSolverStorable1381,SelfDestructingSolverStorable1380,SelfDestructingSolverStorable1389,SelfDestructingSolverStorable1388,SelfDestructingSolverStorable1387,SelfDestructingSolverStorable1386,SelfDestructingSolverStorable1385,SelfDestructingSolverStorable1395,SelfDestructingSolverStorable1394,SelfDestructingSolverStorable1393,SelfDestructingSolverStorable1392,SelfDestructingSolverStorable1391,SelfDestructingSolverStorable1390,SelfDestructingSolverStorable1399,SelfDestructingSolverStorable1398,SelfDestructingSolverStorable1397,SelfDestructingSolverStorable1396,SelfDestructingSolverStorable1483,SelfDestructingSolverStorable1482,SelfDestructingSolverStorable1481,SelfDestructingSolverStorable1480,SelfDestructingSolverStorable1489,SelfDestructingSolverStorable1488,SelfDestructingSolverStorable1487,SelfDestructingSolverStorable1486,SelfDestructingSolverStorable1485,SelfDestructingSolverStorable1484,SelfDestructingSolverStorable1373,SelfDestructingSolverStorable1494,SelfDestructingSolverStorable1372,SelfDestructingSolverStorable1493,SelfDestructingSolverStorable1371,SelfDestructingSolverStorable1492,SelfDestructingSolverStorable1370,SelfDestructingSolverStorable1491,SelfDestructingSolverStorable1490,SelfDestructingSolverStorable1379,SelfDestructingSolverStorable1378,SelfDestructingSolverStorable1499,SelfDestructingSolverStorable1377,SelfDestructingSolverStorable1498,SelfDestructingSolverStorable1376,SelfDestructingSolverStorable1497,SelfDestructingSolverStorable1375,SelfDestructingSolverStorable1496,SelfDestructingSolverStorable1374,SelfDestructingSolverStorable1495 [2024-04-27 09:24:50,901 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-04-27 09:24:50,901 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 09:24:50,901 INFO L85 PathProgramCache]: Analyzing trace with hash -1899569813, now seen corresponding path program 3 times [2024-04-27 09:24:50,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 09:24:50,901 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267112534] [2024-04-27 09:24:50,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:24:50,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:24:50,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:24:51,269 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 09:24:51,269 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 09:24:51,269 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1267112534] [2024-04-27 09:24:51,269 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1267112534] provided 0 perfect and 1 imperfect interpolant sequences [2024-04-27 09:24:51,270 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [22025877] [2024-04-27 09:24:51,270 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-04-27 09:24:51,270 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-04-27 09:24:51,270 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-04-27 09:24:51,273 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-04-27 09:24:51,280 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-04-27 09:24:51,337 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2024-04-27 09:24:51,337 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-04-27 09:24:51,339 INFO L262 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 31 conjunts are in the unsatisfiable core [2024-04-27 09:24:51,340 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-04-27 09:24:51,885 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:24:51,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 17 [2024-04-27 09:24:52,035 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-04-27 09:24:52,036 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-04-27 09:24:52,036 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:24:52,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-04-27 09:24:52,112 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:24:52,113 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-04-27 09:24:52,532 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:24:52,533 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:24:52,550 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:24:52,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 4 case distinctions, treesize of input 31 treesize of output 55 [2024-04-27 09:24:53,068 INFO L349 Elim1Store]: treesize reduction 10, result has 77.8 percent of original size [2024-04-27 09:24:53,068 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 51 treesize of output 75 [2024-04-27 09:24:53,499 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 09:24:53,499 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [22025877] provided 0 perfect and 2 imperfect interpolant sequences [2024-04-27 09:24:53,499 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-04-27 09:24:53,500 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19] total 49 [2024-04-27 09:24:53,500 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [698938254] [2024-04-27 09:24:53,500 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-04-27 09:24:53,500 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 49 states [2024-04-27 09:24:53,500 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 09:24:53,501 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2024-04-27 09:24:53,502 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=335, Invalid=2017, Unknown=0, NotChecked=0, Total=2352 [2024-04-27 09:24:53,502 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 09:24:53,502 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 09:24:53,502 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 49 states, 49 states have (on average 2.061224489795918) internal successors, (101), 49 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 09:24:53,502 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-04-27 09:24:53,503 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2024-04-27 09:24:53,503 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-04-27 09:24:53,503 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 09:25:00,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:25:01,050 INFO L85 PathProgramCache]: Analyzing trace with hash -201708250, now seen corresponding path program 249 times [2024-04-27 09:25:01,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:01,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:01,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:01,092 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 64 proven. 14 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:25:01,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:01,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:01,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:01,132 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 64 proven. 14 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:25:02,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:02,615 INFO L85 PathProgramCache]: Analyzing trace with hash 648939830, now seen corresponding path program 250 times [2024-04-27 09:25:02,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:02,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:02,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:02,663 INFO L134 CoverageAnalysis]: Checked inductivity of 296 backedges. 154 proven. 14 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:02,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:02,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:02,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:02,710 INFO L134 CoverageAnalysis]: Checked inductivity of 296 backedges. 154 proven. 14 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:02,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:25:03,090 INFO L85 PathProgramCache]: Analyzing trace with hash -1357701657, now seen corresponding path program 76 times [2024-04-27 09:25:03,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:03,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:03,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:03,123 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:03,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:03,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:03,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:03,157 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:03,361 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:25:03,524 INFO L85 PathProgramCache]: Analyzing trace with hash 860921688, now seen corresponding path program 77 times [2024-04-27 09:25:03,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:03,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:03,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:03,561 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:03,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:03,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:03,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:03,595 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:03,829 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:25:04,036 INFO L85 PathProgramCache]: Analyzing trace with hash 918768671, now seen corresponding path program 78 times [2024-04-27 09:25:04,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:04,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:04,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:04,083 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:04,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:04,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:04,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:04,131 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:04,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:04,268 INFO L85 PathProgramCache]: Analyzing trace with hash -1357701656, now seen corresponding path program 251 times [2024-04-27 09:25:04,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:04,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:04,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:04,302 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:04,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:04,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:04,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:04,335 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:04,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:04,464 INFO L85 PathProgramCache]: Analyzing trace with hash 860921720, now seen corresponding path program 252 times [2024-04-27 09:25:04,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:04,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:04,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:04,498 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:04,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:04,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:04,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:04,533 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:04,610 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:04,660 INFO L85 PathProgramCache]: Analyzing trace with hash 918769641, now seen corresponding path program 253 times [2024-04-27 09:25:04,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:04,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:04,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:04,695 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:04,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:04,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:04,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:04,729 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:04,807 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:04,866 INFO L85 PathProgramCache]: Analyzing trace with hash -1582912108, now seen corresponding path program 77 times [2024-04-27 09:25:04,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:04,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:04,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:04,902 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:04,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:04,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:04,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:04,936 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:05,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:05,069 INFO L85 PathProgramCache]: Analyzing trace with hash -1825634997, now seen corresponding path program 78 times [2024-04-27 09:25:05,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:05,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:05,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:05,102 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:05,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:05,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:05,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:05,146 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:05,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:05,282 INFO L85 PathProgramCache]: Analyzing trace with hash -760109940, now seen corresponding path program 79 times [2024-04-27 09:25:05,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:05,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:05,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:05,316 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:05,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:05,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:05,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:05,350 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:05,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:05,475 INFO L85 PathProgramCache]: Analyzing trace with hash -1582912107, now seen corresponding path program 254 times [2024-04-27 09:25:05,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:05,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:05,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:05,509 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:05,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:05,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:05,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:05,542 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2024-04-27 09:25:05,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:05,668 INFO L85 PathProgramCache]: Analyzing trace with hash -1825634965, now seen corresponding path program 255 times [2024-04-27 09:25:05,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:05,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:05,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:05,712 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 129 trivial. 0 not checked. [2024-04-27 09:25:05,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:05,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:05,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:05,761 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 129 trivial. 0 not checked. [2024-04-27 09:25:05,844 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:05,905 INFO L85 PathProgramCache]: Analyzing trace with hash -760108970, now seen corresponding path program 256 times [2024-04-27 09:25:05,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:05,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:05,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:05,953 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 130 trivial. 0 not checked. [2024-04-27 09:25:05,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:05,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:05,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:06,001 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 130 trivial. 0 not checked. [2024-04-27 09:25:06,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:06,158 INFO L85 PathProgramCache]: Analyzing trace with hash -2088541497, now seen corresponding path program 78 times [2024-04-27 09:25:06,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:06,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:06,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:06,208 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 131 trivial. 0 not checked. [2024-04-27 09:25:06,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:06,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:06,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:06,361 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 131 trivial. 0 not checked. [2024-04-27 09:25:06,453 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:06,514 INFO L85 PathProgramCache]: Analyzing trace with hash -320276872, now seen corresponding path program 79 times [2024-04-27 09:25:06,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:06,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:06,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:06,564 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 131 trivial. 0 not checked. [2024-04-27 09:25:06,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:06,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:06,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:06,613 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 131 trivial. 0 not checked. [2024-04-27 09:25:06,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:06,758 INFO L85 PathProgramCache]: Analyzing trace with hash -1338648321, now seen corresponding path program 80 times [2024-04-27 09:25:06,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:06,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:06,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:06,793 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 131 trivial. 0 not checked. [2024-04-27 09:25:06,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:06,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:06,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:06,827 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 131 trivial. 0 not checked. [2024-04-27 09:25:06,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:06,955 INFO L85 PathProgramCache]: Analyzing trace with hash -2088541496, now seen corresponding path program 257 times [2024-04-27 09:25:06,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:06,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:06,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:06,999 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 131 trivial. 0 not checked. [2024-04-27 09:25:06,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:06,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:07,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:07,046 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 156 proven. 15 refuted. 0 times theorem prover too weak. 131 trivial. 0 not checked. [2024-04-27 09:25:07,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:07,271 INFO L85 PathProgramCache]: Analyzing trace with hash -671803057, now seen corresponding path program 258 times [2024-04-27 09:25:07,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:07,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:07,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:07,303 INFO L134 CoverageAnalysis]: Checked inductivity of 288 backedges. 149 proven. 12 refuted. 0 times theorem prover too weak. 127 trivial. 0 not checked. [2024-04-27 09:25:07,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:07,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:07,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:07,335 INFO L134 CoverageAnalysis]: Checked inductivity of 288 backedges. 149 proven. 12 refuted. 0 times theorem prover too weak. 127 trivial. 0 not checked. [2024-04-27 09:25:08,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:08,927 INFO L85 PathProgramCache]: Analyzing trace with hash 1593735000, now seen corresponding path program 259 times [2024-04-27 09:25:08,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:08,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:08,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:08,977 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:08,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:08,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:08,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:09,024 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:09,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:25:09,473 INFO L85 PathProgramCache]: Analyzing trace with hash -1713257427, now seen corresponding path program 81 times [2024-04-27 09:25:09,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:09,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:09,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:09,513 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:25:09,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:09,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:09,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:09,620 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:25:09,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:09,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:10,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:10,235 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2024-04-27 09:25:10,273 INFO L85 PathProgramCache]: Analyzing trace with hash 1739444187, now seen corresponding path program 82 times [2024-04-27 09:25:10,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:10,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:10,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:10,283 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:10,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:10,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:10,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:10,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:10,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:10,777 INFO L85 PathProgramCache]: Analyzing trace with hash 1001454957, now seen corresponding path program 83 times [2024-04-27 09:25:10,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:10,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:10,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:10,836 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 19 proven. 162 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:25:10,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:10,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:10,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:10,903 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 19 proven. 162 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:25:10,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:11,043 INFO L85 PathProgramCache]: Analyzing trace with hash 1501892251, now seen corresponding path program 84 times [2024-04-27 09:25:11,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:11,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:11,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:11,109 INFO L134 CoverageAnalysis]: Checked inductivity of 250 backedges. 24 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:11,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:11,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:11,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:11,172 INFO L134 CoverageAnalysis]: Checked inductivity of 250 backedges. 24 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:11,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:25:11,546 INFO L85 PathProgramCache]: Analyzing trace with hash -55266386, now seen corresponding path program 80 times [2024-04-27 09:25:11,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:11,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:11,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:11,585 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:25:11,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:11,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:11,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:11,627 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:25:11,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:11,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:11,972 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:12,067 INFO L85 PathProgramCache]: Analyzing trace with hash -1468324678, now seen corresponding path program 81 times [2024-04-27 09:25:12,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:12,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:12,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:12,074 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:12,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:12,206 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:12,248 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:12,374 INFO L85 PathProgramCache]: Analyzing trace with hash 1381533742, now seen corresponding path program 82 times [2024-04-27 09:25:12,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:12,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:12,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:12,435 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 17 proven. 162 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:25:12,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:12,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:12,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:12,558 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 17 proven. 162 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:25:12,630 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:12,685 INFO L85 PathProgramCache]: Analyzing trace with hash -1399783366, now seen corresponding path program 83 times [2024-04-27 09:25:12,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:12,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:12,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:12,749 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 21 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:12,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:12,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:12,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:12,810 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 21 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:13,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:25:13,209 INFO L85 PathProgramCache]: Analyzing trace with hash 1106595877, now seen corresponding path program 79 times [2024-04-27 09:25:13,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:13,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:13,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:13,249 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:25:13,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:13,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:13,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:13,289 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:25:13,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:13,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:13,778 INFO L85 PathProgramCache]: Analyzing trace with hash -1571086109, now seen corresponding path program 80 times [2024-04-27 09:25:13,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:13,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:13,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:13,788 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:13,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:13,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:14,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:14,129 INFO L85 PathProgramCache]: Analyzing trace with hash -1967542427, now seen corresponding path program 81 times [2024-04-27 09:25:14,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:14,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:14,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:14,209 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 17 proven. 162 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:25:14,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:14,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:14,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:14,277 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 17 proven. 162 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:25:14,377 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:14,444 INFO L85 PathProgramCache]: Analyzing trace with hash -1637647965, now seen corresponding path program 82 times [2024-04-27 09:25:14,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:14,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:14,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:14,504 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 21 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:14,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:14,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:14,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:14,565 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 21 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:14,642 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:14,699 INFO L85 PathProgramCache]: Analyzing trace with hash -1713227357, now seen corresponding path program 260 times [2024-04-27 09:25:14,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:14,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:14,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:14,746 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:25:14,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:14,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:14,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:14,787 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:25:14,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:14,948 INFO L85 PathProgramCache]: Analyzing trace with hash -690003400, now seen corresponding path program 85 times [2024-04-27 09:25:14,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:14,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:14,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:14,958 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:14,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:15,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:15,555 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:25:15,577 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:25:15,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 58 [2024-04-27 09:25:17,857 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:25:17,866 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:25:17,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 58 [2024-04-27 09:25:20,226 INFO L85 PathProgramCache]: Analyzing trace with hash -177704464, now seen corresponding path program 86 times [2024-04-27 09:25:20,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:20,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:20,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:20,303 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 19 proven. 162 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-04-27 09:25:20,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:20,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:20,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:20,385 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 19 proven. 162 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-04-27 09:25:20,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:20,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:20,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:20,866 INFO L85 PathProgramCache]: Analyzing trace with hash 1701095224, now seen corresponding path program 87 times [2024-04-27 09:25:20,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:20,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:20,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:20,953 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 21 proven. 162 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-04-27 09:25:20,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:20,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:20,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:21,038 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 21 proven. 162 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-04-27 09:25:21,115 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:21,177 INFO L85 PathProgramCache]: Analyzing trace with hash 1008798960, now seen corresponding path program 88 times [2024-04-27 09:25:21,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:21,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:21,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:21,260 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 23 proven. 162 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-04-27 09:25:21,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:21,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:21,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:21,343 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 23 proven. 162 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-04-27 09:25:21,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:21,501 INFO L85 PathProgramCache]: Analyzing trace with hash -1546278845, now seen corresponding path program 84 times [2024-04-27 09:25:21,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:21,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:21,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:21,511 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:21,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:21,819 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:21,865 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:25:21,873 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:25:21,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 58 [2024-04-27 09:25:24,528 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:25:24,536 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:25:24,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 58 [2024-04-27 09:25:24,656 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:25:24,664 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:25:24,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 60 treesize of output 66 [2024-04-27 09:25:24,719 INFO L85 PathProgramCache]: Analyzing trace with hash -1668715515, now seen corresponding path program 85 times [2024-04-27 09:25:24,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:24,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:24,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:24,781 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 18 proven. 162 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-04-27 09:25:24,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:24,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:24,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:24,867 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 18 proven. 162 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-04-27 09:25:25,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:25,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:25,222 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:25,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2024-04-27 09:25:25,316 INFO L85 PathProgramCache]: Analyzing trace with hash 1542650115, now seen corresponding path program 86 times [2024-04-27 09:25:25,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:25,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:25,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:25,379 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 19 proven. 162 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-04-27 09:25:25,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:25,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:25,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:25,442 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 19 proven. 162 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-04-27 09:25:25,517 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:25,572 INFO L85 PathProgramCache]: Analyzing trace with hash 939615045, now seen corresponding path program 87 times [2024-04-27 09:25:25,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:25,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:25,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:25,636 INFO L134 CoverageAnalysis]: Checked inductivity of 252 backedges. 20 proven. 162 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-04-27 09:25:25,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:25,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:25,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:25,718 INFO L134 CoverageAnalysis]: Checked inductivity of 252 backedges. 20 proven. 162 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-04-27 09:25:25,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:25,863 INFO L85 PathProgramCache]: Analyzing trace with hash 88667376, now seen corresponding path program 83 times [2024-04-27 09:25:25,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:25,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:25,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:25,870 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:25,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:26,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:26,415 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:25:26,424 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:25:26,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 58 [2024-04-27 09:25:31,081 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:25:31,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 27 [2024-04-27 09:25:31,230 INFO L85 PathProgramCache]: Analyzing trace with hash 85017656, now seen corresponding path program 84 times [2024-04-27 09:25:31,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:31,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:31,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:31,359 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 18 proven. 162 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-04-27 09:25:31,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:31,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:31,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:31,420 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 18 proven. 162 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-04-27 09:25:31,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:31,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:32,366 INFO L85 PathProgramCache]: Analyzing trace with hash -1269608464, now seen corresponding path program 85 times [2024-04-27 09:25:32,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:32,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:32,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:32,439 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 19 proven. 162 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-04-27 09:25:32,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:32,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:32,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:32,503 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 19 proven. 162 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-04-27 09:25:32,582 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:32,647 INFO L85 PathProgramCache]: Analyzing trace with hash -1423636168, now seen corresponding path program 86 times [2024-04-27 09:25:32,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:32,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:32,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:32,712 INFO L134 CoverageAnalysis]: Checked inductivity of 252 backedges. 20 proven. 162 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-04-27 09:25:32,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:32,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:32,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:32,776 INFO L134 CoverageAnalysis]: Checked inductivity of 252 backedges. 20 proven. 162 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-04-27 09:25:32,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:32,914 INFO L85 PathProgramCache]: Analyzing trace with hash -689973330, now seen corresponding path program 261 times [2024-04-27 09:25:32,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:32,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:32,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:32,922 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:32,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:33,011 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:33,071 INFO L85 PathProgramCache]: Analyzing trace with hash 9636867, now seen corresponding path program 89 times [2024-04-27 09:25:33,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:33,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:33,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:33,134 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:33,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:33,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:33,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:33,196 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:33,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:33,615 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:25:33,623 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:25:33,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 58 [2024-04-27 09:25:40,378 INFO L85 PathProgramCache]: Analyzing trace with hash -670797755, now seen corresponding path program 90 times [2024-04-27 09:25:40,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:40,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:40,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:40,444 INFO L134 CoverageAnalysis]: Checked inductivity of 257 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-04-27 09:25:40,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:40,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:40,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:40,509 INFO L134 CoverageAnalysis]: Checked inductivity of 257 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-04-27 09:25:40,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:40,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:40,836 INFO L85 PathProgramCache]: Analyzing trace with hash 747015363, now seen corresponding path program 91 times [2024-04-27 09:25:40,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:40,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:40,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:40,902 INFO L134 CoverageAnalysis]: Checked inductivity of 261 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-04-27 09:25:40,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:40,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:40,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:40,975 INFO L134 CoverageAnalysis]: Checked inductivity of 261 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-04-27 09:25:41,061 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:41,117 INFO L85 PathProgramCache]: Analyzing trace with hash 2109224837, now seen corresponding path program 92 times [2024-04-27 09:25:41,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:41,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:41,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:41,186 INFO L134 CoverageAnalysis]: Checked inductivity of 268 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-04-27 09:25:41,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:41,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:41,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:41,253 INFO L134 CoverageAnalysis]: Checked inductivity of 268 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-04-27 09:25:41,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:41,414 INFO L85 PathProgramCache]: Analyzing trace with hash -1385162472, now seen corresponding path program 88 times [2024-04-27 09:25:41,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:41,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:41,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:41,478 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:41,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:41,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:41,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:41,542 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:41,797 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:41,945 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:25:41,954 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:25:41,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 58 [2024-04-27 09:25:46,992 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:25:46,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 27 [2024-04-27 09:25:47,112 INFO L85 PathProgramCache]: Analyzing trace with hash 670682896, now seen corresponding path program 89 times [2024-04-27 09:25:47,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:47,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:47,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:47,176 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:47,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:47,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:47,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:47,240 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:47,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:47,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:47,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:47,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:47,651 INFO L85 PathProgramCache]: Analyzing trace with hash 126400024, now seen corresponding path program 90 times [2024-04-27 09:25:47,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:47,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:47,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:47,717 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-04-27 09:25:47,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:47,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:47,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:47,782 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-04-27 09:25:47,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:47,936 INFO L85 PathProgramCache]: Analyzing trace with hash -1103097328, now seen corresponding path program 91 times [2024-04-27 09:25:47,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:47,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:47,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:48,010 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-04-27 09:25:48,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:48,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:48,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:48,081 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-04-27 09:25:48,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:48,228 INFO L85 PathProgramCache]: Analyzing trace with hash 786601339, now seen corresponding path program 87 times [2024-04-27 09:25:48,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:48,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:48,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:48,293 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:48,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:48,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:48,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:48,357 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:48,602 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:48,832 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:25:48,841 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:25:48,841 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 58 [2024-04-27 09:25:49,209 INFO L173 IndexEqualityManager]: detected equality via solver [2024-04-27 09:25:49,218 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-04-27 09:25:49,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 58 [2024-04-27 09:25:49,586 INFO L85 PathProgramCache]: Analyzing trace with hash 299029453, now seen corresponding path program 88 times [2024-04-27 09:25:49,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:49,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:49,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:49,651 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:49,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:49,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:49,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:49,717 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:49,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2024-04-27 09:25:49,882 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:50,098 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:50,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:25:50,205 INFO L85 PathProgramCache]: Analyzing trace with hash 624368699, now seen corresponding path program 89 times [2024-04-27 09:25:50,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:50,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:50,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:50,271 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-04-27 09:25:50,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:50,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:50,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:50,336 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-04-27 09:25:50,413 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:50,471 INFO L85 PathProgramCache]: Analyzing trace with hash -935340787, now seen corresponding path program 90 times [2024-04-27 09:25:50,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:50,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:50,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:50,540 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-04-27 09:25:50,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:50,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:50,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:50,608 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-04-27 09:25:50,692 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:50,748 INFO L85 PathProgramCache]: Analyzing trace with hash 786601370, now seen corresponding path program 262 times [2024-04-27 09:25:50,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:50,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:50,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:50,811 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 32 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:50,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:50,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:50,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:50,891 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 32 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:50,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:51,044 INFO L85 PathProgramCache]: Analyzing trace with hash 718110906, now seen corresponding path program 263 times [2024-04-27 09:25:51,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:51,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:51,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:51,112 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:51,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:51,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:51,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:51,193 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-04-27 09:25:51,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:51,400 INFO L85 PathProgramCache]: Analyzing trace with hash 85663343, now seen corresponding path program 91 times [2024-04-27 09:25:51,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:51,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:51,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:51,411 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:51,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:51,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:51,596 INFO L85 PathProgramCache]: Analyzing trace with hash -1639403568, now seen corresponding path program 92 times [2024-04-27 09:25:51,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:51,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:51,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:51,604 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:51,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:51,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:51,763 INFO L85 PathProgramCache]: Analyzing trace with hash 718097063, now seen corresponding path program 93 times [2024-04-27 09:25:51,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:51,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:51,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:51,771 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:51,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:51,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:51,958 INFO L85 PathProgramCache]: Analyzing trace with hash 85663344, now seen corresponding path program 264 times [2024-04-27 09:25:51,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:51,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:51,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:51,968 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:51,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:52,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:52,153 INFO L85 PathProgramCache]: Analyzing trace with hash -1639403536, now seen corresponding path program 265 times [2024-04-27 09:25:52,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:52,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:52,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:52,239 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:52,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:52,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:52,406 INFO L85 PathProgramCache]: Analyzing trace with hash 718098033, now seen corresponding path program 266 times [2024-04-27 09:25:52,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:52,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:52,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:52,414 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:52,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:52,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:52,599 INFO L85 PathProgramCache]: Analyzing trace with hash -1546277853, now seen corresponding path program 267 times [2024-04-27 09:25:52,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:52,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:52,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:52,606 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:52,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:52,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:52,789 INFO L85 PathProgramCache]: Analyzing trace with hash 88667407, now seen corresponding path program 268 times [2024-04-27 09:25:52,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:52,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:52,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:52,796 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:52,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:52,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:53,002 INFO L85 PathProgramCache]: Analyzing trace with hash -1659707739, now seen corresponding path program 269 times [2024-04-27 09:25:53,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:53,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:53,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:53,009 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 09:25:53,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 09:25:53,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:53,172 INFO L85 PathProgramCache]: Analyzing trace with hash -1570440422, now seen corresponding path program 92 times [2024-04-27 09:25:53,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:53,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:53,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:53,214 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 156 proven. 23 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:25:53,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:53,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:53,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:53,256 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 156 proven. 23 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:25:53,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:53,423 INFO L85 PathProgramCache]: Analyzing trace with hash -1439012731, now seen corresponding path program 93 times [2024-04-27 09:25:53,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:53,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:53,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:53,475 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 156 proven. 23 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:25:53,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:53,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:53,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:53,524 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 156 proven. 23 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:25:53,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:53,706 INFO L85 PathProgramCache]: Analyzing trace with hash -1659721582, now seen corresponding path program 94 times [2024-04-27 09:25:53,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:53,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:53,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:53,750 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 156 proven. 23 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:25:53,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:53,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:53,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:53,804 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 156 proven. 23 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:25:53,881 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:53,941 INFO L85 PathProgramCache]: Analyzing trace with hash -1570440421, now seen corresponding path program 270 times [2024-04-27 09:25:53,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:53,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:53,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:53,982 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 156 proven. 23 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:25:53,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:53,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:53,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:54,023 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 156 proven. 23 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:25:54,120 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:54,194 INFO L85 PathProgramCache]: Analyzing trace with hash -55265394, now seen corresponding path program 271 times [2024-04-27 09:25:54,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:54,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:54,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:54,251 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:25:54,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:54,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:54,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:54,303 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:25:54,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:54,465 INFO L85 PathProgramCache]: Analyzing trace with hash 1106595908, now seen corresponding path program 272 times [2024-04-27 09:25:54,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:54,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:54,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:54,516 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:25:54,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:54,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:54,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:54,568 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:25:54,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:54,730 INFO L85 PathProgramCache]: Analyzing trace with hash -1903966000, now seen corresponding path program 273 times [2024-04-27 09:25:54,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:54,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:54,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:54,769 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:25:54,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:54,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:54,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:54,810 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 156 proven. 22 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:25:55,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:25:55,282 INFO L85 PathProgramCache]: Analyzing trace with hash -2133822459, now seen corresponding path program 93 times [2024-04-27 09:25:55,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:55,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:55,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:55,317 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:55,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:55,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:55,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:55,352 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:55,582 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:25:55,750 INFO L85 PathProgramCache]: Analyzing trace with hash -1723986694, now seen corresponding path program 94 times [2024-04-27 09:25:55,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:55,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:55,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:55,786 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:55,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:55,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:55,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:55,821 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:56,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:25:56,236 INFO L85 PathProgramCache]: Analyzing trace with hash -1903979843, now seen corresponding path program 95 times [2024-04-27 09:25:56,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:56,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:56,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:56,272 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:56,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:56,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:56,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:56,309 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:56,390 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:56,450 INFO L85 PathProgramCache]: Analyzing trace with hash -2133822458, now seen corresponding path program 274 times [2024-04-27 09:25:56,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:56,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:56,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:56,486 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:56,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:56,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:56,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:56,522 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:56,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:56,667 INFO L85 PathProgramCache]: Analyzing trace with hash -1723986662, now seen corresponding path program 275 times [2024-04-27 09:25:56,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:56,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:56,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:56,704 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:56,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:56,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:56,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:56,740 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:56,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:56,880 INFO L85 PathProgramCache]: Analyzing trace with hash -1903978873, now seen corresponding path program 276 times [2024-04-27 09:25:56,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:56,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:56,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:56,917 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:56,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:56,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:56,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:56,953 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 149 proven. 30 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:57,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:57,849 INFO L85 PathProgramCache]: Analyzing trace with hash 2129622773, now seen corresponding path program 277 times [2024-04-27 09:25:57,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:57,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:57,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:57,885 INFO L134 CoverageAnalysis]: Checked inductivity of 212 backedges. 134 proven. 20 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:25:57,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:57,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:57,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:57,920 INFO L134 CoverageAnalysis]: Checked inductivity of 212 backedges. 134 proven. 20 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:25:58,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:25:58,733 INFO L85 PathProgramCache]: Analyzing trace with hash -1109256978, now seen corresponding path program 278 times [2024-04-27 09:25:58,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:58,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:58,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:58,769 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 117 proven. 37 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:58,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:58,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:58,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:58,813 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 117 proven. 37 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:59,046 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:25:59,193 INFO L85 PathProgramCache]: Analyzing trace with hash -27227857, now seen corresponding path program 94 times [2024-04-27 09:25:59,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:59,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:59,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:59,229 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:59,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:59,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:59,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:59,265 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:59,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:25:59,636 INFO L85 PathProgramCache]: Analyzing trace with hash -844063472, now seen corresponding path program 95 times [2024-04-27 09:25:59,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:59,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:59,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:59,673 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:59,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:25:59,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:25:59,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:25:59,710 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:25:59,933 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:26:00,080 INFO L85 PathProgramCache]: Analyzing trace with hash -396163737, now seen corresponding path program 96 times [2024-04-27 09:26:00,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:00,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:00,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:00,117 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:00,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:00,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:00,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:00,154 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:00,244 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:00,318 INFO L85 PathProgramCache]: Analyzing trace with hash -27227856, now seen corresponding path program 279 times [2024-04-27 09:26:00,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:00,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:00,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:00,355 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:00,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:00,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:00,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:00,393 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:00,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:00,550 INFO L85 PathProgramCache]: Analyzing trace with hash -844063440, now seen corresponding path program 280 times [2024-04-27 09:26:00,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:00,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:00,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:00,587 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:00,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:00,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:00,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:00,624 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:00,710 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:00,792 INFO L85 PathProgramCache]: Analyzing trace with hash -396162767, now seen corresponding path program 281 times [2024-04-27 09:26:00,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:00,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:00,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:00,911 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:00,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:00,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:00,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:00,949 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:01,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:01,123 INFO L85 PathProgramCache]: Analyzing trace with hash 603856204, now seen corresponding path program 95 times [2024-04-27 09:26:01,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:01,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:01,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:01,163 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:01,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:01,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:01,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:01,201 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:01,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:01,375 INFO L85 PathProgramCache]: Analyzing trace with hash 1539673235, now seen corresponding path program 96 times [2024-04-27 09:26:01,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:01,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:01,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:01,413 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:01,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:01,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:01,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:01,450 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:01,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:01,630 INFO L85 PathProgramCache]: Analyzing trace with hash 485230148, now seen corresponding path program 97 times [2024-04-27 09:26:01,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:01,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:01,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:01,668 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:01,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:01,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:01,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:01,708 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:01,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:01,870 INFO L85 PathProgramCache]: Analyzing trace with hash 603856205, now seen corresponding path program 282 times [2024-04-27 09:26:01,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:01,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:01,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:01,908 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:01,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:01,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:01,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:01,945 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:02,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:02,104 INFO L85 PathProgramCache]: Analyzing trace with hash 1539673267, now seen corresponding path program 283 times [2024-04-27 09:26:02,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:02,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:02,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:02,141 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:26:02,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:02,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:02,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:02,179 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:26:02,274 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:02,362 INFO L85 PathProgramCache]: Analyzing trace with hash 485231118, now seen corresponding path program 284 times [2024-04-27 09:26:02,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:02,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:02,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:02,401 INFO L134 CoverageAnalysis]: Checked inductivity of 218 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:26:02,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:02,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:02,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:02,440 INFO L134 CoverageAnalysis]: Checked inductivity of 218 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:26:02,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:02,642 INFO L85 PathProgramCache]: Analyzing trace with hash -2137704433, now seen corresponding path program 96 times [2024-04-27 09:26:02,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:02,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:02,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:02,687 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:26:02,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:02,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:02,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:02,730 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:26:02,823 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:02,921 INFO L85 PathProgramCache]: Analyzing trace with hash -1844327888, now seen corresponding path program 97 times [2024-04-27 09:26:02,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:02,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:02,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:02,961 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:26:02,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:02,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:02,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:03,002 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:26:03,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:03,182 INFO L85 PathProgramCache]: Analyzing trace with hash -1339589561, now seen corresponding path program 98 times [2024-04-27 09:26:03,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:03,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:03,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:03,222 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:26:03,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:03,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:03,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:03,262 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:26:03,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:03,518 INFO L85 PathProgramCache]: Analyzing trace with hash -2137704432, now seen corresponding path program 285 times [2024-04-27 09:26:03,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:03,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:03,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:03,557 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:26:03,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:03,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:03,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:03,595 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 117 proven. 40 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-04-27 09:26:03,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:03,878 INFO L85 PathProgramCache]: Analyzing trace with hash 1488238231, now seen corresponding path program 286 times [2024-04-27 09:26:03,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:03,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:03,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:03,914 INFO L134 CoverageAnalysis]: Checked inductivity of 205 backedges. 117 proven. 30 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:03,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:03,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:03,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:03,950 INFO L134 CoverageAnalysis]: Checked inductivity of 205 backedges. 117 proven. 30 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:05,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:05,830 INFO L85 PathProgramCache]: Analyzing trace with hash 1874912528, now seen corresponding path program 287 times [2024-04-27 09:26:05,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:05,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:05,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:05,857 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:05,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:05,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:05,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:05,885 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:06,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:26:06,272 INFO L85 PathProgramCache]: Analyzing trace with hash -2007253683, now seen corresponding path program 97 times [2024-04-27 09:26:06,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:06,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:06,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:06,305 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:06,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:06,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:06,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:06,333 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:06,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:26:06,712 INFO L85 PathProgramCache]: Analyzing trace with hash -2095321934, now seen corresponding path program 98 times [2024-04-27 09:26:06,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:06,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:06,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:06,739 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:06,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:06,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:06,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:06,862 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:07,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2024-04-27 09:26:07,237 INFO L85 PathProgramCache]: Analyzing trace with hash -530470395, now seen corresponding path program 99 times [2024-04-27 09:26:07,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:07,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:07,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:07,265 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:07,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:07,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:07,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:07,294 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:07,388 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:07,461 INFO L85 PathProgramCache]: Analyzing trace with hash -2007253682, now seen corresponding path program 288 times [2024-04-27 09:26:07,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:07,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:07,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:07,489 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:07,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:07,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:07,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:07,517 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:07,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:07,688 INFO L85 PathProgramCache]: Analyzing trace with hash -2095321902, now seen corresponding path program 289 times [2024-04-27 09:26:07,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:07,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:07,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:07,717 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:07,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:07,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:07,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:07,746 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:07,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:07,918 INFO L85 PathProgramCache]: Analyzing trace with hash -530469425, now seen corresponding path program 290 times [2024-04-27 09:26:07,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:07,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:07,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:07,947 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:07,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:07,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:07,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:07,977 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:08,075 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:08,160 INFO L85 PathProgramCache]: Analyzing trace with hash 735317102, now seen corresponding path program 98 times [2024-04-27 09:26:08,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:08,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:08,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:08,189 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:08,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:08,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:08,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:08,218 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:08,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:08,412 INFO L85 PathProgramCache]: Analyzing trace with hash 1319993777, now seen corresponding path program 99 times [2024-04-27 09:26:08,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:08,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:08,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:08,454 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:08,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:08,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:08,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:08,497 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:08,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:08,717 INFO L85 PathProgramCache]: Analyzing trace with hash -2029865754, now seen corresponding path program 100 times [2024-04-27 09:26:08,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:08,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:08,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:08,745 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:08,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:08,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:08,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:08,774 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:08,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:08,948 INFO L85 PathProgramCache]: Analyzing trace with hash 735317103, now seen corresponding path program 291 times [2024-04-27 09:26:08,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:08,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:08,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:08,977 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:08,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:08,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:08,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:09,006 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-04-27 09:26:09,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:09,169 INFO L85 PathProgramCache]: Analyzing trace with hash 1319993809, now seen corresponding path program 292 times [2024-04-27 09:26:09,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:09,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:09,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:09,198 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:09,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:09,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:09,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:09,226 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-04-27 09:26:09,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:09,387 INFO L85 PathProgramCache]: Analyzing trace with hash -2029864784, now seen corresponding path program 293 times [2024-04-27 09:26:09,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:09,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:09,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:09,416 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:26:09,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:09,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:09,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:09,445 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-04-27 09:26:09,544 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:09,630 INFO L85 PathProgramCache]: Analyzing trace with hash 1498701229, now seen corresponding path program 99 times [2024-04-27 09:26:09,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:09,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:09,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:09,748 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:26:09,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:09,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:09,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:09,777 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:26:09,878 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:09,955 INFO L85 PathProgramCache]: Analyzing trace with hash -784902062, now seen corresponding path program 100 times [2024-04-27 09:26:09,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:09,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:09,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:09,985 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:26:09,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:09,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:09,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:10,019 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:26:10,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:10,209 INFO L85 PathProgramCache]: Analyzing trace with hash 1437839973, now seen corresponding path program 101 times [2024-04-27 09:26:10,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:10,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:10,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:10,242 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:26:10,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:10,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:10,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:10,272 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:26:10,368 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:10,438 INFO L85 PathProgramCache]: Analyzing trace with hash 1498701230, now seen corresponding path program 294 times [2024-04-27 09:26:10,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:10,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:10,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:10,468 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:26:10,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:10,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:10,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:10,497 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 90 proven. 12 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-04-27 09:26:10,860 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2024-04-27 09:26:10,942 INFO L85 PathProgramCache]: Analyzing trace with hash -909348291, now seen corresponding path program 295 times [2024-04-27 09:26:10,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:10,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:10,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:10,970 INFO L134 CoverageAnalysis]: Checked inductivity of 139 backedges. 75 proven. 7 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2024-04-27 09:26:10,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:10,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:10,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:10,999 INFO L134 CoverageAnalysis]: Checked inductivity of 139 backedges. 75 proven. 7 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2024-04-27 09:26:12,029 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2024-04-27 09:26:12,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 9 [2024-04-27 09:26:12,368 INFO L85 PathProgramCache]: Analyzing trace with hash -1957988361, now seen corresponding path program 100 times [2024-04-27 09:26:12,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:12,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:12,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:12,393 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:12,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:12,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:12,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:12,418 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:12,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2024-04-27 09:26:13,079 INFO L85 PathProgramCache]: Analyzing trace with hash -568096952, now seen corresponding path program 101 times [2024-04-27 09:26:13,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:13,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:13,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:13,104 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:13,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:13,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:13,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:13,128 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:13,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2024-04-27 09:26:13,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 9 [2024-04-27 09:26:13,688 INFO L85 PathProgramCache]: Analyzing trace with hash -431136209, now seen corresponding path program 102 times [2024-04-27 09:26:13,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:13,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:13,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:13,715 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:13,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:13,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:13,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:13,739 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:13,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:14,003 INFO L85 PathProgramCache]: Analyzing trace with hash -1957988360, now seen corresponding path program 296 times [2024-04-27 09:26:14,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:14,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:14,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:14,028 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:14,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:14,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:14,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:14,052 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:14,164 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:14,316 INFO L85 PathProgramCache]: Analyzing trace with hash -568096920, now seen corresponding path program 297 times [2024-04-27 09:26:14,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:14,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:14,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:14,341 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:14,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:14,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:14,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:14,366 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:14,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:14,619 INFO L85 PathProgramCache]: Analyzing trace with hash -431135239, now seen corresponding path program 298 times [2024-04-27 09:26:14,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:14,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:14,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:14,643 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:14,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:14,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:14,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:14,669 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:14,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:14,919 INFO L85 PathProgramCache]: Analyzing trace with hash -480290428, now seen corresponding path program 101 times [2024-04-27 09:26:14,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:14,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:14,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:14,944 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:14,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:14,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:14,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:14,970 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:15,081 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:15,231 INFO L85 PathProgramCache]: Analyzing trace with hash -2004101285, now seen corresponding path program 102 times [2024-04-27 09:26:15,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:15,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:15,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:15,262 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:15,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:15,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:15,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:15,293 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:15,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:15,540 INFO L85 PathProgramCache]: Analyzing trace with hash -1997597572, now seen corresponding path program 103 times [2024-04-27 09:26:15,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:15,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:15,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:15,567 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:15,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:15,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:15,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:15,592 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:15,698 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:15,867 INFO L85 PathProgramCache]: Analyzing trace with hash -480290427, now seen corresponding path program 299 times [2024-04-27 09:26:15,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:15,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:15,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:15,893 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:15,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:15,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:15,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:15,918 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-04-27 09:26:16,127 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:16,265 INFO L85 PathProgramCache]: Analyzing trace with hash -2004101253, now seen corresponding path program 300 times [2024-04-27 09:26:16,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:16,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:16,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:16,291 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-04-27 09:26:16,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:16,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:16,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:16,317 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-04-27 09:26:16,429 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:16,571 INFO L85 PathProgramCache]: Analyzing trace with hash -1997596602, now seen corresponding path program 301 times [2024-04-27 09:26:16,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:16,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:16,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:16,596 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-04-27 09:26:16,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:16,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:16,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:16,625 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-04-27 09:26:16,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:16,877 INFO L85 PathProgramCache]: Analyzing trace with hash -1795952425, now seen corresponding path program 102 times [2024-04-27 09:26:16,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:16,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:16,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:16,902 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-04-27 09:26:16,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:16,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:16,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:16,929 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-04-27 09:26:17,034 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:17,161 INFO L85 PathProgramCache]: Analyzing trace with hash 160049768, now seen corresponding path program 103 times [2024-04-27 09:26:17,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:17,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:17,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:17,187 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-04-27 09:26:17,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:17,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:17,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:17,213 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-04-27 09:26:17,322 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:17,445 INFO L85 PathProgramCache]: Analyzing trace with hash 666575631, now seen corresponding path program 104 times [2024-04-27 09:26:17,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:17,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:17,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:17,472 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-04-27 09:26:17,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:17,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:17,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:17,497 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-04-27 09:26:17,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:17,745 INFO L85 PathProgramCache]: Analyzing trace with hash -1795952424, now seen corresponding path program 302 times [2024-04-27 09:26:17,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:17,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:17,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:17,771 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-04-27 09:26:17,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:17,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:17,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:17,797 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 64 proven. 15 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-04-27 09:26:18,055 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:18,197 INFO L85 PathProgramCache]: Analyzing trace with hash -6506657, now seen corresponding path program 303 times [2024-04-27 09:26:18,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:18,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:18,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:18,221 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 64 proven. 12 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-04-27 09:26:18,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:18,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:18,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:18,244 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 64 proven. 12 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-04-27 09:26:26,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:26,896 INFO L85 PathProgramCache]: Analyzing trace with hash -1084398370, now seen corresponding path program 304 times [2024-04-27 09:26:26,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:26,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:26,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:26,913 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 31 proven. 7 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:26,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:26,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:26,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:26,931 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 31 proven. 7 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:27,974 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2024-04-27 09:26:28,335 INFO L85 PathProgramCache]: Analyzing trace with hash 743388991, now seen corresponding path program 103 times [2024-04-27 09:26:28,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:28,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:28,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:28,353 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:28,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:28,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:28,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:28,370 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:28,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2024-04-27 09:26:28,948 INFO L85 PathProgramCache]: Analyzing trace with hash 1570222336, now seen corresponding path program 104 times [2024-04-27 09:26:28,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:28,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:28,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:28,966 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:28,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:28,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:28,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:28,983 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:29,217 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2024-04-27 09:26:29,432 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-04-27 09:26:29,630 INFO L85 PathProgramCache]: Analyzing trace with hash 1432252279, now seen corresponding path program 105 times [2024-04-27 09:26:29,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:29,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:29,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:29,650 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:29,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:29,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:29,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:29,669 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:29,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:29,919 INFO L85 PathProgramCache]: Analyzing trace with hash 743388992, now seen corresponding path program 305 times [2024-04-27 09:26:29,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:29,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:29,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:29,936 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:29,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:29,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:29,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:29,955 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:30,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:30,206 INFO L85 PathProgramCache]: Analyzing trace with hash 1570222368, now seen corresponding path program 306 times [2024-04-27 09:26:30,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:30,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:30,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:30,224 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:30,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:30,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:30,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:30,243 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:30,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:30,486 INFO L85 PathProgramCache]: Analyzing trace with hash 1432253249, now seen corresponding path program 307 times [2024-04-27 09:26:30,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:30,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:30,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:30,504 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:30,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:30,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:30,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:30,522 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:30,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:30,779 INFO L85 PathProgramCache]: Analyzing trace with hash 1450177852, now seen corresponding path program 104 times [2024-04-27 09:26:30,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:30,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:30,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:30,797 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:30,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:30,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:30,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:30,815 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:30,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:31,057 INFO L85 PathProgramCache]: Analyzing trace with hash 2005840547, now seen corresponding path program 105 times [2024-04-27 09:26:31,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:31,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:31,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:31,075 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:31,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:31,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:31,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:31,093 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:31,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:31,341 INFO L85 PathProgramCache]: Analyzing trace with hash 2051514932, now seen corresponding path program 106 times [2024-04-27 09:26:31,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:31,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:31,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:31,360 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:31,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:31,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:31,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:31,379 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:31,490 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:31,643 INFO L85 PathProgramCache]: Analyzing trace with hash 1450177853, now seen corresponding path program 308 times [2024-04-27 09:26:31,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:31,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:31,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:31,662 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:31,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:31,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:31,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:31,680 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-04-27 09:26:31,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:31,936 INFO L85 PathProgramCache]: Analyzing trace with hash 2005840579, now seen corresponding path program 309 times [2024-04-27 09:26:31,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:31,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:31,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:31,955 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:26:31,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:31,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:31,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:31,975 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-04-27 09:26:32,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:32,239 INFO L85 PathProgramCache]: Analyzing trace with hash 2051515902, now seen corresponding path program 310 times [2024-04-27 09:26:32,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:32,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:32,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:32,258 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:26:32,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:32,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:32,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:32,277 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-04-27 09:26:32,380 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:32,535 INFO L85 PathProgramCache]: Analyzing trace with hash -827516385, now seen corresponding path program 105 times [2024-04-27 09:26:32,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:32,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:32,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:32,555 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:26:32,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:32,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:32,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:32,574 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:26:32,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:32,817 INFO L85 PathProgramCache]: Analyzing trace with hash 116795936, now seen corresponding path program 106 times [2024-04-27 09:26:32,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:32,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:32,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:32,837 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:26:32,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:32,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:32,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:32,954 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:26:33,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:33,202 INFO L85 PathProgramCache]: Analyzing trace with hash -674293161, now seen corresponding path program 107 times [2024-04-27 09:26:33,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:33,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:33,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:33,222 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:26:33,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:33,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:33,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:33,242 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:26:33,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:33,499 INFO L85 PathProgramCache]: Analyzing trace with hash -827516384, now seen corresponding path program 311 times [2024-04-27 09:26:33,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:33,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:33,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:33,518 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:26:33,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:33,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:33,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:33,537 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 31 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-04-27 09:26:33,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-04-27 09:26:33,926 INFO L85 PathProgramCache]: Analyzing trace with hash -1281906521, now seen corresponding path program 312 times [2024-04-27 09:26:33,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:33,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:33,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:33,944 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 31 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-04-27 09:26:33,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 09:26:33,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 09:26:33,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 09:26:33,960 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 31 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-04-27 09:26:41,072 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-04-27 09:26:41,268 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1906,SelfDestructingSolverStorable1905,SelfDestructingSolverStorable1904,SelfDestructingSolverStorable1903,SelfDestructingSolverStorable1902,SelfDestructingSolverStorable1901,SelfDestructingSolverStorable1900,SelfDestructingSolverStorable1909,SelfDestructingSolverStorable1908,SelfDestructingSolverStorable1907,SelfDestructingSolverStorable1917,SelfDestructingSolverStorable1916,SelfDestructingSolverStorable1915,SelfDestructingSolverStorable1914,SelfDestructingSolverStorable1913,SelfDestructingSolverStorable1912,SelfDestructingSolverStorable1911,SelfDestructingSolverStorable1910,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable1780,SelfDestructingSolverStorable1789,SelfDestructingSolverStorable1788,SelfDestructingSolverStorable1787,SelfDestructingSolverStorable1786,SelfDestructingSolverStorable1785,SelfDestructingSolverStorable1784,SelfDestructingSolverStorable1783,SelfDestructingSolverStorable1782,SelfDestructingSolverStorable1781,SelfDestructingSolverStorable1791,SelfDestructingSolverStorable1790,SelfDestructingSolverStorable1799,SelfDestructingSolverStorable1798,SelfDestructingSolverStorable1797,SelfDestructingSolverStorable1796,SelfDestructingSolverStorable1795,SelfDestructingSolverStorable1794,SelfDestructingSolverStorable1793,SelfDestructingSolverStorable1792,SelfDestructingSolverStorable2055,SelfDestructingSolverStorable2054,SelfDestructingSolverStorable2053,SelfDestructingSolverStorable2052,SelfDestructingSolverStorable2051,SelfDestructingSolverStorable2050,SelfDestructingSolverStorable1889,SelfDestructingSolverStorable1888,SelfDestructingSolverStorable1887,SelfDestructingSolverStorable1886,SelfDestructingSolverStorable1885,SelfDestructingSolverStorable1884,SelfDestructingSolverStorable1883,SelfDestructingSolverStorable2059,SelfDestructingSolverStorable1882,SelfDestructingSolverStorable2058,SelfDestructingSolverStorable1881,SelfDestructingSolverStorable2057,SelfDestructingSolverStorable1880,SelfDestructingSolverStorable2056,SelfDestructingSolverStorable1890,SelfDestructingSolverStorable2066,SelfDestructingSolverStorable2065,SelfDestructingSolverStorable2064,SelfDestructingSolverStorable2063,SelfDestructingSolverStorable2062,SelfDestructingSolverStorable2061,SelfDestructingSolverStorable2060,SelfDestructingSolverStorable1779,SelfDestructingSolverStorable1778,SelfDestructingSolverStorable1899,SelfDestructingSolverStorable1777,SelfDestructingSolverStorable1898,SelfDestructingSolverStorable1776,SelfDestructingSolverStorable1897,SelfDestructingSolverStorable1896,SelfDestructingSolverStorable1895,SelfDestructingSolverStorable1894,SelfDestructingSolverStorable1893,SelfDestructingSolverStorable1892,SelfDestructingSolverStorable2068,SelfDestructingSolverStorable1891,SelfDestructingSolverStorable2067,SelfDestructingSolverStorable2033,SelfDestructingSolverStorable2032,SelfDestructingSolverStorable2031,SelfDestructingSolverStorable2030,SelfDestructingSolverStorable1869,SelfDestructingSolverStorable1868,SelfDestructingSolverStorable1989,SelfDestructingSolverStorable1867,SelfDestructingSolverStorable1988,SelfDestructingSolverStorable1866,SelfDestructingSolverStorable1987,SelfDestructingSolverStorable1865,SelfDestructingSolverStorable1986,SelfDestructingSolverStorable1864,SelfDestructingSolverStorable1985,SelfDestructingSolverStorable1863,SelfDestructingSolverStorable1984,SelfDestructingSolverStorable2039,SelfDestructingSolverStorable1862,SelfDestructingSolverStorable1983,SelfDestructingSolverStorable2038,SelfDestructingSolverStorable1861,SelfDestructingSolverStorable1982,SelfDestructingSolverStorable2037,SelfDestructingSolverStorable1860,SelfDestructingSolverStorable1981,SelfDestructingSolverStorable2036,SelfDestructingSolverStorable1980,SelfDestructingSolverStorable2035,SelfDestructingSolverStorable2034,SelfDestructingSolverStorable2044,SelfDestructingSolverStorable2043,SelfDestructingSolverStorable2042,SelfDestructingSolverStorable2041,SelfDestructingSolverStorable2040,SelfDestructingSolverStorable1879,SelfDestructingSolverStorable1878,SelfDestructingSolverStorable1999,SelfDestructingSolverStorable1877,SelfDestructingSolverStorable1998,SelfDestructingSolverStorable1876,SelfDestructingSolverStorable1997,SelfDestructingSolverStorable1875,SelfDestructingSolverStorable1996,SelfDestructingSolverStorable1874,SelfDestructingSolverStorable1995,SelfDestructingSolverStorable1873,SelfDestructingSolverStorable1994,SelfDestructingSolverStorable2049,SelfDestructingSolverStorable1872,SelfDestructingSolverStorable1993,SelfDestructingSolverStorable2048,SelfDestructingSolverStorable1871,SelfDestructingSolverStorable1992,SelfDestructingSolverStorable2047,SelfDestructingSolverStorable1870,SelfDestructingSolverStorable1991,SelfDestructingSolverStorable2046,SelfDestructingSolverStorable1990,SelfDestructingSolverStorable2045,SelfDestructingSolverStorable2011,SelfDestructingSolverStorable2010,SelfDestructingSolverStorable1849,SelfDestructingSolverStorable1848,SelfDestructingSolverStorable1969,SelfDestructingSolverStorable1847,SelfDestructingSolverStorable1968,SelfDestructingSolverStorable1846,SelfDestructingSolverStorable1967,SelfDestructingSolverStorable1845,SelfDestructingSolverStorable1966,SelfDestructingSolverStorable1844,SelfDestructingSolverStorable1965,SelfDestructingSolverStorable1843,SelfDestructingSolverStorable1964,SelfDestructingSolverStorable2019,SelfDestructingSolverStorable1842,SelfDestructingSolverStorable1963,SelfDestructingSolverStorable2018,SelfDestructingSolverStorable1841,SelfDestructingSolverStorable1962,SelfDestructingSolverStorable2017,SelfDestructingSolverStorable1840,SelfDestructingSolverStorable1961,SelfDestructingSolverStorable2016,SelfDestructingSolverStorable1960,SelfDestructingSolverStorable2015,SelfDestructingSolverStorable2014,SelfDestructingSolverStorable2013,SelfDestructingSolverStorable2012,SelfDestructingSolverStorable2022,SelfDestructingSolverStorable2021,SelfDestructingSolverStorable2020,SelfDestructingSolverStorable1859,SelfDestructingSolverStorable1858,SelfDestructingSolverStorable1979,SelfDestructingSolverStorable1857,SelfDestructingSolverStorable1978,SelfDestructingSolverStorable1856,SelfDestructingSolverStorable1977,SelfDestructingSolverStorable1855,SelfDestructingSolverStorable1976,SelfDestructingSolverStorable1854,SelfDestructingSolverStorable1975,SelfDestructingSolverStorable1853,SelfDestructingSolverStorable1974,SelfDestructingSolverStorable2029,SelfDestructingSolverStorable1852,SelfDestructingSolverStorable1973,SelfDestructingSolverStorable2028,SelfDestructingSolverStorable1851,SelfDestructingSolverStorable1972,SelfDestructingSolverStorable2027,SelfDestructingSolverStorable1850,SelfDestructingSolverStorable1971,SelfDestructingSolverStorable2026,SelfDestructingSolverStorable1970,SelfDestructingSolverStorable2025,SelfDestructingSolverStorable2024,SelfDestructingSolverStorable2023,SelfDestructingSolverStorable1819,SelfDestructingSolverStorable1829,SelfDestructingSolverStorable1828,SelfDestructingSolverStorable1949,SelfDestructingSolverStorable1827,SelfDestructingSolverStorable1948,SelfDestructingSolverStorable1826,SelfDestructingSolverStorable1947,SelfDestructingSolverStorable1825,SelfDestructingSolverStorable1946,SelfDestructingSolverStorable1824,SelfDestructingSolverStorable1945,SelfDestructingSolverStorable1823,SelfDestructingSolverStorable1944,SelfDestructingSolverStorable1822,SelfDestructingSolverStorable1943,SelfDestructingSolverStorable1821,SelfDestructingSolverStorable1942,SelfDestructingSolverStorable1820,SelfDestructingSolverStorable1941,SelfDestructingSolverStorable1940,SelfDestructingSolverStorable2000,SelfDestructingSolverStorable1839,SelfDestructingSolverStorable1838,SelfDestructingSolverStorable1959,SelfDestructingSolverStorable1837,SelfDestructingSolverStorable1958,SelfDestructingSolverStorable1836,SelfDestructingSolverStorable1957,SelfDestructingSolverStorable1835,SelfDestructingSolverStorable1956,SelfDestructingSolverStorable1834,SelfDestructingSolverStorable1955,SelfDestructingSolverStorable1833,SelfDestructingSolverStorable1954,SelfDestructingSolverStorable2009,SelfDestructingSolverStorable1832,SelfDestructingSolverStorable1953,SelfDestructingSolverStorable2008,SelfDestructingSolverStorable1831,SelfDestructingSolverStorable1952,SelfDestructingSolverStorable2007,SelfDestructingSolverStorable1830,SelfDestructingSolverStorable1951,SelfDestructingSolverStorable2006,SelfDestructingSolverStorable1950,SelfDestructingSolverStorable2005,SelfDestructingSolverStorable2004,SelfDestructingSolverStorable2003,SelfDestructingSolverStorable2002,SelfDestructingSolverStorable2001,SelfDestructingSolverStorable1919,SelfDestructingSolverStorable1918,SelfDestructingSolverStorable1807,SelfDestructingSolverStorable1928,SelfDestructingSolverStorable1806,SelfDestructingSolverStorable1927,SelfDestructingSolverStorable1805,SelfDestructingSolverStorable1926,SelfDestructingSolverStorable1804,SelfDestructingSolverStorable1925,SelfDestructingSolverStorable1803,SelfDestructingSolverStorable1924,SelfDestructingSolverStorable1802,SelfDestructingSolverStorable1923,SelfDestructingSolverStorable1801,SelfDestructingSolverStorable1922,SelfDestructingSolverStorable1800,SelfDestructingSolverStorable1921,SelfDestructingSolverStorable1920,SelfDestructingSolverStorable1809,SelfDestructingSolverStorable1808,SelfDestructingSolverStorable1929,SelfDestructingSolverStorable1818,SelfDestructingSolverStorable1939,SelfDestructingSolverStorable1817,SelfDestructingSolverStorable1938,SelfDestructingSolverStorable1816,SelfDestructingSolverStorable1937,SelfDestructingSolverStorable1815,SelfDestructingSolverStorable1936,SelfDestructingSolverStorable1814,SelfDestructingSolverStorable1935,SelfDestructingSolverStorable1813,SelfDestructingSolverStorable1934,SelfDestructingSolverStorable1812,SelfDestructingSolverStorable1933,SelfDestructingSolverStorable1811,SelfDestructingSolverStorable1932,SelfDestructingSolverStorable1810,SelfDestructingSolverStorable1931,SelfDestructingSolverStorable1930 [2024-04-27 09:26:41,269 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Function c_aux_v_front2_10949 is already defined. at de.uni_freiburg.informatik.ultimate.logic.NoopScript.declareFun(NoopScript.java:229) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.declareFun(Scriptor.java:115) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.declareFun(WrapperScript.java:137) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.declareFun(WrapperScript.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.declareFun(HistoryRecordingScript.java:95) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.declareFun(ManagedScript.java:181) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.variables.ProgramVarUtils.constructConstantForAuxVar(ProgramVarUtils.java:117) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.computeClosedFormula(UnmodifiableTransFormula.java:135) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.UnmodifiableTransFormula.(UnmodifiableTransFormula.java:90) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaBuilder.finishConstruction(TransFormulaBuilder.java:320) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition(TransFormulaUtils.java:324) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.SemanticIndependenceConditionGenerator.compose(SemanticIndependenceConditionGenerator.java:178) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.SemanticIndependenceConditionGenerator.withGuard(SemanticIndependenceConditionGenerator.java:186) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.SemanticIndependenceConditionGenerator.generateCondition(SemanticIndependenceConditionGenerator.java:135) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityChecker.checkConditionalCommutativity(ConditionalCommutativityChecker.java:134) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityCheckerVisitor.discoverState(ConditionalCommutativityCheckerVisitor.java:186) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityCheckerVisitor.discoverState(ConditionalCommutativityCheckerVisitor.java:1) at de.uni_freiburg.informatik.ultimate.automata.partialorder.visitors.DeadEndOptimizingSearchVisitor.discoverState(DeadEndOptimizingSearchVisitor.java:73) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.visitState(DepthFirstTraversal.java:222) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.traverse(DepthFirstTraversal.java:165) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.(DepthFirstTraversal.java:98) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.traverse(DepthFirstTraversal.java:122) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.PartialOrderReductionFacade.apply(PartialOrderReductionFacade.java:321) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.concurrency.PartialOrderCegarLoop.isAbstractionEmpty(PartialOrderCegarLoop.java:328) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:466) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:225) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2024-04-27 09:26:41,273 INFO L158 Benchmark]: Toolchain (without parser) took 371417.55ms. Allocated memory was 152.0MB in the beginning and 1.7GB in the end (delta: 1.5GB). Free memory was 120.4MB in the beginning and 767.8MB in the end (delta: -647.4MB). Peak memory consumption was 886.8MB. Max. memory is 8.0GB. [2024-04-27 09:26:41,273 INFO L158 Benchmark]: Boogie PL CUP Parser took 0.50ms. Allocated memory is still 152.0MB. Free memory is still 118.9MB. There was no memory consumed. Max. memory is 8.0GB. [2024-04-27 09:26:41,273 INFO L158 Benchmark]: Boogie Procedure Inliner took 51.43ms. Allocated memory is still 152.0MB. Free memory was 120.3MB in the beginning and 123.7MB in the end (delta: -3.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2024-04-27 09:26:41,274 INFO L158 Benchmark]: Boogie Preprocessor took 30.47ms. Allocated memory is still 152.0MB. Free memory was 123.6MB in the beginning and 122.5MB in the end (delta: 1.1MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2024-04-27 09:26:41,274 INFO L158 Benchmark]: RCFGBuilder took 265.61ms. Allocated memory is still 152.0MB. Free memory was 122.3MB in the beginning and 111.0MB in the end (delta: 11.4MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. [2024-04-27 09:26:41,274 INFO L158 Benchmark]: TraceAbstraction took 371061.21ms. Allocated memory was 152.0MB in the beginning and 1.7GB in the end (delta: 1.5GB). Free memory was 109.8MB in the beginning and 767.8MB in the end (delta: -658.1MB). Peak memory consumption was 877.4MB. Max. memory is 8.0GB. [2024-04-27 09:26:41,275 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.50ms. Allocated memory is still 152.0MB. Free memory is still 118.9MB. There was no memory consumed. Max. memory is 8.0GB. * Boogie Procedure Inliner took 51.43ms. Allocated memory is still 152.0MB. Free memory was 120.3MB in the beginning and 123.7MB in the end (delta: -3.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * Boogie Preprocessor took 30.47ms. Allocated memory is still 152.0MB. Free memory was 123.6MB in the beginning and 122.5MB in the end (delta: 1.1MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 265.61ms. Allocated memory is still 152.0MB. Free memory was 122.3MB in the beginning and 111.0MB in the end (delta: 11.4MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. * TraceAbstraction took 371061.21ms. Allocated memory was 152.0MB in the beginning and 1.7GB in the end (delta: 1.5GB). Free memory was 109.8MB in the beginning and 767.8MB in the end (delta: -658.1MB). Peak memory consumption was 877.4MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: Function c_aux_v_front2_10949 is already defined. de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: Function c_aux_v_front2_10949 is already defined.: de.uni_freiburg.informatik.ultimate.logic.NoopScript.declareFun(NoopScript.java:229) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2024-04-27 09:26:41,286 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2024-04-27 09:26:41,623 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...