/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerBplInline.xml -i ../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/difference-det.wvr.bpl -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-04 04:14:19,737 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-04 04:14:19,772 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-04 04:14:19,775 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-04 04:14:19,776 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-04 04:14:19,789 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-04 04:14:19,789 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-04 04:14:19,789 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-04 04:14:19,790 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-04 04:14:19,790 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-04 04:14:19,790 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-04 04:14:19,790 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-04 04:14:19,791 INFO L153 SettingsManager]: * Use SBE=true [2024-05-04 04:14:19,791 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-04 04:14:19,791 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-04 04:14:19,791 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-04 04:14:19,792 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-04 04:14:19,792 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-04 04:14:19,792 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-04 04:14:19,792 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-04 04:14:19,792 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-04 04:14:19,793 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-04 04:14:19,793 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-04 04:14:19,793 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-04 04:14:19,793 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-04 04:14:19,793 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-04 04:14:19,794 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-04 04:14:19,794 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-04 04:14:19,794 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-04 04:14:19,794 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-04 04:14:19,794 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-04 04:14:19,794 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-04 04:14:19,795 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-04 04:14:19,795 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-04 04:14:19,795 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-04 04:14:19,795 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-04 04:14:19,795 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-04 04:14:19,795 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-04 04:14:19,796 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-04 04:14:19,796 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT [2024-05-04 04:14:19,946 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-04 04:14:19,970 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-04 04:14:19,972 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-04 04:14:19,972 INFO L270 PluginConnector]: Initializing Boogie PL CUP Parser... [2024-05-04 04:14:19,973 INFO L274 PluginConnector]: Boogie PL CUP Parser initialized [2024-05-04 04:14:19,974 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/difference-det.wvr.bpl [2024-05-04 04:14:19,974 INFO L110 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/difference-det.wvr.bpl' [2024-05-04 04:14:19,990 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-04 04:14:19,991 INFO L133 ToolchainWalker]: Walking toolchain with 4 elements. [2024-05-04 04:14:19,992 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-04 04:14:19,992 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-04 04:14:19,992 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-04 04:14:20,007 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:14:19" (1/1) ... [2024-05-04 04:14:20,012 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:14:19" (1/1) ... [2024-05-04 04:14:20,016 INFO L138 Inliner]: procedures = 5, calls = 4, calls flagged for inlining = 0, calls inlined = 0, statements flattened = 0 [2024-05-04 04:14:20,017 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-04 04:14:20,018 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-04 04:14:20,018 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-04 04:14:20,018 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-04 04:14:20,024 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:14:19" (1/1) ... [2024-05-04 04:14:20,024 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:14:19" (1/1) ... [2024-05-04 04:14:20,024 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:14:19" (1/1) ... [2024-05-04 04:14:20,025 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:14:19" (1/1) ... [2024-05-04 04:14:20,026 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:14:19" (1/1) ... [2024-05-04 04:14:20,028 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:14:19" (1/1) ... [2024-05-04 04:14:20,029 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:14:19" (1/1) ... [2024-05-04 04:14:20,029 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:14:19" (1/1) ... [2024-05-04 04:14:20,030 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-04 04:14:20,030 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-04 04:14:20,030 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-04 04:14:20,031 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-04 04:14:20,032 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:14:19" (1/1) ... [2024-05-04 04:14:20,036 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-04 04:14:20,050 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:14:20,061 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-04 04:14:20,063 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-04 04:14:20,093 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread1 given in one single declaration [2024-05-04 04:14:20,093 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-04 04:14:20,093 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-04 04:14:20,093 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread2 given in one single declaration [2024-05-04 04:14:20,093 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-04 04:14:20,093 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-04 04:14:20,094 INFO L124 BoogieDeclarations]: Specification and implementation of procedure ULTIMATE.start given in one single declaration [2024-05-04 04:14:20,094 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-04 04:14:20,094 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-04 04:14:20,094 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread3 given in one single declaration [2024-05-04 04:14:20,094 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-04 04:14:20,094 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-04 04:14:20,094 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread4 given in one single declaration [2024-05-04 04:14:20,094 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-04 04:14:20,094 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-04 04:14:20,095 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-04 04:14:20,131 INFO L241 CfgBuilder]: Building ICFG [2024-05-04 04:14:20,133 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-04 04:14:20,232 INFO L282 CfgBuilder]: Performing block encoding [2024-05-04 04:14:20,257 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-04 04:14:20,257 INFO L309 CfgBuilder]: Removed 0 assume(true) statements. [2024-05-04 04:14:20,262 INFO L201 PluginConnector]: Adding new model difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.05 04:14:20 BoogieIcfgContainer [2024-05-04 04:14:20,262 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-04 04:14:20,264 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-04 04:14:20,264 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-04 04:14:20,269 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-04 04:14:20,269 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:14:19" (1/2) ... [2024-05-04 04:14:20,270 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7a5bf50b and model type difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.05 04:14:20, skipping insertion in model container [2024-05-04 04:14:20,270 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.05 04:14:20" (2/2) ... [2024-05-04 04:14:20,271 INFO L112 eAbstractionObserver]: Analyzing ICFG difference-det.wvr.bpl [2024-05-04 04:14:20,277 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-04 04:14:20,283 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-04 04:14:20,284 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-04 04:14:20,285 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-04 04:14:20,339 INFO L144 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2024-05-04 04:14:20,367 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-04 04:14:20,367 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-04 04:14:20,367 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:14:20,368 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-04 04:14:20,369 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-04 04:14:20,396 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-04 04:14:20,411 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:14:20,413 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-04 04:14:20,418 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2ff990dc, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=false, mConComCheckerCriterionLimit=1, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-04 04:14:20,418 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-04 04:14:20,464 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:14:20,467 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:14:20,467 INFO L85 PathProgramCache]: Analyzing trace with hash 1027987845, now seen corresponding path program 1 times [2024-05-04 04:14:20,473 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:14:20,474 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [988768757] [2024-05-04 04:14:20,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:20,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:20,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:20,677 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:20,678 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:14:20,678 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [988768757] [2024-05-04 04:14:20,678 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [988768757] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-04 04:14:20,679 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-04 04:14:20,679 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-05-04 04:14:20,680 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [46596656] [2024-05-04 04:14:20,680 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-04 04:14:20,683 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-05-04 04:14:20,683 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:14:20,706 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-04 04:14:20,707 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-05-04 04:14:20,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:20,710 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:14:20,711 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 4 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:14:20,711 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:20,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:20,784 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-05-04 04:14:20,785 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:14:20,785 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:14:20,785 INFO L85 PathProgramCache]: Analyzing trace with hash 1009387307, now seen corresponding path program 1 times [2024-05-04 04:14:20,785 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:14:20,786 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1588975503] [2024-05-04 04:14:20,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:20,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:20,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:20,923 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:20,923 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:14:20,923 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1588975503] [2024-05-04 04:14:20,923 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1588975503] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-04 04:14:20,924 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-04 04:14:20,924 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-05-04 04:14:20,924 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1843644278] [2024-05-04 04:14:20,924 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-04 04:14:20,925 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-04 04:14:20,925 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:14:20,926 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-04 04:14:20,926 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-05-04 04:14:20,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:20,926 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:14:20,927 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 4.666666666666667) internal successors, (28), 5 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:14:20,927 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:20,927 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:21,098 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:21,099 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:21,099 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-05-04 04:14:21,099 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:14:21,099 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:14:21,100 INFO L85 PathProgramCache]: Analyzing trace with hash 1639454383, now seen corresponding path program 1 times [2024-05-04 04:14:21,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:14:21,100 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1312101131] [2024-05-04 04:14:21,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:21,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:21,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:21,169 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:21,170 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:14:21,170 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1312101131] [2024-05-04 04:14:21,170 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1312101131] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-04 04:14:21,170 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-04 04:14:21,170 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-05-04 04:14:21,170 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182868228] [2024-05-04 04:14:21,171 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-04 04:14:21,171 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-04 04:14:21,171 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:14:21,171 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-04 04:14:21,172 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-05-04 04:14:21,172 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:21,172 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:14:21,172 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 4.666666666666667) internal successors, (28), 5 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:14:21,172 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:21,172 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:21,172 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:21,285 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:21,285 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:21,286 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:21,286 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-05-04 04:14:21,288 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:14:21,290 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:14:21,290 INFO L85 PathProgramCache]: Analyzing trace with hash -2065799151, now seen corresponding path program 1 times [2024-05-04 04:14:21,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:14:21,291 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [461674717] [2024-05-04 04:14:21,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:21,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:21,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:21,412 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:14:21,412 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:14:21,413 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [461674717] [2024-05-04 04:14:21,413 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [461674717] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:14:21,413 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [3579419] [2024-05-04 04:14:21,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:21,413 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:14:21,413 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:14:21,416 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:14:21,467 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-04 04:14:21,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:21,504 INFO L262 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 9 conjunts are in the unsatisfiable core [2024-05-04 04:14:21,509 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:14:21,615 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:21,615 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:14:21,667 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:14:21,667 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [3579419] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:14:21,668 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:14:21,668 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6, 5] total 8 [2024-05-04 04:14:21,668 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [339913932] [2024-05-04 04:14:21,668 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:14:21,668 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-05-04 04:14:21,669 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:14:21,669 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-05-04 04:14:21,669 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-05-04 04:14:21,669 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:21,669 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:14:21,669 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 6.75) internal successors, (54), 8 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:14:21,669 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:21,670 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:21,670 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:21,670 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:21,776 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:21,776 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:21,777 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:21,777 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:21,787 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-05-04 04:14:21,986 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:14:21,986 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:14:21,987 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:14:21,987 INFO L85 PathProgramCache]: Analyzing trace with hash 1142718707, now seen corresponding path program 2 times [2024-05-04 04:14:21,987 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:14:21,987 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [925900156] [2024-05-04 04:14:21,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:21,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:21,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:22,064 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:14:22,064 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:14:22,064 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [925900156] [2024-05-04 04:14:22,064 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [925900156] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:14:22,064 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1036928625] [2024-05-04 04:14:22,065 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-04 04:14:22,065 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:14:22,065 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:14:22,090 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:14:22,117 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-04 04:14:22,149 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-04 04:14:22,149 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:14:22,150 INFO L262 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 7 conjunts are in the unsatisfiable core [2024-05-04 04:14:22,151 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:14:22,310 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:22,310 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:14:22,422 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:22,422 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1036928625] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:14:22,422 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:14:22,422 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7, 7] total 14 [2024-05-04 04:14:22,422 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1475517134] [2024-05-04 04:14:22,422 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:14:22,423 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-05-04 04:14:22,423 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:14:22,423 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-05-04 04:14:22,423 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2024-05-04 04:14:22,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:22,424 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:14:22,424 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 4.6) internal successors, (69), 14 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:14:22,424 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:22,424 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:22,424 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:22,424 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:22,424 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:22,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:22,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:22,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:22,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:22,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-04 04:14:22,662 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-05-04 04:14:22,860 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:14:22,860 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:14:22,860 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:14:22,860 INFO L85 PathProgramCache]: Analyzing trace with hash -2059958413, now seen corresponding path program 3 times [2024-05-04 04:14:22,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:14:22,861 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658835174] [2024-05-04 04:14:22,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:22,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:22,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:22,958 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:14:22,958 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:14:22,958 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [658835174] [2024-05-04 04:14:22,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [658835174] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:14:22,959 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1800054410] [2024-05-04 04:14:22,959 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-04 04:14:22,959 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:14:22,959 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:14:22,965 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:14:22,967 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-05-04 04:14:23,011 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2024-05-04 04:14:23,011 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:14:23,012 INFO L262 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 7 conjunts are in the unsatisfiable core [2024-05-04 04:14:23,013 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:14:23,117 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:23,117 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:14:23,203 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:23,204 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1800054410] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:14:23,204 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:14:23,204 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7, 7] total 15 [2024-05-04 04:14:23,204 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1171279380] [2024-05-04 04:14:23,204 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:14:23,205 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2024-05-04 04:14:23,205 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:14:23,206 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-05-04 04:14:23,206 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=177, Unknown=0, NotChecked=0, Total=240 [2024-05-04 04:14:23,206 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:23,206 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:14:23,206 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 4.3125) internal successors, (69), 15 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:14:23,206 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:23,206 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:23,207 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:23,207 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:23,207 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-05-04 04:14:23,207 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:23,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:23,747 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:23,747 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:23,747 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-04 04:14:23,747 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:14:23,747 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-04 04:14:23,754 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-05-04 04:14:23,952 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:14:23,952 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:14:23,952 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:14:23,953 INFO L85 PathProgramCache]: Analyzing trace with hash -1769742673, now seen corresponding path program 1 times [2024-05-04 04:14:23,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:14:23,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [19334263] [2024-05-04 04:14:23,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:23,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:23,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:23,987 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:23,988 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:14:23,988 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [19334263] [2024-05-04 04:14:23,988 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [19334263] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-04 04:14:23,988 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-04 04:14:23,988 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-05-04 04:14:23,988 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1481859206] [2024-05-04 04:14:23,988 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-04 04:14:23,988 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-04 04:14:23,989 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:14:23,989 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-04 04:14:23,989 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-05-04 04:14:23,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:23,989 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:14:23,989 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 5.333333333333333) internal successors, (32), 6 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:14:23,989 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:23,989 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:23,990 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:23,990 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-04 04:14:23,990 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:14:23,990 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-04 04:14:23,990 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:24,154 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:24,154 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:24,154 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:24,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-04 04:14:24,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:14:24,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-04 04:14:24,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:24,155 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-05-04 04:14:24,156 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:14:24,156 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:14:24,156 INFO L85 PathProgramCache]: Analyzing trace with hash -592519953, now seen corresponding path program 1 times [2024-05-04 04:14:24,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:14:24,156 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1024310649] [2024-05-04 04:14:24,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:24,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:24,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:24,192 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:24,192 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:14:24,192 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1024310649] [2024-05-04 04:14:24,192 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1024310649] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-04 04:14:24,192 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-04 04:14:24,192 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-05-04 04:14:24,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1624052659] [2024-05-04 04:14:24,193 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-04 04:14:24,193 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-04 04:14:24,193 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:14:24,193 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-04 04:14:24,193 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-05-04 04:14:24,193 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:24,194 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:14:24,194 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 5.333333333333333) internal successors, (32), 6 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:14:24,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:24,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:24,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:24,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-04 04:14:24,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:14:24,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-04 04:14:24,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:24,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:24,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:24,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:24,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:24,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-04 04:14:24,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:14:24,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-04 04:14:24,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:24,305 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:24,305 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-05-04 04:14:24,305 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:14:24,305 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:14:24,305 INFO L85 PathProgramCache]: Analyzing trace with hash -1491661811, now seen corresponding path program 1 times [2024-05-04 04:14:24,305 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:14:24,306 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [443458993] [2024-05-04 04:14:24,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:24,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:24,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:24,386 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:24,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:14:24,387 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [443458993] [2024-05-04 04:14:24,387 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [443458993] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:14:24,387 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [249995945] [2024-05-04 04:14:24,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:24,387 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:14:24,387 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:14:24,418 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:14:24,443 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-05-04 04:14:24,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:24,450 INFO L262 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 13 conjunts are in the unsatisfiable core [2024-05-04 04:14:24,450 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:14:24,534 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-04 04:14:24,535 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:14:24,580 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-04 04:14:24,580 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [249995945] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:14:24,581 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:14:24,581 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 12 [2024-05-04 04:14:24,581 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2058151048] [2024-05-04 04:14:24,581 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:14:24,581 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-05-04 04:14:24,581 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:14:24,582 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-05-04 04:14:24,582 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2024-05-04 04:14:24,582 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:24,582 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:14:24,582 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 6.416666666666667) internal successors, (77), 12 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:14:24,582 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:24,583 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:24,583 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:24,583 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-04 04:14:24,583 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:14:24,583 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-04 04:14:24,583 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:24,583 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:24,583 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:24,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:24,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:24,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:24,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-04 04:14:24,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:14:24,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-04 04:14:24,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:24,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:24,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:14:24,786 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-05-04 04:14:24,971 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable8 [2024-05-04 04:14:24,972 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:14:24,972 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:14:24,972 INFO L85 PathProgramCache]: Analyzing trace with hash -1317598409, now seen corresponding path program 2 times [2024-05-04 04:14:24,972 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:14:24,972 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1917663024] [2024-05-04 04:14:24,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:24,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:24,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:25,026 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 7 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:14:25,026 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:14:25,026 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1917663024] [2024-05-04 04:14:25,026 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1917663024] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:14:25,026 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1370353899] [2024-05-04 04:14:25,026 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-04 04:14:25,027 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:14:25,027 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:14:25,038 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:14:25,052 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-05-04 04:14:25,080 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-04 04:14:25,080 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:14:25,081 INFO L262 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 7 conjunts are in the unsatisfiable core [2024-05-04 04:14:25,082 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:14:25,189 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 7 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:25,189 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:14:25,297 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:25,297 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1370353899] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:14:25,297 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:14:25,297 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 8] total 15 [2024-05-04 04:14:25,297 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593566979] [2024-05-04 04:14:25,297 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:14:25,298 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-05-04 04:14:25,298 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:14:25,298 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-05-04 04:14:25,298 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2024-05-04 04:14:25,298 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:25,298 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:14:25,299 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 5.133333333333334) internal successors, (77), 15 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:14:25,299 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:25,299 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:25,299 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:25,299 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-04 04:14:25,299 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:14:25,299 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-04 04:14:25,299 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:25,299 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:25,299 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:14:25,299 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:25,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:25,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:25,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:25,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-04 04:14:25,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:14:25,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-04 04:14:25,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:25,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:25,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:14:25,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-04 04:14:25,643 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-05-04 04:14:25,841 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2024-05-04 04:14:25,842 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:14:25,842 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:14:25,842 INFO L85 PathProgramCache]: Analyzing trace with hash -140375689, now seen corresponding path program 3 times [2024-05-04 04:14:25,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:14:25,842 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871829503] [2024-05-04 04:14:25,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:25,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:25,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:25,895 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:14:25,895 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:14:25,895 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871829503] [2024-05-04 04:14:25,895 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [871829503] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:14:25,896 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1907752815] [2024-05-04 04:14:25,896 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-04 04:14:25,896 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:14:25,896 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:14:25,897 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:14:25,899 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-05-04 04:14:25,948 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2024-05-04 04:14:25,949 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:14:25,949 INFO L262 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 7 conjunts are in the unsatisfiable core [2024-05-04 04:14:25,950 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:14:26,075 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:26,075 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:14:26,157 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:14:26,158 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1907752815] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:14:26,158 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:14:26,158 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 8] total 16 [2024-05-04 04:14:26,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410669244] [2024-05-04 04:14:26,158 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:14:26,158 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2024-05-04 04:14:26,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:14:26,159 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-05-04 04:14:26,159 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=177, Unknown=0, NotChecked=0, Total=240 [2024-05-04 04:14:26,159 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:26,159 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:14:26,159 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 5.0625) internal successors, (81), 16 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:14:26,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:14:26,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:26,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:26,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-04 04:14:26,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:14:26,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-04 04:14:26,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:14:26,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:14:26,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:14:26,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-05-04 04:14:26,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:14:26,976 INFO L85 PathProgramCache]: Analyzing trace with hash 1526596318, now seen corresponding path program 1 times [2024-05-04 04:14:26,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:26,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:26,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:27,012 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-05-04 04:14:27,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:27,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:27,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:27,042 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-05-04 04:14:27,043 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-04 04:14:27,043 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-05-04 04:14:29,281 INFO L85 PathProgramCache]: Analyzing trace with hash -1478345536, now seen corresponding path program 1 times [2024-05-04 04:14:29,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:29,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:29,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:29,288 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:29,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:29,475 INFO L85 PathProgramCache]: Analyzing trace with hash 481142678, now seen corresponding path program 2 times [2024-05-04 04:14:29,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:29,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:29,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:29,505 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 86 trivial. 0 not checked. [2024-05-04 04:14:29,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:29,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:29,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:29,526 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 86 trivial. 0 not checked. [2024-05-04 04:14:29,526 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-04 04:14:29,526 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-05-04 04:14:31,845 INFO L85 PathProgramCache]: Analyzing trace with hash -1478345536, now seen corresponding path program 3 times [2024-05-04 04:14:31,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:31,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:31,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:31,855 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:31,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:32,137 INFO L85 PathProgramCache]: Analyzing trace with hash 1198264700, now seen corresponding path program 4 times [2024-05-04 04:14:32,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:32,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:32,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:32,146 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:32,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:32,385 INFO L85 PathProgramCache]: Analyzing trace with hash 1803396569, now seen corresponding path program 5 times [2024-05-04 04:14:32,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:32,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:32,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:32,391 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:32,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:32,679 INFO L85 PathProgramCache]: Analyzing trace with hash 315748117, now seen corresponding path program 6 times [2024-05-04 04:14:32,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:32,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:32,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:32,685 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:32,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:34,277 INFO L85 PathProgramCache]: Analyzing trace with hash -548129199, now seen corresponding path program 7 times [2024-05-04 04:14:34,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:34,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:34,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:34,283 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:34,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:34,545 INFO L85 PathProgramCache]: Analyzing trace with hash 317656973, now seen corresponding path program 8 times [2024-05-04 04:14:34,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:34,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:34,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:34,597 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:14:34,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:34,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:34,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:34,659 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:14:34,843 INFO L85 PathProgramCache]: Analyzing trace with hash -557652247, now seen corresponding path program 1 times [2024-05-04 04:14:34,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:34,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:34,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:34,895 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-04 04:14:34,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:34,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:34,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:34,944 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-04 04:14:35,106 INFO L85 PathProgramCache]: Analyzing trace with hash 1506031863, now seen corresponding path program 1 times [2024-05-04 04:14:35,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:35,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:35,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:35,165 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-04 04:14:35,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:35,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:35,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:35,202 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-04 04:14:35,487 INFO L85 PathProgramCache]: Analyzing trace with hash 1506031894, now seen corresponding path program 9 times [2024-05-04 04:14:35,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:35,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:35,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:35,522 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2024-05-04 04:14:35,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:35,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:35,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:35,555 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2024-05-04 04:14:35,701 INFO L85 PathProgramCache]: Analyzing trace with hash 325676331, now seen corresponding path program 10 times [2024-05-04 04:14:35,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:35,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:35,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:35,734 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-04 04:14:35,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:35,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:35,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:35,774 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-04 04:14:36,112 INFO L85 PathProgramCache]: Analyzing trace with hash 148794322, now seen corresponding path program 11 times [2024-05-04 04:14:36,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:36,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:36,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:36,181 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-05-04 04:14:36,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:36,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:36,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:36,213 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-05-04 04:14:36,375 INFO L85 PathProgramCache]: Analyzing trace with hash 1528820463, now seen corresponding path program 12 times [2024-05-04 04:14:36,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:36,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:36,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:36,407 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-05-04 04:14:36,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:36,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:36,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:36,437 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-05-04 04:14:37,575 INFO L85 PathProgramCache]: Analyzing trace with hash -135650394, now seen corresponding path program 13 times [2024-05-04 04:14:37,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:37,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:37,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:37,581 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:37,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:37,865 INFO L85 PathProgramCache]: Analyzing trace with hash -1818797214, now seen corresponding path program 14 times [2024-05-04 04:14:37,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:37,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:37,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:37,869 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:37,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:38,068 INFO L85 PathProgramCache]: Analyzing trace with hash 1292519987, now seen corresponding path program 15 times [2024-05-04 04:14:38,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:38,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:38,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:38,073 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:38,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:38,471 INFO L85 PathProgramCache]: Analyzing trace with hash 79876207, now seen corresponding path program 16 times [2024-05-04 04:14:38,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:38,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:38,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:38,475 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:38,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:41,282 INFO L85 PathProgramCache]: Analyzing trace with hash 1145196033, now seen corresponding path program 17 times [2024-05-04 04:14:41,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:41,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:41,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:41,288 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:41,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:41,569 INFO L85 PathProgramCache]: Analyzing trace with hash -247403715, now seen corresponding path program 18 times [2024-05-04 04:14:41,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:41,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:41,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:41,576 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:41,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:41,767 INFO L85 PathProgramCache]: Analyzing trace with hash -467277704, now seen corresponding path program 19 times [2024-05-04 04:14:41,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:41,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:41,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:41,772 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:41,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:42,021 INFO L85 PathProgramCache]: Analyzing trace with hash 269113652, now seen corresponding path program 20 times [2024-05-04 04:14:42,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:42,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:42,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:42,027 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:42,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:42,497 INFO L85 PathProgramCache]: Analyzing trace with hash 576489456, now seen corresponding path program 21 times [2024-05-04 04:14:42,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:42,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:42,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:42,522 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:42,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:42,721 INFO L85 PathProgramCache]: Analyzing trace with hash 271022508, now seen corresponding path program 22 times [2024-05-04 04:14:42,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:42,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:42,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:42,762 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-04 04:14:42,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:42,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:42,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:42,810 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-04 04:14:42,948 INFO L85 PathProgramCache]: Analyzing trace with hash 1466640776, now seen corresponding path program 2 times [2024-05-04 04:14:42,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:42,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:42,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:42,978 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:14:42,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:42,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:42,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:43,015 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:14:43,145 INFO L85 PathProgramCache]: Analyzing trace with hash -506878344, now seen corresponding path program 2 times [2024-05-04 04:14:43,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:43,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:43,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:43,172 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:14:43,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:43,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:43,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:43,201 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:14:43,330 INFO L85 PathProgramCache]: Analyzing trace with hash -506878313, now seen corresponding path program 23 times [2024-05-04 04:14:43,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:43,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:43,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:43,361 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-04 04:14:43,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:43,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:43,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:43,391 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-04 04:14:43,559 INFO L85 PathProgramCache]: Analyzing trace with hash -1540371574, now seen corresponding path program 24 times [2024-05-04 04:14:43,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:43,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:43,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:43,608 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:14:43,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:43,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:43,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:43,634 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:14:43,771 INFO L85 PathProgramCache]: Analyzing trace with hash -1376730669, now seen corresponding path program 25 times [2024-05-04 04:14:43,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:43,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:43,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:43,797 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-05-04 04:14:43,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:43,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:43,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:43,826 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-05-04 04:14:43,972 INFO L85 PathProgramCache]: Analyzing trace with hash -44410674, now seen corresponding path program 26 times [2024-05-04 04:14:43,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:43,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:43,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:44,004 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-05-04 04:14:44,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:44,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:44,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:44,029 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-05-04 04:14:44,194 INFO L85 PathProgramCache]: Analyzing trace with hash -1661175385, now seen corresponding path program 27 times [2024-05-04 04:14:44,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:44,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:44,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:44,198 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:44,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:44,472 INFO L85 PathProgramCache]: Analyzing trace with hash -1921066525, now seen corresponding path program 28 times [2024-05-04 04:14:44,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:44,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:44,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:44,476 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:44,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:44,697 INFO L85 PathProgramCache]: Analyzing trace with hash -280711150, now seen corresponding path program 29 times [2024-05-04 04:14:44,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:44,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:44,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:44,705 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:44,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:45,000 INFO L85 PathProgramCache]: Analyzing trace with hash 1184955854, now seen corresponding path program 30 times [2024-05-04 04:14:45,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:45,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:45,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:45,005 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:45,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:47,711 INFO L85 PathProgramCache]: Analyzing trace with hash 1127834236, now seen corresponding path program 31 times [2024-05-04 04:14:47,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:47,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:47,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:47,716 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:47,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:47,992 INFO L85 PathProgramCache]: Analyzing trace with hash -459361480, now seen corresponding path program 32 times [2024-05-04 04:14:47,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:47,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:47,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:47,997 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:47,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:48,149 INFO L85 PathProgramCache]: Analyzing trace with hash -841055339, now seen corresponding path program 33 times [2024-05-04 04:14:48,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:48,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:48,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:48,153 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:48,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:48,348 INFO L85 PathProgramCache]: Analyzing trace with hash 816466129, now seen corresponding path program 34 times [2024-05-04 04:14:48,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:48,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:48,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:48,352 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:48,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:49,717 INFO L85 PathProgramCache]: Analyzing trace with hash 935463949, now seen corresponding path program 35 times [2024-05-04 04:14:49,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:49,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:49,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:49,722 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:49,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:49,914 INFO L85 PathProgramCache]: Analyzing trace with hash -400701575, now seen corresponding path program 1 times [2024-05-04 04:14:49,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:49,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:49,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:49,945 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-05-04 04:14:49,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:49,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:49,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:49,964 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-05-04 04:14:50,154 INFO L85 PathProgramCache]: Analyzing trace with hash 818358121, now seen corresponding path program 1 times [2024-05-04 04:14:50,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:50,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:50,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:50,174 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-05-04 04:14:50,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:50,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:50,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:50,192 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-05-04 04:14:50,382 INFO L85 PathProgramCache]: Analyzing trace with hash -1636169329, now seen corresponding path program 1 times [2024-05-04 04:14:50,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:50,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:50,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:50,411 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-05-04 04:14:50,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:50,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:50,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:50,446 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-05-04 04:14:50,686 INFO L85 PathProgramCache]: Analyzing trace with hash 818359113, now seen corresponding path program 36 times [2024-05-04 04:14:50,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:50,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:50,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:50,710 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-04 04:14:50,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:50,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:50,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:50,730 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-04 04:14:50,896 INFO L85 PathProgramCache]: Analyzing trace with hash 383176125, now seen corresponding path program 2 times [2024-05-04 04:14:50,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:50,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:50,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:50,933 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-05-04 04:14:50,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:50,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:50,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:50,955 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-05-04 04:14:51,152 INFO L85 PathProgramCache]: Analyzing trace with hash -680376155, now seen corresponding path program 2 times [2024-05-04 04:14:51,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:51,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:51,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:51,174 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-05-04 04:14:51,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:51,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:51,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:51,194 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-05-04 04:14:51,356 INFO L85 PathProgramCache]: Analyzing trace with hash 1502073043, now seen corresponding path program 2 times [2024-05-04 04:14:51,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:51,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:51,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:51,376 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-05-04 04:14:51,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:51,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:51,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:51,395 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-05-04 04:14:51,634 INFO L85 PathProgramCache]: Analyzing trace with hash 1502073074, now seen corresponding path program 37 times [2024-05-04 04:14:51,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:51,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:51,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:51,653 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-05-04 04:14:51,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:51,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:51,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:51,672 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-05-04 04:14:51,820 INFO L85 PathProgramCache]: Analyzing trace with hash 464095975, now seen corresponding path program 38 times [2024-05-04 04:14:51,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:51,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:51,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:51,851 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-05-04 04:14:51,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:51,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:51,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:51,873 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-05-04 04:14:52,203 INFO L85 PathProgramCache]: Analyzing trace with hash -1636169298, now seen corresponding path program 39 times [2024-05-04 04:14:52,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:52,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:52,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:52,245 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-05-04 04:14:52,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:52,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:52,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:52,290 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-05-04 04:14:52,464 INFO L85 PathProgramCache]: Analyzing trace with hash 1332693675, now seen corresponding path program 40 times [2024-05-04 04:14:52,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:52,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:52,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:52,483 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-05-04 04:14:52,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:52,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:52,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:52,502 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-05-04 04:14:53,562 INFO L85 PathProgramCache]: Analyzing trace with hash -1462547102, now seen corresponding path program 41 times [2024-05-04 04:14:53,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:53,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:53,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:53,566 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:53,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:53,817 INFO L85 PathProgramCache]: Analyzing trace with hash -939654882, now seen corresponding path program 42 times [2024-05-04 04:14:53,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:53,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:53,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:53,821 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:53,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:53,948 INFO L85 PathProgramCache]: Analyzing trace with hash 1569235951, now seen corresponding path program 43 times [2024-05-04 04:14:53,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:53,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:53,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:53,952 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:53,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:54,253 INFO L85 PathProgramCache]: Analyzing trace with hash -1831426517, now seen corresponding path program 44 times [2024-05-04 04:14:54,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:54,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:54,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:54,256 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:54,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:56,236 INFO L85 PathProgramCache]: Analyzing trace with hash -923264067, now seen corresponding path program 45 times [2024-05-04 04:14:56,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:56,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:56,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:56,240 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:56,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:56,413 INFO L85 PathProgramCache]: Analyzing trace with hash 23475449, now seen corresponding path program 46 times [2024-05-04 04:14:56,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:56,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:56,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:56,417 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:56,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:56,595 INFO L85 PathProgramCache]: Analyzing trace with hash -491577804, now seen corresponding path program 47 times [2024-05-04 04:14:56,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:56,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:56,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:56,598 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:56,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:56,812 INFO L85 PathProgramCache]: Analyzing trace with hash -1107621136, now seen corresponding path program 48 times [2024-05-04 04:14:56,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:56,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:56,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:56,816 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:56,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:57,117 INFO L85 PathProgramCache]: Analyzing trace with hash -724650580, now seen corresponding path program 49 times [2024-05-04 04:14:57,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:57,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:57,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:57,120 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:57,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:57,251 INFO L85 PathProgramCache]: Analyzing trace with hash 82135354, now seen corresponding path program 3 times [2024-05-04 04:14:57,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:57,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:57,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:57,272 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-04 04:14:57,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:57,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:57,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:57,290 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-04 04:14:57,445 INFO L85 PathProgramCache]: Analyzing trace with hash -1105729144, now seen corresponding path program 3 times [2024-05-04 04:14:57,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:57,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:57,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:57,462 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-04 04:14:57,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:57,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:57,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:57,485 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-04 04:14:57,614 INFO L85 PathProgramCache]: Analyzing trace with hash -1559689328, now seen corresponding path program 3 times [2024-05-04 04:14:57,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:57,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:57,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:57,648 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-04 04:14:57,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:57,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:57,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:57,665 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-04 04:14:57,785 INFO L85 PathProgramCache]: Analyzing trace with hash -1105728152, now seen corresponding path program 50 times [2024-05-04 04:14:57,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:57,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:57,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:57,802 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-04 04:14:57,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:57,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:57,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:57,820 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-04 04:14:57,940 INFO L85 PathProgramCache]: Analyzing trace with hash -1667922178, now seen corresponding path program 4 times [2024-05-04 04:14:57,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:57,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:57,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:57,958 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-04 04:14:57,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:57,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:57,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:57,980 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-04 04:14:58,096 INFO L85 PathProgramCache]: Analyzing trace with hash -330898620, now seen corresponding path program 4 times [2024-05-04 04:14:58,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:58,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:58,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:58,122 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-04 04:14:58,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:58,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:58,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:58,182 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-04 04:14:58,342 INFO L85 PathProgramCache]: Analyzing trace with hash 1651893844, now seen corresponding path program 4 times [2024-05-04 04:14:58,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:58,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:58,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:58,377 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-04 04:14:58,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:58,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:58,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:58,412 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-04 04:14:58,602 INFO L85 PathProgramCache]: Analyzing trace with hash 1651893875, now seen corresponding path program 51 times [2024-05-04 04:14:58,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:58,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:58,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:58,630 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-05-04 04:14:58,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:58,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:58,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:58,649 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-05-04 04:14:58,813 INFO L85 PathProgramCache]: Analyzing trace with hash -1747828410, now seen corresponding path program 52 times [2024-05-04 04:14:58,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:58,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:58,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:58,832 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-04 04:14:58,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:58,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:58,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:58,863 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 10 proven. 9 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-04 04:14:59,042 INFO L85 PathProgramCache]: Analyzing trace with hash -1559689297, now seen corresponding path program 53 times [2024-05-04 04:14:59,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:59,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:59,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:59,061 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-04 04:14:59,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:59,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:59,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:59,093 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-04 04:14:59,247 INFO L85 PathProgramCache]: Analyzing trace with hash -604501878, now seen corresponding path program 54 times [2024-05-04 04:14:59,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:59,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:59,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:59,267 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-04 04:14:59,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:59,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:59,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:14:59,290 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 9 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-04 04:14:59,417 INFO L85 PathProgramCache]: Analyzing trace with hash -1386067101, now seen corresponding path program 55 times [2024-05-04 04:14:59,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:59,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:59,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:59,423 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:59,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:59,677 INFO L85 PathProgramCache]: Analyzing trace with hash 1777739679, now seen corresponding path program 56 times [2024-05-04 04:14:59,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:59,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:59,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:59,681 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:59,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:59,874 INFO L85 PathProgramCache]: Analyzing trace with hash -367959602, now seen corresponding path program 57 times [2024-05-04 04:14:59,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:14:59,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:14:59,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:14:59,878 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:14:59,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:00,230 INFO L85 PathProgramCache]: Analyzing trace with hash 334441354, now seen corresponding path program 58 times [2024-05-04 04:15:00,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:00,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:00,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:00,235 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:00,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:03,765 INFO L85 PathProgramCache]: Analyzing trace with hash 649436216, now seen corresponding path program 59 times [2024-05-04 04:15:03,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:03,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:03,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:03,770 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:03,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:04,070 INFO L85 PathProgramCache]: Analyzing trace with hash 1208610036, now seen corresponding path program 60 times [2024-05-04 04:15:04,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:04,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:04,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:04,080 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:04,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:04,278 INFO L85 PathProgramCache]: Analyzing trace with hash 763656033, now seen corresponding path program 61 times [2024-05-04 04:15:04,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:04,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:04,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:04,298 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:04,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:04,600 INFO L85 PathProgramCache]: Analyzing trace with hash -238107491, now seen corresponding path program 62 times [2024-05-04 04:15:04,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:04,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:04,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:04,606 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:04,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:06,257 INFO L85 PathProgramCache]: Analyzing trace with hash -1360457767, now seen corresponding path program 63 times [2024-05-04 04:15:06,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:06,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:06,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:06,261 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:06,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:06,518 INFO L85 PathProgramCache]: Analyzing trace with hash -236198635, now seen corresponding path program 64 times [2024-05-04 04:15:06,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:06,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:06,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:06,553 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-04 04:15:06,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:06,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:06,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:06,580 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-04 04:15:06,774 INFO L85 PathProgramCache]: Analyzing trace with hash -1597392783, now seen corresponding path program 3 times [2024-05-04 04:15:06,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:06,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:06,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:06,797 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:15:06,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:06,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:06,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:06,821 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:15:07,000 INFO L85 PathProgramCache]: Analyzing trace with hash -1437002129, now seen corresponding path program 3 times [2024-05-04 04:15:07,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:07,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:07,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:07,026 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:15:07,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:07,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:07,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:07,049 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:15:07,316 INFO L85 PathProgramCache]: Analyzing trace with hash -1437002098, now seen corresponding path program 65 times [2024-05-04 04:15:07,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:07,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:07,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:07,384 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-04 04:15:07,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:07,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:07,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:07,404 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-04 04:15:07,573 INFO L85 PathProgramCache]: Analyzing trace with hash 646381747, now seen corresponding path program 66 times [2024-05-04 04:15:07,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:07,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:07,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:07,593 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:15:07,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:07,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:07,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:07,614 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:15:07,941 INFO L85 PathProgramCache]: Analyzing trace with hash -2085829302, now seen corresponding path program 67 times [2024-05-04 04:15:07,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:07,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:07,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:07,965 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-04 04:15:07,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:07,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:07,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:07,985 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-04 04:15:08,179 INFO L85 PathProgramCache]: Analyzing trace with hash -1729852809, now seen corresponding path program 68 times [2024-05-04 04:15:08,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:08,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:08,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:08,195 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-04 04:15:08,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:08,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:08,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:08,210 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-04 04:15:09,345 INFO L85 PathProgramCache]: Analyzing trace with hash 1924693278, now seen corresponding path program 69 times [2024-05-04 04:15:09,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:09,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:09,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:09,348 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:09,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:09,750 INFO L85 PathProgramCache]: Analyzing trace with hash 1757229274, now seen corresponding path program 70 times [2024-05-04 04:15:09,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:09,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:09,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:09,753 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:09,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:09,974 INFO L85 PathProgramCache]: Analyzing trace with hash -1966153285, now seen corresponding path program 71 times [2024-05-04 04:15:09,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:09,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:09,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:09,977 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:09,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:10,422 INFO L85 PathProgramCache]: Analyzing trace with hash -1051694089, now seen corresponding path program 72 times [2024-05-04 04:15:10,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:10,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:10,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:10,425 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:10,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:13,602 INFO L85 PathProgramCache]: Analyzing trace with hash 105455497, now seen corresponding path program 73 times [2024-05-04 04:15:13,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:13,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:13,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:13,606 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:13,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:13,912 INFO L85 PathProgramCache]: Analyzing trace with hash -801259323, now seen corresponding path program 74 times [2024-05-04 04:15:13,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:13,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:13,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:13,915 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:13,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:14,105 INFO L85 PathProgramCache]: Analyzing trace with hash 884655600, now seen corresponding path program 75 times [2024-05-04 04:15:14,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:14,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:14,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:14,109 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:14,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:14,402 INFO L85 PathProgramCache]: Analyzing trace with hash -1965509972, now seen corresponding path program 76 times [2024-05-04 04:15:14,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:14,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:14,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:14,405 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:14,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:14,858 INFO L85 PathProgramCache]: Analyzing trace with hash -142451352, now seen corresponding path program 77 times [2024-05-04 04:15:14,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:14,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:14,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:14,861 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:14,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:15,050 INFO L85 PathProgramCache]: Analyzing trace with hash -1963601116, now seen corresponding path program 78 times [2024-05-04 04:15:15,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:15,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:15,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:15,066 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-04 04:15:15,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:15,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:15,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:15,082 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-04 04:15:15,231 INFO L85 PathProgramCache]: Analyzing trace with hash -1476393216, now seen corresponding path program 4 times [2024-05-04 04:15:15,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:15,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:15,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:15,249 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-04 04:15:15,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:15,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:15,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:15,272 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-04 04:15:15,424 INFO L85 PathProgramCache]: Analyzing trace with hash -186172928, now seen corresponding path program 4 times [2024-05-04 04:15:15,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:15,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:15,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:15,442 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-04 04:15:15,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:15,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:15,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:15,459 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-04 04:15:15,710 INFO L85 PathProgramCache]: Analyzing trace with hash -186172897, now seen corresponding path program 79 times [2024-05-04 04:15:15,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:15,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:15,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:15,726 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:15:15,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:15,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:15,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:15,743 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:15:15,907 INFO L85 PathProgramCache]: Analyzing trace with hash -1530026238, now seen corresponding path program 80 times [2024-05-04 04:15:15,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:15,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:15,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:15,923 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-04 04:15:15,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:15,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:15,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:15,940 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-04 04:15:16,099 INFO L85 PathProgramCache]: Analyzing trace with hash -340436645, now seen corresponding path program 81 times [2024-05-04 04:15:16,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:16,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:16,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:16,118 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-04 04:15:16,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:16,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:16,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:16,149 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-04 04:15:16,355 INFO L85 PathProgramCache]: Analyzing trace with hash 543207494, now seen corresponding path program 82 times [2024-05-04 04:15:16,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:16,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:16,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:16,371 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-04 04:15:16,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:16,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:16,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:16,387 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-04 04:15:16,607 INFO L85 PathProgramCache]: Analyzing trace with hash -624881361, now seen corresponding path program 83 times [2024-05-04 04:15:16,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:16,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:16,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:16,610 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:16,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:16,936 INFO L85 PathProgramCache]: Analyzing trace with hash 1242330475, now seen corresponding path program 84 times [2024-05-04 04:15:16,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:16,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:16,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:16,939 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:16,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:17,101 INFO L85 PathProgramCache]: Analyzing trace with hash 306907018, now seen corresponding path program 85 times [2024-05-04 04:15:17,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:17,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:17,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:17,104 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:17,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:17,523 INFO L85 PathProgramCache]: Analyzing trace with hash 732811590, now seen corresponding path program 86 times [2024-05-04 04:15:17,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:17,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:17,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:17,526 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:17,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:20,369 INFO L85 PathProgramCache]: Analyzing trace with hash 1138179572, now seen corresponding path program 87 times [2024-05-04 04:15:20,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:20,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:20,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:20,372 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:20,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:20,718 INFO L85 PathProgramCache]: Analyzing trace with hash 128256688, now seen corresponding path program 88 times [2024-05-04 04:15:20,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:20,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:20,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:20,721 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:20,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:20,928 INFO L85 PathProgramCache]: Analyzing trace with hash -1394910947, now seen corresponding path program 89 times [2024-05-04 04:15:20,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:20,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:20,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:20,932 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:20,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:21,152 INFO L85 PathProgramCache]: Analyzing trace with hash 4137561, now seen corresponding path program 90 times [2024-05-04 04:15:21,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:21,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:21,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:21,155 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:21,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:22,395 INFO L85 PathProgramCache]: Analyzing trace with hash -326047339, now seen corresponding path program 91 times [2024-05-04 04:15:22,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:22,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:22,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:22,398 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:22,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:22,624 INFO L85 PathProgramCache]: Analyzing trace with hash 186916593, now seen corresponding path program 5 times [2024-05-04 04:15:22,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:22,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:22,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:22,636 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:22,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:22,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:22,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:22,648 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:22,870 INFO L85 PathProgramCache]: Analyzing trace with hash 6029553, now seen corresponding path program 5 times [2024-05-04 04:15:22,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:22,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:22,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:22,882 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:22,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:22,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:22,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:22,895 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:23,106 INFO L85 PathProgramCache]: Analyzing trace with hash 1939857159, now seen corresponding path program 5 times [2024-05-04 04:15:23,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:23,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:23,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:23,132 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:23,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:23,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:23,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:23,148 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:23,502 INFO L85 PathProgramCache]: Analyzing trace with hash 6030545, now seen corresponding path program 92 times [2024-05-04 04:15:23,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:23,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:23,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:23,516 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-04 04:15:23,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:23,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:23,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:23,529 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-04 04:15:23,708 INFO L85 PathProgramCache]: Analyzing trace with hash 393521461, now seen corresponding path program 6 times [2024-05-04 04:15:23,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:23,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:23,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:23,721 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-04 04:15:23,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:23,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:23,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:23,739 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-04 04:15:23,914 INFO L85 PathProgramCache]: Analyzing trace with hash -1234231763, now seen corresponding path program 6 times [2024-05-04 04:15:23,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:23,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:23,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:23,928 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-04 04:15:23,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:23,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:23,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:23,943 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-04 04:15:24,107 INFO L85 PathProgramCache]: Analyzing trace with hash -732550581, now seen corresponding path program 6 times [2024-05-04 04:15:24,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:24,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:24,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:24,121 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-04 04:15:24,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:24,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:24,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:24,134 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-04 04:15:24,409 INFO L85 PathProgramCache]: Analyzing trace with hash -732550550, now seen corresponding path program 93 times [2024-05-04 04:15:24,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:24,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:24,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:24,426 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-04 04:15:24,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:24,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:24,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:24,438 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-04 04:15:24,603 INFO L85 PathProgramCache]: Analyzing trace with hash 1500389999, now seen corresponding path program 94 times [2024-05-04 04:15:24,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:24,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:24,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:24,634 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-04 04:15:24,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:24,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:24,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:24,646 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-04 04:15:24,940 INFO L85 PathProgramCache]: Analyzing trace with hash 1939857190, now seen corresponding path program 95 times [2024-05-04 04:15:24,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:24,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:24,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:24,952 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:24,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:24,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:24,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:24,964 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:25,121 INFO L85 PathProgramCache]: Analyzing trace with hash 201123379, now seen corresponding path program 96 times [2024-05-04 04:15:25,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:25,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:25,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:25,134 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:25,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:25,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:25,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:25,148 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:26,011 INFO L85 PathProgramCache]: Analyzing trace with hash 2113479386, now seen corresponding path program 97 times [2024-05-04 04:15:26,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:26,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:26,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:26,014 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:26,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:26,258 INFO L85 PathProgramCache]: Analyzing trace with hash -426159466, now seen corresponding path program 98 times [2024-05-04 04:15:26,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:26,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:26,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:26,261 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:26,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:26,394 INFO L85 PathProgramCache]: Analyzing trace with hash 437665655, now seen corresponding path program 99 times [2024-05-04 04:15:26,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:26,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:26,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:26,397 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:26,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:26,648 INFO L85 PathProgramCache]: Analyzing trace with hash -2091956813, now seen corresponding path program 100 times [2024-05-04 04:15:26,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:26,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:26,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:26,651 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:26,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:28,734 INFO L85 PathProgramCache]: Analyzing trace with hash -1477119675, now seen corresponding path program 101 times [2024-05-04 04:15:28,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:28,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:28,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:28,737 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:28,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:28,953 INFO L85 PathProgramCache]: Analyzing trace with hash -788853119, now seen corresponding path program 102 times [2024-05-04 04:15:28,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:28,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:28,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:28,956 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:28,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:29,110 INFO L85 PathProgramCache]: Analyzing trace with hash 1568765868, now seen corresponding path program 103 times [2024-05-04 04:15:29,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:29,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:29,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:29,113 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:29,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:29,391 INFO L85 PathProgramCache]: Analyzing trace with hash -1826561944, now seen corresponding path program 104 times [2024-05-04 04:15:29,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:29,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:29,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:29,394 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:29,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:29,829 INFO L85 PathProgramCache]: Analyzing trace with hash -211155164, now seen corresponding path program 105 times [2024-05-04 04:15:29,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:29,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:29,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:29,832 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:29,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:30,050 INFO L85 PathProgramCache]: Analyzing trace with hash -730193214, now seen corresponding path program 7 times [2024-05-04 04:15:30,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:30,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:30,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:30,066 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:30,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:30,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:30,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:30,079 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:30,296 INFO L85 PathProgramCache]: Analyzing trace with hash -1824669952, now seen corresponding path program 7 times [2024-05-04 04:15:30,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:30,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:30,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:30,308 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:30,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:30,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:30,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:30,321 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:30,531 INFO L85 PathProgramCache]: Analyzing trace with hash 1603707672, now seen corresponding path program 7 times [2024-05-04 04:15:30,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:30,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:30,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:30,543 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:30,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:30,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:30,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:30,556 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:30,778 INFO L85 PathProgramCache]: Analyzing trace with hash -1824668960, now seen corresponding path program 106 times [2024-05-04 04:15:30,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:30,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:30,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:30,790 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:30,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:30,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:30,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:30,801 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:30,971 INFO L85 PathProgramCache]: Analyzing trace with hash 2073189510, now seen corresponding path program 8 times [2024-05-04 04:15:30,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:30,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:30,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:30,984 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:30,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:30,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:30,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:30,996 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:31,169 INFO L85 PathProgramCache]: Analyzing trace with hash 1729445052, now seen corresponding path program 8 times [2024-05-04 04:15:31,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:31,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:31,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:31,181 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:31,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:31,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:31,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:31,194 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:31,363 INFO L85 PathProgramCache]: Analyzing trace with hash -1606779428, now seen corresponding path program 8 times [2024-05-04 04:15:31,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:31,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:31,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:31,376 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:31,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:31,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:31,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:31,388 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:31,580 INFO L85 PathProgramCache]: Analyzing trace with hash -1606779397, now seen corresponding path program 107 times [2024-05-04 04:15:31,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:31,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:31,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:31,593 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-04 04:15:31,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:31,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:31,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:31,606 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-04 04:15:31,776 INFO L85 PathProgramCache]: Analyzing trace with hash -1160210242, now seen corresponding path program 108 times [2024-05-04 04:15:31,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:31,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:31,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:31,796 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:31,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:31,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:31,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:31,808 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:31,955 INFO L85 PathProgramCache]: Analyzing trace with hash 1603707703, now seen corresponding path program 109 times [2024-05-04 04:15:31,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:31,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:31,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:31,966 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:31,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:31,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:31,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:31,978 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:32,126 INFO L85 PathProgramCache]: Analyzing trace with hash -1056646142, now seen corresponding path program 110 times [2024-05-04 04:15:32,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:32,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:32,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:32,143 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:32,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:32,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:32,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:32,154 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:32,309 INFO L85 PathProgramCache]: Analyzing trace with hash 1777329899, now seen corresponding path program 111 times [2024-05-04 04:15:32,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:32,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:32,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:32,312 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:32,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:32,586 INFO L85 PathProgramCache]: Analyzing trace with hash 1517209383, now seen corresponding path program 112 times [2024-05-04 04:15:32,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:32,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:32,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:32,589 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:32,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:32,748 INFO L85 PathProgramCache]: Analyzing trace with hash -820103866, now seen corresponding path program 113 times [2024-05-04 04:15:32,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:32,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:32,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:32,751 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:32,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:33,095 INFO L85 PathProgramCache]: Analyzing trace with hash -643794174, now seen corresponding path program 114 times [2024-05-04 04:15:33,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:33,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:33,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:33,097 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:33,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:36,152 INFO L85 PathProgramCache]: Analyzing trace with hash 1237054384, now seen corresponding path program 1 times [2024-05-04 04:15:36,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:36,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:36,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:36,156 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:36,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:36,337 INFO L85 PathProgramCache]: Analyzing trace with hash 756465772, now seen corresponding path program 2 times [2024-05-04 04:15:36,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:36,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:36,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:36,339 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:36,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:36,463 INFO L85 PathProgramCache]: Analyzing trace with hash -48672535, now seen corresponding path program 3 times [2024-05-04 04:15:36,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:36,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:36,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:36,466 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:36,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:36,723 INFO L85 PathProgramCache]: Analyzing trace with hash -1499618779, now seen corresponding path program 4 times [2024-05-04 04:15:36,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:36,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:36,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:36,725 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:36,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:37,735 INFO L85 PathProgramCache]: Analyzing trace with hash -560729759, now seen corresponding path program 5 times [2024-05-04 04:15:37,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:37,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:37,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:37,738 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:37,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:37,951 INFO L85 PathProgramCache]: Analyzing trace with hash -1497709923, now seen corresponding path program 6 times [2024-05-04 04:15:37,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:37,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:37,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:37,961 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:15:37,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:37,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:37,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:37,971 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:15:38,082 INFO L85 PathProgramCache]: Analyzing trace with hash 1885245945, now seen corresponding path program 1 times [2024-05-04 04:15:38,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:38,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:38,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:38,100 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:15:38,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:38,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:38,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:38,111 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:15:38,215 INFO L85 PathProgramCache]: Analyzing trace with hash 2139024359, now seen corresponding path program 1 times [2024-05-04 04:15:38,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:38,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:38,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:38,225 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:15:38,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:38,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:38,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:38,236 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:15:38,411 INFO L85 PathProgramCache]: Analyzing trace with hash 2139024390, now seen corresponding path program 7 times [2024-05-04 04:15:38,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:38,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:38,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:38,423 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:15:38,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:38,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:38,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:38,437 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:15:38,566 INFO L85 PathProgramCache]: Analyzing trace with hash -485188549, now seen corresponding path program 8 times [2024-05-04 04:15:38,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:38,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:38,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:38,580 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:15:38,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:38,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:38,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:38,592 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:15:38,931 INFO L85 PathProgramCache]: Analyzing trace with hash -1572333886, now seen corresponding path program 9 times [2024-05-04 04:15:38,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:38,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:38,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:38,971 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:15:38,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:38,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:38,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:39,001 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:15:39,209 INFO L85 PathProgramCache]: Analyzing trace with hash -1990383105, now seen corresponding path program 10 times [2024-05-04 04:15:39,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:39,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:39,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:39,228 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:15:39,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:39,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:39,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:39,238 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:15:40,373 INFO L85 PathProgramCache]: Analyzing trace with hash -1856778602, now seen corresponding path program 11 times [2024-05-04 04:15:40,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:40,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:40,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:40,375 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:40,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:40,574 INFO L85 PathProgramCache]: Analyzing trace with hash -1952805388, now seen corresponding path program 12 times [2024-05-04 04:15:40,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:40,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:40,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:40,588 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:15:40,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:40,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:40,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:40,602 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:15:41,108 INFO L85 PathProgramCache]: Analyzing trace with hash -18088366, now seen corresponding path program 13 times [2024-05-04 04:15:41,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:41,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:41,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:41,112 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:41,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:41,324 INFO L85 PathProgramCache]: Analyzing trace with hash -203047248, now seen corresponding path program 14 times [2024-05-04 04:15:41,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:41,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:41,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:41,334 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:15:41,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:41,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:41,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:41,345 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:15:41,509 INFO L85 PathProgramCache]: Analyzing trace with hash 2068283715, now seen corresponding path program 15 times [2024-05-04 04:15:41,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:41,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:41,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:41,512 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:41,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:41,674 INFO L85 PathProgramCache]: Analyzing trace with hash -949204639, now seen corresponding path program 16 times [2024-05-04 04:15:41,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:41,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:41,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:41,692 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:15:41,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:41,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:41,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:41,723 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:15:42,165 INFO L85 PathProgramCache]: Analyzing trace with hash 2077626239, now seen corresponding path program 17 times [2024-05-04 04:15:42,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:42,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:42,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:42,170 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:42,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:42,343 INFO L85 PathProgramCache]: Analyzing trace with hash -560973667, now seen corresponding path program 18 times [2024-05-04 04:15:42,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:42,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:42,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:42,362 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:15:42,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:42,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:42,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:42,372 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:15:45,445 INFO L85 PathProgramCache]: Analyzing trace with hash -706873071, now seen corresponding path program 1 times [2024-05-04 04:15:45,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:45,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:45,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:45,448 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:45,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:45,646 INFO L85 PathProgramCache]: Analyzing trace with hash -2062770611, now seen corresponding path program 2 times [2024-05-04 04:15:45,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:45,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:45,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:45,649 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:45,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:45,790 INFO L85 PathProgramCache]: Analyzing trace with hash 165714792, now seen corresponding path program 3 times [2024-05-04 04:15:45,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:45,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:45,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:45,793 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:45,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:45,996 INFO L85 PathProgramCache]: Analyzing trace with hash -1452014556, now seen corresponding path program 4 times [2024-05-04 04:15:45,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:45,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:45,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:45,999 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:46,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:46,320 INFO L85 PathProgramCache]: Analyzing trace with hash -1917768992, now seen corresponding path program 5 times [2024-05-04 04:15:46,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:46,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:46,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:46,323 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:46,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:46,444 INFO L85 PathProgramCache]: Analyzing trace with hash -1450105700, now seen corresponding path program 6 times [2024-05-04 04:15:46,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:46,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:46,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:46,458 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:15:46,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:46,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:46,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:46,478 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:15:46,604 INFO L85 PathProgramCache]: Analyzing trace with hash 2099633272, now seen corresponding path program 1 times [2024-05-04 04:15:46,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:46,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:46,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:46,615 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:15:46,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:46,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:46,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:46,626 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:15:46,804 INFO L85 PathProgramCache]: Analyzing trace with hash -1317743224, now seen corresponding path program 1 times [2024-05-04 04:15:46,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:46,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:46,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:46,839 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:15:46,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:46,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:46,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:46,849 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:15:46,979 INFO L85 PathProgramCache]: Analyzing trace with hash -1317743193, now seen corresponding path program 7 times [2024-05-04 04:15:46,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:46,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:46,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:46,990 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:15:46,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:46,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:46,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:47,019 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:15:47,145 INFO L85 PathProgramCache]: Analyzing trace with hash -1982170502, now seen corresponding path program 8 times [2024-05-04 04:15:47,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:47,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:47,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:47,155 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:15:47,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:47,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:47,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:47,180 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:15:47,373 INFO L85 PathProgramCache]: Analyzing trace with hash -600966941, now seen corresponding path program 9 times [2024-05-04 04:15:47,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:47,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:47,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:47,384 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:15:47,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:47,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:47,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:47,394 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:15:47,571 INFO L85 PathProgramCache]: Analyzing trace with hash -435028034, now seen corresponding path program 10 times [2024-05-04 04:15:47,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:47,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:47,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:47,582 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:15:47,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:47,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:47,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:47,593 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:15:47,814 INFO L85 PathProgramCache]: Analyzing trace with hash -885411657, now seen corresponding path program 11 times [2024-05-04 04:15:47,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:47,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:47,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:47,816 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:47,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:48,017 INFO L85 PathProgramCache]: Analyzing trace with hash -477074475, now seen corresponding path program 12 times [2024-05-04 04:15:48,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:48,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:48,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:48,030 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:15:48,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:48,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:48,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:48,043 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:15:48,538 INFO L85 PathProgramCache]: Analyzing trace with hash 76683507, now seen corresponding path program 13 times [2024-05-04 04:15:48,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:48,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:48,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:48,540 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:48,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:48,753 INFO L85 PathProgramCache]: Analyzing trace with hash 678409489, now seen corresponding path program 14 times [2024-05-04 04:15:48,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:48,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:48,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:48,764 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:15:48,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:48,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:48,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:48,774 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:15:48,988 INFO L85 PathProgramCache]: Analyzing trace with hash -671328510, now seen corresponding path program 15 times [2024-05-04 04:15:48,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:48,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:48,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:48,991 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:48,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:49,184 INFO L85 PathProgramCache]: Analyzing trace with hash -901600416, now seen corresponding path program 16 times [2024-05-04 04:15:49,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:49,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:49,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:49,197 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:15:49,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:49,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:49,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:49,211 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:15:49,830 INFO L85 PathProgramCache]: Analyzing trace with hash -274621250, now seen corresponding path program 17 times [2024-05-04 04:15:49,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:49,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:49,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:49,832 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:49,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:50,036 INFO L85 PathProgramCache]: Analyzing trace with hash -1918012900, now seen corresponding path program 18 times [2024-05-04 04:15:50,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:50,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:50,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:50,046 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:15:50,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:50,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:50,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:50,055 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:15:53,945 INFO L85 PathProgramCache]: Analyzing trace with hash -579546045, now seen corresponding path program 1 times [2024-05-04 04:15:53,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:53,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:53,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:53,948 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:53,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:54,146 INFO L85 PathProgramCache]: Analyzing trace with hash -1492274941, now seen corresponding path program 1 times [2024-05-04 04:15:54,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:54,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:54,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:54,158 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:54,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:54,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:54,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:54,168 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:54,354 INFO L85 PathProgramCache]: Analyzing trace with hash -1295063905, now seen corresponding path program 1 times [2024-05-04 04:15:54,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:54,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:54,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:54,365 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:54,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:54,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:54,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:54,376 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:54,567 INFO L85 PathProgramCache]: Analyzing trace with hash 512413081, now seen corresponding path program 1 times [2024-05-04 04:15:54,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:54,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:54,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:54,577 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:54,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:54,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:54,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:54,588 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:54,805 INFO L85 PathProgramCache]: Analyzing trace with hash -1295062913, now seen corresponding path program 2 times [2024-05-04 04:15:54,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:54,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:54,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:54,818 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:54,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:54,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:54,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:54,830 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:15:54,985 INFO L85 PathProgramCache]: Analyzing trace with hash -1589452217, now seen corresponding path program 2 times [2024-05-04 04:15:54,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:54,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:54,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:54,999 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:54,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:54,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:55,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:55,011 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:55,174 INFO L85 PathProgramCache]: Analyzing trace with hash 1749842651, now seen corresponding path program 2 times [2024-05-04 04:15:55,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:55,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:55,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:55,194 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:55,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:55,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:55,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:55,204 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:55,308 INFO L85 PathProgramCache]: Analyzing trace with hash 472088541, now seen corresponding path program 2 times [2024-05-04 04:15:55,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:55,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:55,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:55,318 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:55,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:55,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:55,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:55,346 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:55,512 INFO L85 PathProgramCache]: Analyzing trace with hash 472088572, now seen corresponding path program 3 times [2024-05-04 04:15:55,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:55,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:55,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:55,525 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-04 04:15:55,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:55,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:55,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:55,535 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-04 04:15:55,639 INFO L85 PathProgramCache]: Analyzing trace with hash 985059997, now seen corresponding path program 4 times [2024-05-04 04:15:55,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:55,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:55,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:55,655 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:55,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:55,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:55,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:55,666 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:15:55,875 INFO L85 PathProgramCache]: Analyzing trace with hash 512413112, now seen corresponding path program 5 times [2024-05-04 04:15:55,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:55,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:55,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:55,956 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:55,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:55,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:55,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:55,977 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:56,122 INFO L85 PathProgramCache]: Analyzing trace with hash 1402002785, now seen corresponding path program 6 times [2024-05-04 04:15:56,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:56,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:56,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:56,134 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:56,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:56,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:56,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:56,144 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:15:57,014 INFO L85 PathProgramCache]: Analyzing trace with hash 686035308, now seen corresponding path program 7 times [2024-05-04 04:15:57,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:57,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:57,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:57,017 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:57,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:57,224 INFO L85 PathProgramCache]: Analyzing trace with hash -849978840, now seen corresponding path program 8 times [2024-05-04 04:15:57,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:57,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:57,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:57,227 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:57,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:57,382 INFO L85 PathProgramCache]: Analyzing trace with hash 1638545061, now seen corresponding path program 9 times [2024-05-04 04:15:57,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:57,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:57,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:57,385 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:57,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:57,574 INFO L85 PathProgramCache]: Analyzing trace with hash 803865569, now seen corresponding path program 10 times [2024-05-04 04:15:57,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:57,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:57,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:57,576 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:57,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:58,484 INFO L85 PathProgramCache]: Analyzing trace with hash 1304022813, now seen corresponding path program 11 times [2024-05-04 04:15:58,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:58,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:58,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:58,486 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:15:58,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:15:58,690 INFO L85 PathProgramCache]: Analyzing trace with hash -791318935, now seen corresponding path program 3 times [2024-05-04 04:15:58,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:58,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:58,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:58,697 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:15:58,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:15:58,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:15:58,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:15:58,703 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:15:58,703 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-04 04:15:58,703 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2024-05-04 04:16:00,375 INFO L85 PathProgramCache]: Analyzing trace with hash -1478345536, now seen corresponding path program 115 times [2024-05-04 04:16:00,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:00,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:00,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:00,380 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:00,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:00,559 INFO L85 PathProgramCache]: Analyzing trace with hash 1198264700, now seen corresponding path program 116 times [2024-05-04 04:16:00,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:00,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:00,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:00,562 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:00,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:00,682 INFO L85 PathProgramCache]: Analyzing trace with hash 1803396569, now seen corresponding path program 117 times [2024-05-04 04:16:00,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:00,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:00,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:00,686 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:00,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:00,945 INFO L85 PathProgramCache]: Analyzing trace with hash 315748117, now seen corresponding path program 118 times [2024-05-04 04:16:00,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:00,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:00,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:00,948 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:00,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:02,126 INFO L85 PathProgramCache]: Analyzing trace with hash -548129199, now seen corresponding path program 119 times [2024-05-04 04:16:02,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:02,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:02,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:02,139 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:02,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:02,372 INFO L85 PathProgramCache]: Analyzing trace with hash 317656973, now seen corresponding path program 120 times [2024-05-04 04:16:02,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:02,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:02,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:02,395 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:16:02,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:02,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:02,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:02,418 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:16:02,576 INFO L85 PathProgramCache]: Analyzing trace with hash -557652247, now seen corresponding path program 5 times [2024-05-04 04:16:02,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:02,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:02,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:02,599 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-04 04:16:02,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:02,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:02,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:02,622 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-04 04:16:02,752 INFO L85 PathProgramCache]: Analyzing trace with hash 1506031863, now seen corresponding path program 5 times [2024-05-04 04:16:02,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:02,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:02,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:02,777 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-04 04:16:02,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:02,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:02,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:02,813 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-04 04:16:03,009 INFO L85 PathProgramCache]: Analyzing trace with hash 1506031894, now seen corresponding path program 121 times [2024-05-04 04:16:03,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:03,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:03,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:03,031 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2024-05-04 04:16:03,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:03,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:03,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:03,055 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2024-05-04 04:16:03,179 INFO L85 PathProgramCache]: Analyzing trace with hash 325676331, now seen corresponding path program 122 times [2024-05-04 04:16:03,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:03,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:03,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:03,201 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-04 04:16:03,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:03,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:03,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:03,222 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-04 04:16:03,496 INFO L85 PathProgramCache]: Analyzing trace with hash 148794322, now seen corresponding path program 123 times [2024-05-04 04:16:03,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:03,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:03,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:03,517 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-05-04 04:16:03,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:03,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:03,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:03,618 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-05-04 04:16:03,800 INFO L85 PathProgramCache]: Analyzing trace with hash 1528820463, now seen corresponding path program 124 times [2024-05-04 04:16:03,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:03,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:03,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:03,822 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-05-04 04:16:03,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:03,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:03,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:03,844 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-05-04 04:16:05,073 INFO L85 PathProgramCache]: Analyzing trace with hash -1511006460, now seen corresponding path program 125 times [2024-05-04 04:16:05,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:05,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:05,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:05,097 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-04 04:16:05,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:05,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:05,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:05,121 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-04 04:16:05,670 INFO L85 PathProgramCache]: Analyzing trace with hash 187570112, now seen corresponding path program 126 times [2024-05-04 04:16:05,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:05,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:05,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:05,690 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 16 proven. 12 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-05-04 04:16:05,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:05,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:05,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:05,710 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 16 proven. 12 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-05-04 04:16:06,014 INFO L85 PathProgramCache]: Analyzing trace with hash 866162257, now seen corresponding path program 127 times [2024-05-04 04:16:06,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:06,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:06,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:06,045 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-04 04:16:06,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:06,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:06,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:06,086 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-04 04:16:06,698 INFO L85 PathProgramCache]: Analyzing trace with hash -548373107, now seen corresponding path program 128 times [2024-05-04 04:16:06,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:06,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:06,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:06,725 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 16 proven. 12 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-05-04 04:16:06,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:06,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:06,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:06,750 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 16 proven. 12 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-05-04 04:16:10,365 INFO L85 PathProgramCache]: Analyzing trace with hash 1145196033, now seen corresponding path program 129 times [2024-05-04 04:16:10,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:10,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:10,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:10,369 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:10,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:10,640 INFO L85 PathProgramCache]: Analyzing trace with hash -247403715, now seen corresponding path program 130 times [2024-05-04 04:16:10,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:10,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:10,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:10,645 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:10,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:10,857 INFO L85 PathProgramCache]: Analyzing trace with hash -467277704, now seen corresponding path program 131 times [2024-05-04 04:16:10,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:10,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:10,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:10,861 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:10,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:11,154 INFO L85 PathProgramCache]: Analyzing trace with hash 269113652, now seen corresponding path program 132 times [2024-05-04 04:16:11,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:11,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:11,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:11,158 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:11,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:11,593 INFO L85 PathProgramCache]: Analyzing trace with hash 576489456, now seen corresponding path program 133 times [2024-05-04 04:16:11,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:11,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:11,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:11,596 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:11,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:11,768 INFO L85 PathProgramCache]: Analyzing trace with hash 271022508, now seen corresponding path program 134 times [2024-05-04 04:16:11,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:11,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:11,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:11,789 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-04 04:16:11,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:11,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:11,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:11,810 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-04 04:16:11,973 INFO L85 PathProgramCache]: Analyzing trace with hash 1466640776, now seen corresponding path program 6 times [2024-05-04 04:16:11,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:11,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:11,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:11,994 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:16:11,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:11,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:11,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:12,016 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:16:12,188 INFO L85 PathProgramCache]: Analyzing trace with hash -506878344, now seen corresponding path program 6 times [2024-05-04 04:16:12,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:12,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:12,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:12,209 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:16:12,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:12,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:12,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:12,230 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:16:12,418 INFO L85 PathProgramCache]: Analyzing trace with hash -506878313, now seen corresponding path program 135 times [2024-05-04 04:16:12,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:12,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:12,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:12,440 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-04 04:16:12,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:12,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:12,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:12,462 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-04 04:16:12,617 INFO L85 PathProgramCache]: Analyzing trace with hash -1540371574, now seen corresponding path program 136 times [2024-05-04 04:16:12,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:12,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:12,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:12,638 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:16:12,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:12,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:12,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:12,660 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-04 04:16:12,813 INFO L85 PathProgramCache]: Analyzing trace with hash -1376730669, now seen corresponding path program 137 times [2024-05-04 04:16:12,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:12,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:12,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:12,833 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-05-04 04:16:12,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:12,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:12,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:12,871 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-05-04 04:16:13,008 INFO L85 PathProgramCache]: Analyzing trace with hash -44410674, now seen corresponding path program 138 times [2024-05-04 04:16:13,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:13,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:13,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:13,042 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-05-04 04:16:13,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:13,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:13,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:13,128 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2024-05-04 04:16:13,358 INFO L85 PathProgramCache]: Analyzing trace with hash 1338292421, now seen corresponding path program 139 times [2024-05-04 04:16:13,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:13,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:13,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:13,382 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2024-05-04 04:16:13,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:13,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:13,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:13,412 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2024-05-04 04:16:13,828 INFO L85 PathProgramCache]: Analyzing trace with hash 691010049, now seen corresponding path program 140 times [2024-05-04 04:16:13,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:13,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:13,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:13,847 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 16 proven. 12 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-05-04 04:16:13,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:13,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:13,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:13,865 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 16 proven. 12 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-05-04 04:16:14,159 INFO L85 PathProgramCache]: Analyzing trace with hash 819527792, now seen corresponding path program 141 times [2024-05-04 04:16:14,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:14,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:14,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:14,226 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2024-05-04 04:16:14,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:14,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:14,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:14,251 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 17 proven. 12 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2024-05-04 04:16:14,690 INFO L85 PathProgramCache]: Analyzing trace with hash 576245548, now seen corresponding path program 142 times [2024-05-04 04:16:14,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:14,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:14,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:14,714 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 16 proven. 12 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-05-04 04:16:14,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:14,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:14,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:14,734 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 16 proven. 12 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-05-04 04:16:28,982 INFO L85 PathProgramCache]: Analyzing trace with hash 649436216, now seen corresponding path program 143 times [2024-05-04 04:16:28,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:28,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:28,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:28,986 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:28,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:29,223 INFO L85 PathProgramCache]: Analyzing trace with hash 1208610036, now seen corresponding path program 144 times [2024-05-04 04:16:29,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:29,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:29,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:29,226 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:29,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:29,444 INFO L85 PathProgramCache]: Analyzing trace with hash 763656033, now seen corresponding path program 145 times [2024-05-04 04:16:29,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:29,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:29,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:29,447 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:29,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:29,745 INFO L85 PathProgramCache]: Analyzing trace with hash -238107491, now seen corresponding path program 146 times [2024-05-04 04:16:29,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:29,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:29,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:29,748 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:29,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:31,349 INFO L85 PathProgramCache]: Analyzing trace with hash -1360457767, now seen corresponding path program 147 times [2024-05-04 04:16:31,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:31,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:31,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:31,352 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:31,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:31,559 INFO L85 PathProgramCache]: Analyzing trace with hash -236198635, now seen corresponding path program 148 times [2024-05-04 04:16:31,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:31,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:31,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:31,582 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-04 04:16:31,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:31,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:31,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:31,597 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-04 04:16:31,747 INFO L85 PathProgramCache]: Analyzing trace with hash -1597392783, now seen corresponding path program 7 times [2024-05-04 04:16:31,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:31,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:31,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:31,763 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:16:31,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:31,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:31,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:31,778 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:16:32,002 INFO L85 PathProgramCache]: Analyzing trace with hash -1437002129, now seen corresponding path program 7 times [2024-05-04 04:16:32,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:32,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:32,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:32,022 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:16:32,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:32,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:32,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:32,038 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:16:32,295 INFO L85 PathProgramCache]: Analyzing trace with hash -1437002098, now seen corresponding path program 149 times [2024-05-04 04:16:32,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:32,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:32,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:32,311 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-04 04:16:32,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:32,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:32,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:32,327 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-04 04:16:32,493 INFO L85 PathProgramCache]: Analyzing trace with hash 646381747, now seen corresponding path program 150 times [2024-05-04 04:16:32,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:32,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:32,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:32,508 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:16:32,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:32,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:32,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:32,523 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:16:32,868 INFO L85 PathProgramCache]: Analyzing trace with hash -2085829302, now seen corresponding path program 151 times [2024-05-04 04:16:32,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:32,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:32,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:32,883 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-04 04:16:32,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:32,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:32,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:32,897 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-04 04:16:33,052 INFO L85 PathProgramCache]: Analyzing trace with hash -1729852809, now seen corresponding path program 152 times [2024-05-04 04:16:33,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:33,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:33,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:33,073 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-04 04:16:33,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:33,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:33,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:33,088 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-04 04:16:34,335 INFO L85 PathProgramCache]: Analyzing trace with hash -1500661124, now seen corresponding path program 153 times [2024-05-04 04:16:34,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:34,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:34,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:34,353 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-04 04:16:34,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:34,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:34,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:34,372 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-04 04:16:34,947 INFO L85 PathProgramCache]: Analyzing trace with hash 775188280, now seen corresponding path program 154 times [2024-05-04 04:16:34,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:34,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:34,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:34,961 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-04 04:16:34,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:34,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:34,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:34,975 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-04 04:16:35,363 INFO L85 PathProgramCache]: Analyzing trace with hash 312306649, now seen corresponding path program 155 times [2024-05-04 04:16:35,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:35,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:35,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:35,382 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-04 04:16:35,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:35,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:35,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:35,401 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-04 04:16:35,992 INFO L85 PathProgramCache]: Analyzing trace with hash -1360701675, now seen corresponding path program 156 times [2024-05-04 04:16:35,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:35,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:35,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:36,006 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-04 04:16:36,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:36,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:36,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:36,020 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-04 04:16:38,950 INFO L85 PathProgramCache]: Analyzing trace with hash 105455497, now seen corresponding path program 157 times [2024-05-04 04:16:38,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:38,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:38,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:38,953 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:38,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:39,143 INFO L85 PathProgramCache]: Analyzing trace with hash -801259323, now seen corresponding path program 158 times [2024-05-04 04:16:39,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:39,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:39,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:39,146 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:39,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:39,290 INFO L85 PathProgramCache]: Analyzing trace with hash 884655600, now seen corresponding path program 159 times [2024-05-04 04:16:39,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:39,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:39,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:39,293 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:39,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:39,480 INFO L85 PathProgramCache]: Analyzing trace with hash -1965509972, now seen corresponding path program 160 times [2024-05-04 04:16:39,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:39,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:39,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:39,483 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:39,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:39,787 INFO L85 PathProgramCache]: Analyzing trace with hash -142451352, now seen corresponding path program 161 times [2024-05-04 04:16:39,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:39,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:39,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:39,790 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:39,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:39,915 INFO L85 PathProgramCache]: Analyzing trace with hash -1963601116, now seen corresponding path program 162 times [2024-05-04 04:16:39,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:39,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:39,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:39,932 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-04 04:16:39,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:39,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:39,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:39,948 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-04 04:16:40,089 INFO L85 PathProgramCache]: Analyzing trace with hash -1476393216, now seen corresponding path program 8 times [2024-05-04 04:16:40,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:40,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:40,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:40,104 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-04 04:16:40,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:40,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:40,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:40,118 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-04 04:16:40,288 INFO L85 PathProgramCache]: Analyzing trace with hash -186172928, now seen corresponding path program 8 times [2024-05-04 04:16:40,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:40,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:40,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:40,302 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-04 04:16:40,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:40,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:40,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:40,315 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-04 04:16:40,448 INFO L85 PathProgramCache]: Analyzing trace with hash -186172897, now seen corresponding path program 163 times [2024-05-04 04:16:40,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:40,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:40,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:40,462 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:16:40,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:40,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:40,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:40,476 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-04 04:16:40,585 INFO L85 PathProgramCache]: Analyzing trace with hash -1530026238, now seen corresponding path program 164 times [2024-05-04 04:16:40,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:40,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:40,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:40,599 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-04 04:16:40,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:40,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:40,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:40,613 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-04 04:16:40,742 INFO L85 PathProgramCache]: Analyzing trace with hash -340436645, now seen corresponding path program 165 times [2024-05-04 04:16:40,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:40,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:40,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:40,758 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-04 04:16:40,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:40,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:40,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:40,771 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-04 04:16:40,889 INFO L85 PathProgramCache]: Analyzing trace with hash 543207494, now seen corresponding path program 166 times [2024-05-04 04:16:40,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:40,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:40,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:40,902 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-04 04:16:40,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:40,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:40,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:40,916 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-04 04:16:41,144 INFO L85 PathProgramCache]: Analyzing trace with hash 784436813, now seen corresponding path program 167 times [2024-05-04 04:16:41,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:41,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:41,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:41,161 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-04 04:16:41,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:41,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:41,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:41,178 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-04 04:16:41,625 INFO L85 PathProgramCache]: Analyzing trace with hash -121318519, now seen corresponding path program 168 times [2024-05-04 04:16:41,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:41,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:41,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:41,639 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-04 04:16:41,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:41,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:41,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:41,653 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-04 04:16:41,903 INFO L85 PathProgramCache]: Analyzing trace with hash -1415095832, now seen corresponding path program 169 times [2024-05-04 04:16:41,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:41,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:41,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:41,921 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-04 04:16:41,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:41,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:41,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:41,939 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-04 04:16:42,389 INFO L85 PathProgramCache]: Analyzing trace with hash -142695260, now seen corresponding path program 170 times [2024-05-04 04:16:42,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:42,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:42,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:42,479 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-04 04:16:42,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:42,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:42,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:42,493 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-04 04:16:54,784 INFO L85 PathProgramCache]: Analyzing trace with hash 1237054384, now seen corresponding path program 19 times [2024-05-04 04:16:54,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:54,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:54,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:54,786 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:54,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:54,965 INFO L85 PathProgramCache]: Analyzing trace with hash 756465772, now seen corresponding path program 20 times [2024-05-04 04:16:54,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:54,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:54,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:54,968 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:54,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:55,094 INFO L85 PathProgramCache]: Analyzing trace with hash -48672535, now seen corresponding path program 21 times [2024-05-04 04:16:55,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:55,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:55,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:55,096 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:55,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:55,275 INFO L85 PathProgramCache]: Analyzing trace with hash -1499618779, now seen corresponding path program 22 times [2024-05-04 04:16:55,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:55,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:55,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:55,277 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:55,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:56,391 INFO L85 PathProgramCache]: Analyzing trace with hash -560729759, now seen corresponding path program 23 times [2024-05-04 04:16:56,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:56,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:56,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:56,394 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:16:56,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:16:56,541 INFO L85 PathProgramCache]: Analyzing trace with hash -1497709923, now seen corresponding path program 24 times [2024-05-04 04:16:56,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:56,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:56,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:56,555 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:16:56,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:56,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:56,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:56,564 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:16:56,676 INFO L85 PathProgramCache]: Analyzing trace with hash 1885245945, now seen corresponding path program 2 times [2024-05-04 04:16:56,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:56,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:56,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:56,689 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:16:56,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:56,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:56,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:56,699 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:16:56,811 INFO L85 PathProgramCache]: Analyzing trace with hash 2139024359, now seen corresponding path program 2 times [2024-05-04 04:16:56,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:56,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:56,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:56,825 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:16:56,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:56,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:56,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:56,835 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:16:56,994 INFO L85 PathProgramCache]: Analyzing trace with hash 2139024390, now seen corresponding path program 25 times [2024-05-04 04:16:56,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:56,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:56,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:57,004 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:16:57,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:57,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:57,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:57,014 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:16:57,115 INFO L85 PathProgramCache]: Analyzing trace with hash -485188549, now seen corresponding path program 26 times [2024-05-04 04:16:57,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:57,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:57,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:57,133 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:16:57,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:57,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:57,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:57,144 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:16:57,490 INFO L85 PathProgramCache]: Analyzing trace with hash -1572333886, now seen corresponding path program 27 times [2024-05-04 04:16:57,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:57,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:57,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:57,500 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:16:57,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:57,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:57,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:57,510 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:16:57,679 INFO L85 PathProgramCache]: Analyzing trace with hash -1990383105, now seen corresponding path program 28 times [2024-05-04 04:16:57,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:57,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:57,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:57,690 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:16:57,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:57,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:57,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:57,700 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:16:58,904 INFO L85 PathProgramCache]: Analyzing trace with hash -1952805388, now seen corresponding path program 29 times [2024-05-04 04:16:58,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:58,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:58,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:58,918 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:16:58,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:58,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:58,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:58,933 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:16:59,425 INFO L85 PathProgramCache]: Analyzing trace with hash -203047248, now seen corresponding path program 30 times [2024-05-04 04:16:59,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:59,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:59,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:59,436 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:16:59,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:59,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:59,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:59,446 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:16:59,741 INFO L85 PathProgramCache]: Analyzing trace with hash -949204639, now seen corresponding path program 31 times [2024-05-04 04:16:59,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:59,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:59,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:59,755 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:16:59,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:16:59,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:16:59,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:16:59,767 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:17:00,340 INFO L85 PathProgramCache]: Analyzing trace with hash -560973667, now seen corresponding path program 32 times [2024-05-04 04:17:00,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:00,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:00,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:00,350 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:17:00,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:00,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:00,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:00,360 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:17:03,466 INFO L85 PathProgramCache]: Analyzing trace with hash -706873071, now seen corresponding path program 19 times [2024-05-04 04:17:03,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:03,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:03,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:03,468 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:17:03,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:03,745 INFO L85 PathProgramCache]: Analyzing trace with hash -2062770611, now seen corresponding path program 20 times [2024-05-04 04:17:03,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:03,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:03,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:03,747 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:17:03,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:03,936 INFO L85 PathProgramCache]: Analyzing trace with hash 165714792, now seen corresponding path program 21 times [2024-05-04 04:17:03,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:03,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:03,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:03,938 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:17:03,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:04,229 INFO L85 PathProgramCache]: Analyzing trace with hash -1452014556, now seen corresponding path program 22 times [2024-05-04 04:17:04,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:04,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:04,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:04,232 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:17:04,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:04,682 INFO L85 PathProgramCache]: Analyzing trace with hash -1917768992, now seen corresponding path program 23 times [2024-05-04 04:17:04,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:04,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:04,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:04,685 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:17:04,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:04,928 INFO L85 PathProgramCache]: Analyzing trace with hash -1450105700, now seen corresponding path program 24 times [2024-05-04 04:17:04,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:04,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:04,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:04,938 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:17:04,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:04,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:04,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:04,949 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:17:05,138 INFO L85 PathProgramCache]: Analyzing trace with hash 2099633272, now seen corresponding path program 2 times [2024-05-04 04:17:05,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:05,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:05,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:05,150 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:17:05,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:05,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:05,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:05,161 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:17:05,325 INFO L85 PathProgramCache]: Analyzing trace with hash -1317743224, now seen corresponding path program 2 times [2024-05-04 04:17:05,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:05,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:05,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:05,336 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:17:05,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:05,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:05,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:05,347 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:17:05,530 INFO L85 PathProgramCache]: Analyzing trace with hash -1317743193, now seen corresponding path program 25 times [2024-05-04 04:17:05,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:05,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:05,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:05,541 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:17:05,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:05,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:05,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:05,552 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:17:05,724 INFO L85 PathProgramCache]: Analyzing trace with hash -1982170502, now seen corresponding path program 26 times [2024-05-04 04:17:05,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:05,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:05,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:05,735 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:17:05,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:05,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:05,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:05,746 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:17:05,928 INFO L85 PathProgramCache]: Analyzing trace with hash -600966941, now seen corresponding path program 27 times [2024-05-04 04:17:05,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:05,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:05,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:05,939 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:17:05,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:05,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:05,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:05,949 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:17:06,128 INFO L85 PathProgramCache]: Analyzing trace with hash -435028034, now seen corresponding path program 28 times [2024-05-04 04:17:06,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:06,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:06,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:06,139 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:17:06,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:06,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:06,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:06,148 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:17:06,485 INFO L85 PathProgramCache]: Analyzing trace with hash -477074475, now seen corresponding path program 29 times [2024-05-04 04:17:06,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:06,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:06,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:06,498 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:17:06,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:06,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:06,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:06,511 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:17:07,110 INFO L85 PathProgramCache]: Analyzing trace with hash 678409489, now seen corresponding path program 30 times [2024-05-04 04:17:07,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:07,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:07,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:07,120 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:17:07,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:07,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:07,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:07,129 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:17:07,443 INFO L85 PathProgramCache]: Analyzing trace with hash -901600416, now seen corresponding path program 31 times [2024-05-04 04:17:07,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:07,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:07,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:07,456 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:17:07,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:07,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:07,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:07,469 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:17:08,109 INFO L85 PathProgramCache]: Analyzing trace with hash -1918012900, now seen corresponding path program 32 times [2024-05-04 04:17:08,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:08,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:08,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:08,119 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:17:08,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:08,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:08,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:08,128 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:17:22,422 INFO L85 PathProgramCache]: Analyzing trace with hash 1034905786, now seen corresponding path program 1 times [2024-05-04 04:17:22,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:22,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:22,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:22,425 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:17:22,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:22,621 INFO L85 PathProgramCache]: Analyzing trace with hash 491932278, now seen corresponding path program 2 times [2024-05-04 04:17:22,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:22,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:22,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:22,624 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:17:22,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:22,756 INFO L85 PathProgramCache]: Analyzing trace with hash 498995871, now seen corresponding path program 3 times [2024-05-04 04:17:22,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:22,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:22,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:22,759 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:17:22,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:22,947 INFO L85 PathProgramCache]: Analyzing trace with hash -953962789, now seen corresponding path program 4 times [2024-05-04 04:17:22,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:22,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:22,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:22,949 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:17:22,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:23,300 INFO L85 PathProgramCache]: Analyzing trace with hash 559466775, now seen corresponding path program 5 times [2024-05-04 04:17:23,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:23,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:23,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:23,302 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:17:23,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:17:23,406 INFO L85 PathProgramCache]: Analyzing trace with hash -952053933, now seen corresponding path program 6 times [2024-05-04 04:17:23,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:23,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:23,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:23,415 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:17:23,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:23,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:23,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:23,424 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:17:23,534 INFO L85 PathProgramCache]: Analyzing trace with hash -1862052945, now seen corresponding path program 1 times [2024-05-04 04:17:23,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:23,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:23,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:23,544 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-04 04:17:23,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:23,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:23,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:23,554 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-04 04:17:23,667 INFO L85 PathProgramCache]: Analyzing trace with hash 1325407089, now seen corresponding path program 1 times [2024-05-04 04:17:23,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:23,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:23,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:23,677 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-04 04:17:23,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:23,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:23,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:23,686 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-04 04:17:23,805 INFO L85 PathProgramCache]: Analyzing trace with hash 1325407120, now seen corresponding path program 7 times [2024-05-04 04:17:23,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:23,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:23,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:23,815 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:17:23,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:23,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:23,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:23,824 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:17:23,929 INFO L85 PathProgramCache]: Analyzing trace with hash -95792271, now seen corresponding path program 8 times [2024-05-04 04:17:23,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:23,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:23,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:23,939 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-04 04:17:23,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:23,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:23,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:23,948 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-04 04:17:24,067 INFO L85 PathProgramCache]: Analyzing trace with hash -1693279412, now seen corresponding path program 9 times [2024-05-04 04:17:24,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:24,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:24,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:24,078 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-04 04:17:24,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:24,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:24,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:24,088 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-04 04:17:24,207 INFO L85 PathProgramCache]: Analyzing trace with hash 776662069, now seen corresponding path program 10 times [2024-05-04 04:17:24,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:24,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:24,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:24,216 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-04 04:17:24,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:24,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:24,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:24,224 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-04 04:17:24,430 INFO L85 PathProgramCache]: Analyzing trace with hash 2077628414, now seen corresponding path program 11 times [2024-05-04 04:17:24,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:24,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:24,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:24,442 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:17:24,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:24,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:24,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:24,453 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:17:24,835 INFO L85 PathProgramCache]: Analyzing trace with hash 163306938, now seen corresponding path program 12 times [2024-05-04 04:17:24,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:24,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:24,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:24,844 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:17:24,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:24,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:24,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:24,853 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:17:25,053 INFO L85 PathProgramCache]: Analyzing trace with hash -403548649, now seen corresponding path program 13 times [2024-05-04 04:17:25,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:25,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:25,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:25,065 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:17:25,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:25,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:25,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:25,076 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:17:25,537 INFO L85 PathProgramCache]: Analyzing trace with hash 559222867, now seen corresponding path program 14 times [2024-05-04 04:17:25,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:25,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:25,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:25,546 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:17:25,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:17:25,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:17:25,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:17:25,554 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:17:27,916 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-04 04:17:27,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:17:27,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:17:27,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-04 04:17:27,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:17:27,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-05-04 04:17:27,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-04 04:17:27,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-04 04:17:27,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:17:27,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:17:27,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-05-04 04:17:27,919 INFO L805 garLoopResultBuilder]: Registering result SAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONASSERT (4 of 5 remaining) [2024-05-04 04:17:27,919 INFO L805 garLoopResultBuilder]: Registering result SAFE for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 5 remaining) [2024-05-04 04:17:27,919 INFO L805 garLoopResultBuilder]: Registering result SAFE for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 5 remaining) [2024-05-04 04:17:27,920 INFO L805 garLoopResultBuilder]: Registering result SAFE for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 5 remaining) [2024-05-04 04:17:27,920 INFO L805 garLoopResultBuilder]: Registering result SAFE for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 5 remaining) [2024-05-04 04:17:27,931 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2024-05-04 04:17:28,125 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable306,SelfDestructingSolverStorable427,SelfDestructingSolverStorable307,SelfDestructingSolverStorable428,SelfDestructingSolverStorable308,SelfDestructingSolverStorable429,SelfDestructingSolverStorable309,SelfDestructingSolverStorable302,SelfDestructingSolverStorable423,SelfDestructingSolverStorable303,SelfDestructingSolverStorable424,SelfDestructingSolverStorable304,SelfDestructingSolverStorable425,SelfDestructingSolverStorable305,SelfDestructingSolverStorable426,SelfDestructingSolverStorable420,SelfDestructingSolverStorable300,SelfDestructingSolverStorable421,SelfDestructingSolverStorable301,SelfDestructingSolverStorable422,SelfDestructingSolverStorable416,SelfDestructingSolverStorable417,SelfDestructingSolverStorable418,SelfDestructingSolverStorable419,SelfDestructingSolverStorable412,SelfDestructingSolverStorable413,SelfDestructingSolverStorable414,SelfDestructingSolverStorable415,SelfDestructingSolverStorable410,SelfDestructingSolverStorable411,SelfDestructingSolverStorable450,SelfDestructingSolverStorable330,SelfDestructingSolverStorable451,SelfDestructingSolverStorable207,SelfDestructingSolverStorable328,SelfDestructingSolverStorable449,SelfDestructingSolverStorable208,SelfDestructingSolverStorable329,SelfDestructingSolverStorable209,SelfDestructingSolverStorable203,SelfDestructingSolverStorable324,SelfDestructingSolverStorable445,SelfDestructingSolverStorable204,SelfDestructingSolverStorable325,SelfDestructingSolverStorable446,SelfDestructingSolverStorable205,SelfDestructingSolverStorable326,SelfDestructingSolverStorable447,SelfDestructingSolverStorable206,SelfDestructingSolverStorable327,SelfDestructingSolverStorable448,SelfDestructingSolverStorable320,SelfDestructingSolverStorable441,SelfDestructingSolverStorable200,SelfDestructingSolverStorable321,SelfDestructingSolverStorable442,SelfDestructingSolverStorable201,SelfDestructingSolverStorable322,SelfDestructingSolverStorable443,SelfDestructingSolverStorable202,SelfDestructingSolverStorable323,SelfDestructingSolverStorable444,SelfDestructingSolverStorable440,SelfDestructingSolverStorable317,SelfDestructingSolverStorable438,SelfDestructingSolverStorable318,SelfDestructingSolverStorable439,SelfDestructingSolverStorable319,SelfDestructingSolverStorable313,SelfDestructingSolverStorable434,SelfDestructingSolverStorable314,SelfDestructingSolverStorable435,SelfDestructingSolverStorable315,SelfDestructingSolverStorable436,SelfDestructingSolverStorable316,SelfDestructingSolverStorable437,SelfDestructingSolverStorable430,SelfDestructingSolverStorable310,SelfDestructingSolverStorable431,SelfDestructingSolverStorable311,SelfDestructingSolverStorable432,SelfDestructingSolverStorable312,SelfDestructingSolverStorable433,SelfDestructingSolverStorable508,SelfDestructingSolverStorable509,SelfDestructingSolverStorable504,SelfDestructingSolverStorable505,SelfDestructingSolverStorable506,SelfDestructingSolverStorable507,SelfDestructingSolverStorable500,SelfDestructingSolverStorable501,SelfDestructingSolverStorable502,SelfDestructingSolverStorable503,SelfDestructingSolverStorable409,SelfDestructingSolverStorable405,SelfDestructingSolverStorable406,SelfDestructingSolverStorable407,SelfDestructingSolverStorable408,SelfDestructingSolverStorable401,SelfDestructingSolverStorable402,SelfDestructingSolverStorable403,SelfDestructingSolverStorable404,SelfDestructingSolverStorable400,SelfDestructingSolverStorable511,SelfDestructingSolverStorable512,SelfDestructingSolverStorable510,SelfDestructingSolverStorable90,SelfDestructingSolverStorable91,SelfDestructingSolverStorable92,SelfDestructingSolverStorable93,SelfDestructingSolverStorable94,SelfDestructingSolverStorable95,SelfDestructingSolverStorable96,SelfDestructingSolverStorable97,SelfDestructingSolverStorable98,SelfDestructingSolverStorable99,SelfDestructingSolverStorable195,SelfDestructingSolverStorable196,SelfDestructingSolverStorable197,SelfDestructingSolverStorable198,SelfDestructingSolverStorable191,SelfDestructingSolverStorable192,SelfDestructingSolverStorable193,SelfDestructingSolverStorable194,SelfDestructingSolverStorable190,SelfDestructingSolverStorable188,SelfDestructingSolverStorable189,SelfDestructingSolverStorable184,SelfDestructingSolverStorable185,SelfDestructingSolverStorable186,SelfDestructingSolverStorable187,SelfDestructingSolverStorable180,SelfDestructingSolverStorable181,SelfDestructingSolverStorable182,SelfDestructingSolverStorable183,8 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable177,SelfDestructingSolverStorable298,SelfDestructingSolverStorable178,SelfDestructingSolverStorable299,SelfDestructingSolverStorable179,SelfDestructingSolverStorable199,SelfDestructingSolverStorable151,SelfDestructingSolverStorable272,SelfDestructingSolverStorable393,SelfDestructingSolverStorable152,SelfDestructingSolverStorable273,SelfDestructingSolverStorable394,SelfDestructingSolverStorable153,SelfDestructingSolverStorable274,SelfDestructingSolverStorable395,SelfDestructingSolverStorable154,SelfDestructingSolverStorable275,SelfDestructingSolverStorable396,SelfDestructingSolverStorable390,SelfDestructingSolverStorable30,SelfDestructingSolverStorable270,SelfDestructingSolverStorable391,SelfDestructingSolverStorable31,SelfDestructingSolverStorable150,SelfDestructingSolverStorable271,SelfDestructingSolverStorable392,SelfDestructingSolverStorable32,SelfDestructingSolverStorable148,SelfDestructingSolverStorable269,SelfDestructingSolverStorable33,SelfDestructingSolverStorable149,SelfDestructingSolverStorable34,SelfDestructingSolverStorable35,SelfDestructingSolverStorable36,SelfDestructingSolverStorable144,SelfDestructingSolverStorable265,SelfDestructingSolverStorable386,SelfDestructingSolverStorable37,SelfDestructingSolverStorable145,SelfDestructingSolverStorable266,SelfDestructingSolverStorable387,SelfDestructingSolverStorable38,SelfDestructingSolverStorable146,SelfDestructingSolverStorable267,SelfDestructingSolverStorable388,SelfDestructingSolverStorable39,SelfDestructingSolverStorable147,SelfDestructingSolverStorable268,SelfDestructingSolverStorable389,SelfDestructingSolverStorable140,SelfDestructingSolverStorable261,SelfDestructingSolverStorable382,SelfDestructingSolverStorable141,SelfDestructingSolverStorable262,SelfDestructingSolverStorable383,SelfDestructingSolverStorable142,SelfDestructingSolverStorable263,SelfDestructingSolverStorable384,SelfDestructingSolverStorable143,SelfDestructingSolverStorable264,SelfDestructingSolverStorable385,SelfDestructingSolverStorable40,SelfDestructingSolverStorable41,SelfDestructingSolverStorable380,SelfDestructingSolverStorable42,SelfDestructingSolverStorable260,SelfDestructingSolverStorable381,SelfDestructingSolverStorable43,SelfDestructingSolverStorable137,SelfDestructingSolverStorable258,SelfDestructingSolverStorable379,SelfDestructingSolverStorable44,SelfDestructingSolverStorable138,SelfDestructingSolverStorable259,SelfDestructingSolverStorable45,SelfDestructingSolverStorable139,SelfDestructingSolverStorable46,SelfDestructingSolverStorable47,SelfDestructingSolverStorable133,SelfDestructingSolverStorable254,SelfDestructingSolverStorable375,SelfDestructingSolverStorable496,SelfDestructingSolverStorable48,SelfDestructingSolverStorable134,SelfDestructingSolverStorable255,SelfDestructingSolverStorable376,SelfDestructingSolverStorable497,SelfDestructingSolverStorable49,SelfDestructingSolverStorable135,SelfDestructingSolverStorable256,SelfDestructingSolverStorable377,SelfDestructingSolverStorable498,SelfDestructingSolverStorable136,SelfDestructingSolverStorable257,SelfDestructingSolverStorable378,SelfDestructingSolverStorable499,SelfDestructingSolverStorable173,SelfDestructingSolverStorable294,SelfDestructingSolverStorable174,SelfDestructingSolverStorable295,SelfDestructingSolverStorable175,SelfDestructingSolverStorable296,SelfDestructingSolverStorable176,SelfDestructingSolverStorable297,SelfDestructingSolverStorable290,SelfDestructingSolverStorable170,SelfDestructingSolverStorable291,SelfDestructingSolverStorable171,SelfDestructingSolverStorable292,SelfDestructingSolverStorable172,SelfDestructingSolverStorable293,SelfDestructingSolverStorable18,SelfDestructingSolverStorable19,SelfDestructingSolverStorable10,SelfDestructingSolverStorable11,SelfDestructingSolverStorable12,SelfDestructingSolverStorable13,SelfDestructingSolverStorable14,SelfDestructingSolverStorable166,SelfDestructingSolverStorable287,SelfDestructingSolverStorable15,SelfDestructingSolverStorable167,SelfDestructingSolverStorable288,SelfDestructingSolverStorable16,SelfDestructingSolverStorable168,SelfDestructingSolverStorable289,SelfDestructingSolverStorable17,SelfDestructingSolverStorable169,SelfDestructingSolverStorable162,SelfDestructingSolverStorable283,SelfDestructingSolverStorable163,SelfDestructingSolverStorable284,SelfDestructingSolverStorable164,SelfDestructingSolverStorable285,SelfDestructingSolverStorable165,SelfDestructingSolverStorable286,SelfDestructingSolverStorable280,SelfDestructingSolverStorable160,SelfDestructingSolverStorable281,SelfDestructingSolverStorable20,SelfDestructingSolverStorable161,SelfDestructingSolverStorable282,SelfDestructingSolverStorable29,SelfDestructingSolverStorable21,SelfDestructingSolverStorable159,SelfDestructingSolverStorable22,SelfDestructingSolverStorable23,SelfDestructingSolverStorable24,SelfDestructingSolverStorable25,SelfDestructingSolverStorable155,SelfDestructingSolverStorable276,SelfDestructingSolverStorable397,SelfDestructingSolverStorable26,SelfDestructingSolverStorable156,SelfDestructingSolverStorable277,SelfDestructingSolverStorable398,SelfDestructingSolverStorable27,SelfDestructingSolverStorable157,SelfDestructingSolverStorable278,SelfDestructingSolverStorable399,SelfDestructingSolverStorable28,SelfDestructingSolverStorable158,SelfDestructingSolverStorable279,SelfDestructingSolverStorable470,SelfDestructingSolverStorable350,SelfDestructingSolverStorable471,SelfDestructingSolverStorable70,SelfDestructingSolverStorable230,SelfDestructingSolverStorable351,SelfDestructingSolverStorable472,SelfDestructingSolverStorable71,SelfDestructingSolverStorable110,SelfDestructingSolverStorable231,SelfDestructingSolverStorable352,SelfDestructingSolverStorable473,SelfDestructingSolverStorable72,SelfDestructingSolverStorable73,SelfDestructingSolverStorable74,SelfDestructingSolverStorable75,SelfDestructingSolverStorable108,SelfDestructingSolverStorable229,SelfDestructingSolverStorable109,SelfDestructingSolverStorable76,SelfDestructingSolverStorable104,SelfDestructingSolverStorable225,SelfDestructingSolverStorable346,SelfDestructingSolverStorable467,SelfDestructingSolverStorable77,SelfDestructingSolverStorable105,SelfDestructingSolverStorable226,SelfDestructingSolverStorable347,SelfDestructingSolverStorable468,SelfDestructingSolverStorable78,SelfDestructingSolverStorable106,SelfDestructingSolverStorable227,SelfDestructingSolverStorable348,SelfDestructingSolverStorable469,SelfDestructingSolverStorable79,SelfDestructingSolverStorable107,SelfDestructingSolverStorable228,SelfDestructingSolverStorable349,SelfDestructingSolverStorable100,SelfDestructingSolverStorable221,SelfDestructingSolverStorable342,SelfDestructingSolverStorable463,SelfDestructingSolverStorable101,SelfDestructingSolverStorable222,SelfDestructingSolverStorable343,SelfDestructingSolverStorable464,SelfDestructingSolverStorable102,SelfDestructingSolverStorable223,SelfDestructingSolverStorable344,SelfDestructingSolverStorable465,SelfDestructingSolverStorable103,SelfDestructingSolverStorable224,SelfDestructingSolverStorable345,SelfDestructingSolverStorable466,SelfDestructingSolverStorable80,SelfDestructingSolverStorable460,SelfDestructingSolverStorable81,SelfDestructingSolverStorable340,SelfDestructingSolverStorable461,SelfDestructingSolverStorable82,SelfDestructingSolverStorable220,SelfDestructingSolverStorable341,SelfDestructingSolverStorable462,SelfDestructingSolverStorable83,SelfDestructingSolverStorable84,SelfDestructingSolverStorable85,SelfDestructingSolverStorable86,SelfDestructingSolverStorable218,SelfDestructingSolverStorable339,SelfDestructingSolverStorable219,SelfDestructingSolverStorable87,SelfDestructingSolverStorable214,SelfDestructingSolverStorable335,SelfDestructingSolverStorable456,SelfDestructingSolverStorable88,SelfDestructingSolverStorable215,SelfDestructingSolverStorable336,SelfDestructingSolverStorable457,SelfDestructingSolverStorable89,SelfDestructingSolverStorable216,SelfDestructingSolverStorable337,SelfDestructingSolverStorable458,SelfDestructingSolverStorable217,SelfDestructingSolverStorable338,SelfDestructingSolverStorable459,SelfDestructingSolverStorable210,SelfDestructingSolverStorable331,SelfDestructingSolverStorable452,SelfDestructingSolverStorable211,SelfDestructingSolverStorable332,SelfDestructingSolverStorable453,SelfDestructingSolverStorable212,SelfDestructingSolverStorable333,SelfDestructingSolverStorable454,SelfDestructingSolverStorable213,SelfDestructingSolverStorable334,SelfDestructingSolverStorable455,SelfDestructingSolverStorable250,SelfDestructingSolverStorable371,SelfDestructingSolverStorable492,SelfDestructingSolverStorable130,SelfDestructingSolverStorable251,SelfDestructingSolverStorable372,SelfDestructingSolverStorable493,SelfDestructingSolverStorable131,SelfDestructingSolverStorable252,SelfDestructingSolverStorable373,SelfDestructingSolverStorable494,SelfDestructingSolverStorable132,SelfDestructingSolverStorable253,SelfDestructingSolverStorable374,SelfDestructingSolverStorable495,SelfDestructingSolverStorable50,SelfDestructingSolverStorable51,SelfDestructingSolverStorable52,SelfDestructingSolverStorable490,SelfDestructingSolverStorable53,SelfDestructingSolverStorable370,SelfDestructingSolverStorable491,SelfDestructingSolverStorable54,SelfDestructingSolverStorable126,SelfDestructingSolverStorable247,SelfDestructingSolverStorable368,SelfDestructingSolverStorable489,SelfDestructingSolverStorable55,SelfDestructingSolverStorable127,SelfDestructingSolverStorable248,SelfDestructingSolverStorable369,SelfDestructingSolverStorable56,SelfDestructingSolverStorable128,SelfDestructingSolverStorable249,SelfDestructingSolverStorable57,SelfDestructingSolverStorable129,SelfDestructingSolverStorable58,SelfDestructingSolverStorable122,SelfDestructingSolverStorable243,SelfDestructingSolverStorable364,SelfDestructingSolverStorable485,SelfDestructingSolverStorable59,SelfDestructingSolverStorable123,SelfDestructingSolverStorable244,SelfDestructingSolverStorable365,SelfDestructingSolverStorable486,SelfDestructingSolverStorable124,SelfDestructingSolverStorable245,SelfDestructingSolverStorable366,SelfDestructingSolverStorable487,SelfDestructingSolverStorable125,SelfDestructingSolverStorable246,SelfDestructingSolverStorable367,SelfDestructingSolverStorable488,SelfDestructingSolverStorable360,SelfDestructingSolverStorable481,SelfDestructingSolverStorable240,SelfDestructingSolverStorable361,SelfDestructingSolverStorable482,SelfDestructingSolverStorable120,SelfDestructingSolverStorable241,SelfDestructingSolverStorable362,SelfDestructingSolverStorable483,SelfDestructingSolverStorable60,SelfDestructingSolverStorable121,SelfDestructingSolverStorable242,SelfDestructingSolverStorable363,SelfDestructingSolverStorable484,SelfDestructingSolverStorable61,SelfDestructingSolverStorable62,SelfDestructingSolverStorable63,SelfDestructingSolverStorable64,SelfDestructingSolverStorable480,SelfDestructingSolverStorable119,SelfDestructingSolverStorable65,SelfDestructingSolverStorable115,SelfDestructingSolverStorable236,SelfDestructingSolverStorable357,SelfDestructingSolverStorable478,SelfDestructingSolverStorable66,SelfDestructingSolverStorable116,SelfDestructingSolverStorable237,SelfDestructingSolverStorable358,SelfDestructingSolverStorable479,SelfDestructingSolverStorable67,SelfDestructingSolverStorable117,SelfDestructingSolverStorable238,SelfDestructingSolverStorable359,SelfDestructingSolverStorable68,SelfDestructingSolverStorable118,SelfDestructingSolverStorable239,SelfDestructingSolverStorable69,SelfDestructingSolverStorable111,SelfDestructingSolverStorable232,SelfDestructingSolverStorable353,SelfDestructingSolverStorable474,SelfDestructingSolverStorable112,SelfDestructingSolverStorable233,SelfDestructingSolverStorable354,SelfDestructingSolverStorable475,SelfDestructingSolverStorable113,SelfDestructingSolverStorable234,SelfDestructingSolverStorable355,SelfDestructingSolverStorable476,SelfDestructingSolverStorable114,SelfDestructingSolverStorable235,SelfDestructingSolverStorable356,SelfDestructingSolverStorable477 [2024-05-04 04:17:28,131 INFO L448 BasicCegarLoop]: Path program histogram: [170, 32, 32, 14, 11, 8, 8, 8, 8, 8, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-04 04:17:28,132 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-04 04:17:28,132 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-04 04:17:28,135 INFO L201 PluginConnector]: Adding new model difference-det.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.05 04:17:28 BasicIcfg [2024-05-04 04:17:28,135 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-04 04:17:28,135 INFO L158 Benchmark]: Toolchain (without parser) took 188144.22ms. Allocated memory was 155.2MB in the beginning and 1.4GB in the end (delta: 1.2GB). Free memory was 127.1MB in the beginning and 1.1GB in the end (delta: -967.4MB). Peak memory consumption was 270.5MB. Max. memory is 8.0GB. [2024-05-04 04:17:28,135 INFO L158 Benchmark]: Boogie PL CUP Parser took 0.10ms. Allocated memory is still 155.2MB. Free memory is still 128.2MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-04 04:17:28,136 INFO L158 Benchmark]: Boogie Procedure Inliner took 25.73ms. Allocated memory is still 155.2MB. Free memory was 126.9MB in the beginning and 131.1MB in the end (delta: -4.2MB). Peak memory consumption was 7.7MB. Max. memory is 8.0GB. [2024-05-04 04:17:28,136 INFO L158 Benchmark]: Boogie Preprocessor took 11.78ms. Allocated memory is still 155.2MB. Free memory was 131.1MB in the beginning and 130.0MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2024-05-04 04:17:28,136 INFO L158 Benchmark]: RCFGBuilder took 231.93ms. Allocated memory is still 155.2MB. Free memory was 130.0MB in the beginning and 119.9MB in the end (delta: 10.1MB). Peak memory consumption was 10.5MB. Max. memory is 8.0GB. [2024-05-04 04:17:28,136 INFO L158 Benchmark]: TraceAbstraction took 187870.85ms. Allocated memory was 155.2MB in the beginning and 1.4GB in the end (delta: 1.2GB). Free memory was 118.7MB in the beginning and 1.1GB in the end (delta: -975.8MB). Peak memory consumption was 261.7MB. Max. memory is 8.0GB. [2024-05-04 04:17:28,137 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.10ms. Allocated memory is still 155.2MB. Free memory is still 128.2MB. There was no memory consumed. Max. memory is 8.0GB. * Boogie Procedure Inliner took 25.73ms. Allocated memory is still 155.2MB. Free memory was 126.9MB in the beginning and 131.1MB in the end (delta: -4.2MB). Peak memory consumption was 7.7MB. Max. memory is 8.0GB. * Boogie Preprocessor took 11.78ms. Allocated memory is still 155.2MB. Free memory was 131.1MB in the beginning and 130.0MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 231.93ms. Allocated memory is still 155.2MB. Free memory was 130.0MB in the beginning and 119.9MB in the end (delta: 10.1MB). Peak memory consumption was 10.5MB. Max. memory is 8.0GB. * TraceAbstraction took 187870.85ms. Allocated memory was 155.2MB in the beginning and 1.4GB in the end (delta: 1.2GB). Free memory was 118.7MB in the beginning and 1.1GB in the end (delta: -975.8MB). Peak memory consumption was 261.7MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 334089, independent: 319558, independent conditional: 319380, independent unconditional: 178, dependent: 14531, dependent conditional: 14531, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 321558, independent: 319558, independent conditional: 319380, independent unconditional: 178, dependent: 2000, dependent conditional: 2000, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 321558, independent: 319558, independent conditional: 319380, independent unconditional: 178, dependent: 2000, dependent conditional: 2000, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 321558, independent: 319558, independent conditional: 319380, independent unconditional: 178, dependent: 2000, dependent conditional: 2000, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 326464, independent: 319558, independent conditional: 144473, independent unconditional: 175085, dependent: 6906, dependent conditional: 5251, dependent unconditional: 1655, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 326464, independent: 319558, independent conditional: 133906, independent unconditional: 185652, dependent: 6906, dependent conditional: 4123, dependent unconditional: 2783, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 326464, independent: 319558, independent conditional: 133906, independent unconditional: 185652, dependent: 6906, dependent conditional: 4123, dependent unconditional: 2783, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 317, independent: 312, independent conditional: 54, independent unconditional: 258, dependent: 5, dependent conditional: 3, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 317, independent: 308, independent conditional: 0, independent unconditional: 308, dependent: 9, dependent conditional: 0, dependent unconditional: 9, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 9, independent: 4, independent conditional: 2, independent unconditional: 2, dependent: 5, dependent conditional: 3, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 9, independent: 4, independent conditional: 2, independent unconditional: 2, dependent: 5, dependent conditional: 3, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 44, independent: 6, independent conditional: 3, independent unconditional: 3, dependent: 38, dependent conditional: 36, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 326464, independent: 319246, independent conditional: 133852, independent unconditional: 185394, dependent: 6901, dependent conditional: 4120, dependent unconditional: 2781, unknown: 317, unknown conditional: 57, unknown unconditional: 260] , Statistics on independence cache: Total cache size (in pairs): 317, Positive cache size: 312, Positive conditional cache size: 54, Positive unconditional cache size: 258, Negative cache size: 5, Negative conditional cache size: 3, Negative unconditional cache size: 2, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 11695, Maximal queried relation: 3, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 326464, independent: 319558, independent conditional: 144473, independent unconditional: 175085, dependent: 6906, dependent conditional: 5251, dependent unconditional: 1655, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 326464, independent: 319558, independent conditional: 133906, independent unconditional: 185652, dependent: 6906, dependent conditional: 4123, dependent unconditional: 2783, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 326464, independent: 319558, independent conditional: 133906, independent unconditional: 185652, dependent: 6906, dependent conditional: 4123, dependent unconditional: 2783, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 317, independent: 312, independent conditional: 54, independent unconditional: 258, dependent: 5, dependent conditional: 3, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 317, independent: 308, independent conditional: 0, independent unconditional: 308, dependent: 9, dependent conditional: 0, dependent unconditional: 9, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 9, independent: 4, independent conditional: 2, independent unconditional: 2, dependent: 5, dependent conditional: 3, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 9, independent: 4, independent conditional: 2, independent unconditional: 2, dependent: 5, dependent conditional: 3, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 44, independent: 6, independent conditional: 3, independent unconditional: 3, dependent: 38, dependent conditional: 36, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 326464, independent: 319246, independent conditional: 133852, independent unconditional: 185394, dependent: 6901, dependent conditional: 4120, dependent unconditional: 2781, unknown: 317, unknown conditional: 57, unknown unconditional: 260] , Statistics on independence cache: Total cache size (in pairs): 317, Positive cache size: 312, Positive conditional cache size: 54, Positive unconditional cache size: 258, Negative cache size: 5, Negative conditional cache size: 3, Negative unconditional cache size: 2, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 11695 ], Independence queries for same thread: 12531 - PositiveResult [Line: 86]: assertion always holds For all program executions holds that assertion always holds at this location - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 9 procedures, 57 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 187.7s, OverallIterations: 11, TraceHistogramMax: 0, PathProgramHistogramMax: 170, EmptinessCheckTime: 183.8s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 149, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 562 NumberOfCodeBlocks, 562 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 747 ConstructedInterpolants, 0 QuantifiedInterpolants, 3513 SizeOfPredicates, 30 NumberOfNonLiveVariables, 546 ConjunctsInSsa, 50 ConjunctsInUnsatCore, 23 InterpolantComputations, 5 PerfectInterpolantSequences, 80/134 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 177.6s, ConditionalCommutativityIAIntegrations: 0, ConditionalCommutativityDFSRestarts: 3, ConditionalCommutativityConditionCalculations: 2000, ConditionalCommutativityTraceChecks: 317, ConditionalCommutativityImperfectProofs: 182 - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold RESULT: Ultimate proved your program to be correct! [2024-05-04 04:17:28,158 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2024-05-04 04:17:28,370 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...