/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerBplInline.xml -i ../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/test/hard1.wvr.bpl -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-04 04:45:19,627 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-04 04:45:19,711 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-04 04:45:19,715 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-04 04:45:19,716 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-04 04:45:19,743 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-04 04:45:19,745 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-04 04:45:19,745 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-04 04:45:19,746 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-04 04:45:19,749 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-04 04:45:19,750 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-04 04:45:19,750 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-04 04:45:19,751 INFO L153 SettingsManager]: * Use SBE=true [2024-05-04 04:45:19,753 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-04 04:45:19,753 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-04 04:45:19,753 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-04 04:45:19,753 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-04 04:45:19,754 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-04 04:45:19,754 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-04 04:45:19,754 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-04 04:45:19,754 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-04 04:45:19,755 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-04 04:45:19,755 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-04 04:45:19,755 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-04 04:45:19,755 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-04 04:45:19,756 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-04 04:45:19,756 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-04 04:45:19,756 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-04 04:45:19,756 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-04 04:45:19,757 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-04 04:45:19,758 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-04 04:45:19,758 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-04 04:45:19,758 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-04 04:45:19,759 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-04 04:45:19,759 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-04 04:45:19,759 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-04 04:45:19,759 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-04 04:45:19,759 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-04 04:45:19,759 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-04 04:45:19,760 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT [2024-05-04 04:45:20,066 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-04 04:45:20,106 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-04 04:45:20,109 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-04 04:45:20,110 INFO L270 PluginConnector]: Initializing Boogie PL CUP Parser... [2024-05-04 04:45:20,111 INFO L274 PluginConnector]: Boogie PL CUP Parser initialized [2024-05-04 04:45:20,112 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/test/hard1.wvr.bpl [2024-05-04 04:45:20,112 INFO L110 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/test/hard1.wvr.bpl' [2024-05-04 04:45:20,152 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-04 04:45:20,153 INFO L133 ToolchainWalker]: Walking toolchain with 4 elements. [2024-05-04 04:45:20,154 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-04 04:45:20,154 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-04 04:45:20,154 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-04 04:45:20,166 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:45:20" (1/1) ... [2024-05-04 04:45:20,173 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:45:20" (1/1) ... [2024-05-04 04:45:20,188 INFO L138 Inliner]: procedures = 5, calls = 4, calls flagged for inlining = 0, calls inlined = 0, statements flattened = 0 [2024-05-04 04:45:20,196 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-04 04:45:20,198 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-04 04:45:20,199 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-04 04:45:20,199 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-04 04:45:20,207 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:45:20" (1/1) ... [2024-05-04 04:45:20,207 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:45:20" (1/1) ... [2024-05-04 04:45:20,208 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:45:20" (1/1) ... [2024-05-04 04:45:20,209 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:45:20" (1/1) ... [2024-05-04 04:45:20,213 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:45:20" (1/1) ... [2024-05-04 04:45:20,216 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:45:20" (1/1) ... [2024-05-04 04:45:20,217 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:45:20" (1/1) ... [2024-05-04 04:45:20,218 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:45:20" (1/1) ... [2024-05-04 04:45:20,222 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-04 04:45:20,222 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-04 04:45:20,223 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-04 04:45:20,223 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-04 04:45:20,223 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:45:20" (1/1) ... [2024-05-04 04:45:20,229 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-04 04:45:20,235 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:45:20,250 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-04 04:45:20,255 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-04 04:45:20,294 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread1 given in one single declaration [2024-05-04 04:45:20,294 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-04 04:45:20,294 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-04 04:45:20,294 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread2 given in one single declaration [2024-05-04 04:45:20,294 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-04 04:45:20,294 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-04 04:45:20,294 INFO L124 BoogieDeclarations]: Specification and implementation of procedure ULTIMATE.start given in one single declaration [2024-05-04 04:45:20,295 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-04 04:45:20,295 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-04 04:45:20,295 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread3 given in one single declaration [2024-05-04 04:45:20,295 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-04 04:45:20,295 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-04 04:45:20,295 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread4 given in one single declaration [2024-05-04 04:45:20,295 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-04 04:45:20,295 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-04 04:45:20,296 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-04 04:45:20,341 INFO L241 CfgBuilder]: Building ICFG [2024-05-04 04:45:20,342 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-04 04:45:20,428 INFO L282 CfgBuilder]: Performing block encoding [2024-05-04 04:45:20,451 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-04 04:45:20,451 INFO L309 CfgBuilder]: Removed 0 assume(true) statements. [2024-05-04 04:45:20,452 INFO L201 PluginConnector]: Adding new model hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.05 04:45:20 BoogieIcfgContainer [2024-05-04 04:45:20,452 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-04 04:45:20,458 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-04 04:45:20,458 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-04 04:45:20,462 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-04 04:45:20,462 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.05 04:45:20" (1/2) ... [2024-05-04 04:45:20,463 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@52fd4256 and model type hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.05 04:45:20, skipping insertion in model container [2024-05-04 04:45:20,463 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "hard1.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.05 04:45:20" (2/2) ... [2024-05-04 04:45:20,464 INFO L112 eAbstractionObserver]: Analyzing ICFG hard1.wvr.bpl [2024-05-04 04:45:20,472 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-04 04:45:20,480 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-04 04:45:20,480 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-04 04:45:20,480 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-04 04:45:20,519 INFO L144 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2024-05-04 04:45:20,554 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-04 04:45:20,554 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-04 04:45:20,554 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:45:20,555 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-04 04:45:20,561 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-04 04:45:20,591 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-04 04:45:20,601 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:20,603 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-04 04:45:20,610 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@34a515a5, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=false, mConComCheckerCriterionLimit=1, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-04 04:45:20,610 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-04 04:45:20,653 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:20,655 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:20,655 INFO L85 PathProgramCache]: Analyzing trace with hash -621923702, now seen corresponding path program 1 times [2024-05-04 04:45:20,663 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:20,664 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212886871] [2024-05-04 04:45:20,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:20,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:20,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:20,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:20,819 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:20,819 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1212886871] [2024-05-04 04:45:20,820 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1212886871] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-04 04:45:20,820 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-04 04:45:20,820 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-05-04 04:45:20,821 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2036114727] [2024-05-04 04:45:20,822 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-04 04:45:20,826 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-05-04 04:45:20,826 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:20,846 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-05-04 04:45:20,847 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-04 04:45:20,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:20,849 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:20,850 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 2 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:20,850 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:20,907 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:20,908 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-05-04 04:45:20,908 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:20,909 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:20,909 INFO L85 PathProgramCache]: Analyzing trace with hash 234596136, now seen corresponding path program 1 times [2024-05-04 04:45:20,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:20,909 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373762707] [2024-05-04 04:45:20,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:20,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:20,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:20,968 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:20,968 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:20,968 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373762707] [2024-05-04 04:45:20,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [373762707] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-04 04:45:20,969 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-04 04:45:20,969 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-05-04 04:45:20,969 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [550202908] [2024-05-04 04:45:20,969 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-04 04:45:20,971 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-05-04 04:45:20,971 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:20,971 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-05-04 04:45:20,972 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-04 04:45:20,972 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:20,972 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:20,973 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:20,973 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:20,973 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:21,520 INFO L85 PathProgramCache]: Analyzing trace with hash -533372148, now seen corresponding path program 1 times [2024-05-04 04:45:21,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:21,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:21,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:21,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:21,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:21,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:21,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:21,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:21,611 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-04 04:45:21,611 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-05-04 04:45:21,732 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:21,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:21,733 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,SelfDestructingSolverStorable2,SelfDestructingSolverStorable1 [2024-05-04 04:45:21,733 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:21,734 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:21,734 INFO L85 PathProgramCache]: Analyzing trace with hash 1758924068, now seen corresponding path program 1 times [2024-05-04 04:45:21,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:21,734 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1681211305] [2024-05-04 04:45:21,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:21,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:21,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:21,767 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:21,768 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:21,768 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1681211305] [2024-05-04 04:45:21,768 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1681211305] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-04 04:45:21,768 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-04 04:45:21,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-05-04 04:45:21,769 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [437386208] [2024-05-04 04:45:21,769 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-04 04:45:21,769 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-05-04 04:45:21,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:21,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-05-04 04:45:21,770 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-04 04:45:21,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:21,770 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:21,771 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:21,771 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:21,771 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:21,771 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:22,073 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 1 times [2024-05-04 04:45:22,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:22,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:22,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:22,091 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:22,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:22,166 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:22,167 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:22,167 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:22,167 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,SelfDestructingSolverStorable5 [2024-05-04 04:45:22,167 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:22,168 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:22,168 INFO L85 PathProgramCache]: Analyzing trace with hash 916764404, now seen corresponding path program 1 times [2024-05-04 04:45:22,170 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:22,171 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1221818221] [2024-05-04 04:45:22,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:22,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:22,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:22,249 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:22,249 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:22,250 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1221818221] [2024-05-04 04:45:22,250 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1221818221] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-04 04:45:22,251 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-04 04:45:22,251 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-05-04 04:45:22,251 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2130457706] [2024-05-04 04:45:22,251 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-04 04:45:22,251 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-05-04 04:45:22,252 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:22,252 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-04 04:45:22,252 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-05-04 04:45:22,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:22,252 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:22,253 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.2) internal successors, (21), 4 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:22,253 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:22,253 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:22,253 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:22,253 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:22,484 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 2 times [2024-05-04 04:45:22,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:22,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:22,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:22,501 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:22,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:22,612 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 1 times [2024-05-04 04:45:22,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:22,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:22,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:22,617 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:22,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:22,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:22,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:22,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:22,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:22,644 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6 [2024-05-04 04:45:22,645 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:22,645 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:22,645 INFO L85 PathProgramCache]: Analyzing trace with hash -786792554, now seen corresponding path program 1 times [2024-05-04 04:45:22,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:22,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [512895248] [2024-05-04 04:45:22,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:22,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:22,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:22,746 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:45:22,746 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:22,747 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [512895248] [2024-05-04 04:45:22,747 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [512895248] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:45:22,747 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [243451218] [2024-05-04 04:45:22,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:22,747 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:45:22,747 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:45:22,752 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:45:22,764 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-04 04:45:22,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:22,804 INFO L262 TraceCheckSpWp]: Trace formula consists of 66 conjuncts, 9 conjunts are in the unsatisfiable core [2024-05-04 04:45:22,806 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:45:22,841 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:45:22,841 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:45:22,927 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:45:22,928 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [243451218] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:45:22,928 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:45:22,928 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 6 [2024-05-04 04:45:22,929 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [511887849] [2024-05-04 04:45:22,929 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:45:22,929 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-05-04 04:45:22,929 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:22,930 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-04 04:45:22,930 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2024-05-04 04:45:22,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:22,930 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:22,930 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.5714285714285716) internal successors, (25), 6 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:22,930 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:22,930 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:22,930 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:22,930 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:22,931 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:23,159 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 3 times [2024-05-04 04:45:23,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:23,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:23,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:23,165 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:23,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:23,301 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 2 times [2024-05-04 04:45:23,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:23,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:23,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:23,311 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:23,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:23,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:23,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:23,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:23,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:23,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:23,348 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-05-04 04:45:23,546 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10,SelfDestructingSolverStorable11,SelfDestructingSolverStorable9 [2024-05-04 04:45:23,546 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:23,547 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:23,547 INFO L85 PathProgramCache]: Analyzing trace with hash 1906786232, now seen corresponding path program 2 times [2024-05-04 04:45:23,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:23,547 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993126344] [2024-05-04 04:45:23,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:23,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:23,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:23,646 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:23,646 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:23,646 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1993126344] [2024-05-04 04:45:23,646 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1993126344] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:45:23,647 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2120106490] [2024-05-04 04:45:23,647 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-04 04:45:23,647 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:45:23,647 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:45:23,648 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:45:23,685 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-04 04:45:23,717 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-04 04:45:23,717 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:45:23,718 INFO L262 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 7 conjunts are in the unsatisfiable core [2024-05-04 04:45:23,719 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:45:23,784 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:23,785 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:45:23,895 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:23,896 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2120106490] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:45:23,896 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:45:23,897 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7, 6] total 13 [2024-05-04 04:45:23,897 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [746746706] [2024-05-04 04:45:23,897 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:45:23,898 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-05-04 04:45:23,898 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:23,899 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-05-04 04:45:23,900 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2024-05-04 04:45:23,900 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:23,900 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:23,900 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 3.7857142857142856) internal successors, (53), 13 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:23,900 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:23,900 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:23,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:23,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:23,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:23,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:24,103 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 4 times [2024-05-04 04:45:24,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:24,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:24,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:24,107 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:24,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:24,307 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 3 times [2024-05-04 04:45:24,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:24,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:24,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:24,315 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:24,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:24,417 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:24,417 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:24,418 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:24,418 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:24,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:24,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-04 04:45:24,435 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-05-04 04:45:24,630 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12,SelfDestructingSolverStorable13,SelfDestructingSolverStorable14 [2024-05-04 04:45:24,631 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:24,631 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:24,631 INFO L85 PathProgramCache]: Analyzing trace with hash -1295890888, now seen corresponding path program 3 times [2024-05-04 04:45:24,631 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:24,632 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1631524382] [2024-05-04 04:45:24,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:24,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:24,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:24,739 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:24,740 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:24,740 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1631524382] [2024-05-04 04:45:24,741 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1631524382] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:45:24,741 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [115302377] [2024-05-04 04:45:24,741 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-04 04:45:24,741 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:45:24,741 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:45:24,742 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:45:24,745 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-05-04 04:45:24,777 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2024-05-04 04:45:24,778 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:45:24,778 INFO L262 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 7 conjunts are in the unsatisfiable core [2024-05-04 04:45:24,779 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:45:24,839 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:24,839 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:45:24,955 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:24,955 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [115302377] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:45:24,955 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:45:24,955 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 13 [2024-05-04 04:45:24,955 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828100336] [2024-05-04 04:45:24,956 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:45:24,957 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-05-04 04:45:24,957 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:24,957 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-05-04 04:45:24,958 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=119, Unknown=0, NotChecked=0, Total=182 [2024-05-04 04:45:24,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:24,958 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:24,958 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 3.7857142857142856) internal successors, (53), 13 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:24,958 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:24,958 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:24,958 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:24,958 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:24,958 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:24,958 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-04 04:45:24,958 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:25,160 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 5 times [2024-05-04 04:45:25,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:25,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:25,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:25,163 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:25,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:25,322 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 4 times [2024-05-04 04:45:25,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:25,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:25,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:25,326 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:25,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:25,646 INFO L85 PathProgramCache]: Analyzing trace with hash 364352299, now seen corresponding path program 1 times [2024-05-04 04:45:25,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:25,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:25,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:25,712 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:25,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:25,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:25,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:25,747 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:25,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:25,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:25,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:25,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:25,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:25,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-05-04 04:45:25,790 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-04 04:45:25,798 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-05-04 04:45:25,995 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,SelfDestructingSolverStorable19,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15,SelfDestructingSolverStorable16,SelfDestructingSolverStorable17 [2024-05-04 04:45:25,996 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:25,996 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:25,996 INFO L85 PathProgramCache]: Analyzing trace with hash 739879450, now seen corresponding path program 1 times [2024-05-04 04:45:25,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:25,996 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [921538217] [2024-05-04 04:45:25,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:25,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:26,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:26,069 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:45:26,069 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:26,069 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [921538217] [2024-05-04 04:45:26,069 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [921538217] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-04 04:45:26,069 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-04 04:45:26,069 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-05-04 04:45:26,069 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2097771285] [2024-05-04 04:45:26,069 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-04 04:45:26,070 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-05-04 04:45:26,070 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:26,070 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-04 04:45:26,070 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2024-05-04 04:45:26,070 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:26,071 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:26,071 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.857142857142857) internal successors, (27), 6 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:26,071 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:26,071 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:26,071 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:26,071 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:26,071 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:26,071 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-05-04 04:45:26,071 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-05-04 04:45:26,071 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:26,221 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 6 times [2024-05-04 04:45:26,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:26,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:26,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:26,224 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:26,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:26,378 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 5 times [2024-05-04 04:45:26,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:26,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:26,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:26,384 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:26,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:27,118 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:27,118 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:27,118 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:27,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:27,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:27,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-04 04:45:27,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-04 04:45:27,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-04 04:45:27,120 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,SelfDestructingSolverStorable21,SelfDestructingSolverStorable22 [2024-05-04 04:45:27,121 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:27,121 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:27,121 INFO L85 PathProgramCache]: Analyzing trace with hash 172599902, now seen corresponding path program 2 times [2024-05-04 04:45:27,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:27,121 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1799491265] [2024-05-04 04:45:27,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:27,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:27,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:27,242 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:27,242 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:27,242 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1799491265] [2024-05-04 04:45:27,243 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1799491265] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:45:27,243 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1547104179] [2024-05-04 04:45:27,243 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-04 04:45:27,243 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:45:27,243 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:45:27,244 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:45:27,270 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-05-04 04:45:27,282 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-04 04:45:27,282 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:45:27,282 INFO L262 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-04 04:45:27,283 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:45:27,325 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:27,325 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:45:27,502 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:27,503 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1547104179] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:45:27,503 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:45:27,503 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9, 8] total 17 [2024-05-04 04:45:27,503 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1230318491] [2024-05-04 04:45:27,503 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:45:27,504 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2024-05-04 04:45:27,504 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:27,504 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-05-04 04:45:27,505 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=218, Unknown=0, NotChecked=0, Total=306 [2024-05-04 04:45:27,505 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:27,505 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:27,505 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.6666666666666665) internal successors, (48), 17 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:27,505 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:27,505 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:27,505 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:27,505 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:27,505 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:27,505 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 23 states. [2024-05-04 04:45:27,505 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-05-04 04:45:27,505 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-04 04:45:27,505 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:27,747 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 7 times [2024-05-04 04:45:27,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:27,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:27,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:27,751 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:27,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:27,927 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 6 times [2024-05-04 04:45:27,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:27,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:27,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:27,930 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:27,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:28,745 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:28,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:28,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:28,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:28,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:28,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-04 04:45:28,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-04 04:45:28,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-04 04:45:28,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:45:28,755 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-05-04 04:45:28,951 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23,SelfDestructingSolverStorable24,SelfDestructingSolverStorable25 [2024-05-04 04:45:28,952 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:28,952 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:28,952 INFO L85 PathProgramCache]: Analyzing trace with hash 1330659456, now seen corresponding path program 3 times [2024-05-04 04:45:28,952 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:28,952 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091796909] [2024-05-04 04:45:28,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:28,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:28,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:29,185 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:45:29,186 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:29,186 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091796909] [2024-05-04 04:45:29,186 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2091796909] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:45:29,186 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1674570674] [2024-05-04 04:45:29,186 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-04 04:45:29,186 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:45:29,186 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:45:29,187 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:45:29,207 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-05-04 04:45:29,220 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2024-05-04 04:45:29,220 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:45:29,221 INFO L262 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 21 conjunts are in the unsatisfiable core [2024-05-04 04:45:29,222 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:45:29,400 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:29,400 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:45:29,833 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:29,834 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1674570674] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:45:29,834 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:45:29,834 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 12] total 28 [2024-05-04 04:45:29,834 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [27633126] [2024-05-04 04:45:29,834 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:45:29,835 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2024-05-04 04:45:29,835 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:29,838 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2024-05-04 04:45:29,838 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=142, Invalid=670, Unknown=0, NotChecked=0, Total=812 [2024-05-04 04:45:29,838 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:29,840 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:29,840 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 2.103448275862069) internal successors, (61), 28 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:29,841 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:29,841 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:29,841 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:29,841 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:29,841 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:29,841 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 23 states. [2024-05-04 04:45:29,841 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-05-04 04:45:29,841 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-04 04:45:29,841 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:45:29,841 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:30,127 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 8 times [2024-05-04 04:45:30,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:30,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:30,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:30,131 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:30,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:30,414 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 7 times [2024-05-04 04:45:30,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:30,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:30,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:30,418 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:30,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:32,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:32,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:32,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:32,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:32,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:32,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-04 04:45:32,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-04 04:45:32,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-04 04:45:32,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:45:32,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2024-05-04 04:45:32,532 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-05-04 04:45:32,728 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28 [2024-05-04 04:45:32,729 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:32,729 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:32,729 INFO L85 PathProgramCache]: Analyzing trace with hash 2055959714, now seen corresponding path program 4 times [2024-05-04 04:45:32,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:32,729 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958589713] [2024-05-04 04:45:32,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:32,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:32,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:32,760 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:32,760 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:32,760 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958589713] [2024-05-04 04:45:32,761 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1958589713] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-04 04:45:32,761 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-04 04:45:32,761 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-05-04 04:45:32,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1825546379] [2024-05-04 04:45:32,762 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-04 04:45:32,763 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-05-04 04:45:32,763 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:32,763 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-04 04:45:32,763 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-05-04 04:45:32,763 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:32,763 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:32,764 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.2) internal successors, (31), 5 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:32,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:32,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:32,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:32,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:32,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:32,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 23 states. [2024-05-04 04:45:32,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-05-04 04:45:32,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-04 04:45:32,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:45:32,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 42 states. [2024-05-04 04:45:32,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:32,897 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 9 times [2024-05-04 04:45:32,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:32,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:32,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:32,900 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:32,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:33,027 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 8 times [2024-05-04 04:45:33,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:33,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:33,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:33,030 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:33,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:36,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:36,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:36,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:36,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:36,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:36,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:45:36,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-04 04:45:36,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-04 04:45:36,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:45:36,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:45:36,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:36,557 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,SelfDestructingSolverStorable30,SelfDestructingSolverStorable31 [2024-05-04 04:45:36,557 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:36,558 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:36,558 INFO L85 PathProgramCache]: Analyzing trace with hash 1271043538, now seen corresponding path program 5 times [2024-05-04 04:45:36,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:36,558 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1882062522] [2024-05-04 04:45:36,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:36,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:36,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:36,722 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:36,722 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:36,722 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1882062522] [2024-05-04 04:45:36,722 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1882062522] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:45:36,723 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [758480666] [2024-05-04 04:45:36,723 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-05-04 04:45:36,723 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:45:36,723 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:45:36,724 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:45:36,732 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-05-04 04:45:36,761 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2024-05-04 04:45:36,761 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:45:36,762 INFO L262 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 18 conjunts are in the unsatisfiable core [2024-05-04 04:45:36,763 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:45:36,905 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:36,905 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:45:37,343 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:37,344 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [758480666] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:45:37,344 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:45:37,344 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10] total 24 [2024-05-04 04:45:37,344 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1026510936] [2024-05-04 04:45:37,344 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:45:37,344 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2024-05-04 04:45:37,345 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:37,345 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-05-04 04:45:37,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=130, Invalid=470, Unknown=0, NotChecked=0, Total=600 [2024-05-04 04:45:37,346 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:37,346 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:37,346 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 2.24) internal successors, (56), 24 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:37,346 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:37,346 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:37,346 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:37,346 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:37,346 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:37,346 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:45:37,346 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-05-04 04:45:37,346 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-04 04:45:37,346 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:45:37,346 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:45:37,347 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:37,347 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:37,597 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 10 times [2024-05-04 04:45:37,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:37,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:37,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:37,600 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:37,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:37,917 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 9 times [2024-05-04 04:45:37,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:37,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:37,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:37,921 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:37,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:42,837 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 1 times [2024-05-04 04:45:42,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:42,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:42,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:42,840 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:42,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:46,595 INFO L85 PathProgramCache]: Analyzing trace with hash -589563351, now seen corresponding path program 1 times [2024-05-04 04:45:46,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:46,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:46,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:46,600 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:46,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:46,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:46,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:46,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:46,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:46,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:46,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:45:46,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-04 04:45:46,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:45:46,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-05-04 04:45:46,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:45:46,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:46,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-04 04:45:46,694 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2024-05-04 04:45:46,887 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32,SelfDestructingSolverStorable33,SelfDestructingSolverStorable34,SelfDestructingSolverStorable35,SelfDestructingSolverStorable36 [2024-05-04 04:45:46,887 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:46,888 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:46,888 INFO L85 PathProgramCache]: Analyzing trace with hash 171547572, now seen corresponding path program 1 times [2024-05-04 04:45:46,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:46,888 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [705478051] [2024-05-04 04:45:46,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:46,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:46,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:46,939 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:46,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:46,940 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [705478051] [2024-05-04 04:45:46,940 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [705478051] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:45:46,940 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1888486446] [2024-05-04 04:45:46,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:46,940 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:45:46,940 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:45:46,941 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:45:46,959 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-05-04 04:45:46,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:46,972 INFO L262 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 7 conjunts are in the unsatisfiable core [2024-05-04 04:45:46,973 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:45:47,014 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:47,014 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:45:47,081 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:45:47,081 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1888486446] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:45:47,081 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:45:47,081 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 13 [2024-05-04 04:45:47,082 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [811565846] [2024-05-04 04:45:47,082 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:45:47,083 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-05-04 04:45:47,083 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:47,083 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-05-04 04:45:47,083 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2024-05-04 04:45:47,083 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:47,083 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:47,084 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 3.7857142857142856) internal successors, (53), 13 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 27 states. [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-04 04:45:47,084 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:47,255 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 11 times [2024-05-04 04:45:47,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:47,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:47,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:47,258 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:47,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:47,426 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 10 times [2024-05-04 04:45:47,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:47,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:47,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:47,429 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:47,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:51,696 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 2 times [2024-05-04 04:45:51,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:51,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:51,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:51,699 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:51,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:55,604 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 1 times [2024-05-04 04:45:55,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:55,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:55,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:55,609 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:55,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:55,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:55,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:55,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:55,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:55,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:55,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:45:55,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-05-04 04:45:55,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:45:55,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:45:55,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:45:55,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:55,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-04 04:45:55,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:45:55,676 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-05-04 04:45:55,870 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,SelfDestructingSolverStorable41,SelfDestructingSolverStorable37,SelfDestructingSolverStorable38,9 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2024-05-04 04:45:55,871 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:45:55,871 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:45:55,871 INFO L85 PathProgramCache]: Analyzing trace with hash -1662803438, now seen corresponding path program 1 times [2024-05-04 04:45:55,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:45:55,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [314692994] [2024-05-04 04:45:55,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:55,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:55,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:56,003 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:45:56,004 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:45:56,004 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [314692994] [2024-05-04 04:45:56,004 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [314692994] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:45:56,004 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [743553338] [2024-05-04 04:45:56,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:56,004 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:45:56,004 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:45:56,005 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:45:56,029 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-05-04 04:45:56,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:45:56,047 INFO L262 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 15 conjunts are in the unsatisfiable core [2024-05-04 04:45:56,048 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:45:56,085 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:45:56,086 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:45:56,187 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:45:56,188 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [743553338] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:45:56,188 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:45:56,188 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 12 [2024-05-04 04:45:56,188 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1183181219] [2024-05-04 04:45:56,188 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:45:56,188 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2024-05-04 04:45:56,188 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:45:56,189 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-05-04 04:45:56,189 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2024-05-04 04:45:56,189 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:56,189 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:45:56,189 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:45:56,189 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:45:56,190 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:45:56,399 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 12 times [2024-05-04 04:45:56,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:56,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:56,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:56,401 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:56,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:56,536 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 11 times [2024-05-04 04:45:56,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:45:56,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:45:56,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:45:56,539 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:45:56,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:00,354 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 3 times [2024-05-04 04:46:00,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:00,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:00,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:00,357 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:00,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:04,264 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 2 times [2024-05-04 04:46:04,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:04,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:04,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:04,270 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:04,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:04,394 INFO L85 PathProgramCache]: Analyzing trace with hash 23256196, now seen corresponding path program 1 times [2024-05-04 04:46:04,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:04,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:04,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:46:04,476 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:46:04,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:04,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:04,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:46:04,520 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:46:04,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:04,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:04,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:04,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:04,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:46:04,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:04,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-05-04 04:46:04,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:46:04,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:46:04,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:04,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:04,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-04 04:46:04,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:04,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:46:04,547 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-05-04 04:46:04,748 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42,SelfDestructingSolverStorable43,SelfDestructingSolverStorable44,10 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable45,SelfDestructingSolverStorable46,SelfDestructingSolverStorable47,SelfDestructingSolverStorable48 [2024-05-04 04:46:04,748 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:46:04,749 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:46:04,749 INFO L85 PathProgramCache]: Analyzing trace with hash 728651000, now seen corresponding path program 2 times [2024-05-04 04:46:04,749 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:46:04,749 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065014579] [2024-05-04 04:46:04,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:04,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:04,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:46:04,844 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:46:04,845 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:46:04,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1065014579] [2024-05-04 04:46:04,845 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1065014579] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:46:04,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1979352472] [2024-05-04 04:46:04,845 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-04 04:46:04,845 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:46:04,845 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:46:04,846 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:46:04,871 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-05-04 04:46:04,887 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-04 04:46:04,887 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:46:04,888 INFO L262 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 11 conjunts are in the unsatisfiable core [2024-05-04 04:46:04,889 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:46:04,990 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:46:04,990 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:46:05,140 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:46:05,141 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1979352472] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:46:05,141 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:46:05,141 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 10] total 24 [2024-05-04 04:46:05,142 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [621768336] [2024-05-04 04:46:05,142 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:46:05,142 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2024-05-04 04:46:05,143 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:46:05,143 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-05-04 04:46:05,143 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=175, Invalid=425, Unknown=0, NotChecked=0, Total=600 [2024-05-04 04:46:05,143 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:46:05,143 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:46:05,144 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 2.28) internal successors, (57), 24 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:46:05,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:46:05,317 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 13 times [2024-05-04 04:46:05,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:05,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:05,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:05,320 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:05,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:05,540 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 12 times [2024-05-04 04:46:05,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:05,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:05,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:05,543 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:05,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:10,029 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 4 times [2024-05-04 04:46:10,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:10,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:10,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:10,032 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:10,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:13,993 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 3 times [2024-05-04 04:46:13,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:13,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:13,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:13,998 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:14,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:14,164 INFO L85 PathProgramCache]: Analyzing trace with hash -1128623139, now seen corresponding path program 1 times [2024-05-04 04:46:14,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:14,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:14,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:14,177 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:14,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:14,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:14,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:14,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:14,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:14,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:46:14,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:14,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:46:14,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:46:14,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:46:14,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:14,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:14,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:46:14,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:14,255 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:46:14,255 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:14,264 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2024-05-04 04:46:14,461 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable50,SelfDestructingSolverStorable51,SelfDestructingSolverStorable52,SelfDestructingSolverStorable53,SelfDestructingSolverStorable54,SelfDestructingSolverStorable49 [2024-05-04 04:46:14,461 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:46:14,461 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:46:14,462 INFO L85 PathProgramCache]: Analyzing trace with hash 1358718076, now seen corresponding path program 3 times [2024-05-04 04:46:14,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:46:14,462 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930957186] [2024-05-04 04:46:14,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:14,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:14,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:46:14,559 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:46:14,559 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:46:14,559 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930957186] [2024-05-04 04:46:14,559 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1930957186] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:46:14,559 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [906161516] [2024-05-04 04:46:14,560 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-04 04:46:14,560 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:46:14,560 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:46:14,561 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:46:14,565 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-05-04 04:46:14,597 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2024-05-04 04:46:14,597 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:46:14,598 INFO L262 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 11 conjunts are in the unsatisfiable core [2024-05-04 04:46:14,599 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:46:14,685 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:46:14,685 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:46:14,843 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:46:14,843 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [906161516] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:46:14,843 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:46:14,843 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 10] total 22 [2024-05-04 04:46:14,843 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1899015829] [2024-05-04 04:46:14,843 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:46:14,843 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-05-04 04:46:14,844 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:46:14,844 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-05-04 04:46:14,844 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=148, Invalid=358, Unknown=0, NotChecked=0, Total=506 [2024-05-04 04:46:14,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:46:14,845 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:46:14,845 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 2.4782608695652173) internal successors, (57), 22 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:46:14,845 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:14,845 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:14,845 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:14,845 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:14,845 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:46:14,846 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:14,846 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:46:14,846 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:46:14,846 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:46:14,846 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:14,846 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:14,846 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:46:14,846 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:14,846 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:46:14,846 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:14,846 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:46:15,109 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 14 times [2024-05-04 04:46:15,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:15,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:15,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:15,115 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:15,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:15,295 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 13 times [2024-05-04 04:46:15,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:15,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:15,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:15,298 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:15,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:19,665 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 5 times [2024-05-04 04:46:19,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:19,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:19,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:19,668 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:19,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:23,474 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 4 times [2024-05-04 04:46:23,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:23,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:23,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:23,477 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:23,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:23,602 INFO L85 PathProgramCache]: Analyzing trace with hash -1128623139, now seen corresponding path program 2 times [2024-05-04 04:46:23,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:23,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:23,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:23,608 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:23,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:23,747 INFO L85 PathProgramCache]: Analyzing trace with hash -209097279, now seen corresponding path program 1 times [2024-05-04 04:46:23,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:23,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:23,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:23,752 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:23,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:23,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:23,772 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2024-05-04 04:46:23,972 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60,SelfDestructingSolverStorable61,SelfDestructingSolverStorable55,SelfDestructingSolverStorable56,SelfDestructingSolverStorable57,SelfDestructingSolverStorable58,12 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable59 [2024-05-04 04:46:23,972 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:46:23,973 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:46:23,973 INFO L85 PathProgramCache]: Analyzing trace with hash -1271076066, now seen corresponding path program 4 times [2024-05-04 04:46:23,973 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:46:23,973 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1204787652] [2024-05-04 04:46:23,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:23,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:23,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:46:24,137 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:46:24,137 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:46:24,137 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1204787652] [2024-05-04 04:46:24,138 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1204787652] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:46:24,138 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [866567706] [2024-05-04 04:46:24,138 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-05-04 04:46:24,138 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:46:24,138 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:46:24,139 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:46:24,163 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-05-04 04:46:24,179 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-05-04 04:46:24,179 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:46:24,180 INFO L262 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 21 conjunts are in the unsatisfiable core [2024-05-04 04:46:24,181 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:46:24,220 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:46:24,220 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:46:24,341 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-04 04:46:24,341 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [866567706] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:46:24,341 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:46:24,341 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 11] total 15 [2024-05-04 04:46:24,342 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [73535929] [2024-05-04 04:46:24,342 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:46:24,342 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2024-05-04 04:46:24,342 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:46:24,342 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-05-04 04:46:24,343 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2024-05-04 04:46:24,343 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:46:24,343 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:46:24,343 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.4375) internal successors, (39), 15 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:46:24,343 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:24,343 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:24,343 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:24,343 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:24,343 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:46:24,343 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:24,343 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:46:24,343 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:46:24,343 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:46:24,344 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:24,344 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:24,344 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:46:24,344 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:24,344 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:46:24,344 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:24,344 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:24,344 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:46:24,586 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 15 times [2024-05-04 04:46:24,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:24,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:24,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:24,588 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:24,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:24,742 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 14 times [2024-05-04 04:46:24,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:24,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:24,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:24,745 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:24,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:28,674 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 6 times [2024-05-04 04:46:28,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:28,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:28,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:28,677 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:28,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:32,510 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 5 times [2024-05-04 04:46:32,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:32,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:32,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:32,517 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:32,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:32,619 INFO L85 PathProgramCache]: Analyzing trace with hash -1128623139, now seen corresponding path program 3 times [2024-05-04 04:46:32,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:32,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:32,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:32,625 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:32,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:32,730 INFO L85 PathProgramCache]: Analyzing trace with hash -209097279, now seen corresponding path program 2 times [2024-05-04 04:46:32,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:32,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:32,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:32,736 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:32,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:32,843 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:32,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:46:32,860 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2024-05-04 04:46:33,050 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62,13 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable63,SelfDestructingSolverStorable64,SelfDestructingSolverStorable65,SelfDestructingSolverStorable66,SelfDestructingSolverStorable67,SelfDestructingSolverStorable68 [2024-05-04 04:46:33,051 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:46:33,051 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:46:33,051 INFO L85 PathProgramCache]: Analyzing trace with hash -1718939230, now seen corresponding path program 5 times [2024-05-04 04:46:33,051 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:46:33,051 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860126557] [2024-05-04 04:46:33,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:33,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:33,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:46:33,192 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 11 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-04 04:46:33,192 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:46:33,192 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [860126557] [2024-05-04 04:46:33,192 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [860126557] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:46:33,192 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1788572856] [2024-05-04 04:46:33,192 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-05-04 04:46:33,193 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:46:33,193 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:46:33,194 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:46:33,211 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-05-04 04:46:33,233 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2024-05-04 04:46:33,233 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:46:33,234 INFO L262 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 15 conjunts are in the unsatisfiable core [2024-05-04 04:46:33,235 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:46:33,326 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-04 04:46:33,326 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:46:33,529 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 14 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:46:33,529 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1788572856] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:46:33,529 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:46:33,529 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 13, 12] total 27 [2024-05-04 04:46:33,529 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1836762943] [2024-05-04 04:46:33,529 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:46:33,529 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2024-05-04 04:46:33,530 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:46:33,530 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2024-05-04 04:46:33,530 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=208, Invalid=548, Unknown=0, NotChecked=0, Total=756 [2024-05-04 04:46:33,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:46:33,530 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:46:33,530 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 2.4285714285714284) internal successors, (68), 27 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:46:33,530 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:33,530 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:33,530 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:33,530 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:46:33,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:46:33,707 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 16 times [2024-05-04 04:46:33,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:33,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:33,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:33,710 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:33,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:33,883 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 15 times [2024-05-04 04:46:33,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:33,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:33,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:33,886 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:33,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:37,833 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 7 times [2024-05-04 04:46:37,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:37,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:37,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:37,835 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:37,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:41,715 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 6 times [2024-05-04 04:46:41,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:41,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:41,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:41,719 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:41,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:41,859 INFO L85 PathProgramCache]: Analyzing trace with hash -1128623139, now seen corresponding path program 4 times [2024-05-04 04:46:41,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:41,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:41,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:41,864 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:41,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:41,990 INFO L85 PathProgramCache]: Analyzing trace with hash -209097279, now seen corresponding path program 3 times [2024-05-04 04:46:41,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:41,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:41,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:41,998 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:42,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:42,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:42,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:46:42,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2024-05-04 04:46:42,689 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2024-05-04 04:46:42,886 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable72,SelfDestructingSolverStorable73,SelfDestructingSolverStorable74,SelfDestructingSolverStorable75,SelfDestructingSolverStorable69 [2024-05-04 04:46:42,887 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:46:42,887 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:46:42,887 INFO L85 PathProgramCache]: Analyzing trace with hash 637920776, now seen corresponding path program 6 times [2024-05-04 04:46:42,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:46:42,887 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1744484342] [2024-05-04 04:46:42,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:42,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:42,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:46:43,312 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-04 04:46:43,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:46:43,312 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1744484342] [2024-05-04 04:46:43,312 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1744484342] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:46:43,312 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [549340644] [2024-05-04 04:46:43,312 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-05-04 04:46:43,313 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:46:43,313 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:46:43,317 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:46:43,339 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-05-04 04:46:43,360 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2024-05-04 04:46:43,360 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:46:43,361 INFO L262 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 37 conjunts are in the unsatisfiable core [2024-05-04 04:46:43,362 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:46:43,625 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 1 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-04 04:46:43,625 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:46:44,405 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 4 proven. 19 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:46:44,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [549340644] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:46:44,405 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:46:44,405 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 19] total 44 [2024-05-04 04:46:44,406 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490806950] [2024-05-04 04:46:44,406 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:46:44,406 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 45 states [2024-05-04 04:46:44,406 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:46:44,406 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2024-05-04 04:46:44,407 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=292, Invalid=1688, Unknown=0, NotChecked=0, Total=1980 [2024-05-04 04:46:44,407 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:46:44,407 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:46:44,408 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 45 states, 45 states have (on average 1.8444444444444446) internal successors, (83), 44 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 42 states. [2024-05-04 04:46:44,408 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:46:44,711 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 17 times [2024-05-04 04:46:44,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:44,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:44,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:44,714 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:44,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:44,972 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 16 times [2024-05-04 04:46:44,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:44,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:44,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:44,974 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:44,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:51,574 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 8 times [2024-05-04 04:46:51,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:51,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:51,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:51,577 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:51,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:56,673 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 7 times [2024-05-04 04:46:56,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:56,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:56,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:56,677 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:56,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:56,888 INFO L85 PathProgramCache]: Analyzing trace with hash -1128623139, now seen corresponding path program 5 times [2024-05-04 04:46:56,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:56,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:56,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:56,899 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:56,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:57,093 INFO L85 PathProgramCache]: Analyzing trace with hash -209097279, now seen corresponding path program 4 times [2024-05-04 04:46:57,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:46:57,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:46:57,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:46:57,098 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:46:57,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:47:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:47:00,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:47:00,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:47:00,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:47:00,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:47:00,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2024-05-04 04:47:00,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 83 states. [2024-05-04 04:47:00,974 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2024-05-04 04:47:01,168 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80,SelfDestructingSolverStorable81,SelfDestructingSolverStorable82,SelfDestructingSolverStorable76,SelfDestructingSolverStorable77,15 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable78,SelfDestructingSolverStorable79 [2024-05-04 04:47:01,169 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:47:01,169 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:47:01,169 INFO L85 PathProgramCache]: Analyzing trace with hash -1187775142, now seen corresponding path program 7 times [2024-05-04 04:47:01,169 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:47:01,169 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1609680472] [2024-05-04 04:47:01,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:01,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:01,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:47:01,523 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-04 04:47:01,523 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:47:01,523 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1609680472] [2024-05-04 04:47:01,523 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1609680472] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:47:01,523 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [646877033] [2024-05-04 04:47:01,524 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-05-04 04:47:01,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:47:01,524 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:47:01,525 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:47:01,528 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-05-04 04:47:01,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:47:01,576 INFO L262 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 34 conjunts are in the unsatisfiable core [2024-05-04 04:47:01,577 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:47:01,832 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-04 04:47:01,833 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:47:02,548 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:47:02,548 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [646877033] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:47:02,548 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:47:02,548 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 15, 16] total 39 [2024-05-04 04:47:02,548 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956901909] [2024-05-04 04:47:02,548 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:47:02,549 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 40 states [2024-05-04 04:47:02,549 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:47:02,549 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2024-05-04 04:47:02,549 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=291, Invalid=1269, Unknown=0, NotChecked=0, Total=1560 [2024-05-04 04:47:02,550 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:47:02,550 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:47:02,550 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 40 states, 40 states have (on average 1.95) internal successors, (78), 39 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 42 states. [2024-05-04 04:47:02,550 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 83 states. [2024-05-04 04:47:02,551 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:47:02,837 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 18 times [2024-05-04 04:47:02,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:02,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:02,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:02,839 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:02,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:03,240 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 17 times [2024-05-04 04:47:03,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:03,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:03,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:03,243 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:03,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:09,564 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 9 times [2024-05-04 04:47:09,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:09,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:09,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:09,566 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:09,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:14,637 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 8 times [2024-05-04 04:47:14,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:14,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:14,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:14,641 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:14,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:14,777 INFO L85 PathProgramCache]: Analyzing trace with hash -1128623139, now seen corresponding path program 6 times [2024-05-04 04:47:14,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:14,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:14,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:14,781 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:14,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:14,922 INFO L85 PathProgramCache]: Analyzing trace with hash -209097279, now seen corresponding path program 5 times [2024-05-04 04:47:14,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:14,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:14,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:14,926 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:14,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:19,113 INFO L85 PathProgramCache]: Analyzing trace with hash -1807860391, now seen corresponding path program 1 times [2024-05-04 04:47:19,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:19,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:19,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:19,117 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:19,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:23,619 INFO L85 PathProgramCache]: Analyzing trace with hash 921933955, now seen corresponding path program 7 times [2024-05-04 04:47:23,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:23,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:23,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:23,625 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:23,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:34,226 INFO L85 PathProgramCache]: Analyzing trace with hash -1484818388, now seen corresponding path program 8 times [2024-05-04 04:47:34,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:34,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:34,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:34,232 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:34,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:35,464 INFO L85 PathProgramCache]: Analyzing trace with hash 1159512009, now seen corresponding path program 6 times [2024-05-04 04:47:35,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:35,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:35,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:35,471 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:35,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2024-05-04 04:47:35,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:47:35,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2024-05-04 04:47:35,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 118 states. [2024-05-04 04:47:35,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 100 states. [2024-05-04 04:47:36,005 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2024-05-04 04:47:36,198 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable90,SelfDestructingSolverStorable91,SelfDestructingSolverStorable92,SelfDestructingSolverStorable93,SelfDestructingSolverStorable83,SelfDestructingSolverStorable84,SelfDestructingSolverStorable85,SelfDestructingSolverStorable86,SelfDestructingSolverStorable87,SelfDestructingSolverStorable88,SelfDestructingSolverStorable89,16 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:47:36,199 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:47:36,199 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:47:36,199 INFO L85 PathProgramCache]: Analyzing trace with hash 1781419018, now seen corresponding path program 8 times [2024-05-04 04:47:36,199 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:47:36,199 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1312939333] [2024-05-04 04:47:36,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:36,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:36,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:47:36,760 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:47:36,761 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:47:36,761 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1312939333] [2024-05-04 04:47:36,761 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1312939333] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:47:36,761 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1296337161] [2024-05-04 04:47:36,761 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-04 04:47:36,761 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:47:36,761 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:47:36,762 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:47:36,764 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-05-04 04:47:36,812 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-04 04:47:36,812 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:47:36,813 INFO L262 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 55 conjunts are in the unsatisfiable core [2024-05-04 04:47:36,814 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:47:36,999 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:47:36,999 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:47:38,429 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:47:38,429 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1296337161] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:47:38,429 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:47:38,429 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 17] total 33 [2024-05-04 04:47:38,429 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [233881007] [2024-05-04 04:47:38,429 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:47:38,430 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2024-05-04 04:47:38,430 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:47:38,430 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2024-05-04 04:47:38,430 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=929, Unknown=0, NotChecked=0, Total=1122 [2024-05-04 04:47:38,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:47:38,430 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:47:38,431 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 2.2058823529411766) internal successors, (75), 33 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:47:38,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-04 04:47:38,432 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 50 states. [2024-05-04 04:47:38,432 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:47:38,432 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 49 states. [2024-05-04 04:47:38,432 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 118 states. [2024-05-04 04:47:38,432 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 100 states. [2024-05-04 04:47:38,432 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:47:38,728 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 19 times [2024-05-04 04:47:38,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:38,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:38,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:38,730 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:38,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:39,043 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 18 times [2024-05-04 04:47:39,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:39,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:39,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:39,045 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:39,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:48,116 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 10 times [2024-05-04 04:47:48,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:48,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:48,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:48,118 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:48,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:53,005 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 9 times [2024-05-04 04:47:53,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:53,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:53,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:53,008 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:53,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:53,143 INFO L85 PathProgramCache]: Analyzing trace with hash -1128623139, now seen corresponding path program 9 times [2024-05-04 04:47:53,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:53,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:53,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:53,147 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:53,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:53,245 INFO L85 PathProgramCache]: Analyzing trace with hash -209097279, now seen corresponding path program 7 times [2024-05-04 04:47:53,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:53,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:53,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:53,249 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:53,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:57,688 INFO L85 PathProgramCache]: Analyzing trace with hash -1807860391, now seen corresponding path program 2 times [2024-05-04 04:47:57,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:47:57,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:47:57,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:47:57,693 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:47:57,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:02,248 INFO L85 PathProgramCache]: Analyzing trace with hash 921933955, now seen corresponding path program 10 times [2024-05-04 04:48:02,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:02,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:02,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:02,253 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:02,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:13,707 INFO L85 PathProgramCache]: Analyzing trace with hash -1484818388, now seen corresponding path program 11 times [2024-05-04 04:48:13,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:13,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:13,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:13,713 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:13,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:14,384 INFO L85 PathProgramCache]: Analyzing trace with hash 1159512009, now seen corresponding path program 8 times [2024-05-04 04:48:14,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:14,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:14,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:14,391 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:14,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:14,891 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 118 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 100 states. [2024-05-04 04:48:14,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2024-05-04 04:48:14,899 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2024-05-04 04:48:15,093 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable94,SelfDestructingSolverStorable95,SelfDestructingSolverStorable96,SelfDestructingSolverStorable97,SelfDestructingSolverStorable98,SelfDestructingSolverStorable104,SelfDestructingSolverStorable99,SelfDestructingSolverStorable100,SelfDestructingSolverStorable101,SelfDestructingSolverStorable102,SelfDestructingSolverStorable103 [2024-05-04 04:48:15,093 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:48:15,093 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:48:15,093 INFO L85 PathProgramCache]: Analyzing trace with hash -1781884722, now seen corresponding path program 9 times [2024-05-04 04:48:15,093 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:48:15,094 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1711451418] [2024-05-04 04:48:15,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:15,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:15,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:48:15,348 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:48:15,349 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:48:15,349 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1711451418] [2024-05-04 04:48:15,349 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1711451418] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:48:15,349 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1411817481] [2024-05-04 04:48:15,349 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-04 04:48:15,349 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:48:15,349 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:48:15,350 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:48:15,351 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-05-04 04:48:15,403 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2024-05-04 04:48:15,404 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:48:15,404 INFO L262 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 34 conjunts are in the unsatisfiable core [2024-05-04 04:48:15,405 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:48:15,514 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 3 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:48:15,514 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:48:15,899 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:48:15,899 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1411817481] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:48:15,899 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:48:15,899 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 17] total 34 [2024-05-04 04:48:15,899 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [412771371] [2024-05-04 04:48:15,899 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:48:15,900 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2024-05-04 04:48:15,900 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:48:15,900 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2024-05-04 04:48:15,901 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=230, Invalid=960, Unknown=0, NotChecked=0, Total=1190 [2024-05-04 04:48:15,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:48:15,901 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:48:15,901 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 2.2) internal successors, (77), 34 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:48:15,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:48:15,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:48:15,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:48:15,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:48:15,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:48:15,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:48:15,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:48:15,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:48:15,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 50 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 49 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 118 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 100 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 70 states. [2024-05-04 04:48:15,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:48:16,160 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 20 times [2024-05-04 04:48:16,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:16,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:16,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:16,162 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:16,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:16,365 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 19 times [2024-05-04 04:48:16,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:16,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:16,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:16,367 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:16,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:22,706 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 11 times [2024-05-04 04:48:22,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:22,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:22,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:22,709 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:22,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:27,649 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 10 times [2024-05-04 04:48:27,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:27,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:27,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:27,653 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:27,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:27,761 INFO L85 PathProgramCache]: Analyzing trace with hash -1128623139, now seen corresponding path program 12 times [2024-05-04 04:48:27,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:27,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:27,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:27,766 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:27,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:27,873 INFO L85 PathProgramCache]: Analyzing trace with hash -209097279, now seen corresponding path program 9 times [2024-05-04 04:48:27,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:27,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:27,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:27,877 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:27,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:32,599 INFO L85 PathProgramCache]: Analyzing trace with hash -1807860391, now seen corresponding path program 3 times [2024-05-04 04:48:32,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:32,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:32,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:32,603 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:32,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:37,344 INFO L85 PathProgramCache]: Analyzing trace with hash 921933955, now seen corresponding path program 13 times [2024-05-04 04:48:37,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:37,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:37,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:37,350 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:37,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:51,464 INFO L85 PathProgramCache]: Analyzing trace with hash -1484818388, now seen corresponding path program 14 times [2024-05-04 04:48:51,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:51,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:51,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:51,469 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:51,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:52,088 INFO L85 PathProgramCache]: Analyzing trace with hash 1159512009, now seen corresponding path program 10 times [2024-05-04 04:48:52,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:52,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:52,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:52,094 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:52,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:52,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:48:52,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 118 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 100 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2024-05-04 04:48:52,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 81 states. [2024-05-04 04:48:52,642 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2024-05-04 04:48:52,837 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable110,SelfDestructingSolverStorable108,SelfDestructingSolverStorable109,18 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable115,SelfDestructingSolverStorable105,SelfDestructingSolverStorable106,SelfDestructingSolverStorable107,SelfDestructingSolverStorable111,SelfDestructingSolverStorable112,SelfDestructingSolverStorable113,SelfDestructingSolverStorable114 [2024-05-04 04:48:52,837 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:48:52,838 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:48:52,838 INFO L85 PathProgramCache]: Analyzing trace with hash -2039313228, now seen corresponding path program 10 times [2024-05-04 04:48:52,838 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:48:52,838 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857282664] [2024-05-04 04:48:52,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:52,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:52,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:48:53,383 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 4 proven. 33 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:48:53,383 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:48:53,383 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [857282664] [2024-05-04 04:48:53,384 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [857282664] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:48:53,384 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1341236104] [2024-05-04 04:48:53,384 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-05-04 04:48:53,384 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:48:53,384 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:48:53,385 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:48:53,387 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-05-04 04:48:53,438 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-05-04 04:48:53,438 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:48:53,439 INFO L262 TraceCheckSpWp]: Trace formula consists of 116 conjuncts, 50 conjunts are in the unsatisfiable core [2024-05-04 04:48:53,441 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:48:53,684 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 1 proven. 30 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:48:53,684 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:48:54,681 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 4 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:48:54,682 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1341236104] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:48:54,682 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:48:54,682 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 22] total 45 [2024-05-04 04:48:54,682 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1875700611] [2024-05-04 04:48:54,682 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:48:54,682 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 46 states [2024-05-04 04:48:54,682 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:48:54,683 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2024-05-04 04:48:54,684 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=326, Invalid=1744, Unknown=0, NotChecked=0, Total=2070 [2024-05-04 04:48:54,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:48:54,684 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:48:54,684 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 46 states, 46 states have (on average 2.0434782608695654) internal successors, (94), 45 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:48:54,684 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:48:54,684 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:48:54,684 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:48:54,684 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:48:54,684 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:48:54,684 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:48:54,684 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-04 04:48:54,684 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:48:54,684 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-04 04:48:54,684 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 50 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 49 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 118 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 100 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 70 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 81 states. [2024-05-04 04:48:54,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:48:55,050 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 21 times [2024-05-04 04:48:55,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:55,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:55,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:55,052 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:55,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:55,384 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 20 times [2024-05-04 04:48:55,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:48:55,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:48:55,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:48:55,386 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:48:55,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:02,787 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 12 times [2024-05-04 04:49:02,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:49:02,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:49:02,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:02,789 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:49:02,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:08,265 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 11 times [2024-05-04 04:49:08,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:49:08,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:49:08,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:08,268 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:49:08,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:08,374 INFO L85 PathProgramCache]: Analyzing trace with hash -1128623139, now seen corresponding path program 15 times [2024-05-04 04:49:08,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:49:08,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:49:08,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:08,378 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:49:08,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:08,633 INFO L85 PathProgramCache]: Analyzing trace with hash -209097279, now seen corresponding path program 11 times [2024-05-04 04:49:08,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:49:08,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:49:08,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:08,636 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:49:08,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:13,557 INFO L85 PathProgramCache]: Analyzing trace with hash -1807860391, now seen corresponding path program 4 times [2024-05-04 04:49:13,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:49:13,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:49:13,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:13,562 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:49:13,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:18,865 INFO L85 PathProgramCache]: Analyzing trace with hash 921933955, now seen corresponding path program 16 times [2024-05-04 04:49:18,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:49:18,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:49:18,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:18,870 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:49:18,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:32,563 INFO L85 PathProgramCache]: Analyzing trace with hash -1484818388, now seen corresponding path program 17 times [2024-05-04 04:49:32,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:49:32,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:49:32,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:32,568 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:49:32,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:33,462 INFO L85 PathProgramCache]: Analyzing trace with hash 1159512009, now seen corresponding path program 12 times [2024-05-04 04:49:33,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:49:33,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:49:33,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:49:33,467 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:49:33,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:50:09,437 INFO L85 PathProgramCache]: Analyzing trace with hash 1585133998, now seen corresponding path program 13 times [2024-05-04 04:50:09,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:50:09,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:50:09,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:50:09,444 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:50:09,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:50:18,015 INFO L85 PathProgramCache]: Analyzing trace with hash 1894513771, now seen corresponding path program 14 times [2024-05-04 04:50:18,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:50:18,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:50:18,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:50:18,021 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:50:18,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:50:23,025 INFO L85 PathProgramCache]: Analyzing trace with hash -1399615156, now seen corresponding path program 15 times [2024-05-04 04:50:23,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:50:23,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:50:23,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:50:23,031 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:50:23,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:50:30,661 INFO L85 PathProgramCache]: Analyzing trace with hash 1838519023, now seen corresponding path program 5 times [2024-05-04 04:50:30,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:50:30,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:50:30,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:50:30,666 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:50:30,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:50:59,596 INFO L85 PathProgramCache]: Analyzing trace with hash 1159514952, now seen corresponding path program 6 times [2024-05-04 04:50:59,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:50:59,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:50:59,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:50:59,602 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:50:59,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:07,434 INFO L85 PathProgramCache]: Analyzing trace with hash 1585225233, now seen corresponding path program 7 times [2024-05-04 04:51:07,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:07,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:07,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:07,440 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:51:07,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:12,328 INFO L85 PathProgramCache]: Analyzing trace with hash 1897342054, now seen corresponding path program 8 times [2024-05-04 04:51:12,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:12,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:12,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:12,334 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:51:12,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:20,886 INFO L85 PathProgramCache]: Analyzing trace with hash -1714382226, now seen corresponding path program 2 times [2024-05-04 04:51:20,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:20,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:20,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:20,894 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:51:20,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:21,293 INFO L85 PathProgramCache]: Analyzing trace with hash -1606241367, now seen corresponding path program 3 times [2024-05-04 04:51:21,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:21,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:21,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:21,300 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:51:21,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:21,455 INFO L85 PathProgramCache]: Analyzing trace with hash 1746125268, now seen corresponding path program 4 times [2024-05-04 04:51:21,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:21,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:21,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:51:21,901 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:51:21,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:21,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:21,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:51:22,096 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:51:22,121 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 125 states. [2024-05-04 04:51:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 110 states. [2024-05-04 04:51:22,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 87 states. [2024-05-04 04:51:22,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 105 states. [2024-05-04 04:51:22,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 152 states. [2024-05-04 04:51:22,128 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2024-05-04 04:51:22,328 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable130,SelfDestructingSolverStorable120,SelfDestructingSolverStorable131,SelfDestructingSolverStorable121,SelfDestructingSolverStorable132,19 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable119,SelfDestructingSolverStorable126,SelfDestructingSolverStorable137,SelfDestructingSolverStorable116,SelfDestructingSolverStorable127,SelfDestructingSolverStorable117,SelfDestructingSolverStorable128,SelfDestructingSolverStorable118,SelfDestructingSolverStorable129,SelfDestructingSolverStorable122,SelfDestructingSolverStorable133,SelfDestructingSolverStorable123,SelfDestructingSolverStorable134,SelfDestructingSolverStorable124,SelfDestructingSolverStorable135,SelfDestructingSolverStorable125,SelfDestructingSolverStorable136 [2024-05-04 04:51:22,328 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:51:22,328 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:51:22,328 INFO L85 PathProgramCache]: Analyzing trace with hash 1407347112, now seen corresponding path program 11 times [2024-05-04 04:51:22,329 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:51:22,329 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [906826939] [2024-05-04 04:51:22,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:22,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:22,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:51:22,891 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:51:22,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:51:22,892 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [906826939] [2024-05-04 04:51:22,892 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [906826939] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:51:22,892 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2014745959] [2024-05-04 04:51:22,892 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-05-04 04:51:22,892 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:51:22,892 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:51:22,893 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:51:22,897 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2024-05-04 04:51:22,945 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2024-05-04 04:51:22,945 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:51:22,946 WARN L260 TraceCheckSpWp]: Trace formula consists of 126 conjuncts, 72 conjunts are in the unsatisfiable core [2024-05-04 04:51:22,947 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:51:23,185 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 1 proven. 51 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:51:23,185 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:51:25,006 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 58 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:51:25,006 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2014745959] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:51:25,006 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:51:25,006 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 19] total 40 [2024-05-04 04:51:25,006 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [805483670] [2024-05-04 04:51:25,007 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:51:25,007 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2024-05-04 04:51:25,007 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:51:25,007 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2024-05-04 04:51:25,007 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=336, Invalid=1304, Unknown=0, NotChecked=0, Total=1640 [2024-05-04 04:51:25,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:51:25,008 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:51:25,008 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 41 states have (on average 2.2195121951219514) internal successors, (91), 40 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 61 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 50 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 70 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 125 states. [2024-05-04 04:51:25,008 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 110 states. [2024-05-04 04:51:25,009 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 87 states. [2024-05-04 04:51:25,009 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 105 states. [2024-05-04 04:51:25,009 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 152 states. [2024-05-04 04:51:25,009 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:51:25,297 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 22 times [2024-05-04 04:51:25,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:25,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:25,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:25,299 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:51:25,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:25,665 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 21 times [2024-05-04 04:51:25,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:25,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:25,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:25,667 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:51:25,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:34,084 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 13 times [2024-05-04 04:51:34,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:34,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:34,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:34,086 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:51:34,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:39,196 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 12 times [2024-05-04 04:51:39,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:39,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:39,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:39,199 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:51:39,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:39,306 INFO L85 PathProgramCache]: Analyzing trace with hash -1128623139, now seen corresponding path program 18 times [2024-05-04 04:51:39,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:39,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:39,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:39,310 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:51:39,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:39,417 INFO L85 PathProgramCache]: Analyzing trace with hash -209097279, now seen corresponding path program 16 times [2024-05-04 04:51:39,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:39,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:39,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:39,420 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:51:39,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:44,198 INFO L85 PathProgramCache]: Analyzing trace with hash -1807860391, now seen corresponding path program 9 times [2024-05-04 04:51:44,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:44,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:44,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:44,202 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:51:44,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:49,022 INFO L85 PathProgramCache]: Analyzing trace with hash 921933955, now seen corresponding path program 19 times [2024-05-04 04:51:49,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:51:49,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:51:49,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:51:49,029 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:51:49,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:52:02,331 INFO L85 PathProgramCache]: Analyzing trace with hash -1484818388, now seen corresponding path program 20 times [2024-05-04 04:52:02,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:52:02,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:52:02,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:52:02,336 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:52:02,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:52:02,926 INFO L85 PathProgramCache]: Analyzing trace with hash 1159512009, now seen corresponding path program 17 times [2024-05-04 04:52:02,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:52:02,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:52:02,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:52:02,931 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:52:02,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:52:36,762 INFO L85 PathProgramCache]: Analyzing trace with hash 1585133998, now seen corresponding path program 18 times [2024-05-04 04:52:36,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:52:36,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:52:36,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:52:36,767 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:52:36,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:52:45,384 INFO L85 PathProgramCache]: Analyzing trace with hash 1894513771, now seen corresponding path program 19 times [2024-05-04 04:52:45,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:52:45,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:52:45,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:52:45,390 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:52:45,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:52:50,614 INFO L85 PathProgramCache]: Analyzing trace with hash -1399615156, now seen corresponding path program 20 times [2024-05-04 04:52:50,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:52:50,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:52:50,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:52:50,620 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:52:50,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:52:58,303 INFO L85 PathProgramCache]: Analyzing trace with hash 1838519023, now seen corresponding path program 10 times [2024-05-04 04:52:58,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:52:58,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:52:58,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:52:58,307 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:52:58,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:53:28,025 INFO L85 PathProgramCache]: Analyzing trace with hash 1159514952, now seen corresponding path program 11 times [2024-05-04 04:53:28,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:28,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:28,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:53:28,030 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:53:28,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:53:36,666 INFO L85 PathProgramCache]: Analyzing trace with hash 1585225233, now seen corresponding path program 12 times [2024-05-04 04:53:36,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:36,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:36,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:53:36,672 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:53:36,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:53:41,920 INFO L85 PathProgramCache]: Analyzing trace with hash 1897342054, now seen corresponding path program 13 times [2024-05-04 04:53:41,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:41,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:41,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:53:41,925 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:53:41,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:53:51,074 INFO L85 PathProgramCache]: Analyzing trace with hash 1746125264, now seen corresponding path program 5 times [2024-05-04 04:53:51,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:51,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:51,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:51,302 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:51,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:51,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:51,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:51,414 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:51,529 INFO L85 PathProgramCache]: Analyzing trace with hash -1305831062, now seen corresponding path program 6 times [2024-05-04 04:53:51,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:51,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:51,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:51,690 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:51,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:51,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:51,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:51,848 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:51,935 INFO L85 PathProgramCache]: Analyzing trace with hash -773197300, now seen corresponding path program 7 times [2024-05-04 04:53:51,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:51,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:51,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:52,134 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:52,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:52,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:52,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:52,301 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:52,394 INFO L85 PathProgramCache]: Analyzing trace with hash -13260122, now seen corresponding path program 8 times [2024-05-04 04:53:52,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:52,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:52,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:52,576 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:52,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:52,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:52,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:52,754 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:53,075 INFO L85 PathProgramCache]: Analyzing trace with hash -411063691, now seen corresponding path program 9 times [2024-05-04 04:53:53,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:53,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:53,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:53,254 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:53,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:53,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:53,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:53,446 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:53,585 INFO L85 PathProgramCache]: Analyzing trace with hash 141927556, now seen corresponding path program 10 times [2024-05-04 04:53:53,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:53,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:53,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:53,775 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:53,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:53,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:53,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:53,959 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:54,154 INFO L85 PathProgramCache]: Analyzing trace with hash 104787027, now seen corresponding path program 11 times [2024-05-04 04:53:54,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:54,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:54,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:54,312 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:53:54,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:54,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:54,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:54,530 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:53:54,649 INFO L85 PathProgramCache]: Analyzing trace with hash -1046569366, now seen corresponding path program 12 times [2024-05-04 04:53:54,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:54,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:54,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:54,848 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:53:54,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:54,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:54,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:55,039 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:53:55,163 INFO L85 PathProgramCache]: Analyzing trace with hash -1046569370, now seen corresponding path program 13 times [2024-05-04 04:53:55,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:55,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:55,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:55,356 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:53:55,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:55,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:55,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:55,575 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:53:55,833 INFO L85 PathProgramCache]: Analyzing trace with hash 141927560, now seen corresponding path program 14 times [2024-05-04 04:53:55,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:55,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:55,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:56,022 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:56,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:56,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:56,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:56,208 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:53:56,308 INFO L85 PathProgramCache]: Analyzing trace with hash -1046565462, now seen corresponding path program 15 times [2024-05-04 04:53:56,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:56,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:56,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:56,501 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:53:56,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:56,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:56,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:56,663 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:53:56,759 INFO L85 PathProgramCache]: Analyzing trace with hash -727058748, now seen corresponding path program 16 times [2024-05-04 04:53:56,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:56,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:56,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:56,930 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:53:56,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:56,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:56,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:57,075 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:53:57,253 INFO L85 PathProgramCache]: Analyzing trace with hash -1063984617, now seen corresponding path program 17 times [2024-05-04 04:53:57,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:57,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:57,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:57,398 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:53:57,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:57,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:57,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:57,543 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:53:57,671 INFO L85 PathProgramCache]: Analyzing trace with hash 1376215330, now seen corresponding path program 18 times [2024-05-04 04:53:57,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:57,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:57,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:57,822 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:53:57,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:57,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:57,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:57,973 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:53:58,168 INFO L85 PathProgramCache]: Analyzing trace with hash -286997643, now seen corresponding path program 19 times [2024-05-04 04:53:58,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:58,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:58,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:58,317 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 27 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:53:58,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:58,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:58,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:58,497 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 27 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:53:58,577 INFO L85 PathProgramCache]: Analyzing trace with hash -727058744, now seen corresponding path program 20 times [2024-05-04 04:53:58,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:58,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:58,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:58,720 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:53:58,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:58,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:58,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:58,868 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:53:59,057 INFO L85 PathProgramCache]: Analyzing trace with hash 1916209133, now seen corresponding path program 21 times [2024-05-04 04:53:59,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:59,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:59,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:59,210 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:53:59,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:59,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:59,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:59,376 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:53:59,470 INFO L85 PathProgramCache]: Analyzing trace with hash -1046565466, now seen corresponding path program 22 times [2024-05-04 04:53:59,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:59,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:59,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:59,612 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:53:59,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:59,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:59,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:53:59,778 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:53:59,900 INFO L85 PathProgramCache]: Analyzing trace with hash -727062716, now seen corresponding path program 23 times [2024-05-04 04:53:59,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:53:59,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:53:59,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:00,094 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:00,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:00,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:00,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:00,241 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:00,320 INFO L85 PathProgramCache]: Analyzing trace with hash -13260118, now seen corresponding path program 24 times [2024-05-04 04:54:00,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:00,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:00,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:00,475 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:00,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:00,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:00,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:00,607 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:00,794 INFO L85 PathProgramCache]: Analyzing trace with hash 1800687563, now seen corresponding path program 25 times [2024-05-04 04:54:00,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:00,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:00,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:00,920 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:00,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:00,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:00,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:01,043 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:01,226 INFO L85 PathProgramCache]: Analyzing trace with hash -1826057167, now seen corresponding path program 26 times [2024-05-04 04:54:01,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:01,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:01,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:01,368 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:01,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:01,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:01,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:01,481 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:01,602 INFO L85 PathProgramCache]: Analyzing trace with hash -773197236, now seen corresponding path program 27 times [2024-05-04 04:54:01,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:01,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:01,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:01,723 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:01,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:01,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:01,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:01,853 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:02,032 INFO L85 PathProgramCache]: Analyzing trace with hash 1800689551, now seen corresponding path program 28 times [2024-05-04 04:54:02,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:02,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:02,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:02,155 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:02,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:02,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:02,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:02,318 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:02,396 INFO L85 PathProgramCache]: Analyzing trace with hash -1305831058, now seen corresponding path program 29 times [2024-05-04 04:54:02,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:02,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:02,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:02,506 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:02,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:02,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:02,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:02,616 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:02,695 INFO L85 PathProgramCache]: Analyzing trace with hash -773193332, now seen corresponding path program 30 times [2024-05-04 04:54:02,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:02,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:02,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:02,820 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:02,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:02,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:02,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:02,938 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:03,144 INFO L85 PathProgramCache]: Analyzing trace with hash -1704691577, now seen corresponding path program 31 times [2024-05-04 04:54:03,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:03,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:03,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:03,289 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:03,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:03,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:03,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:03,422 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:03,592 INFO L85 PathProgramCache]: Analyzing trace with hash -1305831242, now seen corresponding path program 32 times [2024-05-04 04:54:03,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:03,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:03,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:03,734 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 12 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:03,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:03,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:03,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:03,857 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 12 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:04,537 INFO L85 PathProgramCache]: Analyzing trace with hash -2062518461, now seen corresponding path program 1 times [2024-05-04 04:54:04,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:04,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:04,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:04,633 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:04,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:04,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:04,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:04,761 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:04,862 INFO L85 PathProgramCache]: Analyzing trace with hash -2100314595, now seen corresponding path program 2 times [2024-05-04 04:54:04,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:04,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:04,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:04,976 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:04,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:04,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:04,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:05,087 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:05,179 INFO L85 PathProgramCache]: Analyzing trace with hash 232306175, now seen corresponding path program 3 times [2024-05-04 04:54:05,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:05,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:05,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:05,303 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:05,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:05,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:05,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:05,424 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:05,520 INFO L85 PathProgramCache]: Analyzing trace with hash -92062247, now seen corresponding path program 4 times [2024-05-04 04:54:05,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:05,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:05,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:05,646 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:05,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:05,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:05,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:05,783 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:05,999 INFO L85 PathProgramCache]: Analyzing trace with hash 1441037730, now seen corresponding path program 5 times [2024-05-04 04:54:05,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:05,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:06,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:06,142 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:06,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:06,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:06,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:06,292 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:06,392 INFO L85 PathProgramCache]: Analyzing trace with hash 1722496759, now seen corresponding path program 6 times [2024-05-04 04:54:06,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:06,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:06,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:06,522 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:06,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:06,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:06,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:06,658 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:06,860 INFO L85 PathProgramCache]: Analyzing trace with hash 1857792064, now seen corresponding path program 7 times [2024-05-04 04:54:06,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:06,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:06,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:07,028 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:54:07,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:07,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:07,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:07,171 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:54:07,292 INFO L85 PathProgramCache]: Analyzing trace with hash 1756979229, now seen corresponding path program 8 times [2024-05-04 04:54:07,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:07,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:07,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:07,435 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:07,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:07,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:07,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:07,575 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:07,672 INFO L85 PathProgramCache]: Analyzing trace with hash 1756979225, now seen corresponding path program 9 times [2024-05-04 04:54:07,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:07,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:07,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:07,812 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:07,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:07,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:07,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:07,953 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:08,085 INFO L85 PathProgramCache]: Analyzing trace with hash 1722496763, now seen corresponding path program 10 times [2024-05-04 04:54:08,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:08,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:08,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:08,288 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:08,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:08,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:08,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:08,453 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:08,535 INFO L85 PathProgramCache]: Analyzing trace with hash 1756983133, now seen corresponding path program 11 times [2024-05-04 04:54:08,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:08,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:08,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:08,672 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:08,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:08,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:08,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:08,805 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:08,898 INFO L85 PathProgramCache]: Analyzing trace with hash 538646455, now seen corresponding path program 12 times [2024-05-04 04:54:08,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:08,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:08,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:09,042 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:09,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:09,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:09,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:09,184 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:09,366 INFO L85 PathProgramCache]: Analyzing trace with hash -481828988, now seen corresponding path program 13 times [2024-05-04 04:54:09,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:09,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:09,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:09,544 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:54:09,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:09,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:09,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:09,686 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:54:09,781 INFO L85 PathProgramCache]: Analyzing trace with hash -2051796651, now seen corresponding path program 14 times [2024-05-04 04:54:09,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:09,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:09,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:09,925 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:54:09,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:09,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:09,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:10,070 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:54:10,261 INFO L85 PathProgramCache]: Analyzing trace with hash 818813346, now seen corresponding path program 15 times [2024-05-04 04:54:10,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:10,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:10,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:10,407 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:54:10,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:10,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:10,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:10,571 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:54:10,680 INFO L85 PathProgramCache]: Analyzing trace with hash 538646459, now seen corresponding path program 16 times [2024-05-04 04:54:10,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:10,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:10,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:10,833 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:10,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:10,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:10,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:10,974 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:11,149 INFO L85 PathProgramCache]: Analyzing trace with hash -1368097638, now seen corresponding path program 17 times [2024-05-04 04:54:11,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:11,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:11,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:11,285 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:54:11,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:11,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:11,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:11,421 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:54:11,515 INFO L85 PathProgramCache]: Analyzing trace with hash 1756983129, now seen corresponding path program 18 times [2024-05-04 04:54:11,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:11,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:11,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:11,649 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:11,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:11,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:11,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:11,788 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:11,916 INFO L85 PathProgramCache]: Analyzing trace with hash 538642487, now seen corresponding path program 19 times [2024-05-04 04:54:11,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:11,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:11,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:12,066 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:12,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:12,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:12,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:12,207 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:12,287 INFO L85 PathProgramCache]: Analyzing trace with hash -92062243, now seen corresponding path program 20 times [2024-05-04 04:54:12,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:12,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:12,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:12,413 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:12,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:12,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:12,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:12,539 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:12,717 INFO L85 PathProgramCache]: Analyzing trace with hash -1388443080, now seen corresponding path program 21 times [2024-05-04 04:54:12,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:12,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:12,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:12,838 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:12,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:12,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:12,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:12,960 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:13,135 INFO L85 PathProgramCache]: Analyzing trace with hash -685242914, now seen corresponding path program 22 times [2024-05-04 04:54:13,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:13,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:13,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:13,290 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:13,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:13,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:13,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:13,398 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:13,514 INFO L85 PathProgramCache]: Analyzing trace with hash 232306239, now seen corresponding path program 23 times [2024-05-04 04:54:13,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:13,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:13,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:13,630 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:13,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:13,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:13,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:13,744 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:13,916 INFO L85 PathProgramCache]: Analyzing trace with hash -1388441092, now seen corresponding path program 24 times [2024-05-04 04:54:13,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:13,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:13,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:14,031 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:14,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:14,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:14,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:14,145 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:14,221 INFO L85 PathProgramCache]: Analyzing trace with hash -2100314591, now seen corresponding path program 25 times [2024-05-04 04:54:14,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:14,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:14,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:14,329 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:14,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:14,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:14,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:14,437 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:14,551 INFO L85 PathProgramCache]: Analyzing trace with hash 232310143, now seen corresponding path program 26 times [2024-05-04 04:54:14,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:14,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:14,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:14,675 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:14,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:14,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:14,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:14,831 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:15,037 INFO L85 PathProgramCache]: Analyzing trace with hash 486437236, now seen corresponding path program 27 times [2024-05-04 04:54:15,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:15,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:15,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:15,138 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:15,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:15,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:15,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:15,239 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:15,390 INFO L85 PathProgramCache]: Analyzing trace with hash -2100314775, now seen corresponding path program 28 times [2024-05-04 04:54:15,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:15,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:15,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:15,513 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:15,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:15,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:15,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:15,625 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:16,346 INFO L85 PathProgramCache]: Analyzing trace with hash -1641424067, now seen corresponding path program 1 times [2024-05-04 04:54:16,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:16,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:16,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:16,439 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:16,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:16,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:16,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:16,533 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:16,632 INFO L85 PathProgramCache]: Analyzing trace with hash -1155527785, now seen corresponding path program 2 times [2024-05-04 04:54:16,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:16,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:16,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:16,750 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:16,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:16,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:16,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:16,861 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:16,938 INFO L85 PathProgramCache]: Analyzing trace with hash 1934331129, now seen corresponding path program 3 times [2024-05-04 04:54:16,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:16,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:16,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:17,058 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:17,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:17,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:17,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:17,181 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:17,276 INFO L85 PathProgramCache]: Analyzing trace with hash -828621229, now seen corresponding path program 4 times [2024-05-04 04:54:17,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:17,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:17,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:17,400 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:17,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:17,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:17,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:17,570 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:17,778 INFO L85 PathProgramCache]: Analyzing trace with hash 82545768, now seen corresponding path program 5 times [2024-05-04 04:54:17,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:17,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:17,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:17,940 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:17,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:17,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:17,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:18,091 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:18,189 INFO L85 PathProgramCache]: Analyzing trace with hash -1736048399, now seen corresponding path program 6 times [2024-05-04 04:54:18,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:18,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:18,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:18,318 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:18,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:18,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:18,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:18,447 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:18,650 INFO L85 PathProgramCache]: Analyzing trace with hash 2017074566, now seen corresponding path program 7 times [2024-05-04 04:54:18,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:18,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:18,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:18,784 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:54:18,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:18,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:18,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:18,918 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:54:19,037 INFO L85 PathProgramCache]: Analyzing trace with hash -1895197801, now seen corresponding path program 8 times [2024-05-04 04:54:19,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:19,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:19,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:19,212 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:19,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:19,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:19,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:19,348 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:19,444 INFO L85 PathProgramCache]: Analyzing trace with hash -1895197805, now seen corresponding path program 9 times [2024-05-04 04:54:19,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:19,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:19,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:19,579 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:19,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:19,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:19,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:19,715 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:19,837 INFO L85 PathProgramCache]: Analyzing trace with hash -1736048395, now seen corresponding path program 10 times [2024-05-04 04:54:19,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:19,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:19,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:19,969 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:19,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:19,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:19,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:20,113 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:20,188 INFO L85 PathProgramCache]: Analyzing trace with hash -1895193897, now seen corresponding path program 11 times [2024-05-04 04:54:20,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:20,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:20,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:20,321 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:20,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:20,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:20,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:20,458 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:20,552 INFO L85 PathProgramCache]: Analyzing trace with hash -215198543, now seen corresponding path program 12 times [2024-05-04 04:54:20,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:20,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:20,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:20,734 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:20,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:20,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:20,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:20,875 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:21,061 INFO L85 PathProgramCache]: Analyzing trace with hash 1918779850, now seen corresponding path program 13 times [2024-05-04 04:54:21,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:21,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:21,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:21,220 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:54:21,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:21,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:21,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:21,361 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:54:21,458 INFO L85 PathProgramCache]: Analyzing trace with hash -647366705, now seen corresponding path program 14 times [2024-05-04 04:54:21,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:21,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:21,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:21,600 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:54:21,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:21,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:21,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:21,745 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:54:21,944 INFO L85 PathProgramCache]: Analyzing trace with hash 1406468712, now seen corresponding path program 15 times [2024-05-04 04:54:21,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:21,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:21,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:22,134 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:54:22,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:22,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:22,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:22,284 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:54:22,361 INFO L85 PathProgramCache]: Analyzing trace with hash -215198539, now seen corresponding path program 16 times [2024-05-04 04:54:22,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:22,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:22,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:22,503 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:22,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:22,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:22,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:22,646 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:22,817 INFO L85 PathProgramCache]: Analyzing trace with hash 1378531424, now seen corresponding path program 17 times [2024-05-04 04:54:22,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:22,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:22,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:22,961 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:54:22,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:22,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:22,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:23,094 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:54:23,188 INFO L85 PathProgramCache]: Analyzing trace with hash -1895193901, now seen corresponding path program 18 times [2024-05-04 04:54:23,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:23,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:23,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:23,324 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:23,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:23,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:23,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:23,458 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:23,551 INFO L85 PathProgramCache]: Analyzing trace with hash -215202511, now seen corresponding path program 19 times [2024-05-04 04:54:23,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:23,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:23,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:23,731 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:23,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:23,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:23,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:23,870 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:23,947 INFO L85 PathProgramCache]: Analyzing trace with hash -828621225, now seen corresponding path program 20 times [2024-05-04 04:54:23,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:23,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:23,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:24,081 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:24,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:24,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:24,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:24,204 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:24,379 INFO L85 PathProgramCache]: Analyzing trace with hash -165277058, now seen corresponding path program 21 times [2024-05-04 04:54:24,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:24,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:24,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:24,497 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:24,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:24,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:24,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:24,617 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:24,788 INFO L85 PathProgramCache]: Analyzing trace with hash -1461622876, now seen corresponding path program 22 times [2024-05-04 04:54:24,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:24,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:24,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:24,897 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:24,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:24,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:24,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:25,005 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:25,171 INFO L85 PathProgramCache]: Analyzing trace with hash 1934331193, now seen corresponding path program 23 times [2024-05-04 04:54:25,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:25,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:25,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:25,286 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:25,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:25,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:25,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:25,400 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:25,574 INFO L85 PathProgramCache]: Analyzing trace with hash -165275070, now seen corresponding path program 24 times [2024-05-04 04:54:25,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:25,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:25,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:25,687 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:25,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:25,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:25,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:25,801 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:25,878 INFO L85 PathProgramCache]: Analyzing trace with hash -1155527781, now seen corresponding path program 25 times [2024-05-04 04:54:25,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:25,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:25,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:25,998 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:25,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:25,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:26,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:26,110 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:26,188 INFO L85 PathProgramCache]: Analyzing trace with hash 1934335097, now seen corresponding path program 26 times [2024-05-04 04:54:26,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:26,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:26,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:26,302 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:26,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:26,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:26,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:26,414 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:26,615 INFO L85 PathProgramCache]: Analyzing trace with hash 655461562, now seen corresponding path program 27 times [2024-05-04 04:54:26,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:26,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:26,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:26,766 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:26,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:26,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:26,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:26,866 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:27,018 INFO L85 PathProgramCache]: Analyzing trace with hash -1155527965, now seen corresponding path program 28 times [2024-05-04 04:54:27,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:27,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:27,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:27,127 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:27,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:27,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:27,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:27,238 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:28,006 INFO L85 PathProgramCache]: Analyzing trace with hash -1709129407, now seen corresponding path program 1 times [2024-05-04 04:54:28,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:28,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:28,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:28,099 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:28,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:28,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:28,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:28,192 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:28,294 INFO L85 PathProgramCache]: Analyzing trace with hash -1795850085, now seen corresponding path program 2 times [2024-05-04 04:54:28,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:28,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:28,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:28,405 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:28,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:28,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:28,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:28,514 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:28,601 INFO L85 PathProgramCache]: Analyzing trace with hash 764924157, now seen corresponding path program 3 times [2024-05-04 04:54:28,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:28,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:28,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:28,768 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:28,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:28,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:28,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:28,885 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:28,979 INFO L85 PathProgramCache]: Analyzing trace with hash 652710231, now seen corresponding path program 4 times [2024-05-04 04:54:28,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:28,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:28,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:29,103 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:29,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:29,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:29,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:29,225 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:29,408 INFO L85 PathProgramCache]: Analyzing trace with hash -1240819228, now seen corresponding path program 5 times [2024-05-04 04:54:29,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:29,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:29,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:29,532 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:29,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:29,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:29,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:29,658 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:29,758 INFO L85 PathProgramCache]: Analyzing trace with hash 189309685, now seen corresponding path program 6 times [2024-05-04 04:54:29,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:29,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:29,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:29,885 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:29,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:29,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:29,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:30,013 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:30,215 INFO L85 PathProgramCache]: Analyzing trace with hash 1573633026, now seen corresponding path program 7 times [2024-05-04 04:54:30,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:30,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:30,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:30,391 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:54:30,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:30,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:30,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:30,523 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:54:30,647 INFO L85 PathProgramCache]: Analyzing trace with hash 1537983643, now seen corresponding path program 8 times [2024-05-04 04:54:30,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:30,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:30,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:30,781 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:30,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:30,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:30,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:30,919 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:31,018 INFO L85 PathProgramCache]: Analyzing trace with hash 1537983639, now seen corresponding path program 9 times [2024-05-04 04:54:31,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:31,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:31,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:31,150 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:31,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:31,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:31,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:31,282 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:31,406 INFO L85 PathProgramCache]: Analyzing trace with hash 189309689, now seen corresponding path program 10 times [2024-05-04 04:54:31,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:31,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:31,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:31,560 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:31,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:31,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:31,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:31,792 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:31,868 INFO L85 PathProgramCache]: Analyzing trace with hash 1537987547, now seen corresponding path program 11 times [2024-05-04 04:54:31,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:31,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:31,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:31,999 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:32,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:32,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:32,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:32,130 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:32,225 INFO L85 PathProgramCache]: Analyzing trace with hash 537285813, now seen corresponding path program 12 times [2024-05-04 04:54:32,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:32,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:32,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:32,365 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:32,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:32,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:32,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:32,501 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:32,673 INFO L85 PathProgramCache]: Analyzing trace with hash -524008890, now seen corresponding path program 13 times [2024-05-04 04:54:32,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:32,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:32,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:32,815 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:54:32,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:32,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:32,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:32,953 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:54:33,050 INFO L85 PathProgramCache]: Analyzing trace with hash 935593683, now seen corresponding path program 14 times [2024-05-04 04:54:33,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:33,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:33,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:33,240 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:54:33,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:33,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:33,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:33,384 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:54:33,578 INFO L85 PathProgramCache]: Analyzing trace with hash -1061366812, now seen corresponding path program 15 times [2024-05-04 04:54:33,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:33,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:33,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:33,746 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:54:33,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:33,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:33,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:33,888 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:54:33,964 INFO L85 PathProgramCache]: Analyzing trace with hash 537285817, now seen corresponding path program 16 times [2024-05-04 04:54:33,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:33,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:33,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:34,100 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:34,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:34,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:34,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:34,239 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:34,416 INFO L85 PathProgramCache]: Analyzing trace with hash 432973788, now seen corresponding path program 17 times [2024-05-04 04:54:34,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:34,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:34,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:34,562 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:54:34,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:34,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:34,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:34,743 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:54:34,835 INFO L85 PathProgramCache]: Analyzing trace with hash 1537987543, now seen corresponding path program 18 times [2024-05-04 04:54:34,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:34,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:34,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:34,982 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:34,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:34,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:34,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:35,116 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:35,208 INFO L85 PathProgramCache]: Analyzing trace with hash 537281845, now seen corresponding path program 19 times [2024-05-04 04:54:35,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:35,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:35,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:35,350 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:35,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:35,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:35,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:35,487 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:35,563 INFO L85 PathProgramCache]: Analyzing trace with hash 652710235, now seen corresponding path program 20 times [2024-05-04 04:54:35,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:35,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:35,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:35,688 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:35,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:35,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:35,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:35,822 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:36,008 INFO L85 PathProgramCache]: Analyzing trace with hash -2057154822, now seen corresponding path program 21 times [2024-05-04 04:54:36,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:36,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:36,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:36,144 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:36,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:36,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:36,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:36,325 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:36,500 INFO L85 PathProgramCache]: Analyzing trace with hash 163222304, now seen corresponding path program 22 times [2024-05-04 04:54:36,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:36,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:36,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:36,607 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:36,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:36,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:36,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:36,715 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:36,830 INFO L85 PathProgramCache]: Analyzing trace with hash 764924221, now seen corresponding path program 23 times [2024-05-04 04:54:36,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:36,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:36,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:36,943 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:36,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:36,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:36,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:37,054 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:37,230 INFO L85 PathProgramCache]: Analyzing trace with hash -2057152834, now seen corresponding path program 24 times [2024-05-04 04:54:37,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:37,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:37,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:37,344 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:37,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:37,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:37,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:37,455 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:37,531 INFO L85 PathProgramCache]: Analyzing trace with hash -1795850081, now seen corresponding path program 25 times [2024-05-04 04:54:37,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:37,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:37,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:37,638 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:37,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:37,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:37,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:37,745 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:37,822 INFO L85 PathProgramCache]: Analyzing trace with hash 764928125, now seen corresponding path program 26 times [2024-05-04 04:54:37,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:37,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:37,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:37,983 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:37,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:37,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:37,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:38,096 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:38,298 INFO L85 PathProgramCache]: Analyzing trace with hash -1443403978, now seen corresponding path program 27 times [2024-05-04 04:54:38,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:38,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:38,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:38,396 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:38,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:38,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:38,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:38,494 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:38,643 INFO L85 PathProgramCache]: Analyzing trace with hash -1795850265, now seen corresponding path program 28 times [2024-05-04 04:54:38,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:38,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:38,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:38,750 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:38,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:38,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:38,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:38,859 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:39,654 INFO L85 PathProgramCache]: Analyzing trace with hash -362885037, now seen corresponding path program 1 times [2024-05-04 04:54:39,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:39,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:39,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:39,747 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:39,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:39,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:39,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:39,892 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:39,994 INFO L85 PathProgramCache]: Analyzing trace with hash -840166611, now seen corresponding path program 2 times [2024-05-04 04:54:39,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:39,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:39,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:40,104 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:40,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:40,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:40,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:40,218 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:40,301 INFO L85 PathProgramCache]: Analyzing trace with hash 53741327, now seen corresponding path program 3 times [2024-05-04 04:54:40,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:40,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:40,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:40,419 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:40,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:40,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:40,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:40,538 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:40,636 INFO L85 PathProgramCache]: Analyzing trace with hash 105810665, now seen corresponding path program 4 times [2024-05-04 04:54:40,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:40,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:40,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:40,761 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:40,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:40,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:40,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:40,887 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:41,061 INFO L85 PathProgramCache]: Analyzing trace with hash -1014836590, now seen corresponding path program 5 times [2024-05-04 04:54:41,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:41,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:41,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:41,188 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:41,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:41,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:41,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:41,362 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:41,460 INFO L85 PathProgramCache]: Analyzing trace with hash -1395163129, now seen corresponding path program 6 times [2024-05-04 04:54:41,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:41,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:41,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:41,589 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:41,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:41,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:41,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:41,716 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:41,913 INFO L85 PathProgramCache]: Analyzing trace with hash -300383952, now seen corresponding path program 7 times [2024-05-04 04:54:41,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:41,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:41,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:42,044 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:54:42,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:42,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:42,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:42,177 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:54:42,298 INFO L85 PathProgramCache]: Analyzing trace with hash -721967827, now seen corresponding path program 8 times [2024-05-04 04:54:42,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:42,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:42,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:42,431 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:42,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:42,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:42,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:42,563 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:42,661 INFO L85 PathProgramCache]: Analyzing trace with hash -721967831, now seen corresponding path program 9 times [2024-05-04 04:54:42,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:42,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:42,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:42,844 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:42,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:42,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:42,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:42,976 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:43,097 INFO L85 PathProgramCache]: Analyzing trace with hash -1395163125, now seen corresponding path program 10 times [2024-05-04 04:54:43,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:43,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:43,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:43,233 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:43,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:43,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:43,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:43,363 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:43,441 INFO L85 PathProgramCache]: Analyzing trace with hash -721963923, now seen corresponding path program 11 times [2024-05-04 04:54:43,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:43,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:43,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:43,582 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:43,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:43,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:43,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:43,714 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:43,808 INFO L85 PathProgramCache]: Analyzing trace with hash 1977374919, now seen corresponding path program 12 times [2024-05-04 04:54:43,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:43,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:43,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:43,946 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:43,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:43,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:43,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:44,086 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:44,263 INFO L85 PathProgramCache]: Analyzing trace with hash 1169080436, now seen corresponding path program 13 times [2024-05-04 04:54:44,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:44,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:44,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:44,451 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:54:44,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:44,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:44,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:44,591 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:54:44,688 INFO L85 PathProgramCache]: Analyzing trace with hash 1881755237, now seen corresponding path program 14 times [2024-05-04 04:54:44,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:44,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:44,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:44,834 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:54:44,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:44,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:44,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:44,980 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:54:45,179 INFO L85 PathProgramCache]: Analyzing trace with hash -1795129710, now seen corresponding path program 15 times [2024-05-04 04:54:45,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:45,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:45,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:45,322 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 27 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:54:45,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:45,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:45,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:45,469 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 27 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:54:45,547 INFO L85 PathProgramCache]: Analyzing trace with hash 1977374923, now seen corresponding path program 16 times [2024-05-04 04:54:45,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:45,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:45,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:45,687 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:45,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:45,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:45,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:45,871 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:46,049 INFO L85 PathProgramCache]: Analyzing trace with hash -906045046, now seen corresponding path program 17 times [2024-05-04 04:54:46,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:46,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:46,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:46,186 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:54:46,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:46,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:46,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:46,322 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:54:46,419 INFO L85 PathProgramCache]: Analyzing trace with hash -721963927, now seen corresponding path program 18 times [2024-05-04 04:54:46,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:46,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:46,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:46,554 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:46,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:46,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:46,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:46,695 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:46,792 INFO L85 PathProgramCache]: Analyzing trace with hash 1977370951, now seen corresponding path program 19 times [2024-05-04 04:54:46,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:46,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:46,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:46,932 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:46,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:46,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:46,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:47,071 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:47,148 INFO L85 PathProgramCache]: Analyzing trace with hash 105810669, now seen corresponding path program 20 times [2024-05-04 04:54:47,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:47,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:47,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:47,319 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:47,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:47,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:47,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:47,443 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:47,621 INFO L85 PathProgramCache]: Analyzing trace with hash 1665981224, now seen corresponding path program 21 times [2024-05-04 04:54:47,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:47,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:47,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:47,741 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:47,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:47,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:47,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:47,868 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:48,043 INFO L85 PathProgramCache]: Analyzing trace with hash -275361074, now seen corresponding path program 22 times [2024-05-04 04:54:48,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:48,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:48,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:48,153 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:48,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:48,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:48,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:48,260 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:48,381 INFO L85 PathProgramCache]: Analyzing trace with hash 53741391, now seen corresponding path program 23 times [2024-05-04 04:54:48,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:48,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:48,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:48,496 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:48,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:48,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:48,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:48,654 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:48,849 INFO L85 PathProgramCache]: Analyzing trace with hash 1665983212, now seen corresponding path program 24 times [2024-05-04 04:54:48,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:48,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:48,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:49,016 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:49,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:49,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:49,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:49,130 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:49,207 INFO L85 PathProgramCache]: Analyzing trace with hash -840166607, now seen corresponding path program 25 times [2024-05-04 04:54:49,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:49,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:49,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:49,313 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:49,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:49,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:49,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:49,423 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:49,500 INFO L85 PathProgramCache]: Analyzing trace with hash 53745295, now seen corresponding path program 26 times [2024-05-04 04:54:49,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:49,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:49,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:49,612 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:49,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:49,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:49,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:49,725 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:49,927 INFO L85 PathProgramCache]: Analyzing trace with hash 1635465828, now seen corresponding path program 27 times [2024-05-04 04:54:49,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:49,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:49,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:50,027 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:50,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:50,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:50,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:50,126 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:50,275 INFO L85 PathProgramCache]: Analyzing trace with hash -840166791, now seen corresponding path program 28 times [2024-05-04 04:54:50,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:50,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:50,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:50,383 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 12 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:50,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:50,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:50,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:50,540 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 12 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:51,211 INFO L85 PathProgramCache]: Analyzing trace with hash 2015633453, now seen corresponding path program 1 times [2024-05-04 04:54:51,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:51,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:51,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:51,304 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:51,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:51,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:51,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:51,399 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:51,500 INFO L85 PathProgramCache]: Analyzing trace with hash -6499193, now seen corresponding path program 2 times [2024-05-04 04:54:51,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:51,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:51,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:51,612 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:51,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:51,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:51,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:51,721 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:51,798 INFO L85 PathProgramCache]: Analyzing trace with hash -1950754327, now seen corresponding path program 3 times [2024-05-04 04:54:51,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:51,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:51,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:51,915 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:51,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:51,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:51,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:52,032 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:52,125 INFO L85 PathProgramCache]: Analyzing trace with hash -2069164221, now seen corresponding path program 4 times [2024-05-04 04:54:52,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:52,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:52,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:52,247 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:52,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:52,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:52,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:52,422 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:52,605 INFO L85 PathProgramCache]: Analyzing trace with hash 280418680, now seen corresponding path program 5 times [2024-05-04 04:54:52,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:52,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:52,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:52,730 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:52,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:52,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:52,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:52,863 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:52,962 INFO L85 PathProgramCache]: Analyzing trace with hash 103044577, now seen corresponding path program 6 times [2024-05-04 04:54:52,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:52,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:52,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:53,090 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:53,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:53,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:53,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:53,230 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:53,429 INFO L85 PathProgramCache]: Analyzing trace with hash -1100585322, now seen corresponding path program 7 times [2024-05-04 04:54:53,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:53,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:53,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:53,562 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:54:53,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:53,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:53,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:53,699 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:54:53,825 INFO L85 PathProgramCache]: Analyzing trace with hash 241593479, now seen corresponding path program 8 times [2024-05-04 04:54:53,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:53,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:53,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:54,007 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:54,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:54,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:54,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:54,157 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:54,280 INFO L85 PathProgramCache]: Analyzing trace with hash 241593475, now seen corresponding path program 9 times [2024-05-04 04:54:54,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:54,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:54,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:54,411 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:54,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:54,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:54,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:54,541 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:54,660 INFO L85 PathProgramCache]: Analyzing trace with hash 103044581, now seen corresponding path program 10 times [2024-05-04 04:54:54,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:54,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:54,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:54,788 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:54,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:54,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:54,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:54,916 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:54,992 INFO L85 PathProgramCache]: Analyzing trace with hash 241597383, now seen corresponding path program 11 times [2024-05-04 04:54:54,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:54,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:54,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:55,124 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:55,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:55,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:55,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:55,262 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:55,405 INFO L85 PathProgramCache]: Analyzing trace with hash 246854049, now seen corresponding path program 12 times [2024-05-04 04:54:55,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:55,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:55,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:55,540 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:55,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:55,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:55,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:55,679 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:55,854 INFO L85 PathProgramCache]: Analyzing trace with hash -937458982, now seen corresponding path program 13 times [2024-05-04 04:54:55,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:55,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:55,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:56,006 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:54:56,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:56,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:56,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:56,156 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:54:56,254 INFO L85 PathProgramCache]: Analyzing trace with hash 1003542719, now seen corresponding path program 14 times [2024-05-04 04:54:56,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:56,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:56,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:56,399 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:54:56,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:56,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:56,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:56,543 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:54:56,739 INFO L85 PathProgramCache]: Analyzing trace with hash 1045053304, now seen corresponding path program 15 times [2024-05-04 04:54:56,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:56,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:56,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:56,930 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:54:56,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:56,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:56,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:57,075 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:54:57,151 INFO L85 PathProgramCache]: Analyzing trace with hash 246854053, now seen corresponding path program 16 times [2024-05-04 04:54:57,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:57,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:57,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:57,289 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:57,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:57,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:57,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:57,483 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:54:57,683 INFO L85 PathProgramCache]: Analyzing trace with hash -1100415632, now seen corresponding path program 17 times [2024-05-04 04:54:57,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:57,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:57,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:57,840 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:54:57,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:57,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:57,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:58,014 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:54:58,108 INFO L85 PathProgramCache]: Analyzing trace with hash 241597379, now seen corresponding path program 18 times [2024-05-04 04:54:58,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:58,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:58,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:58,240 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:58,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:58,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:58,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:58,421 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:58,515 INFO L85 PathProgramCache]: Analyzing trace with hash 246850081, now seen corresponding path program 19 times [2024-05-04 04:54:58,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:58,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:58,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:58,652 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:58,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:58,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:58,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:58,790 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:54:58,865 INFO L85 PathProgramCache]: Analyzing trace with hash -2069164217, now seen corresponding path program 20 times [2024-05-04 04:54:58,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:58,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:58,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:58,988 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:58,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:58,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:58,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:59,112 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:59,290 INFO L85 PathProgramCache]: Analyzing trace with hash -343841906, now seen corresponding path program 21 times [2024-05-04 04:54:59,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:59,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:59,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:59,408 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:59,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:59,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:59,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:59,526 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:59,712 INFO L85 PathProgramCache]: Analyzing trace with hash -201474892, now seen corresponding path program 22 times [2024-05-04 04:54:59,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:59,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:59,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:59,818 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:54:59,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:54:59,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:54:59,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:54:59,975 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:00,096 INFO L85 PathProgramCache]: Analyzing trace with hash -1950754263, now seen corresponding path program 23 times [2024-05-04 04:55:00,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:00,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:00,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:00,212 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:00,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:00,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:00,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:00,325 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:00,502 INFO L85 PathProgramCache]: Analyzing trace with hash -343839918, now seen corresponding path program 24 times [2024-05-04 04:55:00,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:00,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:00,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:00,614 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:00,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:00,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:00,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:00,727 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:00,805 INFO L85 PathProgramCache]: Analyzing trace with hash -6499189, now seen corresponding path program 25 times [2024-05-04 04:55:00,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:00,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:00,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:00,936 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:00,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:00,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:00,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:01,042 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:01,120 INFO L85 PathProgramCache]: Analyzing trace with hash -1950750359, now seen corresponding path program 26 times [2024-05-04 04:55:01,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:01,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:01,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:01,231 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:01,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:01,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:01,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:01,343 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:01,597 INFO L85 PathProgramCache]: Analyzing trace with hash -1939872310, now seen corresponding path program 27 times [2024-05-04 04:55:01,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:01,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:01,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:01,706 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:01,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:01,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:01,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:01,824 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:01,970 INFO L85 PathProgramCache]: Analyzing trace with hash -6499373, now seen corresponding path program 28 times [2024-05-04 04:55:01,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:01,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:01,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:02,080 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:02,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:02,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:02,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:02,191 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:02,865 INFO L85 PathProgramCache]: Analyzing trace with hash 1179786833, now seen corresponding path program 1 times [2024-05-04 04:55:02,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:02,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:02,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:02,958 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:02,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:02,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:02,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:03,057 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:03,158 INFO L85 PathProgramCache]: Analyzing trace with hash -96216661, now seen corresponding path program 2 times [2024-05-04 04:55:03,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:03,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:03,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:03,266 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:03,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:03,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:03,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:03,374 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:03,453 INFO L85 PathProgramCache]: Analyzing trace with hash 2025072141, now seen corresponding path program 3 times [2024-05-04 04:55:03,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:03,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:03,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:03,620 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:03,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:03,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:03,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:03,743 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:03,842 INFO L85 PathProgramCache]: Analyzing trace with hash 474145383, now seen corresponding path program 4 times [2024-05-04 04:55:03,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:03,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:03,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:03,964 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:03,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:03,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:03,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:04,086 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:04,258 INFO L85 PathProgramCache]: Analyzing trace with hash 1813605076, now seen corresponding path program 5 times [2024-05-04 04:55:04,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:04,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:04,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:04,381 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:04,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:04,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:04,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:04,509 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:04,607 INFO L85 PathProgramCache]: Analyzing trace with hash 387182597, now seen corresponding path program 6 times [2024-05-04 04:55:04,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:04,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:04,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:04,734 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:04,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:04,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:04,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:04,861 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:05,113 INFO L85 PathProgramCache]: Analyzing trace with hash -882241294, now seen corresponding path program 7 times [2024-05-04 04:55:05,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:05,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:05,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:05,241 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:05,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:05,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:05,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:05,369 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:05,485 INFO L85 PathProgramCache]: Analyzing trace with hash -1579676245, now seen corresponding path program 8 times [2024-05-04 04:55:05,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:05,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:05,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:05,618 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:05,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:05,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:05,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:05,753 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:05,851 INFO L85 PathProgramCache]: Analyzing trace with hash -1579676249, now seen corresponding path program 9 times [2024-05-04 04:55:05,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:05,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:05,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:06,000 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:06,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:06,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:06,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:06,143 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:06,470 INFO L85 PathProgramCache]: Analyzing trace with hash 387182601, now seen corresponding path program 10 times [2024-05-04 04:55:06,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:06,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:06,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:06,596 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:06,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:06,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:06,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:06,772 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:06,850 INFO L85 PathProgramCache]: Analyzing trace with hash -1579672341, now seen corresponding path program 11 times [2024-05-04 04:55:06,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:06,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:06,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:06,980 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:06,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:06,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:06,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:07,119 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:07,212 INFO L85 PathProgramCache]: Analyzing trace with hash -1941661243, now seen corresponding path program 12 times [2024-05-04 04:55:07,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:07,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:07,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:07,350 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:07,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:07,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:07,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:07,489 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:07,665 INFO L85 PathProgramCache]: Analyzing trace with hash -61956298, now seen corresponding path program 13 times [2024-05-04 04:55:07,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:07,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:07,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:07,803 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:55:07,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:07,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:07,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:07,997 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:55:08,107 INFO L85 PathProgramCache]: Analyzing trace with hash -1920645149, now seen corresponding path program 14 times [2024-05-04 04:55:08,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:08,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:08,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:08,369 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:55:08,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:08,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:08,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:08,511 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:55:08,711 INFO L85 PathProgramCache]: Analyzing trace with hash 589542612, now seen corresponding path program 15 times [2024-05-04 04:55:08,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:08,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:08,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:08,860 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:55:08,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:08,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:08,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:09,002 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:55:09,080 INFO L85 PathProgramCache]: Analyzing trace with hash -1941661239, now seen corresponding path program 16 times [2024-05-04 04:55:09,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:09,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:09,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:09,216 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:09,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:09,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:09,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:09,352 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:09,525 INFO L85 PathProgramCache]: Analyzing trace with hash -1725202228, now seen corresponding path program 17 times [2024-05-04 04:55:09,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:09,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:09,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:09,657 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:55:09,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:09,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:09,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:09,840 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:55:09,933 INFO L85 PathProgramCache]: Analyzing trace with hash -1579672345, now seen corresponding path program 18 times [2024-05-04 04:55:09,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:09,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:09,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:10,069 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:10,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:10,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:10,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:10,200 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:10,294 INFO L85 PathProgramCache]: Analyzing trace with hash -1941665211, now seen corresponding path program 19 times [2024-05-04 04:55:10,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:10,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:10,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:10,428 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:10,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:10,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:10,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:10,562 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:10,638 INFO L85 PathProgramCache]: Analyzing trace with hash 474145387, now seen corresponding path program 20 times [2024-05-04 04:55:10,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:10,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:10,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:10,759 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:10,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:10,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:10,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:10,880 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:11,055 INFO L85 PathProgramCache]: Analyzing trace with hash -1647272982, now seen corresponding path program 21 times [2024-05-04 04:55:11,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:11,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:11,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:11,174 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:11,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:11,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:11,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:11,340 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:11,515 INFO L85 PathProgramCache]: Analyzing trace with hash 1312250896, now seen corresponding path program 22 times [2024-05-04 04:55:11,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:11,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:11,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:11,646 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:11,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:11,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:11,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:11,750 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:11,868 INFO L85 PathProgramCache]: Analyzing trace with hash 2025072205, now seen corresponding path program 23 times [2024-05-04 04:55:11,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:11,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:11,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:11,979 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:11,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:11,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:11,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:12,092 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:12,263 INFO L85 PathProgramCache]: Analyzing trace with hash -1647270994, now seen corresponding path program 24 times [2024-05-04 04:55:12,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:12,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:12,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:12,374 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:12,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:12,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:12,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:12,485 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:12,562 INFO L85 PathProgramCache]: Analyzing trace with hash -96216657, now seen corresponding path program 25 times [2024-05-04 04:55:12,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:12,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:12,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:12,666 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:12,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:12,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:12,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:12,771 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:12,848 INFO L85 PathProgramCache]: Analyzing trace with hash 2025076109, now seen corresponding path program 26 times [2024-05-04 04:55:12,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:12,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:12,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:13,026 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:13,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:13,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:13,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:13,164 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:13,371 INFO L85 PathProgramCache]: Analyzing trace with hash -2081313754, now seen corresponding path program 27 times [2024-05-04 04:55:13,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:13,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:13,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:13,470 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:13,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:13,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:13,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:13,568 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:13,718 INFO L85 PathProgramCache]: Analyzing trace with hash -96216841, now seen corresponding path program 28 times [2024-05-04 04:55:13,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:13,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:13,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:13,829 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:13,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:13,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:13,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:13,937 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:14,724 INFO L85 PathProgramCache]: Analyzing trace with hash -1313673107, now seen corresponding path program 1 times [2024-05-04 04:55:14,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:14,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:14,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:14,816 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:14,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:14,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:14,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:14,965 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:15,066 INFO L85 PathProgramCache]: Analyzing trace with hash 280532167, now seen corresponding path program 2 times [2024-05-04 04:55:15,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:15,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:15,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:15,176 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:15,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:15,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:15,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:15,283 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:15,361 INFO L85 PathProgramCache]: Analyzing trace with hash -991524311, now seen corresponding path program 3 times [2024-05-04 04:55:15,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:15,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:15,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:15,477 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:15,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:15,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:15,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:15,595 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:15,689 INFO L85 PathProgramCache]: Analyzing trace with hash 627879811, now seen corresponding path program 4 times [2024-05-04 04:55:15,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:15,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:15,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:15,811 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:15,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:15,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:15,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:15,932 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:16,112 INFO L85 PathProgramCache]: Analyzing trace with hash -2010562248, now seen corresponding path program 5 times [2024-05-04 04:55:16,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:16,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:16,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:16,236 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:16,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:16,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:16,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:16,359 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:16,458 INFO L85 PathProgramCache]: Analyzing trace with hash 2097079841, now seen corresponding path program 6 times [2024-05-04 04:55:16,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:16,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:16,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:16,634 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:16,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:16,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:16,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:16,762 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:16,962 INFO L85 PathProgramCache]: Analyzing trace with hash 584965718, now seen corresponding path program 7 times [2024-05-04 04:55:16,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:16,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:16,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:17,092 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:17,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:17,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:17,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:17,222 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:17,340 INFO L85 PathProgramCache]: Analyzing trace with hash 954068167, now seen corresponding path program 8 times [2024-05-04 04:55:17,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:17,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:17,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:17,472 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:17,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:17,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:17,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:17,604 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:17,701 INFO L85 PathProgramCache]: Analyzing trace with hash 954068163, now seen corresponding path program 9 times [2024-05-04 04:55:17,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:17,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:17,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:17,833 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:17,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:17,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:17,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:18,015 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:18,136 INFO L85 PathProgramCache]: Analyzing trace with hash 2097079845, now seen corresponding path program 10 times [2024-05-04 04:55:18,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:18,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:18,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:18,317 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:18,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:18,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:18,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:18,495 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:18,578 INFO L85 PathProgramCache]: Analyzing trace with hash 954072071, now seen corresponding path program 11 times [2024-05-04 04:55:18,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:18,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:18,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:18,732 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:18,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:18,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:18,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:18,869 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:18,964 INFO L85 PathProgramCache]: Analyzing trace with hash 2035229153, now seen corresponding path program 12 times [2024-05-04 04:55:18,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:18,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:18,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:19,102 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:19,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:19,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:19,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:19,239 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:19,427 INFO L85 PathProgramCache]: Analyzing trace with hash -1332405606, now seen corresponding path program 13 times [2024-05-04 04:55:19,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:19,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:19,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:19,617 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:55:19,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:19,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:19,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:19,757 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:55:19,855 INFO L85 PathProgramCache]: Analyzing trace with hash 1645099263, now seen corresponding path program 14 times [2024-05-04 04:55:19,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:19,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:19,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:19,999 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:55:19,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:19,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:20,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:20,141 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:55:20,335 INFO L85 PathProgramCache]: Analyzing trace with hash -541530312, now seen corresponding path program 15 times [2024-05-04 04:55:20,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:20,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:20,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:20,476 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 27 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:55:20,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:20,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:20,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:20,620 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 27 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:55:20,698 INFO L85 PathProgramCache]: Analyzing trace with hash 2035229157, now seen corresponding path program 16 times [2024-05-04 04:55:20,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:20,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:20,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:20,834 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:20,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:20,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:20,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:21,024 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:21,206 INFO L85 PathProgramCache]: Analyzing trace with hash -488536784, now seen corresponding path program 17 times [2024-05-04 04:55:21,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:21,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:21,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:21,340 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:55:21,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:21,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:21,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:21,474 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:55:21,568 INFO L85 PathProgramCache]: Analyzing trace with hash 954072067, now seen corresponding path program 18 times [2024-05-04 04:55:21,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:21,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:21,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:21,700 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:21,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:21,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:21,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:21,831 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:21,926 INFO L85 PathProgramCache]: Analyzing trace with hash 2035225185, now seen corresponding path program 19 times [2024-05-04 04:55:21,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:21,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:21,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:22,062 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:22,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:22,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:22,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:22,229 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:22,306 INFO L85 PathProgramCache]: Analyzing trace with hash 627879815, now seen corresponding path program 20 times [2024-05-04 04:55:22,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:22,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:22,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:22,429 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:22,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:22,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:22,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:22,602 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:22,779 INFO L85 PathProgramCache]: Analyzing trace with hash -672482482, now seen corresponding path program 21 times [2024-05-04 04:55:22,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:22,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:22,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:22,897 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:22,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:22,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:22,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:23,015 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:23,196 INFO L85 PathProgramCache]: Analyzing trace with hash 106562676, now seen corresponding path program 22 times [2024-05-04 04:55:23,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:23,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:23,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:23,302 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:23,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:23,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:23,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:23,408 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:23,525 INFO L85 PathProgramCache]: Analyzing trace with hash -991524247, now seen corresponding path program 23 times [2024-05-04 04:55:23,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:23,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:23,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:23,636 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:23,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:23,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:23,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:23,746 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 13 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:23,919 INFO L85 PathProgramCache]: Analyzing trace with hash -672480494, now seen corresponding path program 24 times [2024-05-04 04:55:23,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:23,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:23,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:24,031 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:24,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:24,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:24,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:24,193 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:24,270 INFO L85 PathProgramCache]: Analyzing trace with hash 280532171, now seen corresponding path program 25 times [2024-05-04 04:55:24,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:24,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:24,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:24,375 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:24,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:24,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:24,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:24,482 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:24,557 INFO L85 PathProgramCache]: Analyzing trace with hash -991520343, now seen corresponding path program 26 times [2024-05-04 04:55:24,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:24,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:24,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:24,667 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:24,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:24,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:24,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:24,780 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:24,979 INFO L85 PathProgramCache]: Analyzing trace with hash -2069160566, now seen corresponding path program 27 times [2024-05-04 04:55:24,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:24,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:24,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:25,085 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:25,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:25,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:25,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:25,184 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:25,336 INFO L85 PathProgramCache]: Analyzing trace with hash 280531987, now seen corresponding path program 28 times [2024-05-04 04:55:25,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:25,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:25,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:25,461 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 12 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:25,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:25,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:25,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:25,570 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 12 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:26,294 INFO L85 PathProgramCache]: Analyzing trace with hash -1340173101, now seen corresponding path program 1 times [2024-05-04 04:55:26,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:26,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:26,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:26,386 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:26,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:26,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:26,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:26,477 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:26,576 INFO L85 PathProgramCache]: Analyzing trace with hash 583841709, now seen corresponding path program 2 times [2024-05-04 04:55:26,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:26,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:26,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:26,688 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:26,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:26,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:26,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:26,798 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:26,874 INFO L85 PathProgramCache]: Analyzing trace with hash -1568830577, now seen corresponding path program 3 times [2024-05-04 04:55:26,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:26,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:26,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:27,037 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:27,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:27,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:27,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:27,197 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:27,299 INFO L85 PathProgramCache]: Analyzing trace with hash -112660631, now seen corresponding path program 4 times [2024-05-04 04:55:27,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:27,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:27,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:27,421 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:27,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:27,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:27,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:27,542 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:27,780 INFO L85 PathProgramCache]: Analyzing trace with hash 802487826, now seen corresponding path program 5 times [2024-05-04 04:55:27,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:27,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:27,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:27,902 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:27,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:27,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:27,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:28,024 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:28,122 INFO L85 PathProgramCache]: Analyzing trace with hash -892681081, now seen corresponding path program 6 times [2024-05-04 04:55:28,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:28,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:28,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:28,247 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:28,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:28,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:28,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:28,431 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:28,675 INFO L85 PathProgramCache]: Analyzing trace with hash -1903309648, now seen corresponding path program 7 times [2024-05-04 04:55:28,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:28,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:28,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:28,823 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:28,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:28,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:28,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:28,950 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:29,067 INFO L85 PathProgramCache]: Analyzing trace with hash 1126943149, now seen corresponding path program 8 times [2024-05-04 04:55:29,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:29,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:29,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:29,204 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:29,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:29,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:29,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:29,396 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:29,493 INFO L85 PathProgramCache]: Analyzing trace with hash 1126943145, now seen corresponding path program 9 times [2024-05-04 04:55:29,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:29,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:29,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:29,623 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:29,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:29,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:29,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:29,754 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:29,870 INFO L85 PathProgramCache]: Analyzing trace with hash -892681077, now seen corresponding path program 10 times [2024-05-04 04:55:29,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:29,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:29,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:29,997 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:29,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:29,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:30,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:30,124 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:30,199 INFO L85 PathProgramCache]: Analyzing trace with hash 1126947053, now seen corresponding path program 11 times [2024-05-04 04:55:30,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:30,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:30,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:30,330 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:30,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:30,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:30,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:30,460 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:30,554 INFO L85 PathProgramCache]: Analyzing trace with hash 664362311, now seen corresponding path program 12 times [2024-05-04 04:55:30,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:30,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:30,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:30,736 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:30,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:30,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:30,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:30,872 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:31,045 INFO L85 PathProgramCache]: Analyzing trace with hash -879604748, now seen corresponding path program 13 times [2024-05-04 04:55:31,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:31,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:31,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:31,181 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:55:31,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:31,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:31,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:31,318 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:55:31,416 INFO L85 PathProgramCache]: Analyzing trace with hash -1497943323, now seen corresponding path program 14 times [2024-05-04 04:55:31,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:31,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:31,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:31,555 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:55:31,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:31,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:31,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:31,696 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:55:31,893 INFO L85 PathProgramCache]: Analyzing trace with hash 808397330, now seen corresponding path program 15 times [2024-05-04 04:55:31,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:31,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:31,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:32,035 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:55:32,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:32,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:32,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:32,225 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:55:32,300 INFO L85 PathProgramCache]: Analyzing trace with hash 664362315, now seen corresponding path program 16 times [2024-05-04 04:55:32,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:32,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:32,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:32,435 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:32,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:32,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:32,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:32,573 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:32,754 INFO L85 PathProgramCache]: Analyzing trace with hash 575620362, now seen corresponding path program 17 times [2024-05-04 04:55:32,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:32,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:32,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:32,886 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:55:32,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:32,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:32,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:33,018 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:55:33,112 INFO L85 PathProgramCache]: Analyzing trace with hash 1126947049, now seen corresponding path program 18 times [2024-05-04 04:55:33,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:33,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:33,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:33,260 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:33,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:33,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:33,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:33,391 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:33,485 INFO L85 PathProgramCache]: Analyzing trace with hash 664358343, now seen corresponding path program 19 times [2024-05-04 04:55:33,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:33,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:33,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:33,672 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:33,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:33,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:33,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:33,807 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:33,886 INFO L85 PathProgramCache]: Analyzing trace with hash -112660627, now seen corresponding path program 20 times [2024-05-04 04:55:33,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:33,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:33,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:34,007 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:34,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:34,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:34,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:34,128 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:34,303 INFO L85 PathProgramCache]: Analyzing trace with hash -1389107544, now seen corresponding path program 21 times [2024-05-04 04:55:34,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:34,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:34,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:34,420 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:34,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:34,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:34,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:34,536 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:34,709 INFO L85 PathProgramCache]: Analyzing trace with hash 919223886, now seen corresponding path program 22 times [2024-05-04 04:55:34,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:34,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:34,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:34,815 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:34,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:34,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:34,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:34,922 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:35,039 INFO L85 PathProgramCache]: Analyzing trace with hash -1568830513, now seen corresponding path program 23 times [2024-05-04 04:55:35,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:35,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:35,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:35,197 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:35,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:35,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:35,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:35,309 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:35,484 INFO L85 PathProgramCache]: Analyzing trace with hash -1389105556, now seen corresponding path program 24 times [2024-05-04 04:55:35,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:35,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:35,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:35,597 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:35,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:35,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:35,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:35,711 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:35,787 INFO L85 PathProgramCache]: Analyzing trace with hash 583841713, now seen corresponding path program 25 times [2024-05-04 04:55:35,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:35,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:35,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:35,893 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:35,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:35,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:35,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:36,010 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:36,087 INFO L85 PathProgramCache]: Analyzing trace with hash -1568826609, now seen corresponding path program 26 times [2024-05-04 04:55:36,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:36,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:36,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:36,208 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:36,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:36,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:36,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:36,318 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:36,523 INFO L85 PathProgramCache]: Analyzing trace with hash 1404306916, now seen corresponding path program 27 times [2024-05-04 04:55:36,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:36,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:36,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:36,622 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:36,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:36,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:36,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:36,769 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:36,945 INFO L85 PathProgramCache]: Analyzing trace with hash 583841529, now seen corresponding path program 28 times [2024-05-04 04:55:36,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:36,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:36,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:37,051 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:37,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:37,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:37,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:37,158 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:37,838 INFO L85 PathProgramCache]: Analyzing trace with hash -729580309, now seen corresponding path program 1 times [2024-05-04 04:55:37,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:37,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:37,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:37,931 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:37,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:37,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:37,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:38,022 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:38,122 INFO L85 PathProgramCache]: Analyzing trace with hash -1047004731, now seen corresponding path program 2 times [2024-05-04 04:55:38,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:38,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:38,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:38,230 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:38,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:38,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:38,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:38,338 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:38,414 INFO L85 PathProgramCache]: Analyzing trace with hash -1149196377, now seen corresponding path program 3 times [2024-05-04 04:55:38,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:38,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:38,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:38,531 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:38,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:38,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:38,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:38,697 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:38,789 INFO L85 PathProgramCache]: Analyzing trace with hash -571120255, now seen corresponding path program 4 times [2024-05-04 04:55:38,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:38,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:38,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:38,911 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:38,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:38,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:38,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:39,032 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:39,213 INFO L85 PathProgramCache]: Analyzing trace with hash -524858630, now seen corresponding path program 5 times [2024-05-04 04:55:39,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:39,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:39,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:39,336 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:39,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:39,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:39,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:39,456 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:39,549 INFO L85 PathProgramCache]: Analyzing trace with hash 909251743, now seen corresponding path program 6 times [2024-05-04 04:55:39,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:39,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:39,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:39,675 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:39,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:39,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:39,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:39,799 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:39,992 INFO L85 PathProgramCache]: Analyzing trace with hash -1877966952, now seen corresponding path program 7 times [2024-05-04 04:55:39,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:39,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:39,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:40,118 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:40,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:40,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:40,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:40,293 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 17 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:40,411 INFO L85 PathProgramCache]: Analyzing trace with hash 1912566725, now seen corresponding path program 8 times [2024-05-04 04:55:40,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:40,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:40,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:40,543 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:40,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:40,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:40,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:40,674 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:40,770 INFO L85 PathProgramCache]: Analyzing trace with hash 1912566721, now seen corresponding path program 9 times [2024-05-04 04:55:40,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:40,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:40,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:40,898 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:40,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:40,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:40,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:41,033 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:41,152 INFO L85 PathProgramCache]: Analyzing trace with hash 909251747, now seen corresponding path program 10 times [2024-05-04 04:55:41,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:41,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:41,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:41,278 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:41,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:41,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:41,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:41,402 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:41,478 INFO L85 PathProgramCache]: Analyzing trace with hash 1912570629, now seen corresponding path program 11 times [2024-05-04 04:55:41,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:41,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:41,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:41,610 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:41,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:41,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:41,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:41,787 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:41,879 INFO L85 PathProgramCache]: Analyzing trace with hash -265625249, now seen corresponding path program 12 times [2024-05-04 04:55:41,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:41,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:41,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:42,015 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:42,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:42,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:42,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:42,149 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:42,325 INFO L85 PathProgramCache]: Analyzing trace with hash 355551964, now seen corresponding path program 13 times [2024-05-04 04:55:42,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:42,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:42,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:42,470 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:55:42,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:42,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:42,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:42,618 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 23 proven. 21 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-04 04:55:42,712 INFO L85 PathProgramCache]: Analyzing trace with hash -1862790915, now seen corresponding path program 14 times [2024-05-04 04:55:42,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:42,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:42,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:42,851 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:55:42,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:42,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:42,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:42,992 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 24 proven. 21 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-04 04:55:43,237 INFO L85 PathProgramCache]: Analyzing trace with hash -1911943430, now seen corresponding path program 15 times [2024-05-04 04:55:43,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:43,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:43,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:43,379 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:55:43,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:43,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:43,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:43,521 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 25 proven. 21 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-04 04:55:43,598 INFO L85 PathProgramCache]: Analyzing trace with hash -265625245, now seen corresponding path program 16 times [2024-05-04 04:55:43,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:43,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:43,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:43,733 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:43,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:43,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:43,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:43,883 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 22 proven. 21 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-04 04:55:44,055 INFO L85 PathProgramCache]: Analyzing trace with hash -839852558, now seen corresponding path program 17 times [2024-05-04 04:55:44,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:44,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:44,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:44,185 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:55:44,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:44,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:44,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:44,316 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-04 04:55:44,409 INFO L85 PathProgramCache]: Analyzing trace with hash 1912570625, now seen corresponding path program 18 times [2024-05-04 04:55:44,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:44,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:44,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:44,539 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:44,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:44,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:44,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:44,756 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:44,850 INFO L85 PathProgramCache]: Analyzing trace with hash -265629217, now seen corresponding path program 19 times [2024-05-04 04:55:44,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:44,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:44,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:44,986 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:44,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:44,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:44,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:45,138 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-04 04:55:45,213 INFO L85 PathProgramCache]: Analyzing trace with hash -571120251, now seen corresponding path program 20 times [2024-05-04 04:55:45,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:45,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:45,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:45,334 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:45,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:45,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:45,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:45,454 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 14 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:45,628 INFO L85 PathProgramCache]: Analyzing trace with hash -1265349232, now seen corresponding path program 21 times [2024-05-04 04:55:45,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:45,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:45,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:45,744 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:45,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:45,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:45,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:45,862 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:46,033 INFO L85 PathProgramCache]: Analyzing trace with hash 1902591798, now seen corresponding path program 22 times [2024-05-04 04:55:46,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:46,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:46,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:46,138 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:46,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:46,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:46,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:46,297 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:46,418 INFO L85 PathProgramCache]: Analyzing trace with hash -1149196313, now seen corresponding path program 23 times [2024-05-04 04:55:46,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:46,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:46,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:46,568 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:46,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:46,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:46,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:46,717 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:46,905 INFO L85 PathProgramCache]: Analyzing trace with hash -1265347244, now seen corresponding path program 24 times [2024-05-04 04:55:46,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:46,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:46,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:47,017 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:47,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:47,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:47,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:47,127 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:47,203 INFO L85 PathProgramCache]: Analyzing trace with hash -1047004727, now seen corresponding path program 25 times [2024-05-04 04:55:47,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:47,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:47,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:47,308 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:47,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:47,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:47,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:47,412 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:47,489 INFO L85 PathProgramCache]: Analyzing trace with hash -1149192409, now seen corresponding path program 26 times [2024-05-04 04:55:47,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:47,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:47,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:47,599 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:47,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:47,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:47,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:47,708 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:47,967 INFO L85 PathProgramCache]: Analyzing trace with hash -1142153012, now seen corresponding path program 27 times [2024-05-04 04:55:47,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:47,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:47,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:48,066 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:48,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:48,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:48,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:48,170 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:48,323 INFO L85 PathProgramCache]: Analyzing trace with hash -1047004911, now seen corresponding path program 28 times [2024-05-04 04:55:48,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:48,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:48,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:48,431 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:48,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:48,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:48,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:48,538 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 10 proven. 22 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:49,005 INFO L85 PathProgramCache]: Analyzing trace with hash 1586087302, now seen corresponding path program 21 times [2024-05-04 04:55:49,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:49,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:49,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:55:49,010 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:55:49,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:55:50,637 INFO L85 PathProgramCache]: Analyzing trace with hash 1661909679, now seen corresponding path program 21 times [2024-05-04 04:55:50,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:50,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:50,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:55:50,645 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:55:50,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:55:50,744 INFO L85 PathProgramCache]: Analyzing trace with hash -20407425, now seen corresponding path program 29 times [2024-05-04 04:55:50,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:50,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:50,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:51,041 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:51,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:51,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:51,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:51,113 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:51,187 INFO L85 PathProgramCache]: Analyzing trace with hash -632630095, now seen corresponding path program 29 times [2024-05-04 04:55:51,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:51,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:51,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:51,254 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:51,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:51,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:51,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:51,321 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:51,388 INFO L85 PathProgramCache]: Analyzing trace with hash 1863303637, now seen corresponding path program 29 times [2024-05-04 04:55:51,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:51,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:51,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:51,456 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:51,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:51,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:51,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:51,523 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:51,593 INFO L85 PathProgramCache]: Analyzing trace with hash 1927838002, now seen corresponding path program 33 times [2024-05-04 04:55:51,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:51,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:51,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:51,662 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:51,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:51,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:51,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:51,731 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:51,905 INFO L85 PathProgramCache]: Analyzing trace with hash -366563995, now seen corresponding path program 34 times [2024-05-04 04:55:51,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:51,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:51,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:51,976 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:51,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:51,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:51,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:52,048 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-04 04:55:52,169 INFO L85 PathProgramCache]: Analyzing trace with hash 1521418136, now seen corresponding path program 35 times [2024-05-04 04:55:52,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:52,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:52,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:55:52,174 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:55:52,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:55:52,196 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:55:52,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2024-05-04 04:55:52,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 125 states. [2024-05-04 04:55:52,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 110 states. [2024-05-04 04:55:52,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2024-05-04 04:55:52,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 115 states. [2024-05-04 04:55:52,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 155 states. [2024-05-04 04:55:52,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2024-05-04 04:55:52,208 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2024-05-04 04:55:52,404 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable670,SelfDestructingSolverStorable550,SelfDestructingSolverStorable671,SelfDestructingSolverStorable306,SelfDestructingSolverStorable427,SelfDestructingSolverStorable548,SelfDestructingSolverStorable669,SelfDestructingSolverStorable307,SelfDestructingSolverStorable428,SelfDestructingSolverStorable549,SelfDestructingSolverStorable308,SelfDestructingSolverStorable429,SelfDestructingSolverStorable309,SelfDestructingSolverStorable302,SelfDestructingSolverStorable423,SelfDestructingSolverStorable544,SelfDestructingSolverStorable665,SelfDestructingSolverStorable303,SelfDestructingSolverStorable424,SelfDestructingSolverStorable545,SelfDestructingSolverStorable666,SelfDestructingSolverStorable304,SelfDestructingSolverStorable425,SelfDestructingSolverStorable546,SelfDestructingSolverStorable667,SelfDestructingSolverStorable305,SelfDestructingSolverStorable426,SelfDestructingSolverStorable547,SelfDestructingSolverStorable668,SelfDestructingSolverStorable540,SelfDestructingSolverStorable661,SelfDestructingSolverStorable420,SelfDestructingSolverStorable541,SelfDestructingSolverStorable662,SelfDestructingSolverStorable300,SelfDestructingSolverStorable421,SelfDestructingSolverStorable542,SelfDestructingSolverStorable663,SelfDestructingSolverStorable301,SelfDestructingSolverStorable422,SelfDestructingSolverStorable543,SelfDestructingSolverStorable664,SelfDestructingSolverStorable660,SelfDestructingSolverStorable416,SelfDestructingSolverStorable537,SelfDestructingSolverStorable658,SelfDestructingSolverStorable417,SelfDestructingSolverStorable538,SelfDestructingSolverStorable659,SelfDestructingSolverStorable418,SelfDestructingSolverStorable539,SelfDestructingSolverStorable419,SelfDestructingSolverStorable412,SelfDestructingSolverStorable533,SelfDestructingSolverStorable654,SelfDestructingSolverStorable413,SelfDestructingSolverStorable534,SelfDestructingSolverStorable655,SelfDestructingSolverStorable414,SelfDestructingSolverStorable535,SelfDestructingSolverStorable656,SelfDestructingSolverStorable415,SelfDestructingSolverStorable536,SelfDestructingSolverStorable657,SelfDestructingSolverStorable650,SelfDestructingSolverStorable530,SelfDestructingSolverStorable651,SelfDestructingSolverStorable410,SelfDestructingSolverStorable531,SelfDestructingSolverStorable652,SelfDestructingSolverStorable411,SelfDestructingSolverStorable532,SelfDestructingSolverStorable653,SelfDestructingSolverStorable690,SelfDestructingSolverStorable570,SelfDestructingSolverStorable691,SelfDestructingSolverStorable450,SelfDestructingSolverStorable571,SelfDestructingSolverStorable692,SelfDestructingSolverStorable330,SelfDestructingSolverStorable451,SelfDestructingSolverStorable572,SelfDestructingSolverStorable693,SelfDestructingSolverStorable207,SelfDestructingSolverStorable328,SelfDestructingSolverStorable449,SelfDestructingSolverStorable208,SelfDestructingSolverStorable329,SelfDestructingSolverStorable209,SelfDestructingSolverStorable203,SelfDestructingSolverStorable324,SelfDestructingSolverStorable445,SelfDestructingSolverStorable566,SelfDestructingSolverStorable687,SelfDestructingSolverStorable204,SelfDestructingSolverStorable325,SelfDestructingSolverStorable446,SelfDestructingSolverStorable567,SelfDestructingSolverStorable688,SelfDestructingSolverStorable205,SelfDestructingSolverStorable326,SelfDestructingSolverStorable447,SelfDestructingSolverStorable568,SelfDestructingSolverStorable689,SelfDestructingSolverStorable206,SelfDestructingSolverStorable327,SelfDestructingSolverStorable448,SelfDestructingSolverStorable569,SelfDestructingSolverStorable320,SelfDestructingSolverStorable441,SelfDestructingSolverStorable562,SelfDestructingSolverStorable683,SelfDestructingSolverStorable200,SelfDestructingSolverStorable321,SelfDestructingSolverStorable442,SelfDestructingSolverStorable563,SelfDestructingSolverStorable684,SelfDestructingSolverStorable201,SelfDestructingSolverStorable322,SelfDestructingSolverStorable443,SelfDestructingSolverStorable564,SelfDestructingSolverStorable685,SelfDestructingSolverStorable202,SelfDestructingSolverStorable323,SelfDestructingSolverStorable444,SelfDestructingSolverStorable565,SelfDestructingSolverStorable686,SelfDestructingSolverStorable680,SelfDestructingSolverStorable560,SelfDestructingSolverStorable681,SelfDestructingSolverStorable440,SelfDestructingSolverStorable561,SelfDestructingSolverStorable682,SelfDestructingSolverStorable317,SelfDestructingSolverStorable438,SelfDestructingSolverStorable559,SelfDestructingSolverStorable318,SelfDestructingSolverStorable439,SelfDestructingSolverStorable319,SelfDestructingSolverStorable313,SelfDestructingSolverStorable434,SelfDestructingSolverStorable555,SelfDestructingSolverStorable676,SelfDestructingSolverStorable314,SelfDestructingSolverStorable435,SelfDestructingSolverStorable556,SelfDestructingSolverStorable677,SelfDestructingSolverStorable315,SelfDestructingSolverStorable436,SelfDestructingSolverStorable557,SelfDestructingSolverStorable678,SelfDestructingSolverStorable316,SelfDestructingSolverStorable437,SelfDestructingSolverStorable558,SelfDestructingSolverStorable679,SelfDestructingSolverStorable430,SelfDestructingSolverStorable551,SelfDestructingSolverStorable672,SelfDestructingSolverStorable310,SelfDestructingSolverStorable431,SelfDestructingSolverStorable552,SelfDestructingSolverStorable673,SelfDestructingSolverStorable311,SelfDestructingSolverStorable432,SelfDestructingSolverStorable553,SelfDestructingSolverStorable674,SelfDestructingSolverStorable312,SelfDestructingSolverStorable433,SelfDestructingSolverStorable554,SelfDestructingSolverStorable675,SelfDestructingSolverStorable508,SelfDestructingSolverStorable629,SelfDestructingSolverStorable509,SelfDestructingSolverStorable504,SelfDestructingSolverStorable625,SelfDestructingSolverStorable505,SelfDestructingSolverStorable626,SelfDestructingSolverStorable506,SelfDestructingSolverStorable627,SelfDestructingSolverStorable507,SelfDestructingSolverStorable628,SelfDestructingSolverStorable500,SelfDestructingSolverStorable621,SelfDestructingSolverStorable501,SelfDestructingSolverStorable622,SelfDestructingSolverStorable502,SelfDestructingSolverStorable623,SelfDestructingSolverStorable503,SelfDestructingSolverStorable624,SelfDestructingSolverStorable620,SelfDestructingSolverStorable618,SelfDestructingSolverStorable619,SelfDestructingSolverStorable614,SelfDestructingSolverStorable615,SelfDestructingSolverStorable616,SelfDestructingSolverStorable617,SelfDestructingSolverStorable610,SelfDestructingSolverStorable611,SelfDestructingSolverStorable612,SelfDestructingSolverStorable613,SelfDestructingSolverStorable409,SelfDestructingSolverStorable405,SelfDestructingSolverStorable526,SelfDestructingSolverStorable647,SelfDestructingSolverStorable406,SelfDestructingSolverStorable527,SelfDestructingSolverStorable648,SelfDestructingSolverStorable407,SelfDestructingSolverStorable528,SelfDestructingSolverStorable649,SelfDestructingSolverStorable408,SelfDestructingSolverStorable529,SelfDestructingSolverStorable401,SelfDestructingSolverStorable522,SelfDestructingSolverStorable643,SelfDestructingSolverStorable402,SelfDestructingSolverStorable523,SelfDestructingSolverStorable644,SelfDestructingSolverStorable403,SelfDestructingSolverStorable524,SelfDestructingSolverStorable645,SelfDestructingSolverStorable404,SelfDestructingSolverStorable525,SelfDestructingSolverStorable646,SelfDestructingSolverStorable640,SelfDestructingSolverStorable520,SelfDestructingSolverStorable641,SelfDestructingSolverStorable400,SelfDestructingSolverStorable521,SelfDestructingSolverStorable642,SelfDestructingSolverStorable519,SelfDestructingSolverStorable515,SelfDestructingSolverStorable636,SelfDestructingSolverStorable516,SelfDestructingSolverStorable637,SelfDestructingSolverStorable517,SelfDestructingSolverStorable638,SelfDestructingSolverStorable518,SelfDestructingSolverStorable639,SelfDestructingSolverStorable511,SelfDestructingSolverStorable632,SelfDestructingSolverStorable512,SelfDestructingSolverStorable633,SelfDestructingSolverStorable513,SelfDestructingSolverStorable634,SelfDestructingSolverStorable514,SelfDestructingSolverStorable635,SelfDestructingSolverStorable630,SelfDestructingSolverStorable510,SelfDestructingSolverStorable631,SelfDestructingSolverStorable706,SelfDestructingSolverStorable707,SelfDestructingSolverStorable708,SelfDestructingSolverStorable709,SelfDestructingSolverStorable702,SelfDestructingSolverStorable703,SelfDestructingSolverStorable704,SelfDestructingSolverStorable705,SelfDestructingSolverStorable700,SelfDestructingSolverStorable701,SelfDestructingSolverStorable607,SelfDestructingSolverStorable728,SelfDestructingSolverStorable608,SelfDestructingSolverStorable609,SelfDestructingSolverStorable603,SelfDestructingSolverStorable724,SelfDestructingSolverStorable604,SelfDestructingSolverStorable725,SelfDestructingSolverStorable605,SelfDestructingSolverStorable726,SelfDestructingSolverStorable606,SelfDestructingSolverStorable727,SelfDestructingSolverStorable720,SelfDestructingSolverStorable600,SelfDestructingSolverStorable721,SelfDestructingSolverStorable601,SelfDestructingSolverStorable722,SelfDestructingSolverStorable602,SelfDestructingSolverStorable723,SelfDestructingSolverStorable717,SelfDestructingSolverStorable718,SelfDestructingSolverStorable719,SelfDestructingSolverStorable713,SelfDestructingSolverStorable714,SelfDestructingSolverStorable715,SelfDestructingSolverStorable716,SelfDestructingSolverStorable710,SelfDestructingSolverStorable711,SelfDestructingSolverStorable712,20 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable195,SelfDestructingSolverStorable196,SelfDestructingSolverStorable197,SelfDestructingSolverStorable198,SelfDestructingSolverStorable191,SelfDestructingSolverStorable192,SelfDestructingSolverStorable193,SelfDestructingSolverStorable194,SelfDestructingSolverStorable190,SelfDestructingSolverStorable188,SelfDestructingSolverStorable189,SelfDestructingSolverStorable184,SelfDestructingSolverStorable185,SelfDestructingSolverStorable186,SelfDestructingSolverStorable187,SelfDestructingSolverStorable180,SelfDestructingSolverStorable181,SelfDestructingSolverStorable182,SelfDestructingSolverStorable183,SelfDestructingSolverStorable177,SelfDestructingSolverStorable298,SelfDestructingSolverStorable178,SelfDestructingSolverStorable299,SelfDestructingSolverStorable179,SelfDestructingSolverStorable199,SelfDestructingSolverStorable151,SelfDestructingSolverStorable272,SelfDestructingSolverStorable393,SelfDestructingSolverStorable152,SelfDestructingSolverStorable273,SelfDestructingSolverStorable394,SelfDestructingSolverStorable153,SelfDestructingSolverStorable274,SelfDestructingSolverStorable395,SelfDestructingSolverStorable154,SelfDestructingSolverStorable275,SelfDestructingSolverStorable396,SelfDestructingSolverStorable390,SelfDestructingSolverStorable270,SelfDestructingSolverStorable391,SelfDestructingSolverStorable150,SelfDestructingSolverStorable271,SelfDestructingSolverStorable392,SelfDestructingSolverStorable148,SelfDestructingSolverStorable269,SelfDestructingSolverStorable149,SelfDestructingSolverStorable144,SelfDestructingSolverStorable265,SelfDestructingSolverStorable386,SelfDestructingSolverStorable145,SelfDestructingSolverStorable266,SelfDestructingSolverStorable387,SelfDestructingSolverStorable146,SelfDestructingSolverStorable267,SelfDestructingSolverStorable388,SelfDestructingSolverStorable147,SelfDestructingSolverStorable268,SelfDestructingSolverStorable389,SelfDestructingSolverStorable140,SelfDestructingSolverStorable261,SelfDestructingSolverStorable382,SelfDestructingSolverStorable141,SelfDestructingSolverStorable262,SelfDestructingSolverStorable383,SelfDestructingSolverStorable142,SelfDestructingSolverStorable263,SelfDestructingSolverStorable384,SelfDestructingSolverStorable143,SelfDestructingSolverStorable264,SelfDestructingSolverStorable385,SelfDestructingSolverStorable380,SelfDestructingSolverStorable260,SelfDestructingSolverStorable381,SelfDestructingSolverStorable258,SelfDestructingSolverStorable379,SelfDestructingSolverStorable138,SelfDestructingSolverStorable259,SelfDestructingSolverStorable139,SelfDestructingSolverStorable254,SelfDestructingSolverStorable375,SelfDestructingSolverStorable496,SelfDestructingSolverStorable255,SelfDestructingSolverStorable376,SelfDestructingSolverStorable497,SelfDestructingSolverStorable256,SelfDestructingSolverStorable377,SelfDestructingSolverStorable498,SelfDestructingSolverStorable257,SelfDestructingSolverStorable378,SelfDestructingSolverStorable499,SelfDestructingSolverStorable173,SelfDestructingSolverStorable294,SelfDestructingSolverStorable174,SelfDestructingSolverStorable295,SelfDestructingSolverStorable175,SelfDestructingSolverStorable296,SelfDestructingSolverStorable176,SelfDestructingSolverStorable297,SelfDestructingSolverStorable290,SelfDestructingSolverStorable170,SelfDestructingSolverStorable291,SelfDestructingSolverStorable171,SelfDestructingSolverStorable292,SelfDestructingSolverStorable172,SelfDestructingSolverStorable293,SelfDestructingSolverStorable166,SelfDestructingSolverStorable287,SelfDestructingSolverStorable167,SelfDestructingSolverStorable288,SelfDestructingSolverStorable168,SelfDestructingSolverStorable289,SelfDestructingSolverStorable169,SelfDestructingSolverStorable162,SelfDestructingSolverStorable283,SelfDestructingSolverStorable163,SelfDestructingSolverStorable284,SelfDestructingSolverStorable164,SelfDestructingSolverStorable285,SelfDestructingSolverStorable165,SelfDestructingSolverStorable286,SelfDestructingSolverStorable280,SelfDestructingSolverStorable160,SelfDestructingSolverStorable281,SelfDestructingSolverStorable161,SelfDestructingSolverStorable282,SelfDestructingSolverStorable159,SelfDestructingSolverStorable155,SelfDestructingSolverStorable276,SelfDestructingSolverStorable397,SelfDestructingSolverStorable156,SelfDestructingSolverStorable277,SelfDestructingSolverStorable398,SelfDestructingSolverStorable157,SelfDestructingSolverStorable278,SelfDestructingSolverStorable399,SelfDestructingSolverStorable158,SelfDestructingSolverStorable279,SelfDestructingSolverStorable470,SelfDestructingSolverStorable591,SelfDestructingSolverStorable350,SelfDestructingSolverStorable471,SelfDestructingSolverStorable592,SelfDestructingSolverStorable230,SelfDestructingSolverStorable351,SelfDestructingSolverStorable472,SelfDestructingSolverStorable593,SelfDestructingSolverStorable231,SelfDestructingSolverStorable352,SelfDestructingSolverStorable473,SelfDestructingSolverStorable594,SelfDestructingSolverStorab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[2024-05-04 04:55:52,405 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-04 04:55:52,405 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-04 04:55:52,405 INFO L85 PathProgramCache]: Analyzing trace with hash -1479120796, now seen corresponding path program 12 times [2024-05-04 04:55:52,405 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-04 04:55:52,405 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119583904] [2024-05-04 04:55:52,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:52,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:52,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-04 04:55:52,589 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 12 proven. 37 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-04 04:55:52,589 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-04 04:55:52,589 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [119583904] [2024-05-04 04:55:52,589 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [119583904] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-04 04:55:52,589 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [359494990] [2024-05-04 04:55:52,589 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-05-04 04:55:52,589 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-04 04:55:52,590 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-04 04:55:52,590 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-04 04:55:52,592 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2024-05-04 04:55:52,640 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2024-05-04 04:55:52,640 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-04 04:55:52,641 INFO L262 TraceCheckSpWp]: Trace formula consists of 126 conjuncts, 27 conjunts are in the unsatisfiable core [2024-05-04 04:55:52,641 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-04 04:55:52,759 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 16 proven. 32 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-04 04:55:52,759 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-04 04:55:53,114 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 54 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-04 04:55:53,115 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [359494990] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-04 04:55:53,115 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-04 04:55:53,115 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 22] total 40 [2024-05-04 04:55:53,115 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1080840816] [2024-05-04 04:55:53,115 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-04 04:55:53,115 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2024-05-04 04:55:53,115 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-04 04:55:53,116 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2024-05-04 04:55:53,116 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=365, Invalid=1275, Unknown=0, NotChecked=0, Total=1640 [2024-05-04 04:55:53,116 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:55:53,116 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-04 04:55:53,116 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 41 states have (on average 2.268292682926829) internal successors, (93), 40 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 44 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 47 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 50 states. [2024-05-04 04:55:53,117 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-04 04:55:53,118 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 70 states. [2024-05-04 04:55:53,118 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 125 states. [2024-05-04 04:55:53,118 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 110 states. [2024-05-04 04:55:53,118 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 92 states. [2024-05-04 04:55:53,118 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 115 states. [2024-05-04 04:55:53,118 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 155 states. [2024-05-04 04:55:53,118 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 74 states. [2024-05-04 04:55:53,118 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-04 04:55:53,424 INFO L85 PathProgramCache]: Analyzing trace with hash -1284071323, now seen corresponding path program 23 times [2024-05-04 04:55:53,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:53,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:53,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:55:53,425 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:55:53,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:55:53,674 INFO L85 PathProgramCache]: Analyzing trace with hash -589564343, now seen corresponding path program 22 times [2024-05-04 04:55:53,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:53,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:53,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:55:53,676 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:55:53,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:55:59,546 INFO L85 PathProgramCache]: Analyzing trace with hash 1505002449, now seen corresponding path program 14 times [2024-05-04 04:55:59,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:55:59,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:55:59,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:55:59,547 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:55:59,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:04,341 INFO L85 PathProgramCache]: Analyzing trace with hash 365305611, now seen corresponding path program 13 times [2024-05-04 04:56:04,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:56:04,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:56:04,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:04,343 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:56:04,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:04,460 INFO L85 PathProgramCache]: Analyzing trace with hash -1128623139, now seen corresponding path program 22 times [2024-05-04 04:56:04,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:56:04,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:56:04,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:04,462 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:56:04,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:04,564 INFO L85 PathProgramCache]: Analyzing trace with hash -209097279, now seen corresponding path program 22 times [2024-05-04 04:56:04,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:56:04,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:56:04,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:04,567 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:56:04,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:09,239 INFO L85 PathProgramCache]: Analyzing trace with hash -1807860391, now seen corresponding path program 14 times [2024-05-04 04:56:09,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:56:09,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:56:09,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:09,242 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:56:09,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:13,934 INFO L85 PathProgramCache]: Analyzing trace with hash 921933955, now seen corresponding path program 23 times [2024-05-04 04:56:13,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:56:13,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:56:13,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:13,937 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:56:13,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:27,058 INFO L85 PathProgramCache]: Analyzing trace with hash -1484818388, now seen corresponding path program 24 times [2024-05-04 04:56:27,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:56:27,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:56:27,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:27,062 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:56:27,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:27,548 INFO L85 PathProgramCache]: Analyzing trace with hash 1159512009, now seen corresponding path program 23 times [2024-05-04 04:56:27,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:56:27,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:56:27,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:27,552 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:56:27,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:58,920 INFO L85 PathProgramCache]: Analyzing trace with hash 1585133998, now seen corresponding path program 24 times [2024-05-04 04:56:58,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:56:58,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:56:58,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:56:58,925 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:56:58,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:57:07,382 INFO L85 PathProgramCache]: Analyzing trace with hash 1894513771, now seen corresponding path program 25 times [2024-05-04 04:57:07,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:57:07,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:57:07,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:57:07,389 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:57:07,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:57:12,586 INFO L85 PathProgramCache]: Analyzing trace with hash -1399615156, now seen corresponding path program 26 times [2024-05-04 04:57:12,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:57:12,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:57:12,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:57:12,591 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:57:12,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:57:19,763 INFO L85 PathProgramCache]: Analyzing trace with hash 1838519023, now seen corresponding path program 15 times [2024-05-04 04:57:19,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:57:19,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:57:19,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:57:19,767 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:57:19,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:57:49,242 INFO L85 PathProgramCache]: Analyzing trace with hash 1159514952, now seen corresponding path program 16 times [2024-05-04 04:57:49,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:57:49,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:57:49,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:57:49,246 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:57:49,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:57:57,822 INFO L85 PathProgramCache]: Analyzing trace with hash 1585225233, now seen corresponding path program 17 times [2024-05-04 04:57:57,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:57:57,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:57:57,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:57:57,827 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:57:57,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:58:02,910 INFO L85 PathProgramCache]: Analyzing trace with hash 1897342054, now seen corresponding path program 18 times [2024-05-04 04:58:02,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-04 04:58:02,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-04 04:58:02,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-04 04:58:02,917 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-04 04:58:02,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat Received shutdown request... [2024-05-04 04:58:03,256 WARN L235 SmtUtils]: Removed 2 from assertion stack [2024-05-04 04:58:03,261 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2024-05-04 04:58:03,281 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-04 04:58:03,281 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-04 04:58:03,282 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-04 04:58:03,457 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable739,SelfDestructingSolverStorable729,SelfDestructingSolverStorable735,SelfDestructingSolverStorable746,SelfDestructingSolverStorable736,SelfDestructingSolverStorable737,SelfDestructingSolverStorable738,SelfDestructingSolverStorable731,SelfDestructingSolverStorable742,SelfDestructingSolverStorable732,SelfDestructingSolverStorable743,SelfDestructingSolverStorable733,SelfDestructingSolverStorable744,SelfDestructingSolverStorable734,SelfDestructingSolverStorable745,SelfDestructingSolverStorable740,SelfDestructingSolverStorable730,SelfDestructingSolverStorable741 [2024-05-04 04:58:03,457 WARN L619 AbstractCegarLoop]: Verification canceled: while SimplifyDDAWithTimeout was simplifying term of DAG size 3 for 4ms.. [2024-05-04 04:58:03,459 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0ASSERT_VIOLATIONASSERT (4 of 5 remaining) [2024-05-04 04:58:03,459 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 5 remaining) [2024-05-04 04:58:03,459 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 5 remaining) [2024-05-04 04:58:03,459 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 5 remaining) [2024-05-04 04:58:03,459 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 5 remaining) [2024-05-04 04:58:03,464 INFO L448 BasicCegarLoop]: Path program histogram: [35, 29, 29, 29, 28, 28, 28, 28, 28, 28, 26, 24, 23, 22, 18, 14, 13, 12, 5, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-04 04:58:03,465 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: clock still running: ConditionalCommutativityCheckTime at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopStatisticsGenerator.getValue(CegarLoopStatisticsGenerator.java:172) at de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData.aggregateBenchmarkData(StatisticsData.java:60) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:225) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2024-05-04 04:58:03,467 INFO L158 Benchmark]: Toolchain (without parser) took 763314.00ms. Allocated memory was 286.3MB in the beginning and 1.7GB in the end (delta: 1.5GB). Free memory was 257.3MB in the beginning and 484.7MB in the end (delta: -227.4MB). Peak memory consumption was 1.2GB. Max. memory is 8.0GB. [2024-05-04 04:58:03,468 INFO L158 Benchmark]: Boogie PL CUP Parser took 0.16ms. Allocated memory is still 286.3MB. Free memory is still 256.5MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-04 04:58:03,468 INFO L158 Benchmark]: Boogie Procedure Inliner took 42.84ms. Allocated memory is still 286.3MB. Free memory was 256.9MB in the beginning and 261.5MB in the end (delta: -4.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-04 04:58:03,468 INFO L158 Benchmark]: Boogie Preprocessor took 23.16ms. Allocated memory is still 286.3MB. Free memory was 261.5MB in the beginning and 260.4MB in the end (delta: 1.1MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2024-05-04 04:58:03,468 INFO L158 Benchmark]: RCFGBuilder took 230.15ms. Allocated memory is still 286.3MB. Free memory was 260.4MB in the beginning and 248.9MB in the end (delta: 11.5MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. [2024-05-04 04:58:03,468 INFO L158 Benchmark]: TraceAbstraction took 763008.37ms. Allocated memory was 286.3MB in the beginning and 1.7GB in the end (delta: 1.5GB). Free memory was 247.5MB in the beginning and 484.7MB in the end (delta: -237.2MB). Peak memory consumption was 1.2GB. Max. memory is 8.0GB. [2024-05-04 04:58:03,469 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.16ms. Allocated memory is still 286.3MB. Free memory is still 256.5MB. There was no memory consumed. Max. memory is 8.0GB. * Boogie Procedure Inliner took 42.84ms. Allocated memory is still 286.3MB. Free memory was 256.9MB in the beginning and 261.5MB in the end (delta: -4.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 23.16ms. Allocated memory is still 286.3MB. Free memory was 261.5MB in the beginning and 260.4MB in the end (delta: 1.1MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 230.15ms. Allocated memory is still 286.3MB. Free memory was 260.4MB in the beginning and 248.9MB in the end (delta: 11.5MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. * TraceAbstraction took 763008.37ms. Allocated memory was 286.3MB in the beginning and 1.7GB in the end (delta: 1.5GB). Free memory was 247.5MB in the beginning and 484.7MB in the end (delta: -237.2MB). Peak memory consumption was 1.2GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 230736, independent: 209876, independent conditional: 209662, independent unconditional: 214, dependent: 20860, dependent conditional: 20860, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 221369, independent: 209876, independent conditional: 209662, independent unconditional: 214, dependent: 11493, dependent conditional: 11493, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 221369, independent: 209876, independent conditional: 209662, independent unconditional: 214, dependent: 11493, dependent conditional: 11493, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 221369, independent: 209876, independent conditional: 209662, independent unconditional: 214, dependent: 11493, dependent conditional: 11493, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 298202, independent: 209876, independent conditional: 88626, independent unconditional: 121250, dependent: 88326, dependent conditional: 77185, dependent unconditional: 11141, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 298202, independent: 209876, independent conditional: 75577, independent unconditional: 134299, dependent: 88326, dependent conditional: 72290, dependent unconditional: 16036, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 298202, independent: 209876, independent conditional: 75577, independent unconditional: 134299, dependent: 88326, dependent conditional: 72290, dependent unconditional: 16036, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1221, independent: 357, independent conditional: 133, independent unconditional: 224, dependent: 864, dependent conditional: 856, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1221, independent: 258, independent conditional: 0, independent unconditional: 258, dependent: 963, dependent conditional: 0, dependent unconditional: 963, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 963, independent: 99, independent conditional: 94, independent unconditional: 5, dependent: 864, dependent conditional: 856, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 963, independent: 99, independent conditional: 94, independent unconditional: 5, dependent: 864, dependent conditional: 856, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 1802, independent: 145, independent conditional: 138, independent unconditional: 7, dependent: 1656, dependent conditional: 1639, dependent unconditional: 17, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 298202, independent: 209519, independent conditional: 75444, independent unconditional: 134075, dependent: 87462, dependent conditional: 71434, dependent unconditional: 16028, unknown: 1221, unknown conditional: 989, unknown unconditional: 232] , Statistics on independence cache: Total cache size (in pairs): 1221, Positive cache size: 357, Positive conditional cache size: 133, Positive unconditional cache size: 224, Negative cache size: 864, Negative conditional cache size: 856, Negative unconditional cache size: 8, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 17944, Maximal queried relation: 23, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 298202, independent: 209876, independent conditional: 88626, independent unconditional: 121250, dependent: 88326, dependent conditional: 77185, dependent unconditional: 11141, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 298202, independent: 209876, independent conditional: 75577, independent unconditional: 134299, dependent: 88326, dependent conditional: 72290, dependent unconditional: 16036, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 298202, independent: 209876, independent conditional: 75577, independent unconditional: 134299, dependent: 88326, dependent conditional: 72290, dependent unconditional: 16036, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1221, independent: 357, independent conditional: 133, independent unconditional: 224, dependent: 864, dependent conditional: 856, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1221, independent: 258, independent conditional: 0, independent unconditional: 258, dependent: 963, dependent conditional: 0, dependent unconditional: 963, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 963, independent: 99, independent conditional: 94, independent unconditional: 5, dependent: 864, dependent conditional: 856, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 963, independent: 99, independent conditional: 94, independent unconditional: 5, dependent: 864, dependent conditional: 856, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 1802, independent: 145, independent conditional: 138, independent unconditional: 7, dependent: 1656, dependent conditional: 1639, dependent unconditional: 17, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 298202, independent: 209519, independent conditional: 75444, independent unconditional: 134075, dependent: 87462, dependent conditional: 71434, dependent unconditional: 16028, unknown: 1221, unknown conditional: 989, unknown unconditional: 232] , Statistics on independence cache: Total cache size (in pairs): 1221, Positive cache size: 357, Positive conditional cache size: 133, Positive unconditional cache size: 224, Negative cache size: 864, Negative conditional cache size: 856, Negative unconditional cache size: 8, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 17944 ], Independence queries for same thread: 9367 - ExceptionOrErrorResult: AssertionError: clock still running: ConditionalCommutativityCheckTime de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: clock still running: ConditionalCommutativityCheckTime: de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopStatisticsGenerator.getValue(CegarLoopStatisticsGenerator.java:172) RESULT: Ultimate could not prove your program: Toolchain returned no result. Completed graceful shutdown