/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking BOTH --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 10 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-07 23:55:25,352 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-07 23:55:25,425 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-07 23:55:25,429 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-07 23:55:25,429 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-07 23:55:25,453 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-07 23:55:25,454 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-07 23:55:25,454 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-07 23:55:25,455 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-07 23:55:25,458 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-07 23:55:25,458 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-07 23:55:25,458 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-07 23:55:25,458 INFO L153 SettingsManager]: * Use SBE=true [2024-05-07 23:55:25,460 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-07 23:55:25,460 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-07 23:55:25,460 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-07 23:55:25,460 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-07 23:55:25,460 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-07 23:55:25,461 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-07 23:55:25,461 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-07 23:55:25,461 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-07 23:55:25,462 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-07 23:55:25,462 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-07 23:55:25,462 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-07 23:55:25,462 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-07 23:55:25,463 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-07 23:55:25,463 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-07 23:55:25,463 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-07 23:55:25,463 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-07 23:55:25,463 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 23:55:25,464 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-07 23:55:25,464 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-07 23:55:25,465 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-07 23:55:25,465 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-07 23:55:25,465 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-07 23:55:25,465 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-07 23:55:25,465 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-07 23:55:25,465 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-07 23:55:25,465 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-07 23:55:25,465 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> BOTH Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 10 [2024-05-07 23:55:25,667 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-07 23:55:25,690 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-07 23:55:25,691 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-07 23:55:25,692 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-07 23:55:25,693 INFO L274 PluginConnector]: CDTParser initialized [2024-05-07 23:55:25,693 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c [2024-05-07 23:55:26,710 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-07 23:55:26,844 INFO L384 CDTParser]: Found 1 translation units. [2024-05-07 23:55:26,844 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c [2024-05-07 23:55:26,850 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/db4dfd7aa/9fdefb56e6e9493095a5ae6c6a3f33a6/FLAG5bbe4d5f1 [2024-05-07 23:55:26,861 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/db4dfd7aa/9fdefb56e6e9493095a5ae6c6a3f33a6 [2024-05-07 23:55:26,863 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-07 23:55:26,864 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-07 23:55:26,869 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-07 23:55:26,869 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-07 23:55:26,873 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-07 23:55:26,873 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 11:55:26" (1/1) ... [2024-05-07 23:55:26,874 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@563127fb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:26, skipping insertion in model container [2024-05-07 23:55:26,874 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 11:55:26" (1/1) ... [2024-05-07 23:55:26,906 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-07 23:55:27,036 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c[2598,2611] [2024-05-07 23:55:27,042 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 23:55:27,048 INFO L202 MainTranslator]: Completed pre-run [2024-05-07 23:55:27,063 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c[2598,2611] [2024-05-07 23:55:27,065 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 23:55:27,084 INFO L206 MainTranslator]: Completed translation [2024-05-07 23:55:27,084 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27 WrapperNode [2024-05-07 23:55:27,084 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-07 23:55:27,085 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-07 23:55:27,085 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-07 23:55:27,085 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-07 23:55:27,090 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27" (1/1) ... [2024-05-07 23:55:27,099 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27" (1/1) ... [2024-05-07 23:55:27,120 INFO L138 Inliner]: procedures = 25, calls = 46, calls flagged for inlining = 11, calls inlined = 17, statements flattened = 203 [2024-05-07 23:55:27,121 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-07 23:55:27,121 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-07 23:55:27,121 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-07 23:55:27,121 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-07 23:55:27,128 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27" (1/1) ... [2024-05-07 23:55:27,128 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27" (1/1) ... [2024-05-07 23:55:27,130 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27" (1/1) ... [2024-05-07 23:55:27,131 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27" (1/1) ... [2024-05-07 23:55:27,136 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27" (1/1) ... [2024-05-07 23:55:27,139 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27" (1/1) ... [2024-05-07 23:55:27,140 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27" (1/1) ... [2024-05-07 23:55:27,141 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27" (1/1) ... [2024-05-07 23:55:27,143 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-07 23:55:27,143 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-07 23:55:27,143 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-07 23:55:27,144 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-07 23:55:27,144 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27" (1/1) ... [2024-05-07 23:55:27,148 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 23:55:27,157 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 23:55:27,193 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-07 23:55:27,206 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-07 23:55:27,229 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-07 23:55:27,230 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-07 23:55:27,230 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-07 23:55:27,230 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-07 23:55:27,230 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-07 23:55:27,230 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-07 23:55:27,230 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-07 23:55:27,230 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-07 23:55:27,230 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-07 23:55:27,230 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-07 23:55:27,230 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-07 23:55:27,231 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-07 23:55:27,231 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-07 23:55:27,232 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-07 23:55:27,232 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-07 23:55:27,233 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-07 23:55:27,322 INFO L241 CfgBuilder]: Building ICFG [2024-05-07 23:55:27,324 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-07 23:55:27,613 INFO L282 CfgBuilder]: Performing block encoding [2024-05-07 23:55:27,632 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-07 23:55:27,632 INFO L309 CfgBuilder]: Removed 7 assume(true) statements. [2024-05-07 23:55:27,634 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 11:55:27 BoogieIcfgContainer [2024-05-07 23:55:27,634 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-07 23:55:27,636 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-07 23:55:27,636 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-07 23:55:27,640 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-07 23:55:27,641 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.05 11:55:26" (1/3) ... [2024-05-07 23:55:27,641 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7d8a7b3b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 11:55:27, skipping insertion in model container [2024-05-07 23:55:27,641 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 11:55:27" (2/3) ... [2024-05-07 23:55:27,641 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7d8a7b3b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 11:55:27, skipping insertion in model container [2024-05-07 23:55:27,642 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 11:55:27" (3/3) ... [2024-05-07 23:55:27,642 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-more-vector-add.wvr.c [2024-05-07 23:55:27,648 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-07 23:55:27,655 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-07 23:55:27,655 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-07 23:55:27,655 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-07 23:55:27,737 INFO L144 ThreadInstanceAdder]: Constructed 3 joinOtherThreadTransitions. [2024-05-07 23:55:27,772 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-07 23:55:27,772 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-07 23:55:27,772 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 23:55:27,774 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-07 23:55:27,795 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-07 23:55:27,834 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-07 23:55:27,843 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 23:55:27,853 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-07 23:55:27,860 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@21a7f299, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=BOTH, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=10, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-07 23:55:27,860 INFO L358 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2024-05-07 23:55:28,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:55:30,214 INFO L85 PathProgramCache]: Analyzing trace with hash 1002899142, now seen corresponding path program 1 times [2024-05-07 23:55:30,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:30,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:30,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:30,455 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:30,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:30,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:30,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:30,581 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:30,633 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-07 23:55:30,633 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-07 23:55:30,698 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:55:32,773 INFO L85 PathProgramCache]: Analyzing trace with hash -1910069838, now seen corresponding path program 1 times [2024-05-07 23:55:32,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:32,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:32,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:33,234 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 23:55:33,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:33,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:33,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:33,467 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 23:55:33,468 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-07 23:55:33,468 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-05-07 23:55:33,726 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:55:35,782 INFO L85 PathProgramCache]: Analyzing trace with hash 320810677, now seen corresponding path program 1 times [2024-05-07 23:55:35,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:35,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:35,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:36,113 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:55:36,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:36,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:36,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:36,439 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:55:36,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:36,572 INFO L85 PathProgramCache]: Analyzing trace with hash 1335141641, now seen corresponding path program 1 times [2024-05-07 23:55:36,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:36,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:36,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:36,809 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:36,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:36,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:36,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:37,049 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:37,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:39,197 INFO L85 PathProgramCache]: Analyzing trace with hash -1560281370, now seen corresponding path program 2 times [2024-05-07 23:55:39,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:39,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:39,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:39,412 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:39,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:39,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:39,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:39,625 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:39,654 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-07 23:55:39,981 INFO L85 PathProgramCache]: Analyzing trace with hash -1124081493, now seen corresponding path program 3 times [2024-05-07 23:55:39,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:39,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:40,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:40,143 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:40,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:40,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:40,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:40,324 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:40,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:55:42,398 INFO L85 PathProgramCache]: Analyzing trace with hash 1730535696, now seen corresponding path program 2 times [2024-05-07 23:55:42,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:42,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:42,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:42,590 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:42,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:42,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:42,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:42,875 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:42,904 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:43,016 INFO L85 PathProgramCache]: Analyzing trace with hash -1560300495, now seen corresponding path program 4 times [2024-05-07 23:55:43,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:43,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:43,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:43,177 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:43,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:43,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:43,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:43,355 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:43,379 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:43,462 INFO L85 PathProgramCache]: Analyzing trace with hash 1335123821, now seen corresponding path program 5 times [2024-05-07 23:55:43,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:43,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:43,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:43,595 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:43,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:43,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:43,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:43,784 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:43,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:43,938 INFO L85 PathProgramCache]: Analyzing trace with hash -1850681211, now seen corresponding path program 6 times [2024-05-07 23:55:43,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:43,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:43,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:44,064 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:44,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:44,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:44,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:44,189 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:44,211 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:44,408 INFO L85 PathProgramCache]: Analyzing trace with hash -1536541959, now seen corresponding path program 7 times [2024-05-07 23:55:44,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:44,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:44,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:44,567 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:44,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:44,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:44,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:44,685 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:44,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-07 23:55:46,695 INFO L85 PathProgramCache]: Analyzing trace with hash -388159737, now seen corresponding path program 8 times [2024-05-07 23:55:46,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:46,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:46,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:46,839 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:46,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:46,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:46,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:47,037 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:47,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:47,332 INFO L85 PathProgramCache]: Analyzing trace with hash -1536532254, now seen corresponding path program 9 times [2024-05-07 23:55:47,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:47,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:47,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:47,449 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:47,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:47,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:47,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:47,564 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:47,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:47,685 INFO L85 PathProgramCache]: Analyzing trace with hash -1850669271, now seen corresponding path program 10 times [2024-05-07 23:55:47,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:47,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:47,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:47,865 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:47,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:47,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:47,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:47,974 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:47,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:55:50,041 INFO L85 PathProgramCache]: Analyzing trace with hash -2092560529, now seen corresponding path program 1 times [2024-05-07 23:55:50,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:50,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:50,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:50,164 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:55:50,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:50,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:50,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:50,338 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:55:50,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:50,436 INFO L85 PathProgramCache]: Analyzing trace with hash 191230787, now seen corresponding path program 1 times [2024-05-07 23:55:50,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:50,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:50,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:50,552 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:50,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:50,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:50,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:50,684 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:50,704 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:50,759 INFO L85 PathProgramCache]: Analyzing trace with hash 1633187820, now seen corresponding path program 2 times [2024-05-07 23:55:50,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:50,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:50,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:50,940 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:50,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:50,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:50,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:51,075 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:51,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-07 23:55:51,306 INFO L85 PathProgramCache]: Analyzing trace with hash -910784411, now seen corresponding path program 3 times [2024-05-07 23:55:51,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:51,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:51,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:51,428 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:51,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:51,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:51,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:51,612 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:51,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:55:53,698 INFO L85 PathProgramCache]: Analyzing trace with hash -682835510, now seen corresponding path program 2 times [2024-05-07 23:55:53,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:53,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:53,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:53,863 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:53,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:53,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:53,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:54,001 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:54,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:54,098 INFO L85 PathProgramCache]: Analyzing trace with hash 1633168695, now seen corresponding path program 4 times [2024-05-07 23:55:54,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:54,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:54,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:54,216 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:54,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:54,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:54,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:54,396 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:54,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:54,479 INFO L85 PathProgramCache]: Analyzing trace with hash 191212967, now seen corresponding path program 5 times [2024-05-07 23:55:54,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:54,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:54,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:54,597 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:54,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:54,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:54,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:54,728 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:54,759 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:54,820 INFO L85 PathProgramCache]: Analyzing trace with hash -615137013, now seen corresponding path program 6 times [2024-05-07 23:55:54,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:54,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:54,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:54,943 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:54,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:54,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:54,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:55,146 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:55,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:55,241 INFO L85 PathProgramCache]: Analyzing trace with hash -1889377485, now seen corresponding path program 7 times [2024-05-07 23:55:55,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:55,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:55,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:55,364 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:55,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:55,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:55,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:55,478 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:55,494 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-07 23:55:55,728 INFO L85 PathProgramCache]: Analyzing trace with hash 1558840845, now seen corresponding path program 8 times [2024-05-07 23:55:55,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:55,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:55,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:55,854 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:55,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:55,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:55,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:56,039 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:56,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:56,156 INFO L85 PathProgramCache]: Analyzing trace with hash -1889367780, now seen corresponding path program 9 times [2024-05-07 23:55:56,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:56,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:56,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:56,275 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:56,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:56,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:56,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:56,389 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:56,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:56,493 INFO L85 PathProgramCache]: Analyzing trace with hash -615125073, now seen corresponding path program 10 times [2024-05-07 23:55:56,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:56,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:56,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:56,610 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:56,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:56,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:56,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:56,763 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:56,790 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:55:58,840 INFO L85 PathProgramCache]: Analyzing trace with hash 1007960118, now seen corresponding path program 1 times [2024-05-07 23:55:58,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:58,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:58,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:58,980 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:55:58,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:58,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:59,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:59,136 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:55:59,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:59,232 INFO L85 PathProgramCache]: Analyzing trace with hash -525238, now seen corresponding path program 1 times [2024-05-07 23:55:59,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:59,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:59,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:59,384 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:59,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:59,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:59,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:59,511 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:59,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:55:59,605 INFO L85 PathProgramCache]: Analyzing trace with hash -16281659, now seen corresponding path program 2 times [2024-05-07 23:55:59,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:59,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:59,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:59,741 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:59,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:55:59,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:55:59,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:55:59,958 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:55:59,974 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-07 23:56:01,822 INFO L85 PathProgramCache]: Analyzing trace with hash -504730708, now seen corresponding path program 3 times [2024-05-07 23:56:01,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:01,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:01,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:01,926 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:01,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:01,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:01,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:02,029 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:02,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:56:04,098 INFO L85 PathProgramCache]: Analyzing trace with hash -1877282159, now seen corresponding path program 2 times [2024-05-07 23:56:04,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:04,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:04,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:04,221 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:04,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:04,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:04,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:04,335 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:04,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:04,469 INFO L85 PathProgramCache]: Analyzing trace with hash -16300784, now seen corresponding path program 4 times [2024-05-07 23:56:04,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:04,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:04,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:04,696 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:04,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:04,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:04,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:04,830 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:04,853 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:04,935 INFO L85 PathProgramCache]: Analyzing trace with hash -543058, now seen corresponding path program 5 times [2024-05-07 23:56:04,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:04,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:04,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:05,038 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:05,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:05,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:05,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:05,139 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:05,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:05,273 INFO L85 PathProgramCache]: Analyzing trace with hash 1087317028, now seen corresponding path program 6 times [2024-05-07 23:56:05,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:05,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:05,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:05,381 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:05,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:05,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:05,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:05,551 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:05,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:05,631 INFO L85 PathProgramCache]: Analyzing trace with hash -652909766, now seen corresponding path program 7 times [2024-05-07 23:56:05,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:05,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:05,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:05,730 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:05,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:05,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:05,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:05,827 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:05,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-07 23:56:06,414 INFO L85 PathProgramCache]: Analyzing trace with hash 1234634470, now seen corresponding path program 8 times [2024-05-07 23:56:06,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:06,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:06,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:06,513 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:06,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:06,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:06,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:06,610 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:06,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:06,692 INFO L85 PathProgramCache]: Analyzing trace with hash -652900061, now seen corresponding path program 9 times [2024-05-07 23:56:06,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:06,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:06,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:06,826 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:06,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:06,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:06,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:07,041 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:07,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:07,146 INFO L85 PathProgramCache]: Analyzing trace with hash 1087328968, now seen corresponding path program 10 times [2024-05-07 23:56:07,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:07,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:07,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:07,266 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:07,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:07,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:07,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:07,390 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:07,414 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:56:07,480 INFO L85 PathProgramCache]: Analyzing trace with hash -147166384, now seen corresponding path program 1 times [2024-05-07 23:56:07,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:07,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:07,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:07,614 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:07,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:07,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:07,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:07,719 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:07,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:07,805 INFO L85 PathProgramCache]: Analyzing trace with hash -1131397916, now seen corresponding path program 1 times [2024-05-07 23:56:07,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:07,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:07,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:07,905 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:07,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:07,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:07,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:08,007 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:08,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:08,088 INFO L85 PathProgramCache]: Analyzing trace with hash -713596309, now seen corresponding path program 2 times [2024-05-07 23:56:08,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:08,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:08,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:08,289 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:08,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:08,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:08,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:08,391 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:08,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-07 23:56:08,578 INFO L85 PathProgramCache]: Analyzing trace with hash -646648378, now seen corresponding path program 3 times [2024-05-07 23:56:08,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:08,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:08,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:08,681 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:08,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:08,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:08,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:08,785 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:08,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:56:10,851 INFO L85 PathProgramCache]: Analyzing trace with hash 1262558635, now seen corresponding path program 2 times [2024-05-07 23:56:10,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:10,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:10,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:10,972 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:10,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:10,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:10,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:11,100 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:11,122 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:11,205 INFO L85 PathProgramCache]: Analyzing trace with hash -713615434, now seen corresponding path program 4 times [2024-05-07 23:56:11,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:11,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:11,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:11,315 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:11,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:11,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:11,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:11,514 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:11,533 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:13,583 INFO L85 PathProgramCache]: Analyzing trace with hash -1131415736, now seen corresponding path program 5 times [2024-05-07 23:56:13,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:13,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:13,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:13,712 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:13,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:13,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:13,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:13,839 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:13,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:13,976 INFO L85 PathProgramCache]: Analyzing trace with hash -243208630, now seen corresponding path program 6 times [2024-05-07 23:56:13,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:13,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:13,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:14,073 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:14,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:14,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:14,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:14,171 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:14,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:14,261 INFO L85 PathProgramCache]: Analyzing trace with hash 1050467796, now seen corresponding path program 7 times [2024-05-07 23:56:14,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:14,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:14,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:14,359 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:14,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:14,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:14,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:14,455 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:14,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-07 23:56:16,763 INFO L85 PathProgramCache]: Analyzing trace with hash -1795235956, now seen corresponding path program 8 times [2024-05-07 23:56:16,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:16,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:16,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:16,978 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:16,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:16,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:16,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:17,120 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:17,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:17,307 INFO L85 PathProgramCache]: Analyzing trace with hash 1050477501, now seen corresponding path program 9 times [2024-05-07 23:56:17,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:17,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:17,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:17,406 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:17,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:17,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:17,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:17,535 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:17,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:17,609 INFO L85 PathProgramCache]: Analyzing trace with hash -243196690, now seen corresponding path program 10 times [2024-05-07 23:56:17,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:17,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:17,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:17,736 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:17,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:17,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:17,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:17,840 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:17,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:17,952 INFO L85 PathProgramCache]: Analyzing trace with hash 478381963, now seen corresponding path program 1 times [2024-05-07 23:56:17,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:17,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:17,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:18,066 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:18,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:18,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:18,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:18,186 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:18,206 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:18,288 INFO L85 PathProgramCache]: Analyzing trace with hash 1944939684, now seen corresponding path program 2 times [2024-05-07 23:56:18,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:18,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:18,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:18,486 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:18,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:18,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:18,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:18,614 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:18,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-07 23:56:21,013 INFO L85 PathProgramCache]: Analyzing trace with hash 163588781, now seen corresponding path program 3 times [2024-05-07 23:56:21,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:21,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:21,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:21,147 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:21,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:21,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:21,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:21,270 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:21,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:23,351 INFO L85 PathProgramCache]: Analyzing trace with hash 1944920559, now seen corresponding path program 4 times [2024-05-07 23:56:23,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:23,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:23,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:23,450 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:23,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:23,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:23,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:23,548 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:23,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:23,672 INFO L85 PathProgramCache]: Analyzing trace with hash 478364143, now seen corresponding path program 5 times [2024-05-07 23:56:23,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:23,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:23,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:23,770 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:23,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:23,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:23,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:23,868 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:23,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:23,956 INFO L85 PathProgramCache]: Analyzing trace with hash 268090307, now seen corresponding path program 6 times [2024-05-07 23:56:23,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:23,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:23,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:24,054 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:24,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:24,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:24,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:24,223 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:24,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:24,299 INFO L85 PathProgramCache]: Analyzing trace with hash -279134341, now seen corresponding path program 7 times [2024-05-07 23:56:24,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:24,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:24,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:24,396 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:24,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:24,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:24,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:24,496 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:24,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-07 23:56:24,993 INFO L85 PathProgramCache]: Analyzing trace with hash -63229243, now seen corresponding path program 8 times [2024-05-07 23:56:24,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:24,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:25,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:25,154 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:25,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:25,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:25,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:25,260 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:25,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:27,331 INFO L85 PathProgramCache]: Analyzing trace with hash -279124636, now seen corresponding path program 9 times [2024-05-07 23:56:27,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:27,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:27,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:27,455 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:27,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:27,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:27,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:27,583 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:27,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:27,673 INFO L85 PathProgramCache]: Analyzing trace with hash 268102247, now seen corresponding path program 10 times [2024-05-07 23:56:27,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:27,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:27,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:27,800 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:27,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:27,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:27,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:27,909 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:27,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:30,003 INFO L85 PathProgramCache]: Analyzing trace with hash 1456879537, now seen corresponding path program 1 times [2024-05-07 23:56:30,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:30,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:30,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:30,211 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:30,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:30,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:30,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:30,308 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:30,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:30,396 INFO L85 PathProgramCache]: Analyzing trace with hash -2081373890, now seen corresponding path program 2 times [2024-05-07 23:56:30,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:30,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:30,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:30,494 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:30,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:30,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:30,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:30,588 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:30,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-07 23:56:31,237 INFO L85 PathProgramCache]: Analyzing trace with hash -98080429, now seen corresponding path program 3 times [2024-05-07 23:56:31,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:31,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:31,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:31,333 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:31,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:31,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:31,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:31,432 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:31,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:31,599 INFO L85 PathProgramCache]: Analyzing trace with hash 168886212, now seen corresponding path program 4 times [2024-05-07 23:56:31,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:31,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:31,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:31,696 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:31,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:31,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:31,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:31,793 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:31,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:33,895 INFO L85 PathProgramCache]: Analyzing trace with hash 940506010, now seen corresponding path program 5 times [2024-05-07 23:56:33,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:33,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:33,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:33,991 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:33,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:33,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:34,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:34,089 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:34,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-07 23:56:34,190 INFO L85 PathProgramCache]: Analyzing trace with hash -909084026, now seen corresponding path program 6 times [2024-05-07 23:56:34,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:34,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:34,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:34,450 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:34,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:34,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:34,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:34,564 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:34,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:36,651 INFO L85 PathProgramCache]: Analyzing trace with hash -11537712, now seen corresponding path program 1 times [2024-05-07 23:56:36,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:36,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:36,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:36,779 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:36,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:36,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:36,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:36,884 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:36,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:38,948 INFO L85 PathProgramCache]: Analyzing trace with hash -357668353, now seen corresponding path program 2 times [2024-05-07 23:56:38,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:38,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:38,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:39,055 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:39,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:39,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:39,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:39,161 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:39,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-07 23:56:39,452 INFO L85 PathProgramCache]: Analyzing trace with hash 1797183666, now seen corresponding path program 3 times [2024-05-07 23:56:39,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:39,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:39,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:39,561 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:39,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:39,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:39,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:39,667 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:39,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:56:41,731 INFO L85 PathProgramCache]: Analyzing trace with hash 1277560471, now seen corresponding path program 1 times [2024-05-07 23:56:41,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:41,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:41,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:42,014 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:42,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:42,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:42,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:42,129 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:42,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:42,235 INFO L85 PathProgramCache]: Analyzing trace with hash -357701893, now seen corresponding path program 4 times [2024-05-07 23:56:42,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:42,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:42,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:42,350 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:42,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:42,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:42,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:42,461 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:42,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:42,562 INFO L85 PathProgramCache]: Analyzing trace with hash -11570412, now seen corresponding path program 5 times [2024-05-07 23:56:42,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:42,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:42,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:42,669 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:42,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:42,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:42,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:42,774 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:42,800 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:43,056 INFO L85 PathProgramCache]: Analyzing trace with hash -268188226, now seen corresponding path program 6 times [2024-05-07 23:56:43,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:43,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:43,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:43,159 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:43,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:43,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:43,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:43,276 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:43,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:43,376 INFO L85 PathProgramCache]: Analyzing trace with hash 276100335, now seen corresponding path program 7 times [2024-05-07 23:56:43,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:43,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:43,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:43,483 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:43,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:43,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:43,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:43,746 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:43,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-07 23:56:44,312 INFO L85 PathProgramCache]: Analyzing trace with hash -30823456, now seen corresponding path program 8 times [2024-05-07 23:56:44,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:44,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:44,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:44,416 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:44,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:44,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:44,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:44,523 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:44,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:44,599 INFO L85 PathProgramCache]: Analyzing trace with hash 276124455, now seen corresponding path program 9 times [2024-05-07 23:56:44,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:44,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:44,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:44,704 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:44,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:44,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:44,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:44,806 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:44,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:44,920 INFO L85 PathProgramCache]: Analyzing trace with hash -268161406, now seen corresponding path program 10 times [2024-05-07 23:56:44,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:44,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:44,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:45,023 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:45,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:45,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:45,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:45,125 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:45,142 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:56:47,178 INFO L85 PathProgramCache]: Analyzing trace with hash 1066443753, now seen corresponding path program 2 times [2024-05-07 23:56:47,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:47,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:47,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:47,285 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:47,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:47,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:47,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:47,417 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:47,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:47,900 INFO L85 PathProgramCache]: Analyzing trace with hash -1225088731, now seen corresponding path program 11 times [2024-05-07 23:56:47,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:47,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:47,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:48,026 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:48,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:48,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:48,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:48,170 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:48,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:48,293 INFO L85 PathProgramCache]: Analyzing trace with hash 676955722, now seen corresponding path program 12 times [2024-05-07 23:56:48,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:48,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:48,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:48,399 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:48,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:48,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:48,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:48,510 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:48,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-07 23:56:48,738 INFO L85 PathProgramCache]: Analyzing trace with hash -489208377, now seen corresponding path program 13 times [2024-05-07 23:56:48,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:48,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:48,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:48,845 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:48,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:48,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:48,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:48,952 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:48,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:56:51,038 INFO L85 PathProgramCache]: Analyzing trace with hash 1247968300, now seen corresponding path program 3 times [2024-05-07 23:56:51,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:51,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:51,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:51,154 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:51,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:51,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:51,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:51,270 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:51,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:53,356 INFO L85 PathProgramCache]: Analyzing trace with hash 676922182, now seen corresponding path program 14 times [2024-05-07 23:56:53,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:53,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:53,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:53,554 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:53,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:53,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:53,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:53,659 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:53,678 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:53,793 INFO L85 PathProgramCache]: Analyzing trace with hash -1225121431, now seen corresponding path program 15 times [2024-05-07 23:56:53,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:53,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:53,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:53,899 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:53,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:53,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:53,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:54,005 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:54,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:54,111 INFO L85 PathProgramCache]: Analyzing trace with hash -1683180599, now seen corresponding path program 16 times [2024-05-07 23:56:54,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:54,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:54,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:54,213 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:54,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:54,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:54,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:54,314 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:54,334 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:54,400 INFO L85 PathProgramCache]: Analyzing trace with hash -638990268, now seen corresponding path program 17 times [2024-05-07 23:56:54,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:54,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:54,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:54,505 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:54,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:54,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:54,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:54,607 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:54,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-07 23:56:54,786 INFO L85 PathProgramCache]: Analyzing trace with hash 1666138923, now seen corresponding path program 18 times [2024-05-07 23:56:54,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:54,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:54,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:54,974 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:54,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:54,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:54,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:55,076 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:55,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:55,141 INFO L85 PathProgramCache]: Analyzing trace with hash -638966148, now seen corresponding path program 19 times [2024-05-07 23:56:55,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:55,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:55,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:55,240 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:55,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:55,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:55,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:55,343 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:55,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:55,566 INFO L85 PathProgramCache]: Analyzing trace with hash -1683153779, now seen corresponding path program 20 times [2024-05-07 23:56:55,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:55,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:55,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:55,669 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:55,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:55,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:55,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:55,772 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:55,792 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:56:57,827 INFO L85 PathProgramCache]: Analyzing trace with hash -787364674, now seen corresponding path program 4 times [2024-05-07 23:56:57,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:57,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:57,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:57,931 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:57,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:57,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:57,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:58,038 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:56:58,068 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:58,165 INFO L85 PathProgramCache]: Analyzing trace with hash 108049905, now seen corresponding path program 21 times [2024-05-07 23:56:58,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:58,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:58,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:58,269 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:58,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:58,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:58,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:58,447 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:58,464 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:56:58,517 INFO L85 PathProgramCache]: Analyzing trace with hash -945419522, now seen corresponding path program 22 times [2024-05-07 23:56:58,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:58,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:58,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:58,623 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:58,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:58,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:58,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:58,728 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:58,743 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-07 23:56:59,615 INFO L85 PathProgramCache]: Analyzing trace with hash 756766611, now seen corresponding path program 23 times [2024-05-07 23:56:59,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:59,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:59,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:59,722 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:59,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:59,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:59,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:56:59,830 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:56:59,847 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:56:59,966 INFO L85 PathProgramCache]: Analyzing trace with hash 310262776, now seen corresponding path program 5 times [2024-05-07 23:56:59,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:56:59,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:56:59,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:00,079 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:00,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:00,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:00,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:00,191 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:00,217 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:02,295 INFO L85 PathProgramCache]: Analyzing trace with hash -945453062, now seen corresponding path program 24 times [2024-05-07 23:57:02,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:02,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:02,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:02,403 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:02,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:02,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:02,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:02,510 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:02,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:04,594 INFO L85 PathProgramCache]: Analyzing trace with hash 108017205, now seen corresponding path program 25 times [2024-05-07 23:57:04,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:04,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:04,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:04,849 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:04,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:04,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:04,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:04,956 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:04,984 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:05,118 INFO L85 PathProgramCache]: Analyzing trace with hash -1648244355, now seen corresponding path program 26 times [2024-05-07 23:57:05,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:05,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:05,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:05,275 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:05,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:05,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:05,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:05,379 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:05,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:05,470 INFO L85 PathProgramCache]: Analyzing trace with hash 444033296, now seen corresponding path program 27 times [2024-05-07 23:57:05,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:05,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:05,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:05,581 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:05,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:05,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:05,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:05,685 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:05,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-07 23:57:05,878 INFO L85 PathProgramCache]: Analyzing trace with hash 880131039, now seen corresponding path program 28 times [2024-05-07 23:57:05,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:05,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:05,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:05,982 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:05,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:05,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:05,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:06,085 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:06,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:06,160 INFO L85 PathProgramCache]: Analyzing trace with hash 444057416, now seen corresponding path program 29 times [2024-05-07 23:57:06,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:06,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:06,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:06,339 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:06,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:06,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:06,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:06,442 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:06,462 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:06,543 INFO L85 PathProgramCache]: Analyzing trace with hash -1648217535, now seen corresponding path program 30 times [2024-05-07 23:57:06,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:06,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:06,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:06,647 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:06,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:06,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:06,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:06,774 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:06,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:57:08,859 INFO L85 PathProgramCache]: Analyzing trace with hash -586539126, now seen corresponding path program 6 times [2024-05-07 23:57:08,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:08,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:08,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:08,964 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:08,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:08,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:08,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:09,069 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:09,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:09,278 INFO L85 PathProgramCache]: Analyzing trace with hash -831964826, now seen corresponding path program 31 times [2024-05-07 23:57:09,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:09,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:09,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:09,385 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:09,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:09,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:09,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:09,490 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:09,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:11,582 INFO L85 PathProgramCache]: Analyzing trace with hash -21105111, now seen corresponding path program 32 times [2024-05-07 23:57:11,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:11,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:11,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:11,717 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:11,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:11,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:11,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:11,952 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:11,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-07 23:57:12,149 INFO L85 PathProgramCache]: Analyzing trace with hash -654257720, now seen corresponding path program 33 times [2024-05-07 23:57:12,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:12,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:12,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:12,256 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:12,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:12,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:12,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:12,363 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:12,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:57:14,420 INFO L85 PathProgramCache]: Analyzing trace with hash -518189395, now seen corresponding path program 7 times [2024-05-07 23:57:14,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:14,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:14,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:14,533 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:14,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:14,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:14,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:14,646 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:14,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:14,794 INFO L85 PathProgramCache]: Analyzing trace with hash -21138651, now seen corresponding path program 34 times [2024-05-07 23:57:14,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:14,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:14,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:14,899 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:14,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:14,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:14,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:15,009 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:15,029 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:15,786 INFO L85 PathProgramCache]: Analyzing trace with hash -831997526, now seen corresponding path program 35 times [2024-05-07 23:57:15,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:15,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:15,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:15,891 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:15,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:15,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:15,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:16,108 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:16,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:18,190 INFO L85 PathProgramCache]: Analyzing trace with hash -1427988888, now seen corresponding path program 36 times [2024-05-07 23:57:18,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:18,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:18,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:18,322 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:18,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:18,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:18,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:18,426 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:18,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:19,786 INFO L85 PathProgramCache]: Analyzing trace with hash -1317981819, now seen corresponding path program 37 times [2024-05-07 23:57:19,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:19,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:19,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:19,896 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:19,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:19,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:19,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:19,998 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:20,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-07 23:57:22,101 INFO L85 PathProgramCache]: Analyzing trace with hash 2092237322, now seen corresponding path program 38 times [2024-05-07 23:57:22,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:22,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:22,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:22,207 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:22,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:22,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:22,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:22,312 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:22,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:22,432 INFO L85 PathProgramCache]: Analyzing trace with hash -1317957699, now seen corresponding path program 39 times [2024-05-07 23:57:22,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:22,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:22,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:22,537 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:22,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:22,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:22,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:22,644 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:22,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:24,737 INFO L85 PathProgramCache]: Analyzing trace with hash -1427962068, now seen corresponding path program 40 times [2024-05-07 23:57:24,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:24,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:24,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:24,949 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:24,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:24,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:24,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:25,058 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:25,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:57:25,174 INFO L85 PathProgramCache]: Analyzing trace with hash 1481680255, now seen corresponding path program 8 times [2024-05-07 23:57:25,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:25,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:25,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:25,279 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:25,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:25,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:25,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:25,383 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:25,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:25,486 INFO L85 PathProgramCache]: Analyzing trace with hash 1341281554, now seen corresponding path program 41 times [2024-05-07 23:57:25,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:25,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:25,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:25,593 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:25,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:25,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:25,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:25,699 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:25,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:26,360 INFO L85 PathProgramCache]: Analyzing trace with hash -1369944067, now seen corresponding path program 42 times [2024-05-07 23:57:26,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:26,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:26,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:26,468 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:26,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:26,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:26,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:26,575 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:26,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-07 23:57:28,707 INFO L85 PathProgramCache]: Analyzing trace with hash 481407604, now seen corresponding path program 43 times [2024-05-07 23:57:28,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:28,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:28,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:28,951 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:28,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:28,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:28,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:29,072 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:29,090 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:57:31,137 INFO L85 PathProgramCache]: Analyzing trace with hash 42356057, now seen corresponding path program 9 times [2024-05-07 23:57:31,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:31,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:31,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:31,250 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:31,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:31,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:31,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:31,363 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:31,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:31,462 INFO L85 PathProgramCache]: Analyzing trace with hash -1369977607, now seen corresponding path program 44 times [2024-05-07 23:57:31,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:31,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:31,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:31,569 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:31,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:31,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:31,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:31,689 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:31,708 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:31,790 INFO L85 PathProgramCache]: Analyzing trace with hash 1341248854, now seen corresponding path program 45 times [2024-05-07 23:57:31,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:31,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:31,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:31,902 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:31,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:31,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:31,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:32,032 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:32,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:34,129 INFO L85 PathProgramCache]: Analyzing trace with hash 460812604, now seen corresponding path program 46 times [2024-05-07 23:57:34,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:34,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:34,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:34,232 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:34,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:34,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:34,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:34,431 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:34,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:34,508 INFO L85 PathProgramCache]: Analyzing trace with hash 1400289585, now seen corresponding path program 47 times [2024-05-07 23:57:34,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:34,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:34,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:34,607 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:34,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:34,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:34,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:34,708 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:34,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:57:36,753 INFO L85 PathProgramCache]: Analyzing trace with hash -407734485, now seen corresponding path program 10 times [2024-05-07 23:57:36,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:36,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:36,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:36,858 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:36,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:36,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:36,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:36,983 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:37,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:37,105 INFO L85 PathProgramCache]: Analyzing trace with hash 2025773160, now seen corresponding path program 48 times [2024-05-07 23:57:37,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:37,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:37,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:37,246 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:37,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:37,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:37,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:37,391 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:37,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:39,477 INFO L85 PathProgramCache]: Analyzing trace with hash -1625540731, now seen corresponding path program 49 times [2024-05-07 23:57:39,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:39,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:39,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:39,588 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:39,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:39,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:39,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:39,786 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:39,801 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-07 23:57:39,860 INFO L85 PathProgramCache]: Analyzing trace with hash 1147845642, now seen corresponding path program 50 times [2024-05-07 23:57:39,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:39,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:39,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:39,973 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:39,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:39,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:39,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:40,089 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:40,108 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:40,187 INFO L85 PathProgramCache]: Analyzing trace with hash -1625531026, now seen corresponding path program 51 times [2024-05-07 23:57:40,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:40,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:40,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:40,298 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:40,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:40,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:40,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:40,427 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:40,454 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:40,515 INFO L85 PathProgramCache]: Analyzing trace with hash 2025785100, now seen corresponding path program 52 times [2024-05-07 23:57:40,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:40,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:40,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:40,626 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:40,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:40,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:40,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:40,761 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:40,786 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:40,904 INFO L85 PathProgramCache]: Analyzing trace with hash 1865354084, now seen corresponding path program 53 times [2024-05-07 23:57:40,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:40,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:40,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:41,038 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:41,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:41,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:41,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:41,253 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:41,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:41,358 INFO L85 PathProgramCache]: Analyzing trace with hash 1991402490, now seen corresponding path program 54 times [2024-05-07 23:57:41,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:41,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:41,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:41,463 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:41,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:41,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:41,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:41,570 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:41,582 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-07 23:57:41,635 INFO L85 PathProgramCache]: Analyzing trace with hash 1603935782, now seen corresponding path program 55 times [2024-05-07 23:57:41,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:41,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:41,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:41,741 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:41,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:41,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:41,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:41,847 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:41,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:41,915 INFO L85 PathProgramCache]: Analyzing trace with hash 1991383365, now seen corresponding path program 56 times [2024-05-07 23:57:41,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:41,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:41,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:42,023 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:42,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:42,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:42,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:42,130 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:42,162 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:42,214 INFO L85 PathProgramCache]: Analyzing trace with hash 1865336264, now seen corresponding path program 57 times [2024-05-07 23:57:42,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:42,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:42,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:42,322 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:42,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:42,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:42,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:42,510 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:42,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:42,631 INFO L85 PathProgramCache]: Analyzing trace with hash 45077650, now seen corresponding path program 58 times [2024-05-07 23:57:42,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:42,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:42,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:42,742 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:42,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:42,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:42,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:42,852 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:42,871 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:43,559 INFO L85 PathProgramCache]: Analyzing trace with hash 1397407899, now seen corresponding path program 59 times [2024-05-07 23:57:43,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:43,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:43,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:43,671 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:43,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:43,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:43,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:43,782 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:43,794 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-07 23:57:43,866 INFO L85 PathProgramCache]: Analyzing trace with hash 369972660, now seen corresponding path program 60 times [2024-05-07 23:57:43,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:43,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:43,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:43,980 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:43,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:43,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:44,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:44,102 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:44,122 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:44,184 INFO L85 PathProgramCache]: Analyzing trace with hash 1397417604, now seen corresponding path program 61 times [2024-05-07 23:57:44,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:44,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:44,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:44,302 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:44,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:44,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:44,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:44,417 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:44,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:44,768 INFO L85 PathProgramCache]: Analyzing trace with hash 45089590, now seen corresponding path program 62 times [2024-05-07 23:57:44,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:44,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:44,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:44,883 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:44,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:44,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:44,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:44,995 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:45,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:45,112 INFO L85 PathProgramCache]: Analyzing trace with hash -504637446, now seen corresponding path program 63 times [2024-05-07 23:57:45,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:45,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:45,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:45,222 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:45,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:45,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:45,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:45,330 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:45,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:47,406 INFO L85 PathProgramCache]: Analyzing trace with hash 1536109092, now seen corresponding path program 64 times [2024-05-07 23:57:47,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:47,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:47,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:47,513 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:47,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:47,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:47,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:47,621 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:47,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-07 23:57:47,733 INFO L85 PathProgramCache]: Analyzing trace with hash 374742332, now seen corresponding path program 65 times [2024-05-07 23:57:47,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:47,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:47,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:47,841 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:47,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:47,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:47,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:47,949 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:47,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:48,032 INFO L85 PathProgramCache]: Analyzing trace with hash 1536089967, now seen corresponding path program 66 times [2024-05-07 23:57:48,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:48,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:48,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:48,244 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:48,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:48,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:48,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:48,362 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:48,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:48,457 INFO L85 PathProgramCache]: Analyzing trace with hash -504655266, now seen corresponding path program 67 times [2024-05-07 23:57:48,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:48,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:48,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:48,566 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:48,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:48,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:48,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:48,709 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:48,734 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:48,836 INFO L85 PathProgramCache]: Analyzing trace with hash 799280361, now seen corresponding path program 68 times [2024-05-07 23:57:48,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:48,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:48,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:48,991 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:48,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:48,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:49,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:49,116 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:49,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:49,216 INFO L85 PathProgramCache]: Analyzing trace with hash -992111836, now seen corresponding path program 69 times [2024-05-07 23:57:49,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:49,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:49,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:49,332 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:49,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:49,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:49,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:49,445 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:49,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-07 23:57:49,553 INFO L85 PathProgramCache]: Analyzing trace with hash -690695093, now seen corresponding path program 70 times [2024-05-07 23:57:49,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:49,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:49,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:49,796 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:49,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:49,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:49,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:49,935 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:49,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:50,046 INFO L85 PathProgramCache]: Analyzing trace with hash -992102131, now seen corresponding path program 71 times [2024-05-07 23:57:50,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:50,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:50,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:50,160 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:50,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:50,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:50,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:50,270 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:50,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:50,350 INFO L85 PathProgramCache]: Analyzing trace with hash 799292301, now seen corresponding path program 72 times [2024-05-07 23:57:50,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:50,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:50,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:50,460 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:50,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:50,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:50,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:50,570 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:50,591 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:50,673 INFO L85 PathProgramCache]: Analyzing trace with hash 1023513027, now seen corresponding path program 73 times [2024-05-07 23:57:50,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:50,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:50,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:50,783 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:50,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:50,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:50,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:50,896 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:50,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:50,966 INFO L85 PathProgramCache]: Analyzing trace with hash 1664133499, now seen corresponding path program 74 times [2024-05-07 23:57:50,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:50,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:50,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:51,153 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:51,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:51,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:51,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:51,260 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:51,297 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-07 23:57:51,361 INFO L85 PathProgramCache]: Analyzing trace with hash 48531653, now seen corresponding path program 75 times [2024-05-07 23:57:51,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:51,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:51,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:51,469 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:51,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:51,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:51,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:51,577 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:51,595 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:51,650 INFO L85 PathProgramCache]: Analyzing trace with hash 1664114374, now seen corresponding path program 76 times [2024-05-07 23:57:51,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:51,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:51,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:51,760 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:51,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:51,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:51,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:51,868 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:51,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:51,954 INFO L85 PathProgramCache]: Analyzing trace with hash 1023495207, now seen corresponding path program 77 times [2024-05-07 23:57:51,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:51,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:51,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:52,062 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:52,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:52,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:52,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:52,170 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:52,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:52,259 INFO L85 PathProgramCache]: Analyzing trace with hash 1364610931, now seen corresponding path program 78 times [2024-05-07 23:57:52,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:52,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:52,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:52,447 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:52,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:52,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:52,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:52,559 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:52,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:52,650 INFO L85 PathProgramCache]: Analyzing trace with hash -646733350, now seen corresponding path program 79 times [2024-05-07 23:57:52,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:52,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:52,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:52,770 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:52,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:52,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:52,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:52,885 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:52,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-07 23:57:52,961 INFO L85 PathProgramCache]: Analyzing trace with hash 1426103381, now seen corresponding path program 80 times [2024-05-07 23:57:52,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:52,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:52,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:53,080 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:53,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:53,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:53,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:53,191 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:53,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:53,287 INFO L85 PathProgramCache]: Analyzing trace with hash -646723645, now seen corresponding path program 81 times [2024-05-07 23:57:53,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:53,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:53,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:53,398 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:53,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:53,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:53,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:53,509 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:53,527 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:55,596 INFO L85 PathProgramCache]: Analyzing trace with hash 1364622871, now seen corresponding path program 82 times [2024-05-07 23:57:55,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:55,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:55,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:55,853 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:55,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:55,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:55,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:55,973 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:57:55,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:56,659 INFO L85 PathProgramCache]: Analyzing trace with hash -786273287, now seen corresponding path program 83 times [2024-05-07 23:57:56,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:56,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:56,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:56,768 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:56,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:56,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:56,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:56,877 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:56,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:56,983 INFO L85 PathProgramCache]: Analyzing trace with hash 1395332613, now seen corresponding path program 84 times [2024-05-07 23:57:56,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:56,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:57,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:57,091 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:57,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:57,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:57,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:57,200 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:57,213 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-07 23:57:57,287 INFO L85 PathProgramCache]: Analyzing trace with hash 305638779, now seen corresponding path program 85 times [2024-05-07 23:57:57,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:57,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:57,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:57,396 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:57,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:57,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:57,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:57,504 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:57,521 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:57:59,579 INFO L85 PathProgramCache]: Analyzing trace with hash 1395313488, now seen corresponding path program 86 times [2024-05-07 23:57:59,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:59,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:59,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:59,769 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:59,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:57:59,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:57:59,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:57:59,877 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:57:59,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:58:01,936 INFO L85 PathProgramCache]: Analyzing trace with hash -786291107, now seen corresponding path program 87 times [2024-05-07 23:58:01,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:01,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:01,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:02,046 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:58:02,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:02,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:02,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:02,155 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:58:02,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:58:02,483 INFO L85 PathProgramCache]: Analyzing trace with hash 538375530, now seen corresponding path program 88 times [2024-05-07 23:58:02,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:02,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:02,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:02,594 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:58:02,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:02,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:02,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:02,706 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:58:02,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:58:02,778 INFO L85 PathProgramCache]: Analyzing trace with hash -490227005, now seen corresponding path program 89 times [2024-05-07 23:58:02,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:02,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:02,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:02,889 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:58:02,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:02,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:02,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:03,001 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:58:03,029 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-07 23:58:03,115 INFO L85 PathProgramCache]: Analyzing trace with hash 1982832780, now seen corresponding path program 90 times [2024-05-07 23:58:03,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:03,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:03,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:03,323 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:58:03,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:03,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:03,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:03,436 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:58:03,453 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:58:05,512 INFO L85 PathProgramCache]: Analyzing trace with hash -490217300, now seen corresponding path program 91 times [2024-05-07 23:58:05,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:05,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:05,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:05,625 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:58:05,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:05,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:05,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:05,739 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:58:05,759 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:58:05,826 INFO L85 PathProgramCache]: Analyzing trace with hash 538387470, now seen corresponding path program 92 times [2024-05-07 23:58:05,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:05,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:05,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:05,944 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:58:05,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:05,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:05,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:06,056 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 23:58:06,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:58:06,152 INFO L85 PathProgramCache]: Analyzing trace with hash 2083543111, now seen corresponding path program 93 times [2024-05-07 23:58:06,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:06,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:06,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:06,267 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:58:06,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:06,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:06,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:06,379 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:58:06,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-07 23:58:06,472 INFO L85 PathProgramCache]: Analyzing trace with hash 759930502, now seen corresponding path program 94 times [2024-05-07 23:58:06,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:06,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:06,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:06,678 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:58:06,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:06,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:06,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:06,790 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 23:58:06,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:58:06,896 INFO L85 PathProgramCache]: Analyzing trace with hash 705328053, now seen corresponding path program 1 times [2024-05-07 23:58:06,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:06,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:06,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:07,045 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-07 23:58:07,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:07,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:07,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:07,197 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-07 23:58:07,211 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-07 23:58:07,212 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 23:58:07,212 INFO L85 PathProgramCache]: Analyzing trace with hash -566126889, now seen corresponding path program 1 times [2024-05-07 23:58:07,215 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 23:58:07,216 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [875960312] [2024-05-07 23:58:07,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:07,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:07,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:07,433 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 97 proven. 1 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2024-05-07 23:58:07,434 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 23:58:07,434 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [875960312] [2024-05-07 23:58:07,434 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [875960312] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-07 23:58:07,434 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1734844430] [2024-05-07 23:58:07,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:07,435 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-07 23:58:07,435 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 23:58:07,470 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-07 23:58:07,471 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-07 23:58:08,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:08,286 INFO L262 TraceCheckSpWp]: Trace formula consists of 778 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-07 23:58:08,307 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-07 23:58:08,680 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 97 proven. 1 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2024-05-07 23:58:08,680 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-07 23:58:09,011 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 97 proven. 1 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2024-05-07 23:58:09,011 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1734844430] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-07 23:58:09,011 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-07 23:58:09,011 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 25 [2024-05-07 23:58:09,014 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [695712330] [2024-05-07 23:58:09,015 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-07 23:58:09,018 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2024-05-07 23:58:09,018 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 23:58:09,325 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-05-07 23:58:09,326 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=484, Unknown=0, NotChecked=0, Total=600 [2024-05-07 23:58:09,327 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 23:58:09,327 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 23:58:09,327 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 14.96) internal successors, (374), 25 states have internal predecessors, (374), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 23:58:09,328 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 23:58:10,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:58:10,211 INFO L85 PathProgramCache]: Analyzing trace with hash -158553800, now seen corresponding path program 2 times [2024-05-07 23:58:10,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:10,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:10,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:11,905 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-07 23:58:11,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:11,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:11,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:12,517 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-07 23:58:12,543 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-07 23:58:12,557 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-05-07 23:58:12,752 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable342,SelfDestructingSolverStorable343,SelfDestructingSolverStorable344 [2024-05-07 23:58:12,753 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-07 23:58:12,753 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 23:58:12,753 INFO L85 PathProgramCache]: Analyzing trace with hash -1964987494, now seen corresponding path program 2 times [2024-05-07 23:58:12,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 23:58:12,753 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056835299] [2024-05-07 23:58:12,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:12,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:12,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:13,840 INFO L134 CoverageAnalysis]: Checked inductivity of 422 backedges. 174 proven. 220 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-07 23:58:13,840 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 23:58:13,840 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2056835299] [2024-05-07 23:58:13,840 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2056835299] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-07 23:58:13,840 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1602375669] [2024-05-07 23:58:13,840 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-07 23:58:13,841 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-07 23:58:13,841 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 23:58:13,842 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-07 23:58:13,844 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-07 23:58:14,650 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-07 23:58:14,650 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-07 23:58:14,654 INFO L262 TraceCheckSpWp]: Trace formula consists of 826 conjuncts, 14 conjunts are in the unsatisfiable core [2024-05-07 23:58:14,659 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-07 23:58:15,187 INFO L134 CoverageAnalysis]: Checked inductivity of 422 backedges. 129 proven. 19 refuted. 0 times theorem prover too weak. 274 trivial. 0 not checked. [2024-05-07 23:58:15,187 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-07 23:58:15,836 INFO L134 CoverageAnalysis]: Checked inductivity of 422 backedges. 139 proven. 9 refuted. 0 times theorem prover too weak. 274 trivial. 0 not checked. [2024-05-07 23:58:15,836 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1602375669] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-07 23:58:15,837 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-07 23:58:15,837 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 15, 15] total 63 [2024-05-07 23:58:15,837 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635667439] [2024-05-07 23:58:15,837 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-07 23:58:15,838 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 63 states [2024-05-07 23:58:15,838 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 23:58:15,967 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2024-05-07 23:58:15,968 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=316, Invalid=3590, Unknown=0, NotChecked=0, Total=3906 [2024-05-07 23:58:15,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 23:58:15,969 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 23:58:15,969 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 63 states, 63 states have (on average 8.777777777777779) internal successors, (553), 63 states have internal predecessors, (553), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 23:58:15,969 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-07 23:58:15,969 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 23:58:17,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:58:19,563 INFO L85 PathProgramCache]: Analyzing trace with hash -1174434155, now seen corresponding path program 3 times [2024-05-07 23:58:19,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:19,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:19,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:21,054 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 2 proven. 30 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-07 23:58:21,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:21,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:21,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:21,763 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 2 proven. 30 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-07 23:58:21,787 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-07 23:58:21,787 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-07 23:58:21,796 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-05-07 23:58:21,996 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable346,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable347,SelfDestructingSolverStorable345 [2024-05-07 23:58:21,997 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-07 23:58:21,997 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 23:58:21,997 INFO L85 PathProgramCache]: Analyzing trace with hash 840432055, now seen corresponding path program 3 times [2024-05-07 23:58:21,997 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 23:58:21,997 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1688480421] [2024-05-07 23:58:21,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:21,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:22,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:23,405 INFO L134 CoverageAnalysis]: Checked inductivity of 482 backedges. 174 proven. 235 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-07 23:58:23,405 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 23:58:23,405 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1688480421] [2024-05-07 23:58:23,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1688480421] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-07 23:58:23,405 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1605842623] [2024-05-07 23:58:23,405 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-07 23:58:23,405 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-07 23:58:23,406 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 23:58:23,406 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-07 23:58:23,409 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-05-07 23:58:25,479 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2024-05-07 23:58:25,479 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-07 23:58:25,485 INFO L262 TraceCheckSpWp]: Trace formula consists of 837 conjuncts, 47 conjunts are in the unsatisfiable core [2024-05-07 23:58:25,490 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-07 23:58:27,298 INFO L134 CoverageAnalysis]: Checked inductivity of 482 backedges. 366 proven. 24 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2024-05-07 23:58:27,298 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-07 23:58:28,440 INFO L134 CoverageAnalysis]: Checked inductivity of 482 backedges. 351 proven. 24 refuted. 0 times theorem prover too weak. 107 trivial. 0 not checked. [2024-05-07 23:58:28,440 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1605842623] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-07 23:58:28,440 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-07 23:58:28,440 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 35, 24] total 95 [2024-05-07 23:58:28,440 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [822153221] [2024-05-07 23:58:28,440 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-07 23:58:28,441 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 95 states [2024-05-07 23:58:28,441 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 23:58:28,661 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 95 interpolants. [2024-05-07 23:58:28,664 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=647, Invalid=8283, Unknown=0, NotChecked=0, Total=8930 [2024-05-07 23:58:28,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 23:58:28,664 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 23:58:28,665 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 95 states, 95 states have (on average 9.642105263157895) internal successors, (916), 95 states have internal predecessors, (916), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 23:58:28,665 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-07 23:58:28,665 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-07 23:58:28,665 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 23:58:31,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:58:31,129 INFO L85 PathProgramCache]: Analyzing trace with hash 1483714933, now seen corresponding path program 4 times [2024-05-07 23:58:31,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:31,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:31,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:32,278 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 4 proven. 77 refuted. 0 times theorem prover too weak. 227 trivial. 0 not checked. [2024-05-07 23:58:32,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:32,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:32,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:32,685 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 4 proven. 77 refuted. 0 times theorem prover too weak. 227 trivial. 0 not checked. [2024-05-07 23:58:32,736 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-07 23:58:32,736 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-07 23:58:32,736 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2024-05-07 23:58:32,747 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-05-07 23:58:32,937 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable350,SelfDestructingSolverStorable348,SelfDestructingSolverStorable349,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-07 23:58:32,937 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-07 23:58:32,937 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 23:58:32,937 INFO L85 PathProgramCache]: Analyzing trace with hash -72915817, now seen corresponding path program 4 times [2024-05-07 23:58:32,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 23:58:32,938 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202355691] [2024-05-07 23:58:32,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:32,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:33,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:33,846 INFO L134 CoverageAnalysis]: Checked inductivity of 686 backedges. 291 proven. 147 refuted. 0 times theorem prover too weak. 248 trivial. 0 not checked. [2024-05-07 23:58:33,846 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 23:58:33,846 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [202355691] [2024-05-07 23:58:33,846 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [202355691] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-07 23:58:33,846 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [378056246] [2024-05-07 23:58:33,846 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-05-07 23:58:33,846 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-07 23:58:33,846 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 23:58:33,847 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-07 23:58:33,850 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-05-07 23:58:34,668 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-05-07 23:58:34,668 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-07 23:58:34,672 INFO L262 TraceCheckSpWp]: Trace formula consists of 882 conjuncts, 26 conjunts are in the unsatisfiable core [2024-05-07 23:58:34,676 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-07 23:58:35,643 INFO L134 CoverageAnalysis]: Checked inductivity of 686 backedges. 232 proven. 117 refuted. 0 times theorem prover too weak. 337 trivial. 0 not checked. [2024-05-07 23:58:35,643 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-07 23:58:36,522 INFO L134 CoverageAnalysis]: Checked inductivity of 686 backedges. 274 proven. 75 refuted. 0 times theorem prover too weak. 337 trivial. 0 not checked. [2024-05-07 23:58:36,523 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [378056246] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-07 23:58:36,523 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-07 23:58:36,523 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 27, 27] total 74 [2024-05-07 23:58:36,523 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1520153033] [2024-05-07 23:58:36,523 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-07 23:58:36,524 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 74 states [2024-05-07 23:58:36,524 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 23:58:36,662 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2024-05-07 23:58:36,663 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=603, Invalid=4799, Unknown=0, NotChecked=0, Total=5402 [2024-05-07 23:58:36,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 23:58:36,664 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 23:58:36,664 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 74 states, 74 states have (on average 8.986486486486486) internal successors, (665), 74 states have internal predecessors, (665), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 23:58:36,664 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-07 23:58:36,664 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-07 23:58:36,664 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 37 states. [2024-05-07 23:58:36,664 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 23:58:38,085 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-07 23:58:38,432 INFO L85 PathProgramCache]: Analyzing trace with hash -1444015496, now seen corresponding path program 5 times [2024-05-07 23:58:38,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:38,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:38,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:40,220 INFO L134 CoverageAnalysis]: Checked inductivity of 452 backedges. 50 proven. 65 refuted. 0 times theorem prover too weak. 337 trivial. 0 not checked. [2024-05-07 23:58:40,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:40,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:40,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:40,746 INFO L134 CoverageAnalysis]: Checked inductivity of 452 backedges. 50 proven. 65 refuted. 0 times theorem prover too weak. 337 trivial. 0 not checked. [2024-05-07 23:58:40,774 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-07 23:58:40,775 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-07 23:58:40,775 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2024-05-07 23:58:40,775 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-07 23:58:40,798 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-05-07 23:58:40,983 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable351,6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable352,SelfDestructingSolverStorable353 [2024-05-07 23:58:40,983 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-07 23:58:40,984 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 23:58:40,984 INFO L85 PathProgramCache]: Analyzing trace with hash -1026046758, now seen corresponding path program 5 times [2024-05-07 23:58:40,984 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 23:58:40,984 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1951292090] [2024-05-07 23:58:40,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 23:58:40,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 23:58:41,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 23:58:41,621 INFO L134 CoverageAnalysis]: Checked inductivity of 830 backedges. 211 proven. 245 refuted. 0 times theorem prover too weak. 374 trivial. 0 not checked. [2024-05-07 23:58:41,622 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 23:58:41,622 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1951292090] [2024-05-07 23:58:41,622 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1951292090] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-07 23:58:41,622 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2093334231] [2024-05-07 23:58:41,622 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-05-07 23:58:41,622 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-07 23:58:41,622 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 23:58:41,624 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-07 23:58:41,627 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process Received shutdown request... [2024-05-08 00:09:42,340 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-08 00:09:42,340 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-08 00:09:42,346 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-08 00:09:43,347 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Ended with exit code 0 [2024-05-08 00:09:43,377 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 [2024-05-08 00:09:43,544 WARN L435 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forcibly destroying the process [2024-05-08 00:09:43,562 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 137 [2024-05-08 00:09:43,563 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-05-08 00:09:43,563 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-05-08 00:09:43,564 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2024-05-08 00:09:43,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1323377218] [2024-05-08 00:09:43,564 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-05-08 00:09:43,564 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2024-05-08 00:09:43,564 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-08 00:09:43,620 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-05-08 00:09:43,621 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=606, Unknown=0, NotChecked=0, Total=702 [2024-05-08 00:09:43,621 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-08 00:09:43,621 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-08 00:09:43,621 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 14.444444444444445) internal successors, (390), 27 states have internal predecessors, (390), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-08 00:09:43,621 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-08 00:09:43,622 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-08 00:09:43,622 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 37 states. [2024-05-08 00:09:43,622 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-08 00:09:43,622 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-08 00:09:43,622 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable354 [2024-05-08 00:09:43,622 WARN L619 AbstractCegarLoop]: Verification canceled: while executing DepthFirstTraversal. [2024-05-08 00:09:43,624 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (3 of 4 remaining) [2024-05-08 00:09:43,625 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 4 remaining) [2024-05-08 00:09:43,625 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 4 remaining) [2024-05-08 00:09:43,625 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 4 remaining) [2024-05-08 00:09:43,628 INFO L448 BasicCegarLoop]: Path program histogram: [94, 10, 10, 10, 10, 10, 10, 6, 5, 5, 2, 2, 2, 2, 1, 1] [2024-05-08 00:09:43,630 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-08 00:09:43,630 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-08 00:09:43,634 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.05 12:09:43 BasicIcfg [2024-05-08 00:09:43,634 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-08 00:09:43,634 INFO L158 Benchmark]: Toolchain (without parser) took 856770.07ms. Allocated memory was 196.1MB in the beginning and 1.9GB in the end (delta: 1.7GB). Free memory was 122.7MB in the beginning and 689.5MB in the end (delta: -566.8MB). Peak memory consumption was 1.2GB. Max. memory is 8.0GB. [2024-05-08 00:09:43,634 INFO L158 Benchmark]: CDTParser took 0.08ms. Allocated memory is still 196.1MB. Free memory is still 154.1MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-08 00:09:43,634 INFO L158 Benchmark]: CACSL2BoogieTranslator took 215.25ms. Allocated memory was 196.1MB in the beginning and 299.9MB in the end (delta: 103.8MB). Free memory was 122.6MB in the beginning and 268.0MB in the end (delta: -145.4MB). Peak memory consumption was 10.0MB. Max. memory is 8.0GB. [2024-05-08 00:09:43,634 INFO L158 Benchmark]: Boogie Procedure Inliner took 35.73ms. Allocated memory is still 299.9MB. Free memory was 268.0MB in the beginning and 265.5MB in the end (delta: 2.5MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-08 00:09:43,635 INFO L158 Benchmark]: Boogie Preprocessor took 21.76ms. Allocated memory is still 299.9MB. Free memory was 265.5MB in the beginning and 263.9MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-08 00:09:43,635 INFO L158 Benchmark]: RCFGBuilder took 490.42ms. Allocated memory is still 299.9MB. Free memory was 263.4MB in the beginning and 239.2MB in the end (delta: 24.1MB). Peak memory consumption was 24.1MB. Max. memory is 8.0GB. [2024-05-08 00:09:43,635 INFO L158 Benchmark]: TraceAbstraction took 855998.23ms. Allocated memory was 299.9MB in the beginning and 1.9GB in the end (delta: 1.6GB). Free memory was 238.2MB in the beginning and 689.5MB in the end (delta: -451.3MB). Peak memory consumption was 1.2GB. Max. memory is 8.0GB. [2024-05-08 00:09:43,636 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.08ms. Allocated memory is still 196.1MB. Free memory is still 154.1MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 215.25ms. Allocated memory was 196.1MB in the beginning and 299.9MB in the end (delta: 103.8MB). Free memory was 122.6MB in the beginning and 268.0MB in the end (delta: -145.4MB). Peak memory consumption was 10.0MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 35.73ms. Allocated memory is still 299.9MB. Free memory was 268.0MB in the beginning and 265.5MB in the end (delta: 2.5MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 21.76ms. Allocated memory is still 299.9MB. Free memory was 265.5MB in the beginning and 263.9MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 490.42ms. Allocated memory is still 299.9MB. Free memory was 263.4MB in the beginning and 239.2MB in the end (delta: 24.1MB). Peak memory consumption was 24.1MB. Max. memory is 8.0GB. * TraceAbstraction took 855998.23ms. Allocated memory was 299.9MB in the beginning and 1.9GB in the end (delta: 1.6GB). Free memory was 238.2MB in the beginning and 689.5MB in the end (delta: -451.3MB). Peak memory consumption was 1.2GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 159652, independent: 151850, independent conditional: 84201, independent unconditional: 67649, dependent: 7802, dependent conditional: 6655, dependent unconditional: 1147, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 154159, independent: 151850, independent conditional: 84201, independent unconditional: 67649, dependent: 2309, dependent conditional: 1162, dependent unconditional: 1147, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 154159, independent: 151850, independent conditional: 84201, independent unconditional: 67649, dependent: 2309, dependent conditional: 1162, dependent unconditional: 1147, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 154159, independent: 151850, independent conditional: 84201, independent unconditional: 67649, dependent: 2309, dependent conditional: 1162, dependent unconditional: 1147, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 157613, independent: 151850, independent conditional: 8680, independent unconditional: 143170, dependent: 5763, dependent conditional: 1179, dependent unconditional: 4584, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 157613, independent: 151850, independent conditional: 5084, independent unconditional: 146766, dependent: 5763, dependent conditional: 0, dependent unconditional: 5763, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 157613, independent: 151850, independent conditional: 5084, independent unconditional: 146766, dependent: 5763, dependent conditional: 0, dependent unconditional: 5763, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1552, independent: 1516, independent conditional: 17, independent unconditional: 1499, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1552, independent: 1499, independent conditional: 0, independent unconditional: 1499, dependent: 53, dependent conditional: 0, dependent unconditional: 53, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 53, independent: 17, independent conditional: 17, independent unconditional: 0, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 53, independent: 17, independent conditional: 17, independent unconditional: 0, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 90, independent: 2, independent conditional: 2, independent unconditional: 0, dependent: 88, dependent conditional: 0, dependent unconditional: 88, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 157613, independent: 150334, independent conditional: 5067, independent unconditional: 145267, dependent: 5727, dependent conditional: 0, dependent unconditional: 5727, unknown: 1552, unknown conditional: 17, unknown unconditional: 1535] , Statistics on independence cache: Total cache size (in pairs): 1552, Positive cache size: 1516, Positive conditional cache size: 17, Positive unconditional cache size: 1499, Negative cache size: 36, Negative conditional cache size: 0, Negative unconditional cache size: 36, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 4775, Maximal queried relation: 1, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 157613, independent: 151850, independent conditional: 8680, independent unconditional: 143170, dependent: 5763, dependent conditional: 1179, dependent unconditional: 4584, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 157613, independent: 151850, independent conditional: 5084, independent unconditional: 146766, dependent: 5763, dependent conditional: 0, dependent unconditional: 5763, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 157613, independent: 151850, independent conditional: 5084, independent unconditional: 146766, dependent: 5763, dependent conditional: 0, dependent unconditional: 5763, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1552, independent: 1516, independent conditional: 17, independent unconditional: 1499, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1552, independent: 1499, independent conditional: 0, independent unconditional: 1499, dependent: 53, dependent conditional: 0, dependent unconditional: 53, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 53, independent: 17, independent conditional: 17, independent unconditional: 0, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 53, independent: 17, independent conditional: 17, independent unconditional: 0, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 90, independent: 2, independent conditional: 2, independent unconditional: 0, dependent: 88, dependent conditional: 0, dependent unconditional: 88, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 157613, independent: 150334, independent conditional: 5067, independent unconditional: 145267, dependent: 5727, dependent conditional: 0, dependent unconditional: 5727, unknown: 1552, unknown conditional: 17, unknown unconditional: 1535] , Statistics on independence cache: Total cache size (in pairs): 1552, Positive cache size: 1516, Positive conditional cache size: 17, Positive unconditional cache size: 1499, Negative cache size: 36, Negative conditional cache size: 0, Negative unconditional cache size: 36, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 4775 ], Independence queries for same thread: 5493 - TimeoutResultAtElement [Line: 97]: Timeout (TraceAbstraction) Unable to prove that a call to reach_error is unreachable Cancelled while executing DepthFirstTraversal. - TimeoutResultAtElement [Line: 88]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while executing DepthFirstTraversal. - TimeoutResultAtElement [Line: 89]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while executing DepthFirstTraversal. - TimeoutResultAtElement [Line: 87]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while executing DepthFirstTraversal. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 7 procedures, 325 locations, 4 error locations. Started 1 CEGAR loops. OverallTime: 855.8s, OverallIterations: 5, TraceHistogramMax: 0, PathProgramHistogramMax: 94, EmptinessCheckTime: 176.6s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 105, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 1.7s SatisfiabilityAnalysisTime, 10.8s InterpolantComputationTime, 4015 NumberOfCodeBlocks, 3977 NumberOfCodeBlocksAsserted, 14 NumberOfCheckSat, 5746 ConstructedInterpolants, 0 QuantifiedInterpolants, 21197 SizeOfPredicates, 85 NumberOfNonLiveVariables, 3323 ConjunctsInSsa, 97 ConjunctsInUnsatCore, 13 InterpolantComputations, 0 PerfectInterpolantSequences, 5652/6770 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 169.6s, ConditionalCommutativityIAIntegrations: 0, ConditionalCommutativityDFSRestarts: 2, ConditionalCommutativityConditionCalculations: 175, ConditionalCommutativityTraceChecks: 175, ConditionalCommutativityImperfectProofs: 173 RESULT: Ultimate could not prove your program: Timeout Completed graceful shutdown