/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking BOTH --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 10 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/pthread-wmm/safe016_power.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-07 21:30:23,570 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-07 21:30:23,650 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-07 21:30:23,654 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-07 21:30:23,654 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-07 21:30:23,678 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-07 21:30:23,678 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-07 21:30:23,678 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-07 21:30:23,679 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-07 21:30:23,682 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-07 21:30:23,682 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-07 21:30:23,683 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-07 21:30:23,683 INFO L153 SettingsManager]: * Use SBE=true [2024-05-07 21:30:23,684 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-07 21:30:23,684 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-07 21:30:23,684 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-07 21:30:23,684 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-07 21:30:23,684 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-07 21:30:23,685 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-07 21:30:23,685 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-07 21:30:23,685 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-07 21:30:23,685 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-07 21:30:23,685 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-07 21:30:23,686 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-07 21:30:23,686 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-07 21:30:23,686 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-07 21:30:23,686 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-07 21:30:23,686 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-07 21:30:23,687 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-07 21:30:23,687 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 21:30:23,688 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-07 21:30:23,688 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-07 21:30:23,688 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-07 21:30:23,688 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-07 21:30:23,688 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-07 21:30:23,689 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-07 21:30:23,716 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-07 21:30:23,716 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-07 21:30:23,716 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-07 21:30:23,716 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> BOTH Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 10 [2024-05-07 21:30:23,939 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-07 21:30:23,960 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-07 21:30:23,962 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-07 21:30:23,963 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-07 21:30:23,964 INFO L274 PluginConnector]: CDTParser initialized [2024-05-07 21:30:23,964 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-wmm/safe016_power.opt.i [2024-05-07 21:30:25,133 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-07 21:30:25,337 INFO L384 CDTParser]: Found 1 translation units. [2024-05-07 21:30:25,337 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe016_power.opt.i [2024-05-07 21:30:25,351 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/34e8c98fb/9d872262761d45cdb20de7381dcd2c7e/FLAGd897fc2d2 [2024-05-07 21:30:25,367 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/34e8c98fb/9d872262761d45cdb20de7381dcd2c7e [2024-05-07 21:30:25,369 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-07 21:30:25,371 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-07 21:30:25,372 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-07 21:30:25,372 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-07 21:30:25,383 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-07 21:30:25,384 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:25,385 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2472331e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25, skipping insertion in model container [2024-05-07 21:30:25,385 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:25,431 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-07 21:30:25,578 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe016_power.opt.i[951,964] [2024-05-07 21:30:25,766 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 21:30:25,774 INFO L202 MainTranslator]: Completed pre-run [2024-05-07 21:30:25,790 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe016_power.opt.i[951,964] [2024-05-07 21:30:25,825 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 21:30:25,891 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-07 21:30:25,891 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-07 21:30:25,897 INFO L206 MainTranslator]: Completed translation [2024-05-07 21:30:25,922 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25 WrapperNode [2024-05-07 21:30:25,922 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-07 21:30:25,923 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-07 21:30:25,923 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-07 21:30:25,924 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-07 21:30:25,940 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:25,973 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:26,000 INFO L138 Inliner]: procedures = 177, calls = 91, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 183 [2024-05-07 21:30:26,001 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-07 21:30:26,001 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-07 21:30:26,001 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-07 21:30:26,001 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-07 21:30:26,014 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:26,015 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:26,024 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:26,025 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:26,050 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:26,052 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:26,054 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:26,056 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:26,059 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-07 21:30:26,059 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-07 21:30:26,059 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-07 21:30:26,060 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-07 21:30:26,060 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25" (1/1) ... [2024-05-07 21:30:26,075 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 21:30:26,085 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 21:30:26,114 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-07 21:30:26,131 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-07 21:30:26,159 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-07 21:30:26,159 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-07 21:30:26,159 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-07 21:30:26,159 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-07 21:30:26,159 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-07 21:30:26,160 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-07 21:30:26,160 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2024-05-07 21:30:26,161 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2024-05-07 21:30:26,161 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2024-05-07 21:30:26,161 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2024-05-07 21:30:26,162 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2024-05-07 21:30:26,162 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2024-05-07 21:30:26,163 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2024-05-07 21:30:26,163 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2024-05-07 21:30:26,163 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-07 21:30:26,163 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-07 21:30:26,163 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-07 21:30:26,163 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-07 21:30:26,164 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-07 21:30:26,284 INFO L241 CfgBuilder]: Building ICFG [2024-05-07 21:30:26,287 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-07 21:30:26,710 INFO L282 CfgBuilder]: Performing block encoding [2024-05-07 21:30:26,982 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-07 21:30:26,983 INFO L309 CfgBuilder]: Removed 0 assume(true) statements. [2024-05-07 21:30:26,984 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 09:30:26 BoogieIcfgContainer [2024-05-07 21:30:26,985 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-07 21:30:26,986 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-07 21:30:26,986 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-07 21:30:26,989 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-07 21:30:26,989 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.05 09:30:25" (1/3) ... [2024-05-07 21:30:26,990 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2df59be8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 09:30:26, skipping insertion in model container [2024-05-07 21:30:26,990 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 09:30:25" (2/3) ... [2024-05-07 21:30:26,991 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2df59be8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 09:30:26, skipping insertion in model container [2024-05-07 21:30:26,991 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 09:30:26" (3/3) ... [2024-05-07 21:30:26,992 INFO L112 eAbstractionObserver]: Analyzing ICFG safe016_power.opt.i [2024-05-07 21:30:26,998 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-07 21:30:27,005 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-07 21:30:27,005 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-07 21:30:27,005 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-07 21:30:27,070 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-05-07 21:30:27,110 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-07 21:30:27,110 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-07 21:30:27,110 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 21:30:27,126 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-07 21:30:27,144 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-07 21:30:27,159 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-07 21:30:27,169 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 21:30:27,170 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-07 21:30:27,176 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@20a594b3, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=BOTH, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=10, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-07 21:30:27,176 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-07 21:30:27,239 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-07 21:30:27,240 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 21:30:27,241 INFO L85 PathProgramCache]: Analyzing trace with hash -1772599497, now seen corresponding path program 1 times [2024-05-07 21:30:27,247 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 21:30:27,247 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1030274148] [2024-05-07 21:30:27,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:27,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:27,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:30:27,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:30:27,563 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 21:30:27,564 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1030274148] [2024-05-07 21:30:27,564 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1030274148] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 21:30:27,564 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 21:30:27,564 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-05-07 21:30:27,565 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371858928] [2024-05-07 21:30:27,566 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 21:30:27,570 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-05-07 21:30:27,570 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 21:30:27,608 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-07 21:30:27,608 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-05-07 21:30:27,609 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:30:27,610 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 21:30:27,612 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 59.0) internal successors, (118), 2 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 21:30:27,613 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:30:27,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:30:27,700 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-05-07 21:30:27,700 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-07 21:30:27,700 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 21:30:27,700 INFO L85 PathProgramCache]: Analyzing trace with hash 128577234, now seen corresponding path program 1 times [2024-05-07 21:30:27,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 21:30:27,700 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [85688105] [2024-05-07 21:30:27,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:27,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:27,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:30:28,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:30:28,464 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 21:30:28,464 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [85688105] [2024-05-07 21:30:28,464 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [85688105] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 21:30:28,464 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 21:30:28,464 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-05-07 21:30:28,465 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1089261333] [2024-05-07 21:30:28,465 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 21:30:28,467 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-07 21:30:28,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 21:30:28,484 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-07 21:30:28,485 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-05-07 21:30:28,485 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:30:28,485 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 21:30:28,485 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 19.5) internal successors, (117), 6 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 21:30:28,485 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:30:28,485 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:30:35,182 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-07 21:30:35,183 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 58 [2024-05-07 21:30:35,360 INFO L85 PathProgramCache]: Analyzing trace with hash 2104528294, now seen corresponding path program 1 times [2024-05-07 21:30:35,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:35,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:35,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:30:35,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:30:35,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:35,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:35,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:30:35,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:30:35,945 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-05-07 21:30:35,945 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2024-05-07 21:30:36,121 INFO L85 PathProgramCache]: Analyzing trace with hash 907003729, now seen corresponding path program 1 times [2024-05-07 21:30:36,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:36,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:36,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:36,179 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:30:36,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:36,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:30:36,294 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 21:30:36,294 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,SelfDestructingSolverStorable3,SelfDestructingSolverStorable2,SelfDestructingSolverStorable1 [2024-05-07 21:30:36,294 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-07 21:30:36,295 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 21:30:36,295 INFO L85 PathProgramCache]: Analyzing trace with hash 935774966, now seen corresponding path program 1 times [2024-05-07 21:30:36,295 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 21:30:36,295 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501218071] [2024-05-07 21:30:36,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:36,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:36,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:30:38,003 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:30:38,003 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 21:30:38,003 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [501218071] [2024-05-07 21:30:38,003 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [501218071] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 21:30:38,004 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 21:30:38,004 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2024-05-07 21:30:38,004 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1167457301] [2024-05-07 21:30:38,004 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 21:30:38,004 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-05-07 21:30:38,004 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 21:30:38,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 21:30:38,104 INFO L85 PathProgramCache]: Analyzing trace with hash 907003729, now seen corresponding path program 2 times [2024-05-07 21:30:38,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:38,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:38,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:38,145 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:30:38,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:38,198 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-05-07 21:30:38,198 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2024-05-07 21:30:38,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:30:38,199 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 21:30:38,199 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 10.166666666666666) internal successors, (122), 12 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 21:30:38,199 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:30:38,199 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 21:30:38,199 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:30:38,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 21:30:38,403 INFO L85 PathProgramCache]: Analyzing trace with hash 907003729, now seen corresponding path program 3 times [2024-05-07 21:30:38,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:38,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:38,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:38,449 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:30:38,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:38,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 21:30:38,756 INFO L85 PathProgramCache]: Analyzing trace with hash -1809128778, now seen corresponding path program 1 times [2024-05-07 21:30:38,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:38,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:38,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:38,807 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:30:38,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:38,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 21:30:38,996 INFO L85 PathProgramCache]: Analyzing trace with hash -1175380144, now seen corresponding path program 1 times [2024-05-07 21:30:38,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:38,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:39,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:39,036 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:30:39,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:39,743 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2024-05-07 21:30:39,761 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2024-05-07 21:30:40,962 INFO L85 PathProgramCache]: Analyzing trace with hash 2111833090, now seen corresponding path program 1 times [2024-05-07 21:30:40,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:40,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:41,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:41,006 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:30:41,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:44,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2024-05-07 21:30:44,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2024-05-07 21:30:45,876 INFO L85 PathProgramCache]: Analyzing trace with hash 899409817, now seen corresponding path program 1 times [2024-05-07 21:30:45,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:45,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:45,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:45,923 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:30:45,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:48,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2024-05-07 21:30:49,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2024-05-07 21:30:50,149 INFO L85 PathProgramCache]: Analyzing trace with hash 2107225037, now seen corresponding path program 1 times [2024-05-07 21:30:50,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:50,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:50,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:50,206 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:30:50,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:53,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2024-05-07 21:30:53,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2024-05-07 21:30:54,537 INFO L85 PathProgramCache]: Analyzing trace with hash 760713094, now seen corresponding path program 1 times [2024-05-07 21:30:54,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:54,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:54,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:54,587 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:30:54,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:57,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2024-05-07 21:30:57,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2024-05-07 21:30:58,364 INFO L85 PathProgramCache]: Analyzing trace with hash 855823844, now seen corresponding path program 1 times [2024-05-07 21:30:58,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:30:58,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:30:58,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:30:58,393 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:30:58,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:01,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2024-05-07 21:31:01,085 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2024-05-07 21:31:02,023 INFO L85 PathProgramCache]: Analyzing trace with hash -2050600306, now seen corresponding path program 1 times [2024-05-07 21:31:02,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:02,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:02,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:02,048 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:02,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:04,019 INFO L85 PathProgramCache]: Analyzing trace with hash 927360013, now seen corresponding path program 4 times [2024-05-07 21:31:04,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:04,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:04,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:04,154 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:04,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:04,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:31:04,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 21:31:04,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-07 21:31:04,248 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable10,SelfDestructingSolverStorable11,SelfDestructingSolverStorable12,SelfDestructingSolverStorable9,SelfDestructingSolverStorable13,SelfDestructingSolverStorable14,SelfDestructingSolverStorable15,SelfDestructingSolverStorable16 [2024-05-07 21:31:04,248 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-07 21:31:04,248 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 21:31:04,248 INFO L85 PathProgramCache]: Analyzing trace with hash 1847828154, now seen corresponding path program 2 times [2024-05-07 21:31:04,249 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 21:31:04,249 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1760584130] [2024-05-07 21:31:04,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:04,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:04,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:31:05,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:31:05,685 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 21:31:05,685 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1760584130] [2024-05-07 21:31:05,685 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1760584130] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 21:31:05,685 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 21:31:05,685 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2024-05-07 21:31:05,685 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [675769269] [2024-05-07 21:31:05,685 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 21:31:05,686 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-05-07 21:31:05,686 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 21:31:06,353 INFO L85 PathProgramCache]: Analyzing trace with hash -2050600306, now seen corresponding path program 2 times [2024-05-07 21:31:06,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:06,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:06,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:31:07,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:31:07,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:07,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:07,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:31:08,040 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:31:10,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 21:31:10,681 INFO L85 PathProgramCache]: Analyzing trace with hash 763120482, now seen corresponding path program 1 times [2024-05-07 21:31:10,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:10,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:10,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:31:10,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:31:10,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:10,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:10,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:31:10,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:31:10,943 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 21:31:10,968 INFO L85 PathProgramCache]: Analyzing trace with hash 927360013, now seen corresponding path program 5 times [2024-05-07 21:31:10,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:10,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:11,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:11,010 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:11,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:11,051 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-05-07 21:31:11,053 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=150, Invalid=906, Unknown=0, NotChecked=0, Total=1056 [2024-05-07 21:31:11,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:31:11,056 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 21:31:11,056 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 23 states have (on average 12.434782608695652) internal successors, (286), 25 states have internal predecessors, (286), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 21:31:11,056 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:31:11,057 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 21:31:11,057 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-07 21:31:11,057 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:31:11,504 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 21:31:11,619 INFO L85 PathProgramCache]: Analyzing trace with hash 907003729, now seen corresponding path program 6 times [2024-05-07 21:31:11,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:11,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:11,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:11,651 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:11,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:11,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 21:31:12,072 INFO L85 PathProgramCache]: Analyzing trace with hash -1809128778, now seen corresponding path program 2 times [2024-05-07 21:31:12,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:12,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:12,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:12,112 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:12,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:19,562 INFO L85 PathProgramCache]: Analyzing trace with hash 1084942308, now seen corresponding path program 1 times [2024-05-07 21:31:19,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:19,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:19,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:19,590 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:19,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:19,904 INFO L85 PathProgramCache]: Analyzing trace with hash -1211927805, now seen corresponding path program 1 times [2024-05-07 21:31:19,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:19,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:19,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:19,930 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:19,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:20,303 INFO L85 PathProgramCache]: Analyzing trace with hash 99452921, now seen corresponding path program 1 times [2024-05-07 21:31:20,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:20,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:20,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:20,329 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:20,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:20,606 INFO L85 PathProgramCache]: Analyzing trace with hash -2075001802, now seen corresponding path program 1 times [2024-05-07 21:31:20,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:20,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:20,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:20,633 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:20,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:20,904 INFO L85 PathProgramCache]: Analyzing trace with hash 1872727106, now seen corresponding path program 1 times [2024-05-07 21:31:20,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:20,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:20,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:20,929 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:20,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:21,172 INFO L85 PathProgramCache]: Analyzing trace with hash 60410606, now seen corresponding path program 1 times [2024-05-07 21:31:21,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:21,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:21,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:21,198 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:21,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:21,507 INFO L85 PathProgramCache]: Analyzing trace with hash -1522071841, now seen corresponding path program 1 times [2024-05-07 21:31:21,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:21,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:21,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:21,532 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:21,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:21,773 INFO L85 PathProgramCache]: Analyzing trace with hash -1711667101, now seen corresponding path program 1 times [2024-05-07 21:31:21,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:21,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:21,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:21,795 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:21,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:21,953 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-07 21:31:22,215 INFO L85 PathProgramCache]: Analyzing trace with hash -2129151885, now seen corresponding path program 1 times [2024-05-07 21:31:22,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:22,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:22,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:22,238 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:22,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:22,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:31:22,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 21:31:22,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-07 21:31:22,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-05-07 21:31:22,928 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,SelfDestructingSolverStorable20,SelfDestructingSolverStorable31,SelfDestructingSolverStorable18,SelfDestructingSolverStorable29,SelfDestructingSolverStorable19,SelfDestructingSolverStorable21,SelfDestructingSolverStorable32,SelfDestructingSolverStorable22,SelfDestructingSolverStorable33,SelfDestructingSolverStorable23,SelfDestructingSolverStorable24,SelfDestructingSolverStorable25,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable17,SelfDestructingSolverStorable28 [2024-05-07 21:31:22,929 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-07 21:31:22,929 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 21:31:22,929 INFO L85 PathProgramCache]: Analyzing trace with hash 1952195472, now seen corresponding path program 3 times [2024-05-07 21:31:22,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 21:31:22,929 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869221066] [2024-05-07 21:31:22,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:22,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:22,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:31:23,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:31:23,189 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 21:31:23,190 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869221066] [2024-05-07 21:31:23,190 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [869221066] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 21:31:23,190 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 21:31:23,190 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-05-07 21:31:23,190 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1323915150] [2024-05-07 21:31:23,190 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 21:31:23,191 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-05-07 21:31:23,191 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 21:31:23,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 648 treesize of output 600 [2024-05-07 21:31:23,245 INFO L85 PathProgramCache]: Analyzing trace with hash -2129151885, now seen corresponding path program 2 times [2024-05-07 21:31:23,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:23,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:23,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:23,271 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:23,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:23,961 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-07 21:31:23,962 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-07 21:31:24,535 INFO L85 PathProgramCache]: Analyzing trace with hash -1579198193, now seen corresponding path program 1 times [2024-05-07 21:31:24,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:24,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:24,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:31:24,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:31:24,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:24,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:25,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:31:25,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:31:25,478 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-05-07 21:31:25,478 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2024-05-07 21:31:25,478 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:31:25,478 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 21:31:25,478 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 14 states have (on average 13.0) internal successors, (182), 15 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 21:31:25,478 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:31:25,478 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 21:31:25,478 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-07 21:31:25,479 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-05-07 21:31:25,479 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:31:26,340 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-05-07 21:31:26,764 INFO L85 PathProgramCache]: Analyzing trace with hash -2129151885, now seen corresponding path program 3 times [2024-05-07 21:31:26,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:26,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:26,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:26,787 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:26,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:27,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-05-07 21:31:28,148 INFO L85 PathProgramCache]: Analyzing trace with hash 1932571104, now seen corresponding path program 1 times [2024-05-07 21:31:28,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:28,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:28,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:28,185 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:28,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:28,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-07 21:31:29,334 INFO L85 PathProgramCache]: Analyzing trace with hash -512585196, now seen corresponding path program 1 times [2024-05-07 21:31:29,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:29,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:29,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:29,358 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:29,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:30,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 648 treesize of output 600 [2024-05-07 21:31:31,088 INFO L85 PathProgramCache]: Analyzing trace with hash 2097157793, now seen corresponding path program 1 times [2024-05-07 21:31:31,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:31:31,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:31:31,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:31:31,126 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:31:31,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:15,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 648 treesize of output 600 [2024-05-07 21:32:15,405 INFO L85 PathProgramCache]: Analyzing trace with hash 159352757, now seen corresponding path program 1 times [2024-05-07 21:32:15,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:15,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:15,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:15,422 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:15,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:19,030 INFO L85 PathProgramCache]: Analyzing trace with hash -693093584, now seen corresponding path program 1 times [2024-05-07 21:32:19,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:19,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:19,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:19,053 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:19,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:19,393 INFO L85 PathProgramCache]: Analyzing trace with hash -715094473, now seen corresponding path program 1 times [2024-05-07 21:32:19,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:19,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:19,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:19,417 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:19,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:19,703 INFO L85 PathProgramCache]: Analyzing trace with hash -1685635515, now seen corresponding path program 1 times [2024-05-07 21:32:19,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:19,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:19,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:19,731 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:19,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:20,012 INFO L85 PathProgramCache]: Analyzing trace with hash -54375318, now seen corresponding path program 1 times [2024-05-07 21:32:20,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:20,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:20,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:20,038 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:20,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:20,304 INFO L85 PathProgramCache]: Analyzing trace with hash -1802869362, now seen corresponding path program 1 times [2024-05-07 21:32:20,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:20,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:20,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:20,327 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:20,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:20,627 INFO L85 PathProgramCache]: Analyzing trace with hash -58157022, now seen corresponding path program 1 times [2024-05-07 21:32:20,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:20,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:20,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:20,653 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:20,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:21,044 INFO L85 PathProgramCache]: Analyzing trace with hash 829408043, now seen corresponding path program 1 times [2024-05-07 21:32:21,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:21,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:21,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:21,064 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:21,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:21,342 INFO L85 PathProgramCache]: Analyzing trace with hash 719491735, now seen corresponding path program 1 times [2024-05-07 21:32:21,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:21,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:21,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:21,365 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:21,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:21,782 INFO L85 PathProgramCache]: Analyzing trace with hash -118682089, now seen corresponding path program 1 times [2024-05-07 21:32:21,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:21,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:21,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:21,805 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:21,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:22,150 INFO L85 PathProgramCache]: Analyzing trace with hash 1381644912, now seen corresponding path program 1 times [2024-05-07 21:32:22,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:22,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:22,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:22,173 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:22,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:23,058 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-05-07 21:32:23,261 INFO L85 PathProgramCache]: Analyzing trace with hash 845799266, now seen corresponding path program 1 times [2024-05-07 21:32:23,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:23,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:23,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:23,296 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:23,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:23,902 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-05-07 21:32:24,158 INFO L85 PathProgramCache]: Analyzing trace with hash 449974285, now seen corresponding path program 2 times [2024-05-07 21:32:24,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:24,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:24,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:24,239 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:24,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:24,429 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-05-07 21:32:24,726 INFO L85 PathProgramCache]: Analyzing trace with hash 1064301763, now seen corresponding path program 2 times [2024-05-07 21:32:24,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:24,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:24,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:24,746 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:24,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:25,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:32:25,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 21:32:25,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-07 21:32:25,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-07 21:32:25,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-07 21:32:25,216 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,SelfDestructingSolverStorable40,SelfDestructingSolverStorable51,SelfDestructingSolverStorable41,SelfDestructingSolverStorable52,SelfDestructingSolverStorable42,SelfDestructingSolverStorable53,SelfDestructingSolverStorable43,SelfDestructingSolverStorable54,SelfDestructingSolverStorable44,SelfDestructingSolverStorable55,SelfDestructingSolverStorable34,SelfDestructingSolverStorable45,SelfDestructingSolverStorable35,SelfDestructingSolverStorable46,SelfDestructingSolverStorable36,SelfDestructingSolverStorable47,SelfDestructingSolverStorable37,SelfDestructingSolverStorable48,SelfDestructingSolverStorable38,SelfDestructingSolverStorable49,SelfDestructingSolverStorable39 [2024-05-07 21:32:25,216 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-07 21:32:25,217 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 21:32:25,217 INFO L85 PathProgramCache]: Analyzing trace with hash -1257211660, now seen corresponding path program 4 times [2024-05-07 21:32:25,217 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 21:32:25,217 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [654426819] [2024-05-07 21:32:25,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:25,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:25,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:32:25,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:32:25,407 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 21:32:25,407 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [654426819] [2024-05-07 21:32:25,407 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [654426819] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 21:32:25,407 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 21:32:25,407 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-05-07 21:32:25,408 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1334703668] [2024-05-07 21:32:25,408 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 21:32:25,408 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-05-07 21:32:25,408 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 21:32:26,053 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-07 21:32:26,054 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-07 21:32:26,593 INFO L85 PathProgramCache]: Analyzing trace with hash 449974285, now seen corresponding path program 3 times [2024-05-07 21:32:26,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:26,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:26,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:32:26,979 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:32:26,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:26,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:26,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:32:27,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:32:27,938 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-07 21:32:27,940 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-07 21:32:28,613 INFO L85 PathProgramCache]: Analyzing trace with hash 1787929459, now seen corresponding path program 2 times [2024-05-07 21:32:28,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:28,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:28,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:32:29,360 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:32:29,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:29,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:29,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 21:32:29,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 21:32:29,864 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-05-07 21:32:29,866 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=440, Unknown=0, NotChecked=0, Total=552 [2024-05-07 21:32:29,866 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:32:29,866 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 21:32:29,866 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 14 states have (on average 13.642857142857142) internal successors, (191), 15 states have internal predecessors, (191), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 21:32:29,866 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:32:29,866 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 21:32:29,866 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-07 21:32:29,866 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-07 21:32:29,866 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-05-07 21:32:29,866 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:32:37,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 21:32:37,929 INFO L85 PathProgramCache]: Analyzing trace with hash -870545771, now seen corresponding path program 1 times [2024-05-07 21:32:37,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:37,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:37,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:37,944 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:37,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:51,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 21:32:55,595 INFO L85 PathProgramCache]: Analyzing trace with hash 397004157, now seen corresponding path program 1 times [2024-05-07 21:32:55,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:32:55,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:32:55,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:32:55,613 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:32:55,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:33:10,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 21:33:15,156 INFO L85 PathProgramCache]: Analyzing trace with hash 151356094, now seen corresponding path program 1 times [2024-05-07 21:33:15,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:33:15,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:33:15,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:33:15,172 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:33:15,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:33:27,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 21:33:32,251 INFO L85 PathProgramCache]: Analyzing trace with hash -1934778360, now seen corresponding path program 1 times [2024-05-07 21:33:32,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:33:32,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:33:32,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:33:32,292 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:33:32,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:33:49,010 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 21:33:53,262 INFO L85 PathProgramCache]: Analyzing trace with hash -62410773, now seen corresponding path program 1 times [2024-05-07 21:33:53,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:33:53,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:33:53,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:33:53,281 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:33:53,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:34:07,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 21:34:12,227 INFO L85 PathProgramCache]: Analyzing trace with hash -1526033185, now seen corresponding path program 1 times [2024-05-07 21:34:12,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:34:12,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:34:12,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:34:12,270 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:34:12,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:34:25,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 21:34:29,996 INFO L85 PathProgramCache]: Analyzing trace with hash 782059571, now seen corresponding path program 1 times [2024-05-07 21:34:29,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:34:29,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:34:30,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:34:30,012 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:34:30,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:34:47,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 21:34:51,813 INFO L85 PathProgramCache]: Analyzing trace with hash -251863582, now seen corresponding path program 1 times [2024-05-07 21:34:51,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:34:51,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:34:51,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:34:51,872 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:34:51,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:35:06,350 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 21:35:10,609 INFO L85 PathProgramCache]: Analyzing trace with hash 546064734, now seen corresponding path program 1 times [2024-05-07 21:35:10,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:35:10,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:35:10,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:35:10,640 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:35:10,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:35:28,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 21:35:33,140 INFO L85 PathProgramCache]: Analyzing trace with hash 1460270814, now seen corresponding path program 1 times [2024-05-07 21:35:33,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:35:33,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:35:33,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:35:33,159 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:35:33,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:35:53,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 21:35:57,613 INFO L85 PathProgramCache]: Analyzing trace with hash -1338365635, now seen corresponding path program 1 times [2024-05-07 21:35:57,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:35:57,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:35:57,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:35:57,629 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:35:57,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:37:58,259 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2024-05-07 21:37:58,674 INFO L85 PathProgramCache]: Analyzing trace with hash -1415736180, now seen corresponding path program 1 times [2024-05-07 21:37:58,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:37:58,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:37:58,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:37:58,692 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:37:58,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:37:59,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-07 21:37:59,946 INFO L85 PathProgramCache]: Analyzing trace with hash 1482762070, now seen corresponding path program 1 times [2024-05-07 21:37:59,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:37:59,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:37:59,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:37:59,957 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:37:59,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:04,906 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 21:38:05,439 INFO L85 PathProgramCache]: Analyzing trace with hash -1875717748, now seen corresponding path program 2 times [2024-05-07 21:38:05,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:38:05,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:38:05,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:05,451 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:38:05,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:10,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 21:38:10,910 INFO L85 PathProgramCache]: Analyzing trace with hash 1863422477, now seen corresponding path program 1 times [2024-05-07 21:38:10,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:38:10,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:38:10,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:10,923 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:38:10,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:15,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2024-05-07 21:38:15,396 INFO L85 PathProgramCache]: Analyzing trace with hash 767505940, now seen corresponding path program 1 times [2024-05-07 21:38:15,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:38:15,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:38:15,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:15,407 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:38:15,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:15,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-07 21:38:16,066 INFO L85 PathProgramCache]: Analyzing trace with hash 1828859086, now seen corresponding path program 1 times [2024-05-07 21:38:16,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:38:16,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:38:16,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:16,077 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:38:16,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:20,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 21:38:21,512 INFO L85 PathProgramCache]: Analyzing trace with hash 307524372, now seen corresponding path program 2 times [2024-05-07 21:38:21,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:38:21,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:38:21,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:21,523 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:38:21,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:26,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 21:38:27,330 INFO L85 PathProgramCache]: Analyzing trace with hash 1519664662, now seen corresponding path program 1 times [2024-05-07 21:38:27,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:38:27,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:38:27,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:27,341 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:38:27,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:31,918 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2024-05-07 21:38:32,318 INFO L85 PathProgramCache]: Analyzing trace with hash -919527061, now seen corresponding path program 1 times [2024-05-07 21:38:32,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:38:32,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:38:32,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:32,330 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:38:32,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:32,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 648 treesize of output 600 [2024-05-07 21:38:33,050 INFO L85 PathProgramCache]: Analyzing trace with hash -1428892777, now seen corresponding path program 1 times [2024-05-07 21:38:33,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:38:33,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:38:33,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:33,061 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:38:33,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:37,882 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 21:38:38,600 INFO L85 PathProgramCache]: Analyzing trace with hash -1379508629, now seen corresponding path program 2 times [2024-05-07 21:38:38,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:38:38,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:38:38,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:38,612 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:38:38,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:45,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 21:38:45,486 INFO L85 PathProgramCache]: Analyzing trace with hash 2046456686, now seen corresponding path program 1 times [2024-05-07 21:38:45,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:38:45,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:38:45,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:45,497 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:38:45,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:46,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-07 21:38:46,434 INFO L85 PathProgramCache]: Analyzing trace with hash 184806127, now seen corresponding path program 1 times [2024-05-07 21:38:46,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:38:46,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:38:46,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:38:46,445 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:38:46,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:42:14,055 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-07 21:42:14,454 INFO L85 PathProgramCache]: Analyzing trace with hash 1817101272, now seen corresponding path program 1 times [2024-05-07 21:42:14,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:42:14,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:42:14,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:42:14,462 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:42:14,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:42:15,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-07 21:42:15,986 INFO L85 PathProgramCache]: Analyzing trace with hash -2136901425, now seen corresponding path program 1 times [2024-05-07 21:42:15,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:42:15,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:42:16,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:42:16,008 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:42:16,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:42:19,805 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 21:42:24,111 INFO L85 PathProgramCache]: Analyzing trace with hash -424366541, now seen corresponding path program 1 times [2024-05-07 21:42:24,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:42:24,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:42:24,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:42:24,120 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:42:24,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:42:24,726 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 648 treesize of output 600 [2024-05-07 21:42:25,245 INFO L85 PathProgramCache]: Analyzing trace with hash -794116180, now seen corresponding path program 1 times [2024-05-07 21:42:25,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:42:25,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:42:25,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:42:25,261 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:42:25,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:42:27,966 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 21:42:27,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 21:42:27,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-07 21:42:27,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-07 21:42:27,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-07 21:42:27,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-05-07 21:42:27,967 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable72,SelfDestructingSolverStorable73,SelfDestructingSolverStorable74,SelfDestructingSolverStorable75,SelfDestructingSolverStorable76,SelfDestructingSolverStorable77,SelfDestructingSolverStorable56,SelfDestructingSolverStorable78,SelfDestructingSolverStorable57,SelfDestructingSolverStorable79,SelfDestructingSolverStorable58,SelfDestructingSolverStorable59,SelfDestructingSolverStorable80,SelfDestructingSolverStorable81,SelfDestructingSolverStorable60,SelfDestructingSolverStorable82,SelfDestructingSolverStorable61,SelfDestructingSolverStorable83,SelfDestructingSolverStorable62,SelfDestructingSolverStorable84,SelfDestructingSolverStorable63,SelfDestructingSolverStorable85,SelfDestructingSolverStorable64,SelfDestructingSolverStorable86,SelfDestructingSolverStorable65,SelfDestructingSolverStorable87,SelfDestructingSolverStorable66,SelfDestructingSolverStorable88,SelfDestructingSolverStorable67,SelfDestructingSolverStorable68,SelfDestructingSolverStorable69 [2024-05-07 21:42:27,967 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-07 21:42:27,967 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 21:42:27,967 INFO L85 PathProgramCache]: Analyzing trace with hash -1058538570, now seen corresponding path program 5 times [2024-05-07 21:42:27,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 21:42:27,968 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150859882] [2024-05-07 21:42:27,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 21:42:27,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 21:42:28,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:42:28,011 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 21:42:28,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 21:42:28,060 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-05-07 21:42:28,060 INFO L363 BasicCegarLoop]: Counterexample is feasible [2024-05-07 21:42:28,061 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (4 of 5 remaining) [2024-05-07 21:42:28,063 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 5 remaining) [2024-05-07 21:42:28,063 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 5 remaining) [2024-05-07 21:42:28,065 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 5 remaining) [2024-05-07 21:42:28,065 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 5 remaining) [2024-05-07 21:42:28,065 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable89 [2024-05-07 21:42:28,069 INFO L448 BasicCegarLoop]: Path program histogram: [6, 5, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-07 21:42:28,073 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-07 21:42:28,073 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-07 21:42:28,165 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre31 could not be translated [2024-05-07 21:42:28,167 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre33 could not be translated [2024-05-07 21:42:28,167 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre35 could not be translated [2024-05-07 21:42:28,170 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre37 could not be translated [2024-05-07 21:42:28,191 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.05 09:42:28 BasicIcfg [2024-05-07 21:42:28,191 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-07 21:42:28,192 INFO L158 Benchmark]: Toolchain (without parser) took 722821.54ms. Allocated memory was 303.0MB in the beginning and 2.5GB in the end (delta: 2.2GB). Free memory was 230.5MB in the beginning and 1.5GB in the end (delta: -1.3GB). Peak memory consumption was 860.4MB. Max. memory is 8.0GB. [2024-05-07 21:42:28,192 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 178.3MB. Free memory is still 142.1MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-07 21:42:28,192 INFO L158 Benchmark]: CACSL2BoogieTranslator took 550.59ms. Allocated memory is still 303.0MB. Free memory was 230.2MB in the beginning and 266.0MB in the end (delta: -35.8MB). Peak memory consumption was 30.2MB. Max. memory is 8.0GB. [2024-05-07 21:42:28,192 INFO L158 Benchmark]: Boogie Procedure Inliner took 77.28ms. Allocated memory is still 303.0MB. Free memory was 266.0MB in the beginning and 263.4MB in the end (delta: 2.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2024-05-07 21:42:28,192 INFO L158 Benchmark]: Boogie Preprocessor took 57.76ms. Allocated memory is still 303.0MB. Free memory was 262.9MB in the beginning and 260.3MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-07 21:42:28,192 INFO L158 Benchmark]: RCFGBuilder took 925.27ms. Allocated memory is still 303.0MB. Free memory was 260.3MB in the beginning and 250.4MB in the end (delta: 9.9MB). Peak memory consumption was 91.1MB. Max. memory is 8.0GB. [2024-05-07 21:42:28,192 INFO L158 Benchmark]: TraceAbstraction took 721205.05ms. Allocated memory was 303.0MB in the beginning and 2.5GB in the end (delta: 2.2GB). Free memory was 248.8MB in the beginning and 1.5GB in the end (delta: -1.3GB). Peak memory consumption was 878.5MB. Max. memory is 8.0GB. [2024-05-07 21:42:28,193 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 178.3MB. Free memory is still 142.1MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 550.59ms. Allocated memory is still 303.0MB. Free memory was 230.2MB in the beginning and 266.0MB in the end (delta: -35.8MB). Peak memory consumption was 30.2MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 77.28ms. Allocated memory is still 303.0MB. Free memory was 266.0MB in the beginning and 263.4MB in the end (delta: 2.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * Boogie Preprocessor took 57.76ms. Allocated memory is still 303.0MB. Free memory was 262.9MB in the beginning and 260.3MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 925.27ms. Allocated memory is still 303.0MB. Free memory was 260.3MB in the beginning and 250.4MB in the end (delta: 9.9MB). Peak memory consumption was 91.1MB. Max. memory is 8.0GB. * TraceAbstraction took 721205.05ms. Allocated memory was 303.0MB in the beginning and 2.5GB in the end (delta: 2.2GB). Free memory was 248.8MB in the beginning and 1.5GB in the end (delta: -1.3GB). Peak memory consumption was 878.5MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre31 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre33 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre35 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre37 could not be translated - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 809993, independent: 786175, independent conditional: 785842, independent unconditional: 333, dependent: 23818, dependent conditional: 23818, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 809610, independent: 786175, independent conditional: 785842, independent unconditional: 333, dependent: 23435, dependent conditional: 23435, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 809610, independent: 786175, independent conditional: 785842, independent unconditional: 333, dependent: 23435, dependent conditional: 23435, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 809610, independent: 786175, independent conditional: 785842, independent unconditional: 333, dependent: 23435, dependent conditional: 23435, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 868253, independent: 786175, independent conditional: 389573, independent unconditional: 396602, dependent: 82078, dependent conditional: 58665, dependent unconditional: 23413, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 868253, independent: 786175, independent conditional: 252961, independent unconditional: 533214, dependent: 82078, dependent conditional: 45171, dependent unconditional: 36907, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 868253, independent: 786175, independent conditional: 252961, independent unconditional: 533214, dependent: 82078, dependent conditional: 45171, dependent unconditional: 36907, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1542, independent: 1435, independent conditional: 453, independent unconditional: 982, dependent: 107, dependent conditional: 62, dependent unconditional: 45, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1542, independent: 1321, independent conditional: 0, independent unconditional: 1321, dependent: 221, dependent conditional: 0, dependent unconditional: 221, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 221, independent: 114, independent conditional: 107, independent unconditional: 7, dependent: 107, dependent conditional: 62, dependent unconditional: 45, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 221, independent: 114, independent conditional: 107, independent unconditional: 7, dependent: 107, dependent conditional: 62, dependent unconditional: 45, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 1636, independent: 672, independent conditional: 668, independent unconditional: 4, dependent: 964, dependent conditional: 623, dependent unconditional: 341, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 868253, independent: 784740, independent conditional: 252508, independent unconditional: 532232, dependent: 81971, dependent conditional: 45109, dependent unconditional: 36862, unknown: 1542, unknown conditional: 515, unknown unconditional: 1027] , Statistics on independence cache: Total cache size (in pairs): 1542, Positive cache size: 1435, Positive conditional cache size: 453, Positive unconditional cache size: 982, Negative cache size: 107, Negative conditional cache size: 62, Negative unconditional cache size: 45, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 150106, Maximal queried relation: 6, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 868253, independent: 786175, independent conditional: 389573, independent unconditional: 396602, dependent: 82078, dependent conditional: 58665, dependent unconditional: 23413, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 868253, independent: 786175, independent conditional: 252961, independent unconditional: 533214, dependent: 82078, dependent conditional: 45171, dependent unconditional: 36907, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 868253, independent: 786175, independent conditional: 252961, independent unconditional: 533214, dependent: 82078, dependent conditional: 45171, dependent unconditional: 36907, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1542, independent: 1435, independent conditional: 453, independent unconditional: 982, dependent: 107, dependent conditional: 62, dependent unconditional: 45, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1542, independent: 1321, independent conditional: 0, independent unconditional: 1321, dependent: 221, dependent conditional: 0, dependent unconditional: 221, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 221, independent: 114, independent conditional: 107, independent unconditional: 7, dependent: 107, dependent conditional: 62, dependent unconditional: 45, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 221, independent: 114, independent conditional: 107, independent unconditional: 7, dependent: 107, dependent conditional: 62, dependent unconditional: 45, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 1636, independent: 672, independent conditional: 668, independent unconditional: 4, dependent: 964, dependent conditional: 623, dependent unconditional: 341, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 868253, independent: 784740, independent conditional: 252508, independent unconditional: 532232, dependent: 81971, dependent conditional: 45109, dependent unconditional: 36862, unknown: 1542, unknown conditional: 515, unknown unconditional: 1027] , Statistics on independence cache: Total cache size (in pairs): 1542, Positive cache size: 1435, Positive conditional cache size: 453, Positive unconditional cache size: 982, Negative cache size: 107, Negative conditional cache size: 62, Negative unconditional cache size: 45, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 150106 ], Independence queries for same thread: 383 - CounterExampleResult [Line: 18]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L710] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L712] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L714] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0] [L715] 0 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX=0] [L716] 0 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX=0] [L717] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX=0] [L718] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX=0] [L719] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX=0] [L720] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX=0] [L721] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX=0] [L722] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX=0] [L723] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX=0] [L724] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX=0] [L725] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX=0] [L726] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX=0] [L727] 0 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX=0] [L728] 0 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX=0] [L729] 0 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX=0] [L730] 0 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX=0] [L731] 0 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX=0] [L732] 0 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0] [L733] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L734] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L736] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}] [L737] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x={3:0}] [L738] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x={3:0}] [L739] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x={3:0}] [L740] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x={3:0}] [L741] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x={3:0}] [L742] 0 _Bool x$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x={3:0}] [L743] 0 _Bool x$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x={3:0}] [L744] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x={3:0}] [L745] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x={3:0}] [L746] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x={3:0}] [L747] 0 _Bool x$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x={3:0}] [L748] 0 _Bool x$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x={3:0}] [L749] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x={3:0}] [L750] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x={3:0}] [L751] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x={3:0}] [L752] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x={3:0}] [L753] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x={3:0}] [L754] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}] [L756] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L757] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L758] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L759] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L861] 0 pthread_t t2149; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, t2149={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L862] FCALL, FORK 0 pthread_create(&t2149, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2149={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L863] 0 pthread_t t2150; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2149={7:0}, t2150={8:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L864] FCALL, FORK 0 pthread_create(&t2150, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2149={7:0}, t2150={8:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L865] 0 pthread_t t2151; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2149={7:0}, t2150={8:0}, t2151={9:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L866] FCALL, FORK 0 pthread_create(&t2151, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2149={7:0}, t2150={8:0}, t2151={9:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L800] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L801] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L802] 3 x$flush_delayed = weak$$choice2 [L803] EXPR 3 \read(x) [L803] 3 x$mem_tmp = x [L804] 3 weak$$choice1 = __VERIFIER_nondet_bool() [L805] EXPR 3 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L805] EXPR 3 \read(x) [L805] EXPR 3 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L805] 3 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L806] 3 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0)))) [L807] 3 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1)))) [L808] 3 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) [L809] 3 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L810] 3 x$r_buff0_thd3 = weak$$choice2 ? x$r_buff0_thd3 : (!x$w_buff0_used ? x$r_buff0_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$r_buff0_thd3 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L811] 3 x$r_buff1_thd3 = weak$$choice2 ? x$r_buff1_thd3 : (!x$w_buff0_used ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$r_buff1_thd3 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L812] 3 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L813] 3 __unbuffered_p2_EAX$read_delayed_var = &x [L814] EXPR 3 \read(x) [L814] 3 __unbuffered_p2_EAX = x [L815] EXPR 3 x$flush_delayed ? x$mem_tmp : x [L815] 3 x = x$flush_delayed ? x$mem_tmp : x [L816] 3 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L819] 3 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L822] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L822] EXPR 3 x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x [L822] EXPR 3 \read(x) [L822] EXPR 3 x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x [L822] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L822] 3 x = x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L823] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L824] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L825] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L826] 3 x$r_buff1_thd3 = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$r_buff1_thd3 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L829] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L831] 3 return 0; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L867] 0 pthread_t t2152; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2149={7:0}, t2150={8:0}, t2151={9:0}, t2152={5:0}, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L868] FCALL, FORK 0 pthread_create(&t2152, ((void *)0), P3, ((void *)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2149={7:0}, t2150={8:0}, t2151={9:0}, t2152={5:0}, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L836] 4 y = 2 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L839] EXPR 4 x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L839] EXPR 4 x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x [L839] EXPR 4 \read(x) [L839] EXPR 4 x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x [L839] EXPR 4 x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L839] 4 x = x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L840] 4 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd4 ? (_Bool)0 : x$w_buff0_used [L841] 4 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd4 || x$w_buff1_used && x$r_buff1_thd4 ? (_Bool)0 : x$w_buff1_used [L842] 4 x$r_buff0_thd4 = x$w_buff0_used && x$r_buff0_thd4 ? (_Bool)0 : x$r_buff0_thd4 [L843] 4 x$r_buff1_thd4 = x$w_buff0_used && x$r_buff0_thd4 || x$w_buff1_used && x$r_buff1_thd4 ? (_Bool)0 : x$r_buff1_thd4 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L846] 4 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L848] 4 return 0; VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L763] 1 __unbuffered_p0_EAX = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L766] 1 x = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L783] 2 x = 2 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L786] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L786] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L786] EXPR 2 \read(x) [L786] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L786] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L786] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L787] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L788] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L789] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L790] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L793] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L795] 2 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L769] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L769] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x [L769] EXPR 1 \read(x) [L769] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x [L769] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L769] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L770] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L771] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L772] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L773] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L776] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L870] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2149={7:0}, t2150={8:0}, t2151={9:0}, t2152={5:0}, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L872] CALL 0 assume_abort_if_not(main$tmp_guard0) [L3] COND FALSE 0 !(!cond) VAL [\old(cond)=1, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, cond=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L872] RET 0 assume_abort_if_not(main$tmp_guard0) [L874] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L874] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L874] EXPR 0 \read(x) [L874] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L874] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L874] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L875] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L876] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L877] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L878] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2149={7:0}, t2150={8:0}, t2151={9:0}, t2152={5:0}, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L881] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L882] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L883] 0 x$flush_delayed = weak$$choice2 [L884] EXPR 0 \read(x) [L884] 0 x$mem_tmp = x [L885] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L885] EXPR 0 \read(x) [L885] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L885] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L886] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L887] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L888] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L889] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L890] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L891] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L892] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L893] EXPR 0 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L893] EXPR 0 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L893] EXPR 0 \read(*__unbuffered_p2_EAX$read_delayed_var) [L893] EXPR 0 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L893] EXPR 0 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L893] 0 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L894] EXPR 0 \read(x) [L894] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p0_EAX == 2 && __unbuffered_p2_EAX == 2) [L895] EXPR 0 x$flush_delayed ? x$mem_tmp : x [L895] 0 x = x$flush_delayed ? x$mem_tmp : x [L896] 0 x$flush_delayed = (_Bool)0 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2149={7:0}, t2150={8:0}, t2151={9:0}, t2152={5:0}, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L898] CALL 0 __VERIFIER_assert(main$tmp_guard1) [L18] COND TRUE 0 !expression VAL [\old(expression)=0, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L18] 0 reach_error() VAL [\old(expression)=0, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice1=1, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] - UnprovableResult [Line: 862]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 866]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 868]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 864]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 9 procedures, 180 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 720.9s, OverallIterations: 7, TraceHistogramMax: 0, PathProgramHistogramMax: 6, EmptinessCheckTime: 703.7s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 73, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 4.0s InterpolantComputationTime, 845 NumberOfCodeBlocks, 845 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 717 ConstructedInterpolants, 0 QuantifiedInterpolants, 3685 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 6 InterpolantComputations, 6 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 704.4s, ConditionalCommutativityIAIntegrations: 5, ConditionalCommutativityDFSRestarts: 1, ConditionalCommutativityConditionCalculations: 280, ConditionalCommutativityTraceChecks: 77, ConditionalCommutativityImperfectProofs: 0 RESULT: Ultimate proved your program to be incorrect! [2024-05-07 21:42:28,225 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2024-05-07 21:42:28,519 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...