/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking BOTH --traceabstraction.criterion.for.conditional.commutativity.checking SLEEP_SET --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 10 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/pthread-wmm/mix023_tso.i -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-08 01:27:04,145 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-08 01:27:04,210 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-08 01:27:04,215 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-08 01:27:04,216 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-08 01:27:04,234 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-08 01:27:04,234 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-08 01:27:04,235 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-08 01:27:04,235 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-08 01:27:04,238 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-08 01:27:04,238 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-08 01:27:04,239 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-08 01:27:04,239 INFO L153 SettingsManager]: * Use SBE=true [2024-05-08 01:27:04,240 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-08 01:27:04,240 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-08 01:27:04,241 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-08 01:27:04,241 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-08 01:27:04,241 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-08 01:27:04,241 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-08 01:27:04,241 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-08 01:27:04,241 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-08 01:27:04,242 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-08 01:27:04,242 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-08 01:27:04,242 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-08 01:27:04,242 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-08 01:27:04,242 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-08 01:27:04,242 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-08 01:27:04,243 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-08 01:27:04,243 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-08 01:27:04,243 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-08 01:27:04,244 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-08 01:27:04,244 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-08 01:27:04,244 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-08 01:27:04,244 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-08 01:27:04,244 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-08 01:27:04,244 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-08 01:27:04,245 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-08 01:27:04,245 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-08 01:27:04,245 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-08 01:27:04,245 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> BOTH Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> SLEEP_SET Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 10 [2024-05-08 01:27:04,465 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-08 01:27:04,483 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-08 01:27:04,485 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-08 01:27:04,486 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-08 01:27:04,487 INFO L274 PluginConnector]: CDTParser initialized [2024-05-08 01:27:04,488 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-wmm/mix023_tso.i [2024-05-08 01:27:05,575 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-08 01:27:05,834 INFO L384 CDTParser]: Found 1 translation units. [2024-05-08 01:27:05,835 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/mix023_tso.i [2024-05-08 01:27:05,851 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/b5b549846/8805a574a43c4b7eb5427a6c37d74301/FLAG77abd1297 [2024-05-08 01:27:05,863 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/b5b549846/8805a574a43c4b7eb5427a6c37d74301 [2024-05-08 01:27:05,866 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-08 01:27:05,868 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-08 01:27:05,870 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-08 01:27:05,870 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-08 01:27:05,874 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-08 01:27:05,875 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.05 01:27:05" (1/1) ... [2024-05-08 01:27:05,875 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@60ab8732 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:05, skipping insertion in model container [2024-05-08 01:27:05,876 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.05 01:27:05" (1/1) ... [2024-05-08 01:27:05,919 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-08 01:27:06,076 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/mix023_tso.i[944,957] [2024-05-08 01:27:06,319 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-08 01:27:06,328 INFO L202 MainTranslator]: Completed pre-run [2024-05-08 01:27:06,337 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/mix023_tso.i[944,957] [2024-05-08 01:27:06,399 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-08 01:27:06,438 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-08 01:27:06,438 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-08 01:27:06,444 INFO L206 MainTranslator]: Completed translation [2024-05-08 01:27:06,445 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06 WrapperNode [2024-05-08 01:27:06,445 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-08 01:27:06,445 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-08 01:27:06,446 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-08 01:27:06,446 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-08 01:27:06,451 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06" (1/1) ... [2024-05-08 01:27:06,475 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06" (1/1) ... [2024-05-08 01:27:06,513 INFO L138 Inliner]: procedures = 177, calls = 72, calls flagged for inlining = 6, calls inlined = 6, statements flattened = 281 [2024-05-08 01:27:06,513 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-08 01:27:06,514 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-08 01:27:06,514 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-08 01:27:06,514 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-08 01:27:06,523 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06" (1/1) ... [2024-05-08 01:27:06,523 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06" (1/1) ... [2024-05-08 01:27:06,527 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06" (1/1) ... [2024-05-08 01:27:06,527 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06" (1/1) ... [2024-05-08 01:27:06,536 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06" (1/1) ... [2024-05-08 01:27:06,537 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06" (1/1) ... [2024-05-08 01:27:06,540 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06" (1/1) ... [2024-05-08 01:27:06,544 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06" (1/1) ... [2024-05-08 01:27:06,548 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-08 01:27:06,549 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-08 01:27:06,549 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-08 01:27:06,549 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-08 01:27:06,549 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06" (1/1) ... [2024-05-08 01:27:06,554 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-08 01:27:06,565 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-08 01:27:06,606 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-08 01:27:06,622 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-08 01:27:06,645 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-08 01:27:06,645 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-08 01:27:06,646 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-08 01:27:06,646 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-08 01:27:06,646 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-08 01:27:06,646 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2024-05-08 01:27:06,646 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2024-05-08 01:27:06,646 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2024-05-08 01:27:06,646 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2024-05-08 01:27:06,646 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2024-05-08 01:27:06,646 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2024-05-08 01:27:06,646 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2024-05-08 01:27:06,646 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2024-05-08 01:27:06,647 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-08 01:27:06,647 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-08 01:27:06,647 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-08 01:27:06,647 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-08 01:27:06,648 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-08 01:27:06,756 INFO L241 CfgBuilder]: Building ICFG [2024-05-08 01:27:06,758 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-08 01:27:07,149 INFO L282 CfgBuilder]: Performing block encoding [2024-05-08 01:27:07,385 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-08 01:27:07,385 INFO L309 CfgBuilder]: Removed 0 assume(true) statements. [2024-05-08 01:27:07,386 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.05 01:27:07 BoogieIcfgContainer [2024-05-08 01:27:07,387 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-08 01:27:07,390 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-08 01:27:07,390 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-08 01:27:07,393 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-08 01:27:07,393 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.05 01:27:05" (1/3) ... [2024-05-08 01:27:07,394 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@71d84626 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.05 01:27:07, skipping insertion in model container [2024-05-08 01:27:07,394 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.05 01:27:06" (2/3) ... [2024-05-08 01:27:07,394 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@71d84626 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.05 01:27:07, skipping insertion in model container [2024-05-08 01:27:07,395 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.05 01:27:07" (3/3) ... [2024-05-08 01:27:07,396 INFO L112 eAbstractionObserver]: Analyzing ICFG mix023_tso.i [2024-05-08 01:27:07,402 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-08 01:27:07,409 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-08 01:27:07,409 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 3 error locations. [2024-05-08 01:27:07,409 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-08 01:27:07,465 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-05-08 01:27:07,505 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-08 01:27:07,506 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-08 01:27:07,506 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-08 01:27:07,508 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-08 01:27:07,529 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-08 01:27:07,562 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-08 01:27:07,574 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-08 01:27:07,576 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-08 01:27:07,588 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3576edc3, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=BOTH, mConComCheckerCriterion=SLEEP_SET, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=10, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-08 01:27:07,588 INFO L358 AbstractCegarLoop]: Starting to check reachability of 9 error locations. [2024-05-08 01:27:07,633 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting P1Err0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-08 01:27:07,634 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-08 01:27:07,634 INFO L85 PathProgramCache]: Analyzing trace with hash -473435376, now seen corresponding path program 1 times [2024-05-08 01:27:07,642 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-08 01:27:07,643 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1578342142] [2024-05-08 01:27:07,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:07,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:07,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:27:08,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:27:08,243 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-08 01:27:08,243 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1578342142] [2024-05-08 01:27:08,243 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1578342142] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-08 01:27:08,244 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-08 01:27:08,244 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-05-08 01:27:08,245 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1296992286] [2024-05-08 01:27:08,245 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-08 01:27:08,248 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-05-08 01:27:08,249 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-08 01:27:08,284 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-05-08 01:27:08,285 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-08 01:27:08,285 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-08 01:27:08,287 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-08 01:27:08,288 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 35.5) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-08 01:27:08,288 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-08 01:27:08,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-08 01:27:08,379 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-05-08 01:27:08,379 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting P3Err0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-08 01:27:08,379 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-08 01:27:08,380 INFO L85 PathProgramCache]: Analyzing trace with hash 1328763423, now seen corresponding path program 1 times [2024-05-08 01:27:08,380 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-08 01:27:08,380 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1503138944] [2024-05-08 01:27:08,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:08,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:08,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:27:09,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:27:09,069 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-08 01:27:09,069 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1503138944] [2024-05-08 01:27:09,069 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1503138944] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-08 01:27:09,069 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-08 01:27:09,069 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-05-08 01:27:09,069 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [872471161] [2024-05-08 01:27:09,070 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-08 01:27:09,071 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-05-08 01:27:09,072 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-08 01:27:09,085 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-08 01:27:09,086 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-05-08 01:27:09,086 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-08 01:27:09,086 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-08 01:27:09,086 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 25.0) internal successors, (100), 5 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-08 01:27:09,087 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-08 01:27:09,087 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-08 01:27:09,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-08 01:27:09,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-08 01:27:09,217 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-05-08 01:27:09,217 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-08 01:27:09,217 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-08 01:27:09,218 INFO L85 PathProgramCache]: Analyzing trace with hash -171576917, now seen corresponding path program 1 times [2024-05-08 01:27:09,218 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-08 01:27:09,218 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1597617999] [2024-05-08 01:27:09,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:09,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:09,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:27:09,801 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:27:09,801 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-08 01:27:09,801 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1597617999] [2024-05-08 01:27:09,802 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1597617999] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-08 01:27:09,802 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-08 01:27:09,802 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-05-08 01:27:09,802 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [830339303] [2024-05-08 01:27:09,802 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-08 01:27:09,803 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-05-08 01:27:09,803 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-08 01:27:09,820 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-05-08 01:27:09,821 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-05-08 01:27:09,821 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-08 01:27:09,821 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-08 01:27:09,821 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 13.555555555555555) internal successors, (122), 9 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-08 01:27:09,821 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-08 01:27:09,821 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-08 01:27:09,821 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-08 01:27:10,136 INFO L85 PathProgramCache]: Analyzing trace with hash 170047589, now seen corresponding path program 1 times [2024-05-08 01:27:10,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:10,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:10,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:10,204 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:27:10,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:10,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-08 01:27:10,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-08 01:27:10,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-08 01:27:10,378 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,SelfDestructingSolverStorable2 [2024-05-08 01:27:10,378 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-08 01:27:10,379 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-08 01:27:10,379 INFO L85 PathProgramCache]: Analyzing trace with hash 1569350757, now seen corresponding path program 1 times [2024-05-08 01:27:10,380 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-08 01:27:10,382 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773629286] [2024-05-08 01:27:10,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:10,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:10,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:27:12,576 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:27:12,576 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-08 01:27:12,576 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [773629286] [2024-05-08 01:27:12,576 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [773629286] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-08 01:27:12,577 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-08 01:27:12,577 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2024-05-08 01:27:12,579 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1246259406] [2024-05-08 01:27:12,580 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-08 01:27:12,581 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-05-08 01:27:12,581 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-08 01:27:12,857 INFO L85 PathProgramCache]: Analyzing trace with hash 170047589, now seen corresponding path program 2 times [2024-05-08 01:27:12,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:12,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:12,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:12,924 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:27:12,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:12,997 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-05-08 01:27:12,997 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=195, Unknown=0, NotChecked=0, Total=240 [2024-05-08 01:27:12,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-08 01:27:12,997 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-08 01:27:12,998 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 8.466666666666667) internal successors, (127), 15 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-08 01:27:12,998 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-08 01:27:12,998 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-08 01:27:12,998 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-08 01:27:12,998 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-08 01:27:13,646 INFO L85 PathProgramCache]: Analyzing trace with hash 170047589, now seen corresponding path program 3 times [2024-05-08 01:27:13,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:13,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:13,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:13,735 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:27:13,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:14,111 INFO L85 PathProgramCache]: Analyzing trace with hash -1907789156, now seen corresponding path program 1 times [2024-05-08 01:27:14,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:14,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:14,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:14,180 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:27:14,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:14,511 INFO L85 PathProgramCache]: Analyzing trace with hash -1114903004, now seen corresponding path program 1 times [2024-05-08 01:27:14,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:14,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:14,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:14,565 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:27:14,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:22,940 INFO L85 PathProgramCache]: Analyzing trace with hash -1441282846, now seen corresponding path program 1 times [2024-05-08 01:27:22,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:22,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:23,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:27:23,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:27:23,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:23,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:23,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:27:23,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:27:23,489 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-08 01:27:23,489 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-05-08 01:27:23,762 INFO L85 PathProgramCache]: Analyzing trace with hash 170047589, now seen corresponding path program 4 times [2024-05-08 01:27:23,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:23,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:23,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:23,806 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:27:23,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:24,125 INFO L85 PathProgramCache]: Analyzing trace with hash -1907789156, now seen corresponding path program 2 times [2024-05-08 01:27:24,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:24,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:24,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:24,188 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:27:24,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:24,465 INFO L85 PathProgramCache]: Analyzing trace with hash -1114903004, now seen corresponding path program 2 times [2024-05-08 01:27:24,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:27:24,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:27:24,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:27:24,542 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:27:24,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:18,519 INFO L85 PathProgramCache]: Analyzing trace with hash 1529648468, now seen corresponding path program 1 times [2024-05-08 01:28:18,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:18,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:18,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:18,588 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:28:18,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:19,808 INFO L85 PathProgramCache]: Analyzing trace with hash -1474677082, now seen corresponding path program 1 times [2024-05-08 01:28:19,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:19,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:19,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:19,835 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:28:19,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:20,809 INFO L85 PathProgramCache]: Analyzing trace with hash -47570171, now seen corresponding path program 1 times [2024-05-08 01:28:20,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:20,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:20,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:20,847 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:28:20,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:22,021 INFO L85 PathProgramCache]: Analyzing trace with hash -1941197045, now seen corresponding path program 1 times [2024-05-08 01:28:22,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:22,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:22,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:22,046 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:28:22,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:22,960 INFO L85 PathProgramCache]: Analyzing trace with hash -2140829173, now seen corresponding path program 1 times [2024-05-08 01:28:22,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:22,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:22,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:22,991 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:28:23,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:23,964 INFO L85 PathProgramCache]: Analyzing trace with hash 69488390, now seen corresponding path program 1 times [2024-05-08 01:28:23,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:23,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:23,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:23,988 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:28:24,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:24,860 INFO L85 PathProgramCache]: Analyzing trace with hash -1521779111, now seen corresponding path program 1 times [2024-05-08 01:28:24,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:24,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:24,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:24,886 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:28:24,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:25,621 INFO L85 PathProgramCache]: Analyzing trace with hash 1336383750, now seen corresponding path program 1 times [2024-05-08 01:28:25,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:25,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:25,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:25,654 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:28:25,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:38,744 INFO L85 PathProgramCache]: Analyzing trace with hash -573443538, now seen corresponding path program 1 times [2024-05-08 01:28:38,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:38,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:38,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:38,776 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:28:38,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:40,060 INFO L85 PathProgramCache]: Analyzing trace with hash -1958160756, now seen corresponding path program 1 times [2024-05-08 01:28:40,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:40,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:40,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:40,082 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:28:40,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:28:44,583 INFO L85 PathProgramCache]: Analyzing trace with hash -1832749451, now seen corresponding path program 1 times [2024-05-08 01:28:44,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:44,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:44,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:28:44,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:28:44,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:44,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:44,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:28:44,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:28:44,747 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-08 01:28:44,747 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2024-05-08 01:28:47,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-08 01:28:47,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-08 01:28:47,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-08 01:28:47,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-08 01:28:47,320 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,SelfDestructingSolverStorable4,SelfDestructingSolverStorable18,SelfDestructingSolverStorable19,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable10,SelfDestructingSolverStorable21,SelfDestructingSolverStorable11,SelfDestructingSolverStorable22,SelfDestructingSolverStorable12,SelfDestructingSolverStorable23,SelfDestructingSolverStorable9,SelfDestructingSolverStorable13,SelfDestructingSolverStorable24,SelfDestructingSolverStorable14,SelfDestructingSolverStorable25,SelfDestructingSolverStorable15,SelfDestructingSolverStorable16,SelfDestructingSolverStorable17 [2024-05-08 01:28:47,320 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-08 01:28:47,321 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-08 01:28:47,321 INFO L85 PathProgramCache]: Analyzing trace with hash -703583711, now seen corresponding path program 2 times [2024-05-08 01:28:47,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-08 01:28:47,321 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [539867003] [2024-05-08 01:28:47,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:47,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:47,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:28:52,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:28:52,335 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-08 01:28:52,336 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [539867003] [2024-05-08 01:28:52,336 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [539867003] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-08 01:28:52,336 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-08 01:28:52,336 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2024-05-08 01:28:52,336 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [806611611] [2024-05-08 01:28:52,336 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-08 01:28:52,336 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-05-08 01:28:52,336 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-08 01:28:54,071 INFO L85 PathProgramCache]: Analyzing trace with hash -1832749451, now seen corresponding path program 2 times [2024-05-08 01:28:54,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:54,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:54,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:28:54,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:28:54,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:28:54,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:28:54,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:28:54,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:28:54,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-05-08 01:28:54,257 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2024-05-08 01:28:54,257 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-08 01:28:54,257 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-08 01:28:54,257 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 16 states have (on average 12.8125) internal successors, (205), 17 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-08 01:28:54,257 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-08 01:28:54,257 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-08 01:28:54,257 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-08 01:28:54,257 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-05-08 01:28:54,257 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-08 01:29:21,319 INFO L85 PathProgramCache]: Analyzing trace with hash -1087229858, now seen corresponding path program 1 times [2024-05-08 01:29:21,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:29:21,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:29:21,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:29:22,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:29:22,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:29:22,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:29:22,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-08 01:29:23,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-08 01:29:23,102 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-05-08 01:29:23,102 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=293, Unknown=0, NotChecked=0, Total=380 [2024-05-08 01:31:40,028 INFO L85 PathProgramCache]: Analyzing trace with hash 934269768, now seen corresponding path program 1 times [2024-05-08 01:31:40,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:31:40,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:31:40,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:40,045 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:31:40,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:42,210 INFO L85 PathProgramCache]: Analyzing trace with hash 185102409, now seen corresponding path program 1 times [2024-05-08 01:31:42,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:31:42,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:31:42,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:42,261 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:31:42,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:44,905 INFO L85 PathProgramCache]: Analyzing trace with hash 746033702, now seen corresponding path program 1 times [2024-05-08 01:31:44,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:31:44,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:31:44,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:44,925 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:31:44,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:47,193 INFO L85 PathProgramCache]: Analyzing trace with hash 162701384, now seen corresponding path program 1 times [2024-05-08 01:31:47,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:31:47,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:31:47,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:47,208 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:31:47,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:49,277 INFO L85 PathProgramCache]: Analyzing trace with hash 1806437783, now seen corresponding path program 1 times [2024-05-08 01:31:49,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:31:49,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:31:49,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:49,293 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:31:49,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:51,285 INFO L85 PathProgramCache]: Analyzing trace with hash -80134803, now seen corresponding path program 1 times [2024-05-08 01:31:51,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:31:51,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:31:51,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:51,303 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:31:51,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:53,013 INFO L85 PathProgramCache]: Analyzing trace with hash -2080710371, now seen corresponding path program 1 times [2024-05-08 01:31:53,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:31:53,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:31:53,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:53,037 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:31:53,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:54,644 INFO L85 PathProgramCache]: Analyzing trace with hash 1872622760, now seen corresponding path program 1 times [2024-05-08 01:31:54,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:31:54,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:31:54,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:54,660 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:31:54,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:56,387 INFO L85 PathProgramCache]: Analyzing trace with hash -355233813, now seen corresponding path program 1 times [2024-05-08 01:31:56,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:31:56,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:31:56,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:56,422 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:31:56,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:58,079 INFO L85 PathProgramCache]: Analyzing trace with hash 1789749416, now seen corresponding path program 1 times [2024-05-08 01:31:58,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:31:58,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:31:58,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:31:58,117 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:31:58,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:32:12,799 INFO L85 PathProgramCache]: Analyzing trace with hash -447700243, now seen corresponding path program 1 times [2024-05-08 01:32:12,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:32:12,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:32:12,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:32:12,830 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:32:12,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:32:14,638 INFO L85 PathProgramCache]: Analyzing trace with hash -743183698, now seen corresponding path program 1 times [2024-05-08 01:32:14,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:32:14,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:32:14,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:32:14,652 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:32:14,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:32:30,689 INFO L85 PathProgramCache]: Analyzing trace with hash -658068281, now seen corresponding path program 1 times [2024-05-08 01:32:30,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:32:30,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:32:30,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:32:30,704 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:32:30,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:32:50,927 INFO L85 PathProgramCache]: Analyzing trace with hash -1939021364, now seen corresponding path program 1 times [2024-05-08 01:32:50,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:32:50,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:32:50,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:32:50,961 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:32:50,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:02,054 INFO L85 PathProgramCache]: Analyzing trace with hash -5658338, now seen corresponding path program 1 times [2024-05-08 01:33:02,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:33:02,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:33:02,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:02,077 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:33:02,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:03,184 INFO L85 PathProgramCache]: Analyzing trace with hash -415821690, now seen corresponding path program 1 times [2024-05-08 01:33:03,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:33:03,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:33:03,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:03,216 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:33:03,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:04,151 INFO L85 PathProgramCache]: Analyzing trace with hash -567600563, now seen corresponding path program 1 times [2024-05-08 01:33:04,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:33:04,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:33:04,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:04,196 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:33:04,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:05,134 INFO L85 PathProgramCache]: Analyzing trace with hash 1228620801, now seen corresponding path program 1 times [2024-05-08 01:33:05,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:33:05,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:33:05,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:05,159 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:33:05,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:05,963 INFO L85 PathProgramCache]: Analyzing trace with hash 593824967, now seen corresponding path program 1 times [2024-05-08 01:33:05,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:33:05,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:33:05,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:05,987 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:33:06,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:06,982 INFO L85 PathProgramCache]: Analyzing trace with hash -535031130, now seen corresponding path program 1 times [2024-05-08 01:33:06,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:33:06,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:33:07,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:07,004 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:33:07,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:07,083 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-08 01:33:07,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-08 01:33:07,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-08 01:33:07,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-08 01:33:07,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-08 01:33:07,084 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,SelfDestructingSolverStorable30,SelfDestructingSolverStorable31,SelfDestructingSolverStorable32,SelfDestructingSolverStorable33,SelfDestructingSolverStorable34,SelfDestructingSolverStorable35,SelfDestructingSolverStorable36,SelfDestructingSolverStorable37,SelfDestructingSolverStorable38,SelfDestructingSolverStorable39,SelfDestructingSolverStorable40,SelfDestructingSolverStorable41,SelfDestructingSolverStorable42,SelfDestructingSolverStorable29,SelfDestructingSolverStorable43,SelfDestructingSolverStorable44,SelfDestructingSolverStorable45,SelfDestructingSolverStorable46,SelfDestructingSolverStorable47,SelfDestructingSolverStorable26,SelfDestructingSolverStorable48,SelfDestructingSolverStorable27,SelfDestructingSolverStorable49,SelfDestructingSolverStorable28 [2024-05-08 01:33:07,084 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-08 01:33:07,084 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-08 01:33:07,084 INFO L85 PathProgramCache]: Analyzing trace with hash 1098035429, now seen corresponding path program 3 times [2024-05-08 01:33:07,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-08 01:33:07,085 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527753] [2024-05-08 01:33:07,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-08 01:33:07,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-08 01:33:07,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:07,133 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-08 01:33:07,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-08 01:33:07,192 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-05-08 01:33:07,192 INFO L363 BasicCegarLoop]: Counterexample is feasible [2024-05-08 01:33:07,193 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (8 of 9 remaining) [2024-05-08 01:33:07,194 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P1Err0ASSERT_VIOLATIONERROR_FUNCTION (7 of 9 remaining) [2024-05-08 01:33:07,194 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P3Err0ASSERT_VIOLATIONERROR_FUNCTION (6 of 9 remaining) [2024-05-08 01:33:07,194 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (5 of 9 remaining) [2024-05-08 01:33:07,195 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (4 of 9 remaining) [2024-05-08 01:33:07,195 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 9 remaining) [2024-05-08 01:33:07,195 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 9 remaining) [2024-05-08 01:33:07,195 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P1Err0ASSERT_VIOLATIONERROR_FUNCTION (1 of 9 remaining) [2024-05-08 01:33:07,195 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P3Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 9 remaining) [2024-05-08 01:33:07,195 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-05-08 01:33:07,199 INFO L448 BasicCegarLoop]: Path program histogram: [4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-08 01:33:07,203 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-08 01:33:07,203 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-08 01:33:07,314 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre7 could not be translated [2024-05-08 01:33:07,315 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre9 could not be translated [2024-05-08 01:33:07,321 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre11 could not be translated [2024-05-08 01:33:07,323 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre13 could not be translated [2024-05-08 01:33:07,365 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.05 01:33:07 BasicIcfg [2024-05-08 01:33:07,365 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-08 01:33:07,365 INFO L158 Benchmark]: Toolchain (without parser) took 361497.94ms. Allocated memory was 153.1MB in the beginning and 1.9GB in the end (delta: 1.7GB). Free memory was 79.9MB in the beginning and 1.4GB in the end (delta: -1.3GB). Peak memory consumption was 430.1MB. Max. memory is 8.0GB. [2024-05-08 01:33:07,366 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 153.1MB. Free memory was 119.6MB in the beginning and 119.5MB in the end (delta: 80.0kB). There was no memory consumed. Max. memory is 8.0GB. [2024-05-08 01:33:07,366 INFO L158 Benchmark]: CACSL2BoogieTranslator took 575.25ms. Allocated memory was 153.1MB in the beginning and 224.4MB in the end (delta: 71.3MB). Free memory was 79.7MB in the beginning and 179.4MB in the end (delta: -99.7MB). Peak memory consumption was 24.4MB. Max. memory is 8.0GB. [2024-05-08 01:33:07,366 INFO L158 Benchmark]: Boogie Procedure Inliner took 67.95ms. Allocated memory is still 224.4MB. Free memory was 179.4MB in the beginning and 175.4MB in the end (delta: 4.0MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. [2024-05-08 01:33:07,366 INFO L158 Benchmark]: Boogie Preprocessor took 34.35ms. Allocated memory is still 224.4MB. Free memory was 175.4MB in the beginning and 172.1MB in the end (delta: 3.3MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. [2024-05-08 01:33:07,368 INFO L158 Benchmark]: RCFGBuilder took 838.37ms. Allocated memory is still 224.4MB. Free memory was 172.1MB in the beginning and 171.3MB in the end (delta: 806.0kB). Peak memory consumption was 77.0MB. Max. memory is 8.0GB. [2024-05-08 01:33:07,369 INFO L158 Benchmark]: TraceAbstraction took 359975.05ms. Allocated memory was 224.4MB in the beginning and 1.9GB in the end (delta: 1.6GB). Free memory was 170.3MB in the beginning and 1.4GB in the end (delta: -1.2GB). Peak memory consumption was 448.4MB. Max. memory is 8.0GB. [2024-05-08 01:33:07,370 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 153.1MB. Free memory was 119.6MB in the beginning and 119.5MB in the end (delta: 80.0kB). There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 575.25ms. Allocated memory was 153.1MB in the beginning and 224.4MB in the end (delta: 71.3MB). Free memory was 79.7MB in the beginning and 179.4MB in the end (delta: -99.7MB). Peak memory consumption was 24.4MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 67.95ms. Allocated memory is still 224.4MB. Free memory was 179.4MB in the beginning and 175.4MB in the end (delta: 4.0MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. * Boogie Preprocessor took 34.35ms. Allocated memory is still 224.4MB. Free memory was 175.4MB in the beginning and 172.1MB in the end (delta: 3.3MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. * RCFGBuilder took 838.37ms. Allocated memory is still 224.4MB. Free memory was 172.1MB in the beginning and 171.3MB in the end (delta: 806.0kB). Peak memory consumption was 77.0MB. Max. memory is 8.0GB. * TraceAbstraction took 359975.05ms. Allocated memory was 224.4MB in the beginning and 1.9GB in the end (delta: 1.6GB). Free memory was 170.3MB in the beginning and 1.4GB in the end (delta: -1.2GB). Peak memory consumption was 448.4MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre7 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre9 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre11 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre13 could not be translated - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 270224, independent: 265028, independent conditional: 264950, independent unconditional: 78, dependent: 5196, dependent conditional: 5196, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 270076, independent: 265028, independent conditional: 264950, independent unconditional: 78, dependent: 5048, dependent conditional: 5048, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 270076, independent: 265028, independent conditional: 264950, independent unconditional: 78, dependent: 5048, dependent conditional: 5048, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 270076, independent: 265028, independent conditional: 264950, independent unconditional: 78, dependent: 5048, dependent conditional: 5048, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 287330, independent: 265028, independent conditional: 128595, independent unconditional: 136433, dependent: 22302, dependent conditional: 17261, dependent unconditional: 5041, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 287330, independent: 265028, independent conditional: 73405, independent unconditional: 191623, dependent: 22302, dependent conditional: 8594, dependent unconditional: 13708, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 287330, independent: 265028, independent conditional: 73405, independent unconditional: 191623, dependent: 22302, dependent conditional: 8594, dependent unconditional: 13708, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1469, independent: 1398, independent conditional: 379, independent unconditional: 1019, dependent: 71, dependent conditional: 49, dependent unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1469, independent: 1355, independent conditional: 0, independent unconditional: 1355, dependent: 114, dependent conditional: 0, dependent unconditional: 114, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 114, independent: 43, independent conditional: 37, independent unconditional: 6, dependent: 71, dependent conditional: 49, dependent unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 114, independent: 43, independent conditional: 37, independent unconditional: 6, dependent: 71, dependent conditional: 49, dependent unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 861, independent: 135, independent conditional: 132, independent unconditional: 3, dependent: 726, dependent conditional: 562, dependent unconditional: 163, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 287330, independent: 263630, independent conditional: 73026, independent unconditional: 190604, dependent: 22231, dependent conditional: 8545, dependent unconditional: 13686, unknown: 1469, unknown conditional: 428, unknown unconditional: 1041] , Statistics on independence cache: Total cache size (in pairs): 1469, Positive cache size: 1398, Positive conditional cache size: 379, Positive unconditional cache size: 1019, Negative cache size: 71, Negative conditional cache size: 49, Negative unconditional cache size: 22, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 63857, Maximal queried relation: 7, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 287330, independent: 265028, independent conditional: 128595, independent unconditional: 136433, dependent: 22302, dependent conditional: 17261, dependent unconditional: 5041, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 287330, independent: 265028, independent conditional: 73405, independent unconditional: 191623, dependent: 22302, dependent conditional: 8594, dependent unconditional: 13708, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 287330, independent: 265028, independent conditional: 73405, independent unconditional: 191623, dependent: 22302, dependent conditional: 8594, dependent unconditional: 13708, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1469, independent: 1398, independent conditional: 379, independent unconditional: 1019, dependent: 71, dependent conditional: 49, dependent unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1469, independent: 1355, independent conditional: 0, independent unconditional: 1355, dependent: 114, dependent conditional: 0, dependent unconditional: 114, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 114, independent: 43, independent conditional: 37, independent unconditional: 6, dependent: 71, dependent conditional: 49, dependent unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 114, independent: 43, independent conditional: 37, independent unconditional: 6, dependent: 71, dependent conditional: 49, dependent unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 861, independent: 135, independent conditional: 132, independent unconditional: 3, dependent: 726, dependent conditional: 562, dependent unconditional: 163, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 287330, independent: 263630, independent conditional: 73026, independent unconditional: 190604, dependent: 22231, dependent conditional: 8545, dependent unconditional: 13686, unknown: 1469, unknown conditional: 428, unknown unconditional: 1041] , Statistics on independence cache: Total cache size (in pairs): 1469, Positive cache size: 1398, Positive conditional cache size: 379, Positive unconditional cache size: 1019, Negative cache size: 71, Negative conditional cache size: 49, Negative unconditional cache size: 22, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 63857 ], Independence queries for same thread: 148 - CounterExampleResult [Line: 18]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L710] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L712] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L714] 0 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L716] 0 int __unbuffered_p3_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0] [L718] 0 int __unbuffered_p3_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0] [L720] 0 int a = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0] [L721] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0] [L722] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0] [L724] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L725] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x=0] [L726] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x=0] [L727] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x=0] [L728] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x=0] [L729] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x=0] [L730] 0 _Bool x$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x=0] [L731] 0 _Bool x$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x=0] [L732] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x=0] [L733] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x=0] [L734] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x=0] [L735] 0 _Bool x$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x=0] [L736] 0 _Bool x$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x=0] [L737] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x=0] [L738] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x=0] [L739] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x=0] [L740] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x=0] [L741] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x=0] [L742] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0] [L744] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0] [L746] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z=0] [L747] 0 _Bool z$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z=0] [L748] 0 int z$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z=0] [L749] 0 _Bool z$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z=0] [L750] 0 _Bool z$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z=0] [L751] 0 _Bool z$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z=0] [L752] 0 _Bool z$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z=0] [L753] 0 _Bool z$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z=0] [L754] 0 _Bool z$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z=0] [L755] 0 _Bool z$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z=0] [L756] 0 _Bool z$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z=0] [L757] 0 _Bool z$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z=0] [L758] 0 _Bool z$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z=0] [L759] 0 _Bool z$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z=0] [L760] 0 int *z$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z=0] [L761] 0 int z$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z=0] [L762] 0 _Bool z$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z=0] [L763] 0 int z$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z=0] [L764] 0 _Bool z$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L765] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L766] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L920] 0 pthread_t t625; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, t625={5:0}, weak$$choice0=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L921] FCALL, FORK 0 pthread_create(&t625, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t625={5:0}, weak$$choice0=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L922] 0 pthread_t t626; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t625={5:0}, t626={6:0}, weak$$choice0=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L923] FCALL, FORK 0 pthread_create(&t626, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t625={5:0}, t626={6:0}, weak$$choice0=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L790] 2 x$w_buff1 = x$w_buff0 [L791] 2 x$w_buff0 = 2 [L792] 2 x$w_buff1_used = x$w_buff0_used [L793] 2 x$w_buff0_used = (_Bool)1 [L794] CALL 2 __VERIFIER_assert(!(x$w_buff1_used && x$w_buff0_used)) [L18] COND FALSE 2 !(!expression) [L794] RET 2 __VERIFIER_assert(!(x$w_buff1_used && x$w_buff0_used)) [L795] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L796] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L797] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L798] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L799] 2 x$r_buff1_thd4 = x$r_buff0_thd4 [L800] 2 x$r_buff0_thd2 = (_Bool)1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L803] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L804] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L805] 2 x$flush_delayed = weak$$choice2 [L806] 2 x$mem_tmp = x [L807] 2 x = !x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : x$w_buff1) [L808] 2 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)) [L809] 2 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)) [L810] 2 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used)) [L811] 2 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L812] 2 x$r_buff0_thd2 = weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2)) [L813] 2 x$r_buff1_thd2 = weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L814] 2 __unbuffered_p1_EAX = x [L815] 2 x = x$flush_delayed ? x$mem_tmp : x [L816] 2 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L819] 2 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L924] 0 pthread_t t627; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t625={5:0}, t626={6:0}, t627={7:0}, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L925] FCALL, FORK 0 pthread_create(&t627, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t625={5:0}, t626={6:0}, t627={7:0}, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L836] 3 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L839] 3 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L842] 3 x = x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L843] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L844] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L845] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L846] 3 x$r_buff1_thd3 = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$r_buff1_thd3 [L847] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L848] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L849] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L850] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L851] 3 z$r_buff1_thd3 = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L854] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L856] 3 return 0; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L926] 0 pthread_t t628; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t625={5:0}, t626={6:0}, t627={7:0}, t628={3:0}, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L927] FCALL, FORK 0 pthread_create(&t628, ((void *)0), P3, ((void *)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t625={5:0}, t626={6:0}, t627={7:0}, t628={3:0}, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L861] 4 z$w_buff1 = z$w_buff0 [L862] 4 z$w_buff0 = 2 [L863] 4 z$w_buff1_used = z$w_buff0_used [L864] 4 z$w_buff0_used = (_Bool)1 [L865] CALL 4 __VERIFIER_assert(!(z$w_buff1_used && z$w_buff0_used)) [L18] COND FALSE 4 !(!expression) [L865] RET 4 __VERIFIER_assert(!(z$w_buff1_used && z$w_buff0_used)) [L866] 4 z$r_buff1_thd0 = z$r_buff0_thd0 [L867] 4 z$r_buff1_thd1 = z$r_buff0_thd1 [L868] 4 z$r_buff1_thd2 = z$r_buff0_thd2 [L869] 4 z$r_buff1_thd3 = z$r_buff0_thd3 [L870] 4 z$r_buff1_thd4 = z$r_buff0_thd4 [L871] 4 z$r_buff0_thd4 = (_Bool)1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0, z=1] [L874] 4 weak$$choice0 = __VERIFIER_nondet_bool() [L875] 4 weak$$choice2 = __VERIFIER_nondet_bool() [L876] 4 z$flush_delayed = weak$$choice2 [L877] 4 z$mem_tmp = z [L878] 4 z = !z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff1) [L879] 4 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff0)) [L880] 4 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff1 : z$w_buff1)) [L881] 4 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used)) [L882] 4 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) [L883] 4 z$r_buff0_thd4 = weak$$choice2 ? z$r_buff0_thd4 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$r_buff0_thd4 : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$r_buff0_thd4)) [L884] 4 z$r_buff1_thd4 = weak$$choice2 ? z$r_buff1_thd4 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$r_buff1_thd4 : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) [L885] 4 __unbuffered_p3_EAX = z [L886] 4 z = z$flush_delayed ? z$mem_tmp : z [L887] 4 z$flush_delayed = (_Bool)0 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L890] 4 __unbuffered_p3_EBX = a VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L893] 4 x = x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L894] 4 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd4 ? (_Bool)0 : x$w_buff0_used [L895] 4 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd4 || x$w_buff1_used && x$r_buff1_thd4 ? (_Bool)0 : x$w_buff1_used [L896] 4 x$r_buff0_thd4 = x$w_buff0_used && x$r_buff0_thd4 ? (_Bool)0 : x$r_buff0_thd4 [L897] 4 x$r_buff1_thd4 = x$w_buff0_used && x$r_buff0_thd4 || x$w_buff1_used && x$r_buff1_thd4 ? (_Bool)0 : x$r_buff1_thd4 [L898] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L899] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L900] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L901] 4 z$r_buff0_thd4 = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$r_buff0_thd4 [L902] 4 z$r_buff1_thd4 = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$r_buff1_thd4 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L905] 4 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L907] 4 return 0; VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L770] 1 a = 1 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=0, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L773] 1 x = 1 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L822] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L823] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L824] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L825] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L826] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=2, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L829] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=2, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L831] 2 return 0; VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=2, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L776] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L777] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L778] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L779] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L780] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=2, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L783] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=2, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L929] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t625={5:0}, t626={6:0}, t627={7:0}, t628={3:0}, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=2, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L931] CALL 0 assume_abort_if_not(main$tmp_guard0) [L3] COND FALSE 0 !(!cond) VAL [\old(cond)=1, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, cond=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=2, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L931] RET 0 assume_abort_if_not(main$tmp_guard0) [L933] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L934] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L935] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L936] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L937] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L938] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L939] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L940] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L941] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L942] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 VAL [\result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t625={5:0}, t626={6:0}, t627={7:0}, t628={3:0}, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=2, y=1, z$flush_delayed=0, z$mem_tmp=1, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L945] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L946] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L947] 0 z$flush_delayed = weak$$choice2 [L948] 0 z$mem_tmp = z [L949] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L950] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L951] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L952] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L953] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L954] 0 z$r_buff0_thd0 = weak$$choice2 ? z$r_buff0_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff0_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0)) [L955] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L956] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L957] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L958] 0 x$flush_delayed = weak$$choice2 [L959] 0 x$mem_tmp = x [L960] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L961] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L962] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L963] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L964] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L965] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L966] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L967] 0 main$tmp_guard1 = !(x == 2 && z == 2 && __unbuffered_p1_EAX == 2 && __unbuffered_p1_EBX == 0 && __unbuffered_p3_EAX == 2 && __unbuffered_p3_EBX == 0) [L968] 0 z = z$flush_delayed ? z$mem_tmp : z [L969] 0 z$flush_delayed = (_Bool)0 [L970] 0 x = x$flush_delayed ? x$mem_tmp : x [L971] 0 x$flush_delayed = (_Bool)0 VAL [\result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t625={5:0}, t626={6:0}, t627={7:0}, t628={3:0}, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=2, y=1, z$flush_delayed=0, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L973] CALL 0 __VERIFIER_assert(main$tmp_guard1) [L18] COND TRUE 0 !expression VAL [\old(expression)=0, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=2, y=1, z$flush_delayed=0, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] [L18] 0 reach_error() VAL [\old(expression)=0, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x=2, y=1, z$flush_delayed=0, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=2] - UnprovableResult [Line: 18]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 18]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 921]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 925]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 923]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 927]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 9 procedures, 193 locations, 9 error locations. Started 1 CEGAR loops. OverallTime: 359.7s, OverallIterations: 6, TraceHistogramMax: 0, PathProgramHistogramMax: 4, EmptinessCheckTime: 348.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 67, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 8.3s InterpolantComputationTime, 674 NumberOfCodeBlocks, 674 NumberOfCodeBlocksAsserted, 6 NumberOfCheckSat, 542 ConstructedInterpolants, 0 QuantifiedInterpolants, 4641 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 5 InterpolantComputations, 5 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 343.8s, ConditionalCommutativityIAIntegrations: 1, ConditionalCommutativityDFSRestarts: 3, ConditionalCommutativityConditionCalculations: 146, ConditionalCommutativityTraceChecks: 42, ConditionalCommutativityImperfectProofs: 0 RESULT: Ultimate proved your program to be incorrect! [2024-05-08 01:33:07,388 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2024-05-08 01:33:07,636 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...