/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 10 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 12:08:59,843 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 12:08:59,906 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 12:08:59,909 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 12:08:59,909 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 12:08:59,935 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 12:08:59,936 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 12:08:59,936 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 12:08:59,937 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 12:08:59,938 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 12:08:59,939 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 12:08:59,939 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 12:08:59,939 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 12:08:59,939 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 12:08:59,940 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 12:08:59,940 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 12:08:59,940 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 12:08:59,940 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 12:08:59,940 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 12:08:59,941 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 12:08:59,941 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 12:08:59,941 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 12:08:59,942 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 12:08:59,942 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 12:08:59,942 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 12:08:59,942 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 12:08:59,942 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 12:08:59,943 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 12:08:59,943 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 12:08:59,943 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 12:08:59,943 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 12:08:59,943 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 12:08:59,944 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 12:08:59,944 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 12:08:59,944 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 12:08:59,944 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 12:08:59,944 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 12:08:59,945 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 12:08:59,945 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 12:08:59,945 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 10 [2024-05-06 12:09:00,154 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 12:09:00,195 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 12:09:00,197 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 12:09:00,198 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 12:09:00,198 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 12:09:00,199 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c [2024-05-06 12:09:01,433 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 12:09:01,587 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 12:09:01,588 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c [2024-05-06 12:09:01,595 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/b0e10a9d5/46a6d85fc17c4833b33ff01c1ad0e36e/FLAG83fefec3a [2024-05-06 12:09:01,606 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/b0e10a9d5/46a6d85fc17c4833b33ff01c1ad0e36e [2024-05-06 12:09:01,607 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 12:09:01,608 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 12:09:01,609 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 12:09:01,609 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 12:09:01,613 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 12:09:01,613 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,614 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@227ad5f9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01, skipping insertion in model container [2024-05-06 12:09:01,614 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,634 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 12:09:01,765 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c[3271,3284] [2024-05-06 12:09:01,777 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 12:09:01,786 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 12:09:01,805 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c[3271,3284] [2024-05-06 12:09:01,807 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 12:09:01,813 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 12:09:01,813 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 12:09:01,819 INFO L206 MainTranslator]: Completed translation [2024-05-06 12:09:01,819 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01 WrapperNode [2024-05-06 12:09:01,819 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 12:09:01,820 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 12:09:01,820 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 12:09:01,820 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 12:09:01,825 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,833 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,851 INFO L138 Inliner]: procedures = 27, calls = 75, calls flagged for inlining = 9, calls inlined = 9, statements flattened = 178 [2024-05-06 12:09:01,851 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 12:09:01,852 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 12:09:01,852 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 12:09:01,852 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 12:09:01,859 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,859 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,862 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,862 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,868 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,871 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,872 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,874 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,876 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 12:09:01,877 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 12:09:01,877 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 12:09:01,877 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 12:09:01,878 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01" (1/1) ... [2024-05-06 12:09:01,883 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 12:09:01,907 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 12:09:01,924 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 12:09:01,943 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 12:09:01,968 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 12:09:01,968 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 12:09:01,968 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 12:09:01,968 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 12:09:01,968 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 12:09:01,969 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 12:09:01,969 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 12:09:01,969 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 12:09:01,969 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 12:09:01,969 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 12:09:01,969 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 12:09:01,971 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 12:09:01,971 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 12:09:01,971 INFO L130 BoogieDeclarations]: Found specification of procedure thread5 [2024-05-06 12:09:01,971 INFO L138 BoogieDeclarations]: Found implementation of procedure thread5 [2024-05-06 12:09:01,971 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 12:09:01,971 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 12:09:01,971 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 12:09:01,972 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 12:09:01,972 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 12:09:01,972 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 12:09:01,973 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 12:09:02,087 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 12:09:02,090 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 12:09:02,422 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 12:09:02,489 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 12:09:02,489 INFO L309 CfgBuilder]: Removed 5 assume(true) statements. [2024-05-06 12:09:02,490 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 12:09:02 BoogieIcfgContainer [2024-05-06 12:09:02,490 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 12:09:02,492 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 12:09:02,492 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 12:09:02,494 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 12:09:02,494 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 12:09:01" (1/3) ... [2024-05-06 12:09:02,495 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1ebd19b5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 12:09:02, skipping insertion in model container [2024-05-06 12:09:02,495 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:09:01" (2/3) ... [2024-05-06 12:09:02,495 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1ebd19b5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 12:09:02, skipping insertion in model container [2024-05-06 12:09:02,495 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 12:09:02" (3/3) ... [2024-05-06 12:09:02,496 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-min-max-inc-dec.wvr.c [2024-05-06 12:09:02,502 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 12:09:02,508 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 12:09:02,508 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 12:09:02,508 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 12:09:02,585 INFO L144 ThreadInstanceAdder]: Constructed 5 joinOtherThreadTransitions. [2024-05-06 12:09:02,630 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 12:09:02,630 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 12:09:02,630 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 12:09:02,633 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 12:09:02,641 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 12:09:02,674 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 12:09:02,692 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 12:09:02,693 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 12:09:02,700 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@a1b8672, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=10, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 12:09:02,700 INFO L358 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2024-05-06 12:09:03,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 12:09:03,159 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:03,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 12:09:03,189 INFO L85 PathProgramCache]: Analyzing trace with hash 285893693, now seen corresponding path program 1 times [2024-05-06 12:09:03,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:03,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:03,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:03,463 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 12:09:03,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:03,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:03,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:03,533 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 12:09:03,557 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 12:09:03,558 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 12:09:03,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 12:09:03,724 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:03,724 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 12:09:03,744 INFO L85 PathProgramCache]: Analyzing trace with hash 37769194, now seen corresponding path program 1 times [2024-05-06 12:09:03,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:03,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:03,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:04,129 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:09:04,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:04,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:04,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:04,374 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:09:04,375 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 12:09:04,375 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-05-06 12:09:04,652 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 12:09:04,664 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:04,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 12:09:04,687 INFO L85 PathProgramCache]: Analyzing trace with hash 1283129111, now seen corresponding path program 1 times [2024-05-06 12:09:04,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:04,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:04,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:04,924 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:09:04,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:04,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:04,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:05,211 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:09:05,254 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:05,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:07,359 INFO L85 PathProgramCache]: Analyzing trace with hash -650050623, now seen corresponding path program 1 times [2024-05-06 12:09:07,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:07,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:07,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:07,593 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:09:07,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:07,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:07,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:07,770 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:09:07,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 12:09:07,861 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:07,861 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 12:09:07,878 INFO L85 PathProgramCache]: Analyzing trace with hash -1510575009, now seen corresponding path program 2 times [2024-05-06 12:09:07,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:07,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:07,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:08,026 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:08,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:08,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:08,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:08,159 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:08,193 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:08,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:10,306 INFO L85 PathProgramCache]: Analyzing trace with hash -2094717341, now seen corresponding path program 2 times [2024-05-06 12:09:10,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:10,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:10,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:10,584 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:10,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:10,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:10,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:10,718 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:10,755 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:10,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:12,838 INFO L85 PathProgramCache]: Analyzing trace with hash 843536889, now seen corresponding path program 1 times [2024-05-06 12:09:12,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:12,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:12,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:12,993 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:12,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:12,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:13,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:13,118 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:13,191 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 12:09:13,196 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:13,197 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 12:09:13,215 INFO L85 PathProgramCache]: Analyzing trace with hash 379840377, now seen corresponding path program 2 times [2024-05-06 12:09:13,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:13,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:13,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:13,334 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:13,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:13,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:13,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:13,506 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:13,539 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:13,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:15,636 INFO L85 PathProgramCache]: Analyzing trace with hash -1109849604, now seen corresponding path program 3 times [2024-05-06 12:09:15,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:15,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:15,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:15,791 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:15,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:15,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:15,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:15,920 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:15,951 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:15,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:18,021 INFO L85 PathProgramCache]: Analyzing trace with hash 771765853, now seen corresponding path program 4 times [2024-05-06 12:09:18,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:18,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:18,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:18,222 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:18,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:18,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:18,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:18,372 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:18,414 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:18,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:20,483 INFO L85 PathProgramCache]: Analyzing trace with hash 165758182, now seen corresponding path program 5 times [2024-05-06 12:09:20,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:20,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:20,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:20,597 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:20,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:20,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:20,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:20,715 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:20,746 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:20,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:22,819 INFO L85 PathProgramCache]: Analyzing trace with hash 420989019, now seen corresponding path program 6 times [2024-05-06 12:09:22,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:22,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:22,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:22,991 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:22,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:22,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:23,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:23,100 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:23,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 12:09:23,179 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:23,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 12:09:23,197 INFO L85 PathProgramCache]: Analyzing trace with hash -464365891, now seen corresponding path program 7 times [2024-05-06 12:09:23,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:23,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:23,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:23,304 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:23,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:23,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:23,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:23,409 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:23,438 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:23,438 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:25,486 INFO L85 PathProgramCache]: Analyzing trace with hash -464365891, now seen corresponding path program 8 times [2024-05-06 12:09:25,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:25,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:25,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:25,632 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:25,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:25,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:25,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:25,744 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:25,777 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:25,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:27,855 INFO L85 PathProgramCache]: Analyzing trace with hash 857953915, now seen corresponding path program 1 times [2024-05-06 12:09:27,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:27,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:27,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:27,962 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:27,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:27,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:27,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:28,140 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:28,172 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:28,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:30,243 INFO L85 PathProgramCache]: Analyzing trace with hash 858959909, now seen corresponding path program 1 times [2024-05-06 12:09:30,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:30,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:30,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:30,371 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:30,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:30,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:30,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:30,473 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:30,502 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:30,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:32,558 INFO L85 PathProgramCache]: Analyzing trace with hash -665028291, now seen corresponding path program 1 times [2024-05-06 12:09:32,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:32,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:32,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:32,666 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:32,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:32,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:32,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:32,773 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:32,803 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:32,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:34,931 INFO L85 PathProgramCache]: Analyzing trace with hash 1086926119, now seen corresponding path program 1 times [2024-05-06 12:09:34,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:34,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:34,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:35,041 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:35,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:35,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:35,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:35,160 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:35,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 12:09:35,252 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:35,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 12:09:35,267 INFO L85 PathProgramCache]: Analyzing trace with hash 57592259, now seen corresponding path program 1 times [2024-05-06 12:09:35,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:35,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:35,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:35,381 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:35,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:35,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:35,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:35,490 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:35,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 12:09:35,564 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:35,564 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 12:09:35,580 INFO L85 PathProgramCache]: Analyzing trace with hash 400666163, now seen corresponding path program 2 times [2024-05-06 12:09:35,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:35,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:35,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:35,732 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:35,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:35,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:35,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:35,838 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:35,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 12:09:35,925 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:35,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 12:09:35,940 INFO L85 PathProgramCache]: Analyzing trace with hash -1886042796, now seen corresponding path program 1 times [2024-05-06 12:09:35,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:35,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:35,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:36,046 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:36,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:36,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:36,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:36,158 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:36,234 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 12:09:36,238 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:36,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 12:09:36,254 INFO L85 PathProgramCache]: Analyzing trace with hash -1511097342, now seen corresponding path program 2 times [2024-05-06 12:09:36,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:36,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:36,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:36,398 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:36,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:36,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:36,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:36,494 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:36,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 12:09:36,728 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:36,729 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 12:09:38,793 INFO L85 PathProgramCache]: Analyzing trace with hash -1182200329, now seen corresponding path program 1 times [2024-05-06 12:09:38,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:38,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:38,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:38,883 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:09:38,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:38,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:38,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:38,971 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:09:39,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 12:09:39,059 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:39,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 12:09:41,107 INFO L85 PathProgramCache]: Analyzing trace with hash 503740205, now seen corresponding path program 2 times [2024-05-06 12:09:41,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:41,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:41,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:41,256 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:09:41,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:41,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:41,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:41,346 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:09:41,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 12:09:41,429 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:41,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 12:09:41,484 INFO L85 PathProgramCache]: Analyzing trace with hash -1066082532, now seen corresponding path program 3 times [2024-05-06 12:09:41,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:41,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:41,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:41,580 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:09:41,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:41,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:41,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:41,669 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:09:41,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 12:09:41,745 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:41,746 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 12:09:43,828 INFO L85 PathProgramCache]: Analyzing trace with hash -720350508, now seen corresponding path program 4 times [2024-05-06 12:09:43,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:43,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:43,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:43,990 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:09:43,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:43,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:44,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:44,117 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:09:44,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 12:09:44,189 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:44,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 12:09:46,232 INFO L85 PathProgramCache]: Analyzing trace with hash -247720171, now seen corresponding path program 5 times [2024-05-06 12:09:46,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:46,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:46,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:46,333 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:09:46,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:46,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:46,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:46,439 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:09:46,505 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 12:09:46,510 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:46,510 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 12:09:48,560 INFO L85 PathProgramCache]: Analyzing trace with hash -1998435377, now seen corresponding path program 6 times [2024-05-06 12:09:48,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:48,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:48,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:48,653 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:09:48,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:48,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:48,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:48,802 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:09:48,874 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 12:09:48,879 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:48,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 12:09:48,997 INFO L85 PathProgramCache]: Analyzing trace with hash 1082862906, now seen corresponding path program 7 times [2024-05-06 12:09:48,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:48,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:49,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:49,097 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:09:49,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:49,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:49,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:49,187 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:09:49,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 12:09:49,260 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:49,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 12:09:51,316 INFO L85 PathProgramCache]: Analyzing trace with hash 1876077550, now seen corresponding path program 8 times [2024-05-06 12:09:51,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:51,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:51,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:51,402 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:09:51,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:51,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:51,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:51,488 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:09:51,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 12:09:51,559 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:51,560 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 12:09:53,608 INFO L85 PathProgramCache]: Analyzing trace with hash 1912757035, now seen corresponding path program 9 times [2024-05-06 12:09:53,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:53,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:53,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:53,805 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:09:53,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:53,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:53,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:53,896 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:09:53,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 12:09:53,995 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:09:53,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 12:09:56,050 INFO L85 PathProgramCache]: Analyzing trace with hash 321175218, now seen corresponding path program 10 times [2024-05-06 12:09:56,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:56,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:56,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:56,145 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:56,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:56,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:56,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:56,239 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:56,275 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:56,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:09:58,339 INFO L85 PathProgramCache]: Analyzing trace with hash 1693891199, now seen corresponding path program 3 times [2024-05-06 12:09:58,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:58,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:58,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:58,451 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:58,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:09:58,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:09:58,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:09:58,655 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:09:58,777 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:09:58,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:10:00,835 INFO L85 PathProgramCache]: Analyzing trace with hash 2141365718, now seen corresponding path program 1 times [2024-05-06 12:10:00,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:00,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:00,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:00,961 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:00,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:00,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:00,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:01,090 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:01,134 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:01,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:10:03,218 INFO L85 PathProgramCache]: Analyzing trace with hash 1850830520, now seen corresponding path program 2 times [2024-05-06 12:10:03,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:03,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:03,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:03,305 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:03,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:03,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:03,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:03,472 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:03,685 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:03,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:10:05,744 INFO L85 PathProgramCache]: Analyzing trace with hash -439257014, now seen corresponding path program 3 times [2024-05-06 12:10:05,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:05,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:05,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:05,876 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:05,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:05,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:05,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:05,997 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:06,087 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:06,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:10:08,162 INFO L85 PathProgramCache]: Analyzing trace with hash -1137976413, now seen corresponding path program 1 times [2024-05-06 12:10:08,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:08,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:08,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:08,313 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:08,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:08,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:08,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:08,430 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:08,467 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:08,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:10:10,526 INFO L85 PathProgramCache]: Analyzing trace with hash 731910341, now seen corresponding path program 2 times [2024-05-06 12:10:10,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:10,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:10,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:10,630 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:10,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:10,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:10,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:10,718 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:10,921 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:10,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:10:12,995 INFO L85 PathProgramCache]: Analyzing trace with hash -2114697379, now seen corresponding path program 3 times [2024-05-06 12:10:12,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:12,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:13,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:13,109 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:13,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:13,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:13,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:13,315 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:13,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 12:10:13,507 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:13,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 12:10:13,552 INFO L85 PathProgramCache]: Analyzing trace with hash 1388270714, now seen corresponding path program 1 times [2024-05-06 12:10:13,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:13,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:13,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:13,624 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 12:10:13,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:13,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:13,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:13,697 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 12:10:13,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 12:10:13,793 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:13,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 12:10:15,828 INFO L85 PathProgramCache]: Analyzing trace with hash -719499116, now seen corresponding path program 2 times [2024-05-06 12:10:15,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:15,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:15,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:15,922 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 12:10:15,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:15,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:15,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:16,014 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 12:10:16,055 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 12:10:16,060 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:16,061 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 12:10:16,130 INFO L85 PathProgramCache]: Analyzing trace with hash 2000167301, now seen corresponding path program 3 times [2024-05-06 12:10:16,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:16,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:16,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:16,302 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 12:10:16,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:16,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:16,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:16,421 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 12:10:16,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 12:10:16,502 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:16,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 12:10:16,518 INFO L85 PathProgramCache]: Analyzing trace with hash 1855618507, now seen corresponding path program 1 times [2024-05-06 12:10:16,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:16,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:16,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:16,682 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:16,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:16,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:16,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:16,780 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:16,846 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 12:10:16,852 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:16,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 12:10:18,895 INFO L85 PathProgramCache]: Analyzing trace with hash 1795969507, now seen corresponding path program 2 times [2024-05-06 12:10:18,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:18,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:18,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:19,003 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:19,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:19,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:19,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:19,100 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:19,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 12:10:19,177 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:19,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 12:10:19,194 INFO L85 PathProgramCache]: Analyzing trace with hash 1038577006, now seen corresponding path program 3 times [2024-05-06 12:10:19,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:19,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:19,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:19,294 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:19,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:19,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:19,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:19,390 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:19,421 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:19,421 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:10:21,491 INFO L85 PathProgramCache]: Analyzing trace with hash -705447342, now seen corresponding path program 1 times [2024-05-06 12:10:21,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:21,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:21,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:21,679 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:21,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:21,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:21,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:21,783 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:21,867 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 12:10:21,871 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:21,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 12:10:21,886 INFO L85 PathProgramCache]: Analyzing trace with hash 1676773051, now seen corresponding path program 4 times [2024-05-06 12:10:21,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:21,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:21,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:21,979 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:21,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:21,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:21,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:22,073 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:22,107 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:22,107 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:10:24,199 INFO L85 PathProgramCache]: Analyzing trace with hash 1955705872, now seen corresponding path program 2 times [2024-05-06 12:10:24,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:24,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:24,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:24,296 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:24,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:24,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:24,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:24,400 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:24,534 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 12:10:24,539 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:24,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 12:10:24,564 INFO L85 PathProgramCache]: Analyzing trace with hash -1275710403, now seen corresponding path program 5 times [2024-05-06 12:10:24,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:24,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:24,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:24,656 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:24,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:24,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:24,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:24,751 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:24,794 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:24,794 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:10:26,848 INFO L85 PathProgramCache]: Analyzing trace with hash -642807199, now seen corresponding path program 3 times [2024-05-06 12:10:26,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:26,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:26,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:26,945 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:26,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:26,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:26,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:27,047 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:27,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 12:10:27,136 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:27,136 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 12:10:27,167 INFO L85 PathProgramCache]: Analyzing trace with hash 155679372, now seen corresponding path program 6 times [2024-05-06 12:10:27,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:27,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:27,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:27,262 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:27,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:27,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:27,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:27,426 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:27,475 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:27,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:10:29,542 INFO L85 PathProgramCache]: Analyzing trace with hash -358581537, now seen corresponding path program 4 times [2024-05-06 12:10:29,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:29,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:29,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:29,676 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:29,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:29,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:29,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:29,791 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:29,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 12:10:29,870 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:29,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 12:10:29,886 INFO L85 PathProgramCache]: Analyzing trace with hash 1013267728, now seen corresponding path program 7 times [2024-05-06 12:10:29,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:29,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:29,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:29,982 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:29,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:29,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:29,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:30,092 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:30,130 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:30,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:10:32,215 INFO L85 PathProgramCache]: Analyzing trace with hash -1049368716, now seen corresponding path program 5 times [2024-05-06 12:10:32,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:32,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:32,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:32,329 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:32,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:32,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:32,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:32,503 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:32,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 12:10:32,584 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:32,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 12:10:32,601 INFO L85 PathProgramCache]: Analyzing trace with hash 1272248793, now seen corresponding path program 8 times [2024-05-06 12:10:32,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:32,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:32,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:32,689 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:32,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:32,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:32,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:32,781 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:32,813 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:32,813 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:10:34,868 INFO L85 PathProgramCache]: Analyzing trace with hash 1930396594, now seen corresponding path program 6 times [2024-05-06 12:10:34,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:34,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:34,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:34,968 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:34,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:34,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:34,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:35,063 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:35,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 12:10:35,138 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:35,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 12:10:35,155 INFO L85 PathProgramCache]: Analyzing trace with hash -159519550, now seen corresponding path program 9 times [2024-05-06 12:10:35,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:35,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:35,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:35,293 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:35,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:35,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:35,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:35,377 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:35,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 12:10:35,448 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:35,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 12:10:37,495 INFO L85 PathProgramCache]: Analyzing trace with hash -650138170, now seen corresponding path program 10 times [2024-05-06 12:10:37,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:37,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:37,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:37,595 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:37,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:37,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:37,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:37,682 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:37,752 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 12:10:37,757 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:37,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 12:10:39,794 INFO L85 PathProgramCache]: Analyzing trace with hash -524575962, now seen corresponding path program 11 times [2024-05-06 12:10:39,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:39,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:39,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:39,884 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:39,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:39,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:39,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:39,973 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:10:40,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 12:10:40,047 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:40,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 12:10:42,084 INFO L85 PathProgramCache]: Analyzing trace with hash -1406953171, now seen corresponding path program 12 times [2024-05-06 12:10:42,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:42,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:42,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:42,234 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:42,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:42,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:42,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:42,326 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:42,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 12:10:42,397 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:42,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 12:10:42,415 INFO L85 PathProgramCache]: Analyzing trace with hash -1406953171, now seen corresponding path program 13 times [2024-05-06 12:10:42,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:42,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:42,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:42,506 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:42,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:42,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:42,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:42,597 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:10:42,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 12:10:42,670 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:42,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 12:10:44,727 INFO L85 PathProgramCache]: Analyzing trace with hash -2032111807, now seen corresponding path program 14 times [2024-05-06 12:10:44,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:44,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:44,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:44,831 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:10:44,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:44,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:44,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:44,933 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:10:45,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 12:10:45,080 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:45,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 12:10:47,128 INFO L85 PathProgramCache]: Analyzing trace with hash 46290037, now seen corresponding path program 15 times [2024-05-06 12:10:47,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:47,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:47,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:47,229 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:10:47,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:47,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:47,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:47,327 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:10:47,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 12:10:47,403 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:47,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 12:10:49,508 INFO L85 PathProgramCache]: Analyzing trace with hash 1103443637, now seen corresponding path program 16 times [2024-05-06 12:10:49,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:49,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:49,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:49,609 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:10:49,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:49,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:49,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:49,708 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:10:49,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 12:10:49,798 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:49,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 12:10:51,829 INFO L85 PathProgramCache]: Analyzing trace with hash 1815327873, now seen corresponding path program 17 times [2024-05-06 12:10:51,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:51,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:51,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:52,003 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:10:52,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:52,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:52,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:52,103 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:10:52,173 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 12:10:52,178 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:10:52,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 12:10:52,227 INFO L85 PathProgramCache]: Analyzing trace with hash -1746189313, now seen corresponding path program 18 times [2024-05-06 12:10:52,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:52,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:52,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:52,328 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:10:52,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:52,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:52,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:52,428 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:10:52,476 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:52,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:10:54,549 INFO L85 PathProgramCache]: Analyzing trace with hash -1948974476, now seen corresponding path program 1 times [2024-05-06 12:10:54,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:54,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:54,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:54,661 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:10:54,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:54,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:54,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:54,823 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:10:54,868 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:54,869 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:10:56,914 INFO L85 PathProgramCache]: Analyzing trace with hash 1530558073, now seen corresponding path program 1 times [2024-05-06 12:10:56,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:56,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:56,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:57,045 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:10:57,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:57,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:57,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:57,164 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:10:57,198 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:57,198 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:10:59,286 INFO L85 PathProgramCache]: Analyzing trace with hash 1764716819, now seen corresponding path program 2 times [2024-05-06 12:10:59,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:59,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:59,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:59,400 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:10:59,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:10:59,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:10:59,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:10:59,512 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:10:59,549 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:10:59,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:01,619 INFO L85 PathProgramCache]: Analyzing trace with hash -737780046, now seen corresponding path program 2 times [2024-05-06 12:11:01,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:01,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:01,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:01,815 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:11:01,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:01,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:01,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:01,919 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:11:01,950 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:01,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:04,017 INFO L85 PathProgramCache]: Analyzing trace with hash 1069889706, now seen corresponding path program 1 times [2024-05-06 12:11:04,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:04,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:04,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:04,126 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:04,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:04,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:04,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:04,237 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:04,296 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:04,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:06,383 INFO L85 PathProgramCache]: Analyzing trace with hash -752566168, now seen corresponding path program 2 times [2024-05-06 12:11:06,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:06,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:06,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:06,504 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:11:06,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:06,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:06,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:06,662 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:11:06,799 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:06,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:08,865 INFO L85 PathProgramCache]: Analyzing trace with hash 1413205694, now seen corresponding path program 3 times [2024-05-06 12:11:08,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:08,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:08,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:08,972 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:08,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:08,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:08,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:09,082 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:09,225 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:09,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:11,293 INFO L85 PathProgramCache]: Analyzing trace with hash -1678939921, now seen corresponding path program 4 times [2024-05-06 12:11:11,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:11,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:11,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:11,405 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:11,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:11,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:11,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:11,581 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:11,613 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:11,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:13,680 INFO L85 PathProgramCache]: Analyzing trace with hash 1216367837, now seen corresponding path program 5 times [2024-05-06 12:11:13,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:13,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:13,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:13,795 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:13,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:13,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:13,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:13,909 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:13,987 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:13,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:16,059 INFO L85 PathProgramCache]: Analyzing trace with hash 19726088, now seen corresponding path program 6 times [2024-05-06 12:11:16,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:16,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:16,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:16,170 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:16,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:16,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:16,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:16,333 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:16,478 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:16,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:18,548 INFO L85 PathProgramCache]: Analyzing trace with hash -1150352581, now seen corresponding path program 7 times [2024-05-06 12:11:18,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:18,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:18,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:18,667 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:18,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:18,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:18,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:18,785 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:18,817 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:18,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:20,886 INFO L85 PathProgramCache]: Analyzing trace with hash 790786833, now seen corresponding path program 8 times [2024-05-06 12:11:20,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:20,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:20,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:21,003 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:21,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:21,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:21,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:21,193 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:21,297 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:21,298 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:23,378 INFO L85 PathProgramCache]: Analyzing trace with hash 2037093948, now seen corresponding path program 9 times [2024-05-06 12:11:23,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:23,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:23,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:23,527 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:23,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:23,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:23,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:23,634 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:23,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 12:11:23,721 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:11:23,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 12:11:23,787 INFO L85 PathProgramCache]: Analyzing trace with hash -1088879983, now seen corresponding path program 19 times [2024-05-06 12:11:23,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:23,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:23,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:23,880 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:11:23,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:23,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:23,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:23,974 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:11:24,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 12:11:24,018 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:11:24,018 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 12:11:24,183 INFO L85 PathProgramCache]: Analyzing trace with hash 474607001, now seen corresponding path program 20 times [2024-05-06 12:11:24,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:24,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:24,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:24,284 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:11:24,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:24,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:24,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:24,390 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:11:24,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 12:11:24,433 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:11:24,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 12:11:24,498 INFO L85 PathProgramCache]: Analyzing trace with hash -1887594509, now seen corresponding path program 21 times [2024-05-06 12:11:24,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:24,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:24,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:24,600 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:11:24,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:24,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:24,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:24,698 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:11:24,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 12:11:24,744 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:11:24,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 12:11:24,808 INFO L85 PathProgramCache]: Analyzing trace with hash -639133439, now seen corresponding path program 22 times [2024-05-06 12:11:24,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:24,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:24,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:24,909 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:11:24,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:24,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:24,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:25,097 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:11:25,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 12:11:25,138 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:11:25,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 12:11:25,199 INFO L85 PathProgramCache]: Analyzing trace with hash -594777205, now seen corresponding path program 23 times [2024-05-06 12:11:25,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:25,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:25,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:25,299 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:11:25,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:25,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:25,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:25,398 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:11:25,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 12:11:25,449 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:11:25,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 12:11:25,511 INFO L85 PathProgramCache]: Analyzing trace with hash -1082374629, now seen corresponding path program 24 times [2024-05-06 12:11:25,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:25,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:25,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:25,612 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:11:25,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:25,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:25,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:25,712 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:11:25,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 12:11:25,757 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:11:25,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 12:11:25,825 INFO L85 PathProgramCache]: Analyzing trace with hash -495815119, now seen corresponding path program 25 times [2024-05-06 12:11:25,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:25,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:25,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:25,997 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:11:25,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:25,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:26,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:26,095 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:11:26,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 12:11:26,138 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:11:26,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 12:11:26,204 INFO L85 PathProgramCache]: Analyzing trace with hash 1322419288, now seen corresponding path program 26 times [2024-05-06 12:11:26,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:26,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:26,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:26,298 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:11:26,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:26,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:26,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:26,392 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:11:26,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 12:11:26,433 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 12:11:26,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 12:11:26,500 INFO L85 PathProgramCache]: Analyzing trace with hash 1995158398, now seen corresponding path program 27 times [2024-05-06 12:11:26,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:26,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:26,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:26,602 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:11:26,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:26,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:26,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:26,750 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 12:11:27,339 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:27,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:11:29,404 INFO L85 PathProgramCache]: Analyzing trace with hash -113581501, now seen corresponding path program 1 times [2024-05-06 12:11:29,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:29,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:29,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:29,608 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 12:11:29,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:29,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:29,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:29,754 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 12:11:29,764 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-05-06 12:11:29,765 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 12:11:29,766 INFO L85 PathProgramCache]: Analyzing trace with hash -159439195, now seen corresponding path program 1 times [2024-05-06 12:11:29,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 12:11:29,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [14470408] [2024-05-06 12:11:29,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:29,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:29,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:29,966 INFO L134 CoverageAnalysis]: Checked inductivity of 694 backedges. 144 proven. 2 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-05-06 12:11:29,967 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 12:11:29,967 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [14470408] [2024-05-06 12:11:29,967 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [14470408] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 12:11:29,967 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1754338166] [2024-05-06 12:11:29,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:29,967 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 12:11:29,968 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 12:11:30,002 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 12:11:30,003 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 12:11:30,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:30,484 INFO L262 TraceCheckSpWp]: Trace formula consists of 673 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-06 12:11:30,492 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 12:11:30,746 INFO L134 CoverageAnalysis]: Checked inductivity of 694 backedges. 145 proven. 1 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-05-06 12:11:30,746 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 12:11:30,953 INFO L134 CoverageAnalysis]: Checked inductivity of 694 backedges. 145 proven. 1 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-05-06 12:11:30,953 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1754338166] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 12:11:30,953 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 12:11:30,953 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 24 [2024-05-06 12:11:30,955 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [85918081] [2024-05-06 12:11:30,955 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 12:11:30,958 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-05-06 12:11:30,958 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 12:11:30,961 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-05-06 12:11:30,962 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=434, Unknown=0, NotChecked=0, Total=552 [2024-05-06 12:11:30,962 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:11:30,963 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 12:11:30,963 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 13.083333333333334) internal successors, (314), 24 states have internal predecessors, (314), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 12:11:30,963 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:11:32,039 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:32,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:34,127 INFO L85 PathProgramCache]: Analyzing trace with hash -1570213396, now seen corresponding path program 10 times [2024-05-06 12:11:34,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:34,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:34,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:34,501 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:11:34,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:34,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:34,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:34,696 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 12:11:35,634 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 12:11:35,644 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-05-06 12:11:35,839 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable180,SelfDestructingSolverStorable178,SelfDestructingSolverStorable179 [2024-05-06 12:11:35,840 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-05-06 12:11:35,840 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 12:11:35,840 INFO L85 PathProgramCache]: Analyzing trace with hash 1543240338, now seen corresponding path program 2 times [2024-05-06 12:11:35,840 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 12:11:35,840 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1442545499] [2024-05-06 12:11:35,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:35,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:35,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:36,132 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 237 proven. 15 refuted. 0 times theorem prover too weak. 451 trivial. 0 not checked. [2024-05-06 12:11:36,132 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 12:11:36,132 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1442545499] [2024-05-06 12:11:36,132 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1442545499] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 12:11:36,133 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1098028216] [2024-05-06 12:11:36,133 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 12:11:36,133 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 12:11:36,133 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 12:11:36,134 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 12:11:36,136 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 12:11:36,659 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-05-06 12:11:36,659 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 12:11:36,662 INFO L262 TraceCheckSpWp]: Trace formula consists of 359 conjuncts, 18 conjunts are in the unsatisfiable core [2024-05-06 12:11:36,667 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 12:11:36,878 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 12:11:36,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-05-06 12:11:36,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-05-06 12:11:37,198 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 703 trivial. 0 not checked. [2024-05-06 12:11:37,198 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 12:11:37,198 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1098028216] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 12:11:37,198 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 12:11:37,199 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [15] total 28 [2024-05-06 12:11:37,199 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1519474045] [2024-05-06 12:11:37,199 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 12:11:37,199 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-05-06 12:11:37,200 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 12:11:37,200 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-05-06 12:11:37,200 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=690, Unknown=0, NotChecked=0, Total=756 [2024-05-06 12:11:37,200 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:11:37,200 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 12:11:37,201 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 11.0) internal successors, (165), 15 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 12:11:37,201 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 12:11:37,201 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:11:40,466 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:40,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:42,835 INFO L85 PathProgramCache]: Analyzing trace with hash 903248153, now seen corresponding path program 1 times [2024-05-06 12:11:42,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:42,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:42,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:43,015 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 12:11:43,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:43,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:43,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:43,453 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 12:11:43,564 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:43,565 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:45,868 INFO L85 PathProgramCache]: Analyzing trace with hash 633257579, now seen corresponding path program 2 times [2024-05-06 12:11:45,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:45,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:45,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:46,079 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:11:46,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:46,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:46,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:46,260 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:11:46,362 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:46,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:48,731 INFO L85 PathProgramCache]: Analyzing trace with hash 734550161, now seen corresponding path program 3 times [2024-05-06 12:11:48,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:48,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:48,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:48,998 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:11:48,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:48,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:49,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:49,176 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:11:49,574 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:49,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:51,886 INFO L85 PathProgramCache]: Analyzing trace with hash 891979789, now seen corresponding path program 4 times [2024-05-06 12:11:51,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:51,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:51,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:52,328 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:52,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:52,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:52,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:11:52,514 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:11:52,903 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:52,904 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:11:55,228 INFO L85 PathProgramCache]: Analyzing trace with hash 1956876707, now seen corresponding path program 1 times [2024-05-06 12:11:55,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:55,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:55,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:11:55,262 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:11:55,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:11:55,432 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:55,432 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:11:57,749 INFO L85 PathProgramCache]: Analyzing trace with hash -1599381727, now seen corresponding path program 1 times [2024-05-06 12:11:57,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:11:57,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:11:57,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:11:57,812 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:11:57,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:11:57,938 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:11:57,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:12:00,251 INFO L85 PathProgramCache]: Analyzing trace with hash 1043258244, now seen corresponding path program 1 times [2024-05-06 12:12:00,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:00,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:00,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:12:00,408 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:12:00,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:12:00,578 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:00,578 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:12:02,936 INFO L85 PathProgramCache]: Analyzing trace with hash 1356116916, now seen corresponding path program 1 times [2024-05-06 12:12:02,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:02,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:02,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:03,211 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:03,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:03,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:03,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:03,356 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:03,448 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:03,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:12:05,794 INFO L85 PathProgramCache]: Analyzing trace with hash -730101856, now seen corresponding path program 1 times [2024-05-06 12:12:05,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:05,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:05,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:05,913 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:05,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:05,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:05,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:06,031 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:06,133 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:06,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:12:08,459 INFO L85 PathProgramCache]: Analyzing trace with hash 1361921632, now seen corresponding path program 1 times [2024-05-06 12:12:08,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:08,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:08,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:08,573 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:08,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:08,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:08,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:08,832 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:08,927 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:08,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:12:11,239 INFO L85 PathProgramCache]: Analyzing trace with hash 736669602, now seen corresponding path program 1 times [2024-05-06 12:12:11,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:11,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:11,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:11,352 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:11,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:11,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:11,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:11,513 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:11,616 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:11,617 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:12:13,939 INFO L85 PathProgramCache]: Analyzing trace with hash -1084615134, now seen corresponding path program 1 times [2024-05-06 12:12:13,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:13,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:13,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:14,049 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:14,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:14,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:14,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:14,167 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:14,269 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:14,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:12:16,561 INFO L85 PathProgramCache]: Analyzing trace with hash -589176923, now seen corresponding path program 2 times [2024-05-06 12:12:16,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:16,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:16,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:16,672 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:16,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:16,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:16,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:16,783 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:16,877 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:16,878 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:12:19,176 INFO L85 PathProgramCache]: Analyzing trace with hash 1853284599, now seen corresponding path program 3 times [2024-05-06 12:12:19,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:19,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:19,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:19,526 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 12:12:19,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:19,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:19,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:19,635 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 12:12:19,736 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:19,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 12:12:22,108 INFO L85 PathProgramCache]: Analyzing trace with hash 820544578, now seen corresponding path program 4 times [2024-05-06 12:12:22,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:22,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:22,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:22,841 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:22,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:22,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:22,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:23,023 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 12:12:23,918 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:23,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:12:26,233 INFO L85 PathProgramCache]: Analyzing trace with hash 592470916, now seen corresponding path program 2 times [2024-05-06 12:12:26,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:26,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:26,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:12:26,252 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:12:26,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:12:26,382 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:26,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:12:28,713 INFO L85 PathProgramCache]: Analyzing trace with hash -1413038219, now seen corresponding path program 1 times [2024-05-06 12:12:28,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:28,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:28,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:12:28,744 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:12:28,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:12:28,869 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:28,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:12:31,192 INFO L85 PathProgramCache]: Analyzing trace with hash 2018197509, now seen corresponding path program 1 times [2024-05-06 12:12:31,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:31,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:31,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:31,306 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:12:31,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:31,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:31,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:31,417 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:12:31,520 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:31,521 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:12:33,825 INFO L85 PathProgramCache]: Analyzing trace with hash 1439105274, now seen corresponding path program 1 times [2024-05-06 12:12:33,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:33,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:33,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:33,943 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:12:33,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:33,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:33,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:34,060 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:12:34,159 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:34,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:12:36,661 INFO L85 PathProgramCache]: Analyzing trace with hash -923408591, now seen corresponding path program 1 times [2024-05-06 12:12:36,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:36,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:36,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:36,786 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:12:36,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:36,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:36,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:36,903 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:12:37,006 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:37,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:12:39,328 INFO L85 PathProgramCache]: Analyzing trace with hash 801496604, now seen corresponding path program 1 times [2024-05-06 12:12:39,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:39,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:39,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:39,443 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:12:39,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:39,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:39,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:39,558 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:12:39,659 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:39,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:12:42,007 INFO L85 PathProgramCache]: Analyzing trace with hash -1359618605, now seen corresponding path program 1 times [2024-05-06 12:12:42,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:42,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:42,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:42,166 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:12:42,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:42,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:42,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:42,281 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:12:42,376 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:42,377 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:12:44,667 INFO L85 PathProgramCache]: Analyzing trace with hash 1618709311, now seen corresponding path program 2 times [2024-05-06 12:12:44,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:44,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:44,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:44,922 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:12:44,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:44,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:44,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:45,032 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:12:45,129 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:12:45,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:12:47,413 INFO L85 PathProgramCache]: Analyzing trace with hash -1837392280, now seen corresponding path program 3 times [2024-05-06 12:12:47,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:47,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:47,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:47,685 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 12:12:47,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:12:47,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:12:47,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:12:47,794 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 12:13:01,448 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:13:01,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:13:03,783 INFO L85 PathProgramCache]: Analyzing trace with hash 1535577603, now seen corresponding path program 1 times [2024-05-06 12:13:03,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:13:03,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:13:03,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:13:03,972 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 12:13:03,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:13:03,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:13:04,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:13:04,153 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 12:13:04,247 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:13:04,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:13:06,543 INFO L85 PathProgramCache]: Analyzing trace with hash 151732033, now seen corresponding path program 2 times [2024-05-06 12:13:06,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:13:06,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:13:06,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:13:06,725 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:13:06,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:13:06,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:13:06,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:13:07,174 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:13:07,303 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:13:07,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:13:09,649 INFO L85 PathProgramCache]: Analyzing trace with hash 731392507, now seen corresponding path program 3 times [2024-05-06 12:13:09,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:13:09,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:13:09,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:13:09,858 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:13:09,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:13:09,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:13:09,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:13:10,023 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:13:10,671 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:13:10,671 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:13:12,957 INFO L85 PathProgramCache]: Analyzing trace with hash 973370723, now seen corresponding path program 4 times [2024-05-06 12:13:12,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:13:12,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:13:12,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:13:13,138 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:13:13,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:13:13,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:13:13,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:13:13,326 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 12:13:30,774 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:13:30,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:13:33,078 INFO L85 PathProgramCache]: Analyzing trace with hash -1661633480, now seen corresponding path program 1 times [2024-05-06 12:13:33,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:13:33,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:13:33,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:13:33,253 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 12:13:33,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:13:33,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:13:33,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:13:33,428 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 12:13:33,523 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:13:33,523 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 12:13:35,825 INFO L85 PathProgramCache]: Analyzing trace with hash -1539046420, now seen corresponding path program 2 times [2024-05-06 12:13:35,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:13:35,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:13:35,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:13:36,000 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:13:36,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:13:36,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:13:36,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:13:36,422 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:14:14,860 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:14:14,874 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:14:17,234 INFO L85 PathProgramCache]: Analyzing trace with hash -1310648091, now seen corresponding path program 1 times [2024-05-06 12:14:17,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:17,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:17,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:17,252 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:14:17,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:17,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:14:17,456 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:14:19,809 INFO L85 PathProgramCache]: Analyzing trace with hash -284387575, now seen corresponding path program 1 times [2024-05-06 12:14:19,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:19,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:19,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:19,830 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:14:19,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:19,963 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:14:19,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2549 treesize of output 2097 [2024-05-06 12:14:20,455 INFO L85 PathProgramCache]: Analyzing trace with hash 1972083760, now seen corresponding path program 1 times [2024-05-06 12:14:20,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:20,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:20,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:20,472 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:14:20,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:20,633 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:14:20,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1377 treesize of output 1149 [2024-05-06 12:14:20,926 INFO L85 PathProgramCache]: Analyzing trace with hash -237706060, now seen corresponding path program 1 times [2024-05-06 12:14:20,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:20,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:20,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:20,946 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:14:20,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:21,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:14:21,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:14:23,423 INFO L85 PathProgramCache]: Analyzing trace with hash 2144220492, now seen corresponding path program 1 times [2024-05-06 12:14:23,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:23,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:23,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:23,443 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:14:23,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:23,604 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:14:23,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:14:26,009 INFO L85 PathProgramCache]: Analyzing trace with hash 1152656130, now seen corresponding path program 2 times [2024-05-06 12:14:26,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:26,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:26,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:26,029 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:14:26,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:26,170 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:14:26,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1279 treesize of output 1051 [2024-05-06 12:14:28,718 INFO L85 PathProgramCache]: Analyzing trace with hash 1791599575, now seen corresponding path program 3 times [2024-05-06 12:14:28,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:28,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:28,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:28,747 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:14:28,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:14:28,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:14:28,931 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:14:31,251 INFO L85 PathProgramCache]: Analyzing trace with hash -329137646, now seen corresponding path program 1 times [2024-05-06 12:14:31,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:31,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:31,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:31,477 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:31,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:31,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:31,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:31,578 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:31,684 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:14:31,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 676 treesize of output 560 [2024-05-06 12:14:34,023 INFO L85 PathProgramCache]: Analyzing trace with hash -183177529, now seen corresponding path program 2 times [2024-05-06 12:14:34,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:34,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:34,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:34,125 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:34,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:34,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:34,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:34,226 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:34,317 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:14:34,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 676 treesize of output 560 [2024-05-06 12:14:34,673 INFO L85 PathProgramCache]: Analyzing trace with hash 113316333, now seen corresponding path program 1 times [2024-05-06 12:14:34,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:34,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:34,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:34,778 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:34,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:34,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:34,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:34,883 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:34,980 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:14:34,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1339 treesize of output 1111 [2024-05-06 12:14:37,458 INFO L85 PathProgramCache]: Analyzing trace with hash 2081865331, now seen corresponding path program 1 times [2024-05-06 12:14:37,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:37,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:37,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:37,568 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:37,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:37,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:37,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:37,687 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:37,782 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:14:37,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1375 treesize of output 1147 [2024-05-06 12:14:38,054 INFO L85 PathProgramCache]: Analyzing trace with hash -625579729, now seen corresponding path program 1 times [2024-05-06 12:14:38,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:38,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:38,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:38,195 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:38,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:38,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:38,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:38,318 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:38,435 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:14:38,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 676 treesize of output 560 [2024-05-06 12:14:38,767 INFO L85 PathProgramCache]: Analyzing trace with hash 811103989, now seen corresponding path program 1 times [2024-05-06 12:14:38,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:38,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:38,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:38,875 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:38,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:38,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:39,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:39,120 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:39,230 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:14:39,230 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1311 treesize of output 1083 [2024-05-06 12:14:39,568 INFO L85 PathProgramCache]: Analyzing trace with hash -1359308686, now seen corresponding path program 3 times [2024-05-06 12:14:39,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:39,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:39,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:39,681 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:39,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:39,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:39,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:39,812 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:39,958 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:14:39,972 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:14:42,325 INFO L85 PathProgramCache]: Analyzing trace with hash 1895813943, now seen corresponding path program 4 times [2024-05-06 12:14:42,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:42,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:42,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:42,433 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:42,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:42,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:42,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:42,540 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:42,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:14:42,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:14:45,170 INFO L85 PathProgramCache]: Analyzing trace with hash 1862270569, now seen corresponding path program 5 times [2024-05-06 12:14:45,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:45,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:45,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:45,294 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:45,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:45,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:45,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:45,409 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:45,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:14:45,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:14:47,962 INFO L85 PathProgramCache]: Analyzing trace with hash 60073209, now seen corresponding path program 6 times [2024-05-06 12:14:47,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:47,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:47,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:48,072 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:48,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:48,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:48,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:48,177 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:48,321 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:14:48,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:14:50,718 INFO L85 PathProgramCache]: Analyzing trace with hash -1383535509, now seen corresponding path program 7 times [2024-05-06 12:14:50,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:50,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:50,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:50,825 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:50,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:50,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:50,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:51,052 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:51,148 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:14:51,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 656 treesize of output 540 [2024-05-06 12:14:51,683 INFO L85 PathProgramCache]: Analyzing trace with hash 60072778, now seen corresponding path program 8 times [2024-05-06 12:14:51,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:51,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:51,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:51,790 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:51,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:51,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:51,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:51,906 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:52,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:14:52,045 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:14:54,387 INFO L85 PathProgramCache]: Analyzing trace with hash 1896768247, now seen corresponding path program 1 times [2024-05-06 12:14:54,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:54,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:54,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:54,590 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:54,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:54,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:54,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:54,720 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:54,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:14:54,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:14:57,254 INFO L85 PathProgramCache]: Analyzing trace with hash 1862301352, now seen corresponding path program 1 times [2024-05-06 12:14:57,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:57,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:57,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:57,370 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:57,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:14:57,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:14:57,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:14:57,702 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:14:57,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:14:57,854 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:15:00,183 INFO L85 PathProgramCache]: Analyzing trace with hash 60074201, now seen corresponding path program 1 times [2024-05-06 12:15:00,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:00,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:00,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:00,328 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:15:00,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:00,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:00,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:00,453 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:15:00,574 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:15:00,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1327 treesize of output 1099 [2024-05-06 12:15:03,066 INFO L85 PathProgramCache]: Analyzing trace with hash -2084118952, now seen corresponding path program 9 times [2024-05-06 12:15:03,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:03,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:03,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:03,191 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:15:03,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:03,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:03,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:03,316 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:15:03,748 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:15:03,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:15:06,191 INFO L85 PathProgramCache]: Analyzing trace with hash -466386886, now seen corresponding path program 4 times [2024-05-06 12:15:06,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:06,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:06,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:06,297 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:06,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:06,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:06,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:06,402 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:06,544 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:15:06,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:15:08,932 INFO L85 PathProgramCache]: Analyzing trace with hash -850106366, now seen corresponding path program 5 times [2024-05-06 12:15:08,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:08,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:08,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:09,040 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:09,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:09,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:09,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:09,147 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:09,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:15:09,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:15:11,628 INFO L85 PathProgramCache]: Analyzing trace with hash -304517489, now seen corresponding path program 6 times [2024-05-06 12:15:11,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:11,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:11,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:11,739 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:11,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:11,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:11,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:11,943 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:12,093 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:15:12,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:15:14,580 INFO L85 PathProgramCache]: Analyzing trace with hash 1652744804, now seen corresponding path program 7 times [2024-05-06 12:15:14,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:14,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:14,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:14,697 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:14,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:14,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:14,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:14,815 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:14,958 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:15:14,969 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:15:17,362 INFO L85 PathProgramCache]: Analyzing trace with hash -777969679, now seen corresponding path program 8 times [2024-05-06 12:15:17,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:17,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:17,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:17,479 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:17,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:17,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:17,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:17,595 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:17,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:15:17,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:15:20,259 INFO L85 PathProgramCache]: Analyzing trace with hash -849152062, now seen corresponding path program 1 times [2024-05-06 12:15:20,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:20,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:20,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:20,695 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:20,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:20,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:20,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:20,827 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:21,008 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:15:21,021 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:15:23,380 INFO L85 PathProgramCache]: Analyzing trace with hash -304486706, now seen corresponding path program 1 times [2024-05-06 12:15:23,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:23,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:23,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:23,561 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:23,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:23,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:23,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:23,679 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:23,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 12:15:23,846 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 12:15:26,191 INFO L85 PathProgramCache]: Analyzing trace with hash 1652745796, now seen corresponding path program 1 times [2024-05-06 12:15:26,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:26,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:26,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:26,341 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:26,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:26,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:26,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:15:26,493 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 12:15:29,050 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:15:29,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1329 treesize of output 1101 [2024-05-06 12:15:29,440 INFO L85 PathProgramCache]: Analyzing trace with hash -802238377, now seen corresponding path program 2 times [2024-05-06 12:15:29,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:29,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:29,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:29,458 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:15:29,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:29,801 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:15:29,801 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 658 treesize of output 542 [2024-05-06 12:15:30,247 INFO L85 PathProgramCache]: Analyzing trace with hash -1033972072, now seen corresponding path program 3 times [2024-05-06 12:15:30,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:30,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:30,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:30,268 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:15:30,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:30,447 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:15:30,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2679 treesize of output 2227 [2024-05-06 12:15:30,825 INFO L85 PathProgramCache]: Analyzing trace with hash -1988362561, now seen corresponding path program 4 times [2024-05-06 12:15:30,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:30,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:30,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:30,846 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:15:30,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:30,972 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:15:30,972 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 658 treesize of output 542 [2024-05-06 12:15:31,498 INFO L85 PathProgramCache]: Analyzing trace with hash -1509696646, now seen corresponding path program 5 times [2024-05-06 12:15:31,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:31,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:31,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:31,518 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:15:31,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:31,660 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:15:31,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1313 treesize of output 1085 [2024-05-06 12:15:31,988 INFO L85 PathProgramCache]: Analyzing trace with hash 444044833, now seen corresponding path program 6 times [2024-05-06 12:15:31,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:31,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:32,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:32,010 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:15:32,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:32,173 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:15:32,173 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1329 treesize of output 1101 [2024-05-06 12:15:34,655 INFO L85 PathProgramCache]: Analyzing trace with hash 880488540, now seen corresponding path program 7 times [2024-05-06 12:15:34,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:34,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:34,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:34,680 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:15:34,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:34,830 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:15:34,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 658 treesize of output 542 [2024-05-06 12:15:35,263 INFO L85 PathProgramCache]: Analyzing trace with hash 1525341572, now seen corresponding path program 8 times [2024-05-06 12:15:35,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:35,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:35,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:35,286 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:15:35,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:35,430 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:15:35,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2679 treesize of output 2227 [2024-05-06 12:15:37,919 INFO L85 PathProgramCache]: Analyzing trace with hash 40949086, now seen corresponding path program 9 times [2024-05-06 12:15:37,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:37,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:37,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:37,942 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:15:37,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:38,080 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 12:15:38,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1313 treesize of output 1085 [2024-05-06 12:15:40,577 INFO L85 PathProgramCache]: Analyzing trace with hash 1269422278, now seen corresponding path program 10 times [2024-05-06 12:15:40,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:15:40,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:15:40,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 12:15:40,600 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 12:15:40,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat