/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 10 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 12:29:20,344 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 12:29:20,408 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 12:29:20,412 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 12:29:20,412 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 12:29:20,441 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 12:29:20,442 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 12:29:20,442 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 12:29:20,443 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 12:29:20,446 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 12:29:20,446 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 12:29:20,446 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 12:29:20,446 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 12:29:20,448 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 12:29:20,448 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 12:29:20,448 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 12:29:20,448 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 12:29:20,448 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 12:29:20,448 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 12:29:20,449 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 12:29:20,449 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 12:29:20,449 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 12:29:20,449 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 12:29:20,449 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 12:29:20,450 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 12:29:20,450 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 12:29:20,450 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 12:29:20,450 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 12:29:20,450 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 12:29:20,450 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 12:29:20,451 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 12:29:20,451 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 12:29:20,452 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 12:29:20,452 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 12:29:20,452 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 12:29:20,452 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 12:29:20,452 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 12:29:20,452 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 12:29:20,452 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 12:29:20,460 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 10 [2024-05-06 12:29:20,663 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 12:29:20,692 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 12:29:20,694 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 12:29:20,695 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 12:29:20,695 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 12:29:20,696 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c [2024-05-06 12:29:21,657 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 12:29:21,807 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 12:29:21,807 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c [2024-05-06 12:29:21,813 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/703160f8a/1439257a04a547f5af8ee18333e7f186/FLAG4ae508af9 [2024-05-06 12:29:21,822 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/703160f8a/1439257a04a547f5af8ee18333e7f186 [2024-05-06 12:29:21,823 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 12:29:21,824 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 12:29:21,826 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 12:29:21,827 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 12:29:21,839 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 12:29:21,839 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 12:29:21" (1/1) ... [2024-05-06 12:29:21,840 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@47dbf9b6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:21, skipping insertion in model container [2024-05-06 12:29:21,840 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 12:29:21" (1/1) ... [2024-05-06 12:29:21,855 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 12:29:21,983 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c[2598,2611] [2024-05-06 12:29:21,990 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 12:29:21,996 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 12:29:22,011 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c[2598,2611] [2024-05-06 12:29:22,013 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 12:29:22,024 INFO L206 MainTranslator]: Completed translation [2024-05-06 12:29:22,024 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22 WrapperNode [2024-05-06 12:29:22,024 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 12:29:22,025 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 12:29:22,025 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 12:29:22,025 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 12:29:22,030 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22" (1/1) ... [2024-05-06 12:29:22,036 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22" (1/1) ... [2024-05-06 12:29:22,076 INFO L138 Inliner]: procedures = 25, calls = 46, calls flagged for inlining = 11, calls inlined = 17, statements flattened = 203 [2024-05-06 12:29:22,077 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 12:29:22,077 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 12:29:22,077 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 12:29:22,077 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 12:29:22,084 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22" (1/1) ... [2024-05-06 12:29:22,084 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22" (1/1) ... [2024-05-06 12:29:22,089 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22" (1/1) ... [2024-05-06 12:29:22,090 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22" (1/1) ... [2024-05-06 12:29:22,096 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22" (1/1) ... [2024-05-06 12:29:22,107 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22" (1/1) ... [2024-05-06 12:29:22,108 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22" (1/1) ... [2024-05-06 12:29:22,109 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22" (1/1) ... [2024-05-06 12:29:22,111 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 12:29:22,112 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 12:29:22,112 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 12:29:22,112 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 12:29:22,113 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22" (1/1) ... [2024-05-06 12:29:22,117 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 12:29:22,126 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 12:29:22,155 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 12:29:22,165 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 12:29:22,195 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 12:29:22,196 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 12:29:22,196 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 12:29:22,196 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 12:29:22,196 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 12:29:22,196 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 12:29:22,196 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 12:29:22,196 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 12:29:22,197 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 12:29:22,197 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 12:29:22,197 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 12:29:22,197 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 12:29:22,197 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 12:29:22,199 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 12:29:22,199 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 12:29:22,200 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 12:29:22,318 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 12:29:22,320 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 12:29:22,639 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 12:29:22,650 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 12:29:22,650 INFO L309 CfgBuilder]: Removed 7 assume(true) statements. [2024-05-06 12:29:22,651 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 12:29:22 BoogieIcfgContainer [2024-05-06 12:29:22,651 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 12:29:22,653 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 12:29:22,653 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 12:29:22,655 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 12:29:22,655 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 12:29:21" (1/3) ... [2024-05-06 12:29:22,660 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1720d6a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 12:29:22, skipping insertion in model container [2024-05-06 12:29:22,660 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 12:29:22" (2/3) ... [2024-05-06 12:29:22,660 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1720d6a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 12:29:22, skipping insertion in model container [2024-05-06 12:29:22,660 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 12:29:22" (3/3) ... [2024-05-06 12:29:22,662 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-more-vector-add.wvr.c [2024-05-06 12:29:22,669 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 12:29:22,676 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 12:29:22,677 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 12:29:22,677 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 12:29:22,747 INFO L144 ThreadInstanceAdder]: Constructed 3 joinOtherThreadTransitions. [2024-05-06 12:29:22,781 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 12:29:22,781 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 12:29:22,781 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 12:29:22,784 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 12:29:22,785 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 12:29:22,809 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 12:29:22,817 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 12:29:22,818 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 12:29:22,823 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3a57602f, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=10, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 12:29:22,823 INFO L358 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2024-05-06 12:29:23,038 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:29:25,141 INFO L85 PathProgramCache]: Analyzing trace with hash 1002899142, now seen corresponding path program 1 times [2024-05-06 12:29:25,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:25,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:25,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:25,407 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:25,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:25,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:25,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:25,545 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:25,561 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 12:29:25,562 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 12:29:25,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:29:27,726 INFO L85 PathProgramCache]: Analyzing trace with hash -1910069838, now seen corresponding path program 1 times [2024-05-06 12:29:27,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:27,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:27,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:28,075 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:29:28,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:28,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:28,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:28,316 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 12:29:28,317 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 12:29:28,317 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-05-06 12:29:28,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:29:30,596 INFO L85 PathProgramCache]: Analyzing trace with hash 320810677, now seen corresponding path program 1 times [2024-05-06 12:29:30,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:30,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:30,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:30,946 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:29:30,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:30,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:30,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:31,166 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:29:31,217 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:31,320 INFO L85 PathProgramCache]: Analyzing trace with hash 1335141641, now seen corresponding path program 1 times [2024-05-06 12:29:31,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:31,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:31,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:31,517 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:31,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:31,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:31,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:31,683 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:31,708 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:31,778 INFO L85 PathProgramCache]: Analyzing trace with hash -1560281370, now seen corresponding path program 2 times [2024-05-06 12:29:31,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:31,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:31,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:31,966 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:31,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:31,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:31,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:32,122 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:32,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 12:29:32,882 INFO L85 PathProgramCache]: Analyzing trace with hash -1124081493, now seen corresponding path program 3 times [2024-05-06 12:29:32,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:32,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:32,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:33,077 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:33,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:33,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:33,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:33,269 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:33,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:29:35,352 INFO L85 PathProgramCache]: Analyzing trace with hash 1730535696, now seen corresponding path program 2 times [2024-05-06 12:29:35,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:35,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:35,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:35,558 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:35,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:35,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:35,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:35,765 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:35,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:37,877 INFO L85 PathProgramCache]: Analyzing trace with hash -1560300495, now seen corresponding path program 4 times [2024-05-06 12:29:37,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:37,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:37,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:38,015 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:38,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:38,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:38,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:38,165 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:38,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:38,367 INFO L85 PathProgramCache]: Analyzing trace with hash 1335123821, now seen corresponding path program 5 times [2024-05-06 12:29:38,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:38,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:38,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:38,498 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:38,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:38,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:38,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:38,662 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:38,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:38,783 INFO L85 PathProgramCache]: Analyzing trace with hash -1850681211, now seen corresponding path program 6 times [2024-05-06 12:29:38,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:38,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:38,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:38,943 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:38,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:38,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:38,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:39,079 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:39,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:41,221 INFO L85 PathProgramCache]: Analyzing trace with hash -1536541959, now seen corresponding path program 7 times [2024-05-06 12:29:41,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:41,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:41,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:41,385 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:41,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:41,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:41,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:41,509 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:41,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 12:29:41,754 INFO L85 PathProgramCache]: Analyzing trace with hash -388159737, now seen corresponding path program 8 times [2024-05-06 12:29:41,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:41,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:41,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:41,903 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:41,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:41,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:41,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:42,030 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:42,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:42,123 INFO L85 PathProgramCache]: Analyzing trace with hash -1536532254, now seen corresponding path program 9 times [2024-05-06 12:29:42,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:42,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:42,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:42,246 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:42,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:42,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:42,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:42,426 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:42,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:42,522 INFO L85 PathProgramCache]: Analyzing trace with hash -1850669271, now seen corresponding path program 10 times [2024-05-06 12:29:42,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:42,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:42,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:42,633 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:42,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:42,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:42,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:42,743 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:42,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:29:44,797 INFO L85 PathProgramCache]: Analyzing trace with hash -2092560529, now seen corresponding path program 1 times [2024-05-06 12:29:44,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:44,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:44,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:44,947 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:29:44,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:44,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:44,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:45,073 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:29:45,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:47,155 INFO L85 PathProgramCache]: Analyzing trace with hash 191230787, now seen corresponding path program 1 times [2024-05-06 12:29:47,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:47,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:47,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:47,266 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:47,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:47,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:47,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:47,422 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:47,441 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:49,500 INFO L85 PathProgramCache]: Analyzing trace with hash 1633187820, now seen corresponding path program 2 times [2024-05-06 12:29:49,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:49,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:49,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:49,645 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:49,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:49,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:49,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:49,765 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:49,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 12:29:49,989 INFO L85 PathProgramCache]: Analyzing trace with hash -910784411, now seen corresponding path program 3 times [2024-05-06 12:29:49,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:49,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:50,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:50,142 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:50,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:50,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:50,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:50,256 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:50,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:29:52,316 INFO L85 PathProgramCache]: Analyzing trace with hash -682835510, now seen corresponding path program 2 times [2024-05-06 12:29:52,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:52,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:52,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:52,432 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:52,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:52,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:52,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:52,650 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:52,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:52,741 INFO L85 PathProgramCache]: Analyzing trace with hash 1633168695, now seen corresponding path program 4 times [2024-05-06 12:29:52,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:52,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:52,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:52,867 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:52,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:52,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:52,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:52,980 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:53,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:53,057 INFO L85 PathProgramCache]: Analyzing trace with hash 191212967, now seen corresponding path program 5 times [2024-05-06 12:29:53,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:53,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:53,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:53,217 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:53,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:53,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:53,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:53,351 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:53,380 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:53,435 INFO L85 PathProgramCache]: Analyzing trace with hash -615137013, now seen corresponding path program 6 times [2024-05-06 12:29:53,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:53,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:53,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:53,541 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:53,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:53,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:53,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:53,644 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:53,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:53,731 INFO L85 PathProgramCache]: Analyzing trace with hash -1889377485, now seen corresponding path program 7 times [2024-05-06 12:29:53,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:53,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:53,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:53,895 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:53,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:53,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:53,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:54,000 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:54,014 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 12:29:57,888 INFO L85 PathProgramCache]: Analyzing trace with hash 1558840845, now seen corresponding path program 8 times [2024-05-06 12:29:57,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:57,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:57,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:57,994 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:57,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:57,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:58,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:58,101 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:58,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:58,195 INFO L85 PathProgramCache]: Analyzing trace with hash -1889367780, now seen corresponding path program 9 times [2024-05-06 12:29:58,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:58,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:58,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:58,331 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:58,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:58,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:58,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:58,434 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:58,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:29:58,564 INFO L85 PathProgramCache]: Analyzing trace with hash -615125073, now seen corresponding path program 10 times [2024-05-06 12:29:58,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:58,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:58,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:58,665 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:58,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:29:58,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:29:58,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:29:58,770 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:29:58,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:30:00,877 INFO L85 PathProgramCache]: Analyzing trace with hash 1007960118, now seen corresponding path program 1 times [2024-05-06 12:30:00,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:00,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:00,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:01,029 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:01,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:01,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:01,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:01,148 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:01,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:03,234 INFO L85 PathProgramCache]: Analyzing trace with hash -525238, now seen corresponding path program 1 times [2024-05-06 12:30:03,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:03,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:03,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:03,335 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:03,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:03,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:03,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:03,437 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:03,456 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:03,520 INFO L85 PathProgramCache]: Analyzing trace with hash -16281659, now seen corresponding path program 2 times [2024-05-06 12:30:03,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:03,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:03,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:03,672 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:03,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:03,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:03,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:03,775 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:03,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 12:30:04,042 INFO L85 PathProgramCache]: Analyzing trace with hash -504730708, now seen corresponding path program 3 times [2024-05-06 12:30:04,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:04,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:04,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:04,144 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:04,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:04,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:04,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:04,252 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:04,270 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:30:06,319 INFO L85 PathProgramCache]: Analyzing trace with hash -1877282159, now seen corresponding path program 2 times [2024-05-06 12:30:06,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:06,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:06,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:06,470 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:06,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:06,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:06,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:06,581 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:06,601 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:06,685 INFO L85 PathProgramCache]: Analyzing trace with hash -16300784, now seen corresponding path program 4 times [2024-05-06 12:30:06,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:06,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:06,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:06,788 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:06,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:06,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:06,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:06,890 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:06,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:07,130 INFO L85 PathProgramCache]: Analyzing trace with hash -543058, now seen corresponding path program 5 times [2024-05-06 12:30:07,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:07,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:07,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:07,241 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:07,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:07,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:07,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:07,399 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:07,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:07,514 INFO L85 PathProgramCache]: Analyzing trace with hash 1087317028, now seen corresponding path program 6 times [2024-05-06 12:30:07,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:07,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:07,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:07,614 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:07,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:07,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:07,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:07,713 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:07,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:07,796 INFO L85 PathProgramCache]: Analyzing trace with hash -652909766, now seen corresponding path program 7 times [2024-05-06 12:30:07,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:07,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:07,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:07,894 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:07,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:07,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:07,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:08,048 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:08,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 12:30:08,371 INFO L85 PathProgramCache]: Analyzing trace with hash 1234634470, now seen corresponding path program 8 times [2024-05-06 12:30:08,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:08,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:08,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:08,509 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:08,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:08,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:08,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:08,615 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:08,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:10,700 INFO L85 PathProgramCache]: Analyzing trace with hash -652900061, now seen corresponding path program 9 times [2024-05-06 12:30:10,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:10,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:10,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:10,797 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:10,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:10,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:10,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:10,894 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:10,914 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:10,981 INFO L85 PathProgramCache]: Analyzing trace with hash 1087328968, now seen corresponding path program 10 times [2024-05-06 12:30:10,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:10,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:10,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:11,085 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:11,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:11,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:11,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:11,230 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:11,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:30:13,295 INFO L85 PathProgramCache]: Analyzing trace with hash -147166384, now seen corresponding path program 1 times [2024-05-06 12:30:13,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:13,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:13,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:13,407 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:13,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:13,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:13,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:13,513 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:13,542 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:13,604 INFO L85 PathProgramCache]: Analyzing trace with hash -1131397916, now seen corresponding path program 1 times [2024-05-06 12:30:13,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:13,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:13,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:13,705 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:13,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:13,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:13,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:13,806 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:13,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:15,876 INFO L85 PathProgramCache]: Analyzing trace with hash -713596309, now seen corresponding path program 2 times [2024-05-06 12:30:15,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:15,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:15,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:16,038 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:16,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:16,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:16,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:16,141 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:16,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 12:30:17,224 INFO L85 PathProgramCache]: Analyzing trace with hash -646648378, now seen corresponding path program 3 times [2024-05-06 12:30:17,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:17,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:17,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:17,325 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:17,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:17,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:17,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:17,439 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:17,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:30:19,508 INFO L85 PathProgramCache]: Analyzing trace with hash 1262558635, now seen corresponding path program 2 times [2024-05-06 12:30:19,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:19,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:19,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:19,614 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:19,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:19,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:19,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:19,775 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:19,794 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:19,877 INFO L85 PathProgramCache]: Analyzing trace with hash -713615434, now seen corresponding path program 4 times [2024-05-06 12:30:19,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:19,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:19,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:19,979 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:19,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:19,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:19,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:20,082 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:20,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:20,159 INFO L85 PathProgramCache]: Analyzing trace with hash -1131415736, now seen corresponding path program 5 times [2024-05-06 12:30:20,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:20,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:20,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:20,263 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:20,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:20,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:20,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:20,364 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:20,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:20,473 INFO L85 PathProgramCache]: Analyzing trace with hash -243208630, now seen corresponding path program 6 times [2024-05-06 12:30:20,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:20,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:20,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:20,617 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:20,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:20,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:20,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:20,714 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:20,734 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:22,793 INFO L85 PathProgramCache]: Analyzing trace with hash 1050467796, now seen corresponding path program 7 times [2024-05-06 12:30:22,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:22,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:22,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:22,891 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:22,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:22,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:22,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:22,989 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:23,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 12:30:23,357 INFO L85 PathProgramCache]: Analyzing trace with hash -1795235956, now seen corresponding path program 8 times [2024-05-06 12:30:23,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:23,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:23,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:23,457 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:23,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:23,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:23,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:23,558 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:23,582 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:23,662 INFO L85 PathProgramCache]: Analyzing trace with hash 1050477501, now seen corresponding path program 9 times [2024-05-06 12:30:23,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:23,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:23,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:23,803 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:23,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:23,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:23,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:23,900 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:23,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:23,984 INFO L85 PathProgramCache]: Analyzing trace with hash -243196690, now seen corresponding path program 10 times [2024-05-06 12:30:23,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:23,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:23,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:24,091 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:24,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:24,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:24,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:24,187 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:24,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:26,266 INFO L85 PathProgramCache]: Analyzing trace with hash 478381963, now seen corresponding path program 1 times [2024-05-06 12:30:26,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:26,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:26,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:26,373 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:26,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:26,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:26,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:26,520 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:26,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:26,595 INFO L85 PathProgramCache]: Analyzing trace with hash 1944939684, now seen corresponding path program 2 times [2024-05-06 12:30:26,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:26,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:26,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:26,699 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:26,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:26,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:26,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:26,801 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:26,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 12:30:27,364 INFO L85 PathProgramCache]: Analyzing trace with hash 163588781, now seen corresponding path program 3 times [2024-05-06 12:30:27,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:27,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:27,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:27,467 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:27,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:27,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:27,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:27,571 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:27,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:27,641 INFO L85 PathProgramCache]: Analyzing trace with hash 1944920559, now seen corresponding path program 4 times [2024-05-06 12:30:27,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:27,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:27,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:27,809 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:27,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:27,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:27,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:27,910 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:27,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:28,003 INFO L85 PathProgramCache]: Analyzing trace with hash 478364143, now seen corresponding path program 5 times [2024-05-06 12:30:28,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:28,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:28,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:28,102 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:28,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:28,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:28,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:28,200 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:28,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:28,315 INFO L85 PathProgramCache]: Analyzing trace with hash 268090307, now seen corresponding path program 6 times [2024-05-06 12:30:28,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:28,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:28,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:28,412 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:28,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:28,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:28,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:28,510 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:28,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:28,597 INFO L85 PathProgramCache]: Analyzing trace with hash -279134341, now seen corresponding path program 7 times [2024-05-06 12:30:28,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:28,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:28,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:28,783 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:28,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:28,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:28,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:28,909 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:28,925 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 12:30:30,392 INFO L85 PathProgramCache]: Analyzing trace with hash -63229243, now seen corresponding path program 8 times [2024-05-06 12:30:30,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:30,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:30,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:30,488 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:30,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:30,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:30,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:30,584 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:30,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:30,672 INFO L85 PathProgramCache]: Analyzing trace with hash -279124636, now seen corresponding path program 9 times [2024-05-06 12:30:30,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:30,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:30,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:30,768 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:30,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:30,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:30,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:30,866 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:30,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:31,011 INFO L85 PathProgramCache]: Analyzing trace with hash 268102247, now seen corresponding path program 10 times [2024-05-06 12:30:31,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:31,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:31,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:31,175 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:31,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:31,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:31,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:31,271 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:31,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:31,381 INFO L85 PathProgramCache]: Analyzing trace with hash 1456879537, now seen corresponding path program 1 times [2024-05-06 12:30:31,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:31,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:31,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:31,477 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:31,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:31,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:31,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:31,578 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:31,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:33,662 INFO L85 PathProgramCache]: Analyzing trace with hash -2081373890, now seen corresponding path program 2 times [2024-05-06 12:30:33,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:33,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:33,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:33,757 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:33,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:33,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:33,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:33,853 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:33,869 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 12:30:34,330 INFO L85 PathProgramCache]: Analyzing trace with hash -98080429, now seen corresponding path program 3 times [2024-05-06 12:30:34,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:34,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:34,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:34,425 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:34,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:34,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:34,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:34,579 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:34,604 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:34,680 INFO L85 PathProgramCache]: Analyzing trace with hash 168886212, now seen corresponding path program 4 times [2024-05-06 12:30:34,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:34,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:34,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:34,777 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:34,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:34,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:34,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:34,873 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:34,893 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:36,945 INFO L85 PathProgramCache]: Analyzing trace with hash 940506010, now seen corresponding path program 5 times [2024-05-06 12:30:36,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:36,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:36,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:37,042 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:37,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:37,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:37,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:37,141 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:37,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 12:30:37,256 INFO L85 PathProgramCache]: Analyzing trace with hash -909084026, now seen corresponding path program 6 times [2024-05-06 12:30:37,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:37,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:37,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:37,423 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:37,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:37,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:37,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:37,592 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:37,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:37,692 INFO L85 PathProgramCache]: Analyzing trace with hash -11537712, now seen corresponding path program 1 times [2024-05-06 12:30:37,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:37,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:37,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:37,810 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:37,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:37,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:37,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:37,917 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:37,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:37,992 INFO L85 PathProgramCache]: Analyzing trace with hash -357668353, now seen corresponding path program 2 times [2024-05-06 12:30:37,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:37,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:38,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:38,106 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:38,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:38,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:38,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:38,215 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:38,231 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 12:30:38,527 INFO L85 PathProgramCache]: Analyzing trace with hash 1797183666, now seen corresponding path program 3 times [2024-05-06 12:30:38,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:38,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:38,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:38,636 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:38,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:38,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:38,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:38,827 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:38,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:30:40,895 INFO L85 PathProgramCache]: Analyzing trace with hash 1277560471, now seen corresponding path program 1 times [2024-05-06 12:30:40,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:40,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:40,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:41,016 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:41,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:41,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:41,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:41,135 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:41,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:41,243 INFO L85 PathProgramCache]: Analyzing trace with hash -357701893, now seen corresponding path program 4 times [2024-05-06 12:30:41,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:41,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:41,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:41,348 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:41,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:41,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:41,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:41,454 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:41,475 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:41,547 INFO L85 PathProgramCache]: Analyzing trace with hash -11570412, now seen corresponding path program 5 times [2024-05-06 12:30:41,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:41,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:41,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:41,652 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:41,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:41,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:41,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:41,815 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:41,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:41,912 INFO L85 PathProgramCache]: Analyzing trace with hash -268188226, now seen corresponding path program 6 times [2024-05-06 12:30:41,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:41,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:41,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:42,017 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:42,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:42,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:42,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:42,120 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:42,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:42,212 INFO L85 PathProgramCache]: Analyzing trace with hash 276100335, now seen corresponding path program 7 times [2024-05-06 12:30:42,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:42,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:42,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:42,316 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:42,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:42,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:42,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:42,421 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:42,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 12:30:45,138 INFO L85 PathProgramCache]: Analyzing trace with hash -30823456, now seen corresponding path program 8 times [2024-05-06 12:30:45,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:45,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:45,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:45,241 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:45,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:45,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:45,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:45,423 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:45,454 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:45,510 INFO L85 PathProgramCache]: Analyzing trace with hash 276124455, now seen corresponding path program 9 times [2024-05-06 12:30:45,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:45,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:45,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:45,654 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:45,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:45,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:45,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:45,767 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:45,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:47,840 INFO L85 PathProgramCache]: Analyzing trace with hash -268161406, now seen corresponding path program 10 times [2024-05-06 12:30:47,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:47,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:47,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:47,941 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:47,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:47,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:47,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:48,044 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:48,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:30:50,103 INFO L85 PathProgramCache]: Analyzing trace with hash 1066443753, now seen corresponding path program 2 times [2024-05-06 12:30:50,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:50,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:50,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:50,209 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:50,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:50,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:50,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:50,314 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:50,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:50,435 INFO L85 PathProgramCache]: Analyzing trace with hash -1225088731, now seen corresponding path program 11 times [2024-05-06 12:30:50,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:50,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:50,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:50,638 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:50,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:50,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:50,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:50,742 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:50,760 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:50,833 INFO L85 PathProgramCache]: Analyzing trace with hash 676955722, now seen corresponding path program 12 times [2024-05-06 12:30:50,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:50,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:50,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:50,938 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:50,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:50,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:50,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:51,044 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:51,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 12:30:53,548 INFO L85 PathProgramCache]: Analyzing trace with hash -489208377, now seen corresponding path program 13 times [2024-05-06 12:30:53,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:53,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:53,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:53,655 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:53,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:53,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:53,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:53,762 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:53,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:30:55,816 INFO L85 PathProgramCache]: Analyzing trace with hash 1247968300, now seen corresponding path program 3 times [2024-05-06 12:30:55,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:55,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:55,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:55,928 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:55,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:55,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:55,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:56,110 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:56,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:56,389 INFO L85 PathProgramCache]: Analyzing trace with hash 676922182, now seen corresponding path program 14 times [2024-05-06 12:30:56,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:56,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:56,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:56,495 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:56,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:56,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:56,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:56,600 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:56,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:56,702 INFO L85 PathProgramCache]: Analyzing trace with hash -1225121431, now seen corresponding path program 15 times [2024-05-06 12:30:56,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:56,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:56,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:56,806 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:56,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:56,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:56,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:56,912 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:30:56,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:57,147 INFO L85 PathProgramCache]: Analyzing trace with hash -1683180599, now seen corresponding path program 16 times [2024-05-06 12:30:57,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:57,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:57,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:57,251 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:57,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:57,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:57,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:57,352 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:57,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:57,424 INFO L85 PathProgramCache]: Analyzing trace with hash -638990268, now seen corresponding path program 17 times [2024-05-06 12:30:57,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:57,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:57,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:57,593 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:57,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:57,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:57,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:57,698 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:57,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 12:30:57,890 INFO L85 PathProgramCache]: Analyzing trace with hash 1666138923, now seen corresponding path program 18 times [2024-05-06 12:30:57,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:57,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:57,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:57,996 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:57,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:57,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:58,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:58,102 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:58,120 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:58,167 INFO L85 PathProgramCache]: Analyzing trace with hash -638966148, now seen corresponding path program 19 times [2024-05-06 12:30:58,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:58,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:58,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:58,269 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:58,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:58,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:58,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:58,373 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:58,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:30:58,442 INFO L85 PathProgramCache]: Analyzing trace with hash -1683153779, now seen corresponding path program 20 times [2024-05-06 12:30:58,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:58,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:58,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:58,543 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:58,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:30:58,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:30:58,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:30:58,718 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:30:58,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:31:00,777 INFO L85 PathProgramCache]: Analyzing trace with hash -787364674, now seen corresponding path program 4 times [2024-05-06 12:31:00,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:00,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:00,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:00,881 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:00,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:00,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:00,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:00,985 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:01,014 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:01,081 INFO L85 PathProgramCache]: Analyzing trace with hash 108049905, now seen corresponding path program 21 times [2024-05-06 12:31:01,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:01,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:01,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:01,185 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:01,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:01,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:01,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:01,289 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:01,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:01,368 INFO L85 PathProgramCache]: Analyzing trace with hash -945419522, now seen corresponding path program 22 times [2024-05-06 12:31:01,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:01,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:01,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:01,484 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:01,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:01,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:01,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:01,588 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:01,603 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 12:31:01,809 INFO L85 PathProgramCache]: Analyzing trace with hash 756766611, now seen corresponding path program 23 times [2024-05-06 12:31:01,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:01,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:01,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:01,996 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:01,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:01,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:02,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:02,103 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:02,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:31:02,189 INFO L85 PathProgramCache]: Analyzing trace with hash 310262776, now seen corresponding path program 5 times [2024-05-06 12:31:02,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:02,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:02,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:02,300 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:02,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:02,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:02,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:02,417 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:02,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:02,507 INFO L85 PathProgramCache]: Analyzing trace with hash -945453062, now seen corresponding path program 24 times [2024-05-06 12:31:02,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:02,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:02,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:02,615 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:02,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:02,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:02,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:02,726 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:02,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:02,882 INFO L85 PathProgramCache]: Analyzing trace with hash 108017205, now seen corresponding path program 25 times [2024-05-06 12:31:02,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:02,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:02,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:02,990 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:02,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:02,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:03,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:03,161 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:03,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:05,255 INFO L85 PathProgramCache]: Analyzing trace with hash -1648244355, now seen corresponding path program 26 times [2024-05-06 12:31:05,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:05,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:05,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:05,356 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:05,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:05,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:05,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:05,458 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:05,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:07,540 INFO L85 PathProgramCache]: Analyzing trace with hash 444033296, now seen corresponding path program 27 times [2024-05-06 12:31:07,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:07,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:07,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:07,643 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:07,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:07,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:07,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:07,747 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:07,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 12:31:08,059 INFO L85 PathProgramCache]: Analyzing trace with hash 880131039, now seen corresponding path program 28 times [2024-05-06 12:31:08,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:08,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:08,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:08,163 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:08,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:08,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:08,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:08,268 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:08,287 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:10,334 INFO L85 PathProgramCache]: Analyzing trace with hash 444057416, now seen corresponding path program 29 times [2024-05-06 12:31:10,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:10,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:10,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:10,504 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:10,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:10,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:10,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:10,606 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:10,632 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:12,692 INFO L85 PathProgramCache]: Analyzing trace with hash -1648217535, now seen corresponding path program 30 times [2024-05-06 12:31:12,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:12,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:12,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:12,793 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:12,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:12,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:12,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:12,893 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:12,910 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:31:14,950 INFO L85 PathProgramCache]: Analyzing trace with hash -586539126, now seen corresponding path program 6 times [2024-05-06 12:31:14,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:14,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:14,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:15,054 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:15,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:15,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:15,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:15,158 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:15,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:17,241 INFO L85 PathProgramCache]: Analyzing trace with hash -831964826, now seen corresponding path program 31 times [2024-05-06 12:31:17,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:17,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:17,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:17,346 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:17,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:17,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:17,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:17,530 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:17,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:19,606 INFO L85 PathProgramCache]: Analyzing trace with hash -21105111, now seen corresponding path program 32 times [2024-05-06 12:31:19,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:19,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:19,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:19,711 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:19,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:19,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:19,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:19,816 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:19,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 12:31:21,948 INFO L85 PathProgramCache]: Analyzing trace with hash -654257720, now seen corresponding path program 33 times [2024-05-06 12:31:21,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:21,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:21,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:22,053 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:22,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:22,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:22,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:22,159 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:22,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:31:24,217 INFO L85 PathProgramCache]: Analyzing trace with hash -518189395, now seen corresponding path program 7 times [2024-05-06 12:31:24,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:24,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:24,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:24,328 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:24,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:24,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:24,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:24,439 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:24,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:24,533 INFO L85 PathProgramCache]: Analyzing trace with hash -21138651, now seen corresponding path program 34 times [2024-05-06 12:31:24,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:24,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:24,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:24,706 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:24,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:24,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:24,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:24,810 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:24,829 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:24,891 INFO L85 PathProgramCache]: Analyzing trace with hash -831997526, now seen corresponding path program 35 times [2024-05-06 12:31:24,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:24,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:24,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:24,996 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:24,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:24,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:25,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:25,104 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:25,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:25,185 INFO L85 PathProgramCache]: Analyzing trace with hash -1427988888, now seen corresponding path program 36 times [2024-05-06 12:31:25,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:25,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:25,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:25,301 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:25,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:25,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:25,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:25,402 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:25,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:25,496 INFO L85 PathProgramCache]: Analyzing trace with hash -1317981819, now seen corresponding path program 37 times [2024-05-06 12:31:25,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:25,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:25,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:25,599 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:25,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:25,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:25,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:25,771 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:25,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 12:31:26,019 INFO L85 PathProgramCache]: Analyzing trace with hash 2092237322, now seen corresponding path program 38 times [2024-05-06 12:31:26,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:26,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:26,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:26,125 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:26,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:26,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:26,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:26,227 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:26,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:28,302 INFO L85 PathProgramCache]: Analyzing trace with hash -1317957699, now seen corresponding path program 39 times [2024-05-06 12:31:28,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:28,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:28,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:28,404 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:28,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:28,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:28,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:28,506 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:28,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:29,442 INFO L85 PathProgramCache]: Analyzing trace with hash -1427962068, now seen corresponding path program 40 times [2024-05-06 12:31:29,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:29,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:29,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:29,545 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:29,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:29,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:29,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:29,648 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:29,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:31:29,720 INFO L85 PathProgramCache]: Analyzing trace with hash 1481680255, now seen corresponding path program 8 times [2024-05-06 12:31:29,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:29,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:29,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:29,894 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:29,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:29,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:29,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:29,998 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:30,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:30,102 INFO L85 PathProgramCache]: Analyzing trace with hash 1341281554, now seen corresponding path program 41 times [2024-05-06 12:31:30,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:30,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:30,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:30,207 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:30,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:30,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:30,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:30,315 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:30,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:30,398 INFO L85 PathProgramCache]: Analyzing trace with hash -1369944067, now seen corresponding path program 42 times [2024-05-06 12:31:30,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:30,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:30,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:30,503 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:30,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:30,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:30,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:30,608 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:30,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 12:31:32,871 INFO L85 PathProgramCache]: Analyzing trace with hash 481407604, now seen corresponding path program 43 times [2024-05-06 12:31:32,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:32,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:32,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:32,977 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:32,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:32,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:32,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:33,152 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:33,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:31:35,206 INFO L85 PathProgramCache]: Analyzing trace with hash 42356057, now seen corresponding path program 9 times [2024-05-06 12:31:35,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:35,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:35,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:35,319 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:35,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:35,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:35,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:35,430 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:35,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:35,527 INFO L85 PathProgramCache]: Analyzing trace with hash -1369977607, now seen corresponding path program 44 times [2024-05-06 12:31:35,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:35,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:35,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:35,632 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:35,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:35,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:35,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:35,738 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:35,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:35,836 INFO L85 PathProgramCache]: Analyzing trace with hash 1341248854, now seen corresponding path program 45 times [2024-05-06 12:31:35,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:35,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:35,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:35,942 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:35,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:35,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:35,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:36,049 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:36,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:36,142 INFO L85 PathProgramCache]: Analyzing trace with hash 460812604, now seen corresponding path program 46 times [2024-05-06 12:31:36,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:36,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:36,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:36,318 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:36,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:36,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:36,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:36,420 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:36,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:36,491 INFO L85 PathProgramCache]: Analyzing trace with hash 1400289585, now seen corresponding path program 47 times [2024-05-06 12:31:36,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:36,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:36,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:36,594 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:36,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:36,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:36,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:36,697 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:36,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:31:38,776 INFO L85 PathProgramCache]: Analyzing trace with hash -407734485, now seen corresponding path program 10 times [2024-05-06 12:31:38,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:38,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:38,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:38,881 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:38,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:38,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:38,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:38,986 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:39,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:39,210 INFO L85 PathProgramCache]: Analyzing trace with hash 2025773160, now seen corresponding path program 48 times [2024-05-06 12:31:39,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:39,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:39,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:39,320 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:39,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:39,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:39,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:39,501 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:39,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:39,749 INFO L85 PathProgramCache]: Analyzing trace with hash -1625540731, now seen corresponding path program 49 times [2024-05-06 12:31:39,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:39,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:39,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:39,859 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:39,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:39,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:39,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:39,968 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:39,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 12:31:40,071 INFO L85 PathProgramCache]: Analyzing trace with hash 1147845642, now seen corresponding path program 50 times [2024-05-06 12:31:40,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:40,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:40,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:40,184 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:40,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:40,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:40,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:40,295 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:40,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:40,371 INFO L85 PathProgramCache]: Analyzing trace with hash -1625531026, now seen corresponding path program 51 times [2024-05-06 12:31:40,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:40,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:40,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:40,483 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:40,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:40,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:40,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:40,600 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:40,620 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:40,674 INFO L85 PathProgramCache]: Analyzing trace with hash 2025785100, now seen corresponding path program 52 times [2024-05-06 12:31:40,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:40,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:40,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:40,846 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:40,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:40,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:40,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:40,961 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:40,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:41,153 INFO L85 PathProgramCache]: Analyzing trace with hash 1865354084, now seen corresponding path program 53 times [2024-05-06 12:31:41,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:41,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:41,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:41,260 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:41,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:41,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:41,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:41,366 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:41,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:42,031 INFO L85 PathProgramCache]: Analyzing trace with hash 1991402490, now seen corresponding path program 54 times [2024-05-06 12:31:42,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:42,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:42,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:42,140 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:42,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:42,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:42,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:42,247 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:42,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 12:31:42,316 INFO L85 PathProgramCache]: Analyzing trace with hash 1603935782, now seen corresponding path program 55 times [2024-05-06 12:31:42,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:42,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:42,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:42,486 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:42,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:42,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:42,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:42,593 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:42,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:42,664 INFO L85 PathProgramCache]: Analyzing trace with hash 1991383365, now seen corresponding path program 56 times [2024-05-06 12:31:42,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:42,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:42,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:42,771 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:42,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:42,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:42,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:42,878 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:42,910 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:42,972 INFO L85 PathProgramCache]: Analyzing trace with hash 1865336264, now seen corresponding path program 57 times [2024-05-06 12:31:42,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:42,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:42,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:43,079 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:43,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:43,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:43,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:43,188 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:43,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:44,107 INFO L85 PathProgramCache]: Analyzing trace with hash 45077650, now seen corresponding path program 58 times [2024-05-06 12:31:44,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:44,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:44,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:44,216 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:44,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:44,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:44,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:44,395 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:44,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:44,497 INFO L85 PathProgramCache]: Analyzing trace with hash 1397407899, now seen corresponding path program 59 times [2024-05-06 12:31:44,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:44,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:44,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:44,607 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:44,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:44,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:44,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:44,716 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:44,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 12:31:44,802 INFO L85 PathProgramCache]: Analyzing trace with hash 369972660, now seen corresponding path program 60 times [2024-05-06 12:31:44,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:44,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:44,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:44,918 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:44,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:44,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:44,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:45,026 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:45,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:45,089 INFO L85 PathProgramCache]: Analyzing trace with hash 1397417604, now seen corresponding path program 61 times [2024-05-06 12:31:45,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:45,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:45,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:45,204 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:45,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:45,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:45,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:45,314 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:45,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:45,397 INFO L85 PathProgramCache]: Analyzing trace with hash 45089590, now seen corresponding path program 62 times [2024-05-06 12:31:45,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:45,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:45,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:45,585 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:45,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:45,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:45,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:45,694 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:45,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:45,894 INFO L85 PathProgramCache]: Analyzing trace with hash -504637446, now seen corresponding path program 63 times [2024-05-06 12:31:45,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:45,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:45,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:45,999 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:46,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:46,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:46,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:46,106 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:46,123 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:48,182 INFO L85 PathProgramCache]: Analyzing trace with hash 1536109092, now seen corresponding path program 64 times [2024-05-06 12:31:48,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:48,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:48,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:48,290 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:48,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:48,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:48,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:48,395 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:48,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 12:31:48,472 INFO L85 PathProgramCache]: Analyzing trace with hash 374742332, now seen corresponding path program 65 times [2024-05-06 12:31:48,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:48,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:48,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:48,578 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:48,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:48,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:48,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:48,749 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:48,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:48,840 INFO L85 PathProgramCache]: Analyzing trace with hash 1536089967, now seen corresponding path program 66 times [2024-05-06 12:31:48,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:48,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:48,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:48,947 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:48,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:48,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:48,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:49,054 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:49,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:49,140 INFO L85 PathProgramCache]: Analyzing trace with hash -504655266, now seen corresponding path program 67 times [2024-05-06 12:31:49,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:49,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:49,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:49,246 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:49,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:49,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:49,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:49,352 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:49,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:49,436 INFO L85 PathProgramCache]: Analyzing trace with hash 799280361, now seen corresponding path program 68 times [2024-05-06 12:31:49,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:49,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:49,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:49,545 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:49,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:49,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:49,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:49,722 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:49,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:49,807 INFO L85 PathProgramCache]: Analyzing trace with hash -992111836, now seen corresponding path program 69 times [2024-05-06 12:31:49,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:49,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:49,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:49,916 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:49,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:49,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:49,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:50,041 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:50,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 12:31:50,124 INFO L85 PathProgramCache]: Analyzing trace with hash -690695093, now seen corresponding path program 70 times [2024-05-06 12:31:50,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:50,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:50,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:50,235 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:50,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:50,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:50,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:50,344 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:50,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:50,527 INFO L85 PathProgramCache]: Analyzing trace with hash -992102131, now seen corresponding path program 71 times [2024-05-06 12:31:50,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:50,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:50,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:50,638 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:50,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:50,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:50,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:50,749 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:50,766 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:50,821 INFO L85 PathProgramCache]: Analyzing trace with hash 799292301, now seen corresponding path program 72 times [2024-05-06 12:31:50,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:50,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:50,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:51,002 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:51,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:51,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:51,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:51,112 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:51,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:51,213 INFO L85 PathProgramCache]: Analyzing trace with hash 1023513027, now seen corresponding path program 73 times [2024-05-06 12:31:51,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:51,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:51,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:51,320 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:51,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:51,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:51,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:51,433 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:51,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:51,502 INFO L85 PathProgramCache]: Analyzing trace with hash 1664133499, now seen corresponding path program 74 times [2024-05-06 12:31:51,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:51,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:51,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:51,610 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:51,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:51,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:51,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:51,720 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:51,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 12:31:51,788 INFO L85 PathProgramCache]: Analyzing trace with hash 48531653, now seen corresponding path program 75 times [2024-05-06 12:31:51,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:51,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:51,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:51,896 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:51,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:51,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:51,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:52,070 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:52,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:52,148 INFO L85 PathProgramCache]: Analyzing trace with hash 1664114374, now seen corresponding path program 76 times [2024-05-06 12:31:52,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:52,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:52,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:52,259 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:52,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:52,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:52,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:52,372 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:52,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:52,447 INFO L85 PathProgramCache]: Analyzing trace with hash 1023495207, now seen corresponding path program 77 times [2024-05-06 12:31:52,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:52,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:52,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:52,564 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:52,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:52,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:52,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:52,672 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:52,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:52,757 INFO L85 PathProgramCache]: Analyzing trace with hash 1364610931, now seen corresponding path program 78 times [2024-05-06 12:31:52,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:52,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:52,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:52,867 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:52,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:52,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:52,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:53,053 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:53,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:53,144 INFO L85 PathProgramCache]: Analyzing trace with hash -646733350, now seen corresponding path program 79 times [2024-05-06 12:31:53,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:53,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:53,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:53,287 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:53,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:53,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:53,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:53,428 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:53,441 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 12:31:53,546 INFO L85 PathProgramCache]: Analyzing trace with hash 1426103381, now seen corresponding path program 80 times [2024-05-06 12:31:53,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:53,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:53,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:53,657 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:53,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:53,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:53,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:53,767 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:53,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:53,878 INFO L85 PathProgramCache]: Analyzing trace with hash -646723645, now seen corresponding path program 81 times [2024-05-06 12:31:53,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:53,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:53,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:53,998 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:53,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:53,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:54,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:54,109 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:54,127 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:56,183 INFO L85 PathProgramCache]: Analyzing trace with hash 1364622871, now seen corresponding path program 82 times [2024-05-06 12:31:56,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:56,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:56,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:56,294 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:56,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:56,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:56,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:56,483 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:31:56,504 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:58,550 INFO L85 PathProgramCache]: Analyzing trace with hash -786273287, now seen corresponding path program 83 times [2024-05-06 12:31:58,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:58,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:58,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:58,656 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:58,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:58,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:58,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:58,763 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:58,781 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:58,840 INFO L85 PathProgramCache]: Analyzing trace with hash 1395332613, now seen corresponding path program 84 times [2024-05-06 12:31:58,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:58,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:58,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:58,947 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:58,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:58,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:58,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:59,056 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:59,068 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 12:31:59,164 INFO L85 PathProgramCache]: Analyzing trace with hash 305638779, now seen corresponding path program 85 times [2024-05-06 12:31:59,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:59,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:59,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:59,272 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:59,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:59,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:59,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:59,379 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:59,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:59,464 INFO L85 PathProgramCache]: Analyzing trace with hash 1395313488, now seen corresponding path program 86 times [2024-05-06 12:31:59,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:59,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:59,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:59,572 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:59,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:59,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:59,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:59,756 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:59,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:31:59,825 INFO L85 PathProgramCache]: Analyzing trace with hash -786291107, now seen corresponding path program 87 times [2024-05-06 12:31:59,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:59,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:59,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:31:59,932 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:31:59,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:31:59,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:31:59,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:00,039 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:32:00,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:32:00,146 INFO L85 PathProgramCache]: Analyzing trace with hash 538375530, now seen corresponding path program 88 times [2024-05-06 12:32:00,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:00,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:00,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:00,257 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:32:00,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:00,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:00,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:00,368 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:32:00,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:32:00,447 INFO L85 PathProgramCache]: Analyzing trace with hash -490227005, now seen corresponding path program 89 times [2024-05-06 12:32:00,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:00,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:00,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:00,558 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:32:00,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:00,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:00,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:00,667 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:32:00,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 12:32:00,737 INFO L85 PathProgramCache]: Analyzing trace with hash 1982832780, now seen corresponding path program 90 times [2024-05-06 12:32:00,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:00,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:00,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:00,849 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:32:00,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:00,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:00,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:01,037 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:32:01,055 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:32:01,228 INFO L85 PathProgramCache]: Analyzing trace with hash -490217300, now seen corresponding path program 91 times [2024-05-06 12:32:01,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:01,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:01,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:01,339 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:32:01,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:01,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:01,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:01,449 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:32:01,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:32:02,111 INFO L85 PathProgramCache]: Analyzing trace with hash 538387470, now seen corresponding path program 92 times [2024-05-06 12:32:02,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:02,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:02,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:02,230 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:32:02,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:02,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:02,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:02,341 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 12:32:02,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:32:04,425 INFO L85 PathProgramCache]: Analyzing trace with hash 2083543111, now seen corresponding path program 93 times [2024-05-06 12:32:04,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:04,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:04,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:04,531 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:32:04,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:04,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:04,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:04,638 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:32:04,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 12:32:04,735 INFO L85 PathProgramCache]: Analyzing trace with hash 759930502, now seen corresponding path program 94 times [2024-05-06 12:32:04,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:04,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:04,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:04,842 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:32:04,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:04,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:04,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:05,065 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 12:32:05,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:32:05,168 INFO L85 PathProgramCache]: Analyzing trace with hash 705328053, now seen corresponding path program 1 times [2024-05-06 12:32:05,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:05,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:05,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:05,351 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:32:05,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:05,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:05,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:05,496 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 12:32:05,516 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-06 12:32:05,517 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 12:32:05,517 INFO L85 PathProgramCache]: Analyzing trace with hash -566126889, now seen corresponding path program 1 times [2024-05-06 12:32:05,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 12:32:05,520 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2005348619] [2024-05-06 12:32:05,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:05,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:05,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:05,727 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 97 proven. 1 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2024-05-06 12:32:05,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 12:32:05,728 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2005348619] [2024-05-06 12:32:05,728 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2005348619] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 12:32:05,728 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1810604048] [2024-05-06 12:32:05,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:05,729 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 12:32:05,729 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 12:32:05,773 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 12:32:05,773 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 12:32:06,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:06,442 INFO L262 TraceCheckSpWp]: Trace formula consists of 778 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-06 12:32:06,456 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 12:32:06,782 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 97 proven. 1 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2024-05-06 12:32:06,782 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 12:32:07,110 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 97 proven. 1 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2024-05-06 12:32:07,110 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1810604048] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 12:32:07,110 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 12:32:07,110 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 25 [2024-05-06 12:32:07,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899477502] [2024-05-06 12:32:07,112 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 12:32:07,115 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2024-05-06 12:32:07,115 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 12:32:07,117 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-05-06 12:32:07,117 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=484, Unknown=0, NotChecked=0, Total=600 [2024-05-06 12:32:07,117 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:32:07,118 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 12:32:07,118 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 14.96) internal successors, (374), 25 states have internal predecessors, (374), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 12:32:07,118 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:32:07,947 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:32:07,994 INFO L85 PathProgramCache]: Analyzing trace with hash -158553800, now seen corresponding path program 2 times [2024-05-06 12:32:07,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:07,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:08,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:09,535 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 12:32:09,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:09,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:09,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:10,128 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 12:32:10,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-06 12:32:10,154 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-05-06 12:32:10,353 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable342,SelfDestructingSolverStorable343,SelfDestructingSolverStorable344 [2024-05-06 12:32:10,353 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-06 12:32:10,353 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 12:32:10,353 INFO L85 PathProgramCache]: Analyzing trace with hash -1964987494, now seen corresponding path program 2 times [2024-05-06 12:32:10,353 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 12:32:10,354 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89943519] [2024-05-06 12:32:10,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:10,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:10,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:11,479 INFO L134 CoverageAnalysis]: Checked inductivity of 422 backedges. 174 proven. 220 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 12:32:11,479 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 12:32:11,479 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [89943519] [2024-05-06 12:32:11,479 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [89943519] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 12:32:11,479 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [865584303] [2024-05-06 12:32:11,480 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 12:32:11,480 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 12:32:11,480 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 12:32:11,481 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 12:32:11,481 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 12:32:12,149 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 12:32:12,150 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 12:32:12,152 INFO L262 TraceCheckSpWp]: Trace formula consists of 826 conjuncts, 14 conjunts are in the unsatisfiable core [2024-05-06 12:32:12,157 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 12:32:12,708 INFO L134 CoverageAnalysis]: Checked inductivity of 422 backedges. 129 proven. 19 refuted. 0 times theorem prover too weak. 274 trivial. 0 not checked. [2024-05-06 12:32:12,709 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 12:32:13,301 INFO L134 CoverageAnalysis]: Checked inductivity of 422 backedges. 139 proven. 9 refuted. 0 times theorem prover too weak. 274 trivial. 0 not checked. [2024-05-06 12:32:13,301 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [865584303] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 12:32:13,301 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 12:32:13,301 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 15, 15] total 63 [2024-05-06 12:32:13,301 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [314575527] [2024-05-06 12:32:13,301 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 12:32:13,302 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 63 states [2024-05-06 12:32:13,302 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 12:32:13,303 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2024-05-06 12:32:13,304 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=316, Invalid=3590, Unknown=0, NotChecked=0, Total=3906 [2024-05-06 12:32:13,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:32:13,304 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 12:32:13,305 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 63 states, 63 states have (on average 8.777777777777779) internal successors, (553), 63 states have internal predecessors, (553), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 12:32:13,305 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-06 12:32:13,305 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:32:14,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:32:16,888 INFO L85 PathProgramCache]: Analyzing trace with hash -1174434155, now seen corresponding path program 3 times [2024-05-06 12:32:16,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:16,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:16,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:18,217 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 2 proven. 30 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 12:32:18,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:18,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:18,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:18,877 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 2 proven. 30 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 12:32:18,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-06 12:32:18,898 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 12:32:18,908 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-05-06 12:32:19,106 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable346,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable347,SelfDestructingSolverStorable345 [2024-05-06 12:32:19,106 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-06 12:32:19,107 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 12:32:19,107 INFO L85 PathProgramCache]: Analyzing trace with hash 840432055, now seen corresponding path program 3 times [2024-05-06 12:32:19,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 12:32:19,107 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [731433687] [2024-05-06 12:32:19,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:19,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:19,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:20,316 INFO L134 CoverageAnalysis]: Checked inductivity of 482 backedges. 174 proven. 235 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 12:32:20,316 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 12:32:20,316 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [731433687] [2024-05-06 12:32:20,316 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [731433687] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 12:32:20,317 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1914772050] [2024-05-06 12:32:20,317 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-06 12:32:20,317 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 12:32:20,317 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 12:32:20,318 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 12:32:20,320 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-05-06 12:32:22,233 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2024-05-06 12:32:22,233 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 12:32:22,239 INFO L262 TraceCheckSpWp]: Trace formula consists of 837 conjuncts, 47 conjunts are in the unsatisfiable core [2024-05-06 12:32:22,244 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 12:32:23,917 INFO L134 CoverageAnalysis]: Checked inductivity of 482 backedges. 366 proven. 24 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2024-05-06 12:32:23,917 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 12:32:24,942 INFO L134 CoverageAnalysis]: Checked inductivity of 482 backedges. 351 proven. 24 refuted. 0 times theorem prover too weak. 107 trivial. 0 not checked. [2024-05-06 12:32:24,942 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1914772050] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 12:32:24,942 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 12:32:24,942 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 35, 24] total 95 [2024-05-06 12:32:24,942 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1826150789] [2024-05-06 12:32:24,942 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 12:32:24,943 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 95 states [2024-05-06 12:32:24,943 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 12:32:24,944 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 95 interpolants. [2024-05-06 12:32:24,947 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=647, Invalid=8283, Unknown=0, NotChecked=0, Total=8930 [2024-05-06 12:32:24,947 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:32:24,947 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 12:32:24,947 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 95 states, 95 states have (on average 9.642105263157895) internal successors, (916), 95 states have internal predecessors, (916), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 12:32:24,948 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-06 12:32:24,948 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 12:32:24,948 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:32:27,683 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:32:27,853 INFO L85 PathProgramCache]: Analyzing trace with hash 1483714933, now seen corresponding path program 4 times [2024-05-06 12:32:27,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:27,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:27,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:28,909 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 4 proven. 77 refuted. 0 times theorem prover too weak. 227 trivial. 0 not checked. [2024-05-06 12:32:28,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:28,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:28,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:29,368 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 4 proven. 77 refuted. 0 times theorem prover too weak. 227 trivial. 0 not checked. [2024-05-06 12:32:29,407 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-06 12:32:29,407 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 12:32:29,407 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2024-05-06 12:32:29,420 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-05-06 12:32:29,608 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable350,SelfDestructingSolverStorable348,SelfDestructingSolverStorable349,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 12:32:29,608 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-06 12:32:29,608 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 12:32:29,608 INFO L85 PathProgramCache]: Analyzing trace with hash -72915817, now seen corresponding path program 4 times [2024-05-06 12:32:29,608 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 12:32:29,608 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [289585024] [2024-05-06 12:32:29,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:29,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:29,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:30,241 INFO L134 CoverageAnalysis]: Checked inductivity of 686 backedges. 291 proven. 147 refuted. 0 times theorem prover too weak. 248 trivial. 0 not checked. [2024-05-06 12:32:30,242 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 12:32:30,242 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [289585024] [2024-05-06 12:32:30,242 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [289585024] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 12:32:30,242 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [720823454] [2024-05-06 12:32:30,242 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-05-06 12:32:30,242 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 12:32:30,242 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 12:32:30,243 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 12:32:30,244 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-05-06 12:32:30,918 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-05-06 12:32:30,918 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 12:32:30,920 INFO L262 TraceCheckSpWp]: Trace formula consists of 882 conjuncts, 26 conjunts are in the unsatisfiable core [2024-05-06 12:32:30,925 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 12:32:31,808 INFO L134 CoverageAnalysis]: Checked inductivity of 686 backedges. 232 proven. 117 refuted. 0 times theorem prover too weak. 337 trivial. 0 not checked. [2024-05-06 12:32:31,808 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 12:32:32,800 INFO L134 CoverageAnalysis]: Checked inductivity of 686 backedges. 274 proven. 75 refuted. 0 times theorem prover too weak. 337 trivial. 0 not checked. [2024-05-06 12:32:32,800 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [720823454] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 12:32:32,800 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 12:32:32,800 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 27, 27] total 74 [2024-05-06 12:32:32,800 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [792352875] [2024-05-06 12:32:32,800 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 12:32:32,801 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 74 states [2024-05-06 12:32:32,801 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 12:32:32,802 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2024-05-06 12:32:32,804 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=603, Invalid=4799, Unknown=0, NotChecked=0, Total=5402 [2024-05-06 12:32:32,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:32:32,804 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 12:32:32,804 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 74 states, 74 states have (on average 8.986486486486486) internal successors, (665), 74 states have internal predecessors, (665), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 12:32:32,804 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-06 12:32:32,804 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 12:32:32,805 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 37 states. [2024-05-06 12:32:32,805 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:32:34,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 12:32:36,325 INFO L85 PathProgramCache]: Analyzing trace with hash -1444015496, now seen corresponding path program 5 times [2024-05-06 12:32:36,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:36,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:36,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:38,001 INFO L134 CoverageAnalysis]: Checked inductivity of 452 backedges. 50 proven. 65 refuted. 0 times theorem prover too weak. 337 trivial. 0 not checked. [2024-05-06 12:32:38,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:38,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:38,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:38,495 INFO L134 CoverageAnalysis]: Checked inductivity of 452 backedges. 50 proven. 65 refuted. 0 times theorem prover too weak. 337 trivial. 0 not checked. [2024-05-06 12:32:38,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-06 12:32:38,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 12:32:38,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2024-05-06 12:32:38,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-06 12:32:38,521 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-05-06 12:32:38,713 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable351,6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable352,SelfDestructingSolverStorable353 [2024-05-06 12:32:38,713 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-06 12:32:38,713 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 12:32:38,713 INFO L85 PathProgramCache]: Analyzing trace with hash -1026046758, now seen corresponding path program 5 times [2024-05-06 12:32:38,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 12:32:38,714 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1785030311] [2024-05-06 12:32:38,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 12:32:38,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 12:32:38,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 12:32:39,354 INFO L134 CoverageAnalysis]: Checked inductivity of 830 backedges. 211 proven. 245 refuted. 0 times theorem prover too weak. 374 trivial. 0 not checked. [2024-05-06 12:32:39,354 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 12:32:39,354 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1785030311] [2024-05-06 12:32:39,354 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1785030311] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 12:32:39,354 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1917820549] [2024-05-06 12:32:39,354 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-05-06 12:32:39,354 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 12:32:39,354 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 12:32:39,355 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 12:32:39,358 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process Received shutdown request... [2024-05-06 12:43:37,487 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 12:43:37,487 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 12:43:37,487 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 12:43:38,517 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Ended with exit code 0 [2024-05-06 12:43:38,537 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 [2024-05-06 12:43:38,687 WARN L435 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forcibly destroying the process [2024-05-06 12:43:38,707 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 137 [2024-05-06 12:43:38,708 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-05-06 12:43:38,708 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-05-06 12:43:38,708 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2024-05-06 12:43:38,709 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1609630118] [2024-05-06 12:43:38,709 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-05-06 12:43:38,709 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2024-05-06 12:43:38,709 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 12:43:38,710 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-05-06 12:43:38,710 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=606, Unknown=0, NotChecked=0, Total=702 [2024-05-06 12:43:38,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:43:38,710 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 12:43:38,711 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 14.444444444444445) internal successors, (390), 27 states have internal predecessors, (390), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 12:43:38,711 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-06 12:43:38,711 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 12:43:38,711 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 37 states. [2024-05-06 12:43:38,711 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-06 12:43:38,711 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 12:43:38,711 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable354 [2024-05-06 12:43:38,712 WARN L619 AbstractCegarLoop]: Verification canceled: while executing DepthFirstTraversal. [2024-05-06 12:43:38,714 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (3 of 4 remaining) [2024-05-06 12:43:38,714 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 4 remaining) [2024-05-06 12:43:38,715 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 4 remaining) [2024-05-06 12:43:38,715 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 4 remaining) [2024-05-06 12:43:38,717 INFO L448 BasicCegarLoop]: Path program histogram: [94, 10, 10, 10, 10, 10, 10, 6, 5, 5, 2, 2, 2, 2, 1, 1] [2024-05-06 12:43:38,719 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-06 12:43:38,720 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-06 12:43:38,722 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 06.05 12:43:38 BasicIcfg [2024-05-06 12:43:38,722 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-06 12:43:38,723 INFO L158 Benchmark]: Toolchain (without parser) took 856898.34ms. Allocated memory was 297.8MB in the beginning and 1.9GB in the end (delta: 1.6GB). Free memory was 228.5MB in the beginning and 551.5MB in the end (delta: -323.0MB). Peak memory consumption was 1.3GB. Max. memory is 8.0GB. [2024-05-06 12:43:38,723 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 179.3MB. Free memory is still 145.3MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 12:43:38,723 INFO L158 Benchmark]: CACSL2BoogieTranslator took 198.27ms. Allocated memory is still 297.8MB. Free memory was 228.3MB in the beginning and 216.4MB in the end (delta: 11.9MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. [2024-05-06 12:43:38,723 INFO L158 Benchmark]: Boogie Procedure Inliner took 51.59ms. Allocated memory is still 297.8MB. Free memory was 216.4MB in the beginning and 266.9MB in the end (delta: -50.5MB). Peak memory consumption was 5.5MB. Max. memory is 8.0GB. [2024-05-06 12:43:38,723 INFO L158 Benchmark]: Boogie Preprocessor took 34.38ms. Allocated memory is still 297.8MB. Free memory was 266.9MB in the beginning and 264.8MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 12:43:38,723 INFO L158 Benchmark]: RCFGBuilder took 539.30ms. Allocated memory is still 297.8MB. Free memory was 264.3MB in the beginning and 239.6MB in the end (delta: 24.6MB). Peak memory consumption was 25.2MB. Max. memory is 8.0GB. [2024-05-06 12:43:38,724 INFO L158 Benchmark]: TraceAbstraction took 856069.42ms. Allocated memory was 297.8MB in the beginning and 1.9GB in the end (delta: 1.6GB). Free memory was 238.6MB in the beginning and 551.5MB in the end (delta: -312.9MB). Peak memory consumption was 1.3GB. Max. memory is 8.0GB. [2024-05-06 12:43:38,724 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 179.3MB. Free memory is still 145.3MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 198.27ms. Allocated memory is still 297.8MB. Free memory was 228.3MB in the beginning and 216.4MB in the end (delta: 11.9MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 51.59ms. Allocated memory is still 297.8MB. Free memory was 216.4MB in the beginning and 266.9MB in the end (delta: -50.5MB). Peak memory consumption was 5.5MB. Max. memory is 8.0GB. * Boogie Preprocessor took 34.38ms. Allocated memory is still 297.8MB. Free memory was 266.9MB in the beginning and 264.8MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 539.30ms. Allocated memory is still 297.8MB. Free memory was 264.3MB in the beginning and 239.6MB in the end (delta: 24.6MB). Peak memory consumption was 25.2MB. Max. memory is 8.0GB. * TraceAbstraction took 856069.42ms. Allocated memory was 297.8MB in the beginning and 1.9GB in the end (delta: 1.6GB). Free memory was 238.6MB in the beginning and 551.5MB in the end (delta: -312.9MB). Peak memory consumption was 1.3GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 155777, independent: 147992, independent conditional: 80343, independent unconditional: 67649, dependent: 7785, dependent conditional: 6638, dependent unconditional: 1147, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 150284, independent: 147992, independent conditional: 80343, independent unconditional: 67649, dependent: 2292, dependent conditional: 1145, dependent unconditional: 1147, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 150284, independent: 147992, independent conditional: 80343, independent unconditional: 67649, dependent: 2292, dependent conditional: 1145, dependent unconditional: 1147, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 150284, independent: 147992, independent conditional: 80343, independent unconditional: 67649, dependent: 2292, dependent conditional: 1145, dependent unconditional: 1147, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 153721, independent: 147992, independent conditional: 4822, independent unconditional: 143170, dependent: 5729, dependent conditional: 1145, dependent unconditional: 4584, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 153721, independent: 147992, independent conditional: 1403, independent unconditional: 146589, dependent: 5729, dependent conditional: 0, dependent unconditional: 5729, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 153721, independent: 147992, independent conditional: 1403, independent unconditional: 146589, dependent: 5729, dependent conditional: 0, dependent unconditional: 5729, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1540, independent: 1504, independent conditional: 0, independent unconditional: 1504, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1540, independent: 1504, independent conditional: 0, independent unconditional: 1504, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 36, independent: 0, independent conditional: 0, independent unconditional: 0, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 36, independent: 0, independent conditional: 0, independent unconditional: 0, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 78, independent: 0, independent conditional: 0, independent unconditional: 0, dependent: 78, dependent conditional: 0, dependent unconditional: 78, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 153721, independent: 146488, independent conditional: 1403, independent unconditional: 145085, dependent: 5693, dependent conditional: 0, dependent unconditional: 5693, unknown: 1540, unknown conditional: 0, unknown unconditional: 1540] , Statistics on independence cache: Total cache size (in pairs): 1540, Positive cache size: 1504, Positive conditional cache size: 0, Positive unconditional cache size: 1504, Negative cache size: 36, Negative conditional cache size: 0, Negative unconditional cache size: 36, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 4564, Maximal queried relation: 1, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 153721, independent: 147992, independent conditional: 4822, independent unconditional: 143170, dependent: 5729, dependent conditional: 1145, dependent unconditional: 4584, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 153721, independent: 147992, independent conditional: 1403, independent unconditional: 146589, dependent: 5729, dependent conditional: 0, dependent unconditional: 5729, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 153721, independent: 147992, independent conditional: 1403, independent unconditional: 146589, dependent: 5729, dependent conditional: 0, dependent unconditional: 5729, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1540, independent: 1504, independent conditional: 0, independent unconditional: 1504, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1540, independent: 1504, independent conditional: 0, independent unconditional: 1504, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 36, independent: 0, independent conditional: 0, independent unconditional: 0, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 36, independent: 0, independent conditional: 0, independent unconditional: 0, dependent: 36, dependent conditional: 0, dependent unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 78, independent: 0, independent conditional: 0, independent unconditional: 0, dependent: 78, dependent conditional: 0, dependent unconditional: 78, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 153721, independent: 146488, independent conditional: 1403, independent unconditional: 145085, dependent: 5693, dependent conditional: 0, dependent unconditional: 5693, unknown: 1540, unknown conditional: 0, unknown unconditional: 1540] , Statistics on independence cache: Total cache size (in pairs): 1540, Positive cache size: 1504, Positive conditional cache size: 0, Positive unconditional cache size: 1504, Negative cache size: 36, Negative conditional cache size: 0, Negative unconditional cache size: 36, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 4564 ], Independence queries for same thread: 5493 - TimeoutResultAtElement [Line: 97]: Timeout (TraceAbstraction) Unable to prove that a call to reach_error is unreachable Cancelled while executing DepthFirstTraversal. - TimeoutResultAtElement [Line: 88]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while executing DepthFirstTraversal. - TimeoutResultAtElement [Line: 89]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while executing DepthFirstTraversal. - TimeoutResultAtElement [Line: 87]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while executing DepthFirstTraversal. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 7 procedures, 325 locations, 4 error locations. Started 1 CEGAR loops. OverallTime: 855.9s, OverallIterations: 5, TraceHistogramMax: 0, PathProgramHistogramMax: 94, EmptinessCheckTime: 181.5s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 105, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 1.6s SatisfiabilityAnalysisTime, 10.1s InterpolantComputationTime, 4015 NumberOfCodeBlocks, 3977 NumberOfCodeBlocksAsserted, 14 NumberOfCheckSat, 5746 ConstructedInterpolants, 0 QuantifiedInterpolants, 21197 SizeOfPredicates, 85 NumberOfNonLiveVariables, 3323 ConjunctsInSsa, 97 ConjunctsInUnsatCore, 13 InterpolantComputations, 0 PerfectInterpolantSequences, 5652/6770 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 174.2s, ConditionalCommutativityIAIntegrations: 0, ConditionalCommutativityDFSRestarts: 2, ConditionalCommutativityConditionCalculations: 175, ConditionalCommutativityTraceChecks: 175, ConditionalCommutativityImperfectProofs: 173 RESULT: Ultimate could not prove your program: Timeout Completed graceful shutdown