/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 10 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/pthread-wmm/safe016_rmo.oepc.i -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 10:04:41,009 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 10:04:41,072 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 10:04:41,076 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 10:04:41,077 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 10:04:41,106 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 10:04:41,106 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 10:04:41,106 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 10:04:41,107 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 10:04:41,110 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 10:04:41,110 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 10:04:41,110 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 10:04:41,110 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 10:04:41,112 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 10:04:41,112 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 10:04:41,112 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 10:04:41,112 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 10:04:41,112 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 10:04:41,112 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 10:04:41,113 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 10:04:41,113 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 10:04:41,113 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 10:04:41,113 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 10:04:41,113 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 10:04:41,113 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 10:04:41,114 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 10:04:41,114 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 10:04:41,114 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 10:04:41,114 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 10:04:41,114 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 10:04:41,115 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 10:04:41,115 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 10:04:41,115 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 10:04:41,116 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 10:04:41,116 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 10:04:41,116 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 10:04:41,116 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 10:04:41,116 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 10:04:41,116 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 10:04:41,116 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 10 [2024-05-06 10:04:41,313 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 10:04:41,333 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 10:04:41,335 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 10:04:41,336 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 10:04:41,337 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 10:04:41,337 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-wmm/safe016_rmo.oepc.i [2024-05-06 10:04:42,358 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 10:04:42,569 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 10:04:42,570 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe016_rmo.oepc.i [2024-05-06 10:04:42,583 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/10512ebbc/41b8c8a44a904ce19282e3748850fe8f/FLAG650706005 [2024-05-06 10:04:42,601 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/10512ebbc/41b8c8a44a904ce19282e3748850fe8f [2024-05-06 10:04:42,603 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 10:04:42,604 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 10:04:42,605 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 10:04:42,605 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 10:04:42,619 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 10:04:42,620 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 10:04:42" (1/1) ... [2024-05-06 10:04:42,620 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@640a85d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:42, skipping insertion in model container [2024-05-06 10:04:42,620 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 10:04:42" (1/1) ... [2024-05-06 10:04:42,672 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 10:04:42,827 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe016_rmo.oepc.i[993,1006] [2024-05-06 10:04:43,045 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 10:04:43,061 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 10:04:43,069 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe016_rmo.oepc.i[993,1006] [2024-05-06 10:04:43,099 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 10:04:43,125 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 10:04:43,126 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 10:04:43,131 INFO L206 MainTranslator]: Completed translation [2024-05-06 10:04:43,131 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43 WrapperNode [2024-05-06 10:04:43,131 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 10:04:43,133 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 10:04:43,133 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 10:04:43,133 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 10:04:43,139 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43" (1/1) ... [2024-05-06 10:04:43,170 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43" (1/1) ... [2024-05-06 10:04:43,189 INFO L138 Inliner]: procedures = 177, calls = 85, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 187 [2024-05-06 10:04:43,189 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 10:04:43,190 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 10:04:43,190 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 10:04:43,190 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 10:04:43,198 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43" (1/1) ... [2024-05-06 10:04:43,198 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43" (1/1) ... [2024-05-06 10:04:43,203 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43" (1/1) ... [2024-05-06 10:04:43,203 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43" (1/1) ... [2024-05-06 10:04:43,211 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43" (1/1) ... [2024-05-06 10:04:43,213 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43" (1/1) ... [2024-05-06 10:04:43,215 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43" (1/1) ... [2024-05-06 10:04:43,216 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43" (1/1) ... [2024-05-06 10:04:43,219 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 10:04:43,220 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 10:04:43,220 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 10:04:43,220 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 10:04:43,221 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43" (1/1) ... [2024-05-06 10:04:43,233 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 10:04:43,244 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 10:04:43,264 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 10:04:43,271 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 10:04:43,299 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 10:04:43,299 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 10:04:43,299 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 10:04:43,300 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 10:04:43,300 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 10:04:43,300 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 10:04:43,300 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2024-05-06 10:04:43,300 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2024-05-06 10:04:43,300 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2024-05-06 10:04:43,300 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2024-05-06 10:04:43,300 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2024-05-06 10:04:43,300 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2024-05-06 10:04:43,300 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2024-05-06 10:04:43,300 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2024-05-06 10:04:43,300 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 10:04:43,301 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 10:04:43,301 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 10:04:43,301 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 10:04:43,302 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 10:04:43,415 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 10:04:43,416 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 10:04:43,739 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 10:04:43,940 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 10:04:43,941 INFO L309 CfgBuilder]: Removed 0 assume(true) statements. [2024-05-06 10:04:43,942 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 10:04:43 BoogieIcfgContainer [2024-05-06 10:04:43,942 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 10:04:43,944 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 10:04:43,944 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 10:04:43,947 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 10:04:43,947 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 10:04:42" (1/3) ... [2024-05-06 10:04:43,948 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@735f6795 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 10:04:43, skipping insertion in model container [2024-05-06 10:04:43,948 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:04:43" (2/3) ... [2024-05-06 10:04:43,949 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@735f6795 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 10:04:43, skipping insertion in model container [2024-05-06 10:04:43,949 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 10:04:43" (3/3) ... [2024-05-06 10:04:43,950 INFO L112 eAbstractionObserver]: Analyzing ICFG safe016_rmo.oepc.i [2024-05-06 10:04:43,956 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 10:04:43,963 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 10:04:43,964 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 10:04:43,964 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 10:04:44,057 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-05-06 10:04:44,099 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 10:04:44,099 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 10:04:44,099 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 10:04:44,102 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 10:04:44,122 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 10:04:44,133 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 10:04:44,144 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 10:04:44,145 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 10:04:44,152 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1b78ef47, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=10, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 10:04:44,152 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-06 10:04:44,235 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 10:04:44,239 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 10:04:44,240 INFO L85 PathProgramCache]: Analyzing trace with hash -1063495308, now seen corresponding path program 1 times [2024-05-06 10:04:44,247 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 10:04:44,248 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1825230562] [2024-05-06 10:04:44,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:04:44,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:04:44,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 10:04:44,661 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 10:04:44,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 10:04:44,661 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1825230562] [2024-05-06 10:04:44,662 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1825230562] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 10:04:44,662 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 10:04:44,662 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-05-06 10:04:44,663 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [639238294] [2024-05-06 10:04:44,665 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 10:04:44,671 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-05-06 10:04:44,671 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 10:04:44,689 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 10:04:44,689 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-05-06 10:04:44,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:04:44,691 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 10:04:44,693 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 59.0) internal successors, (118), 2 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 10:04:44,693 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:04:44,763 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:04:44,763 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-05-06 10:04:44,763 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 10:04:44,764 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 10:04:44,764 INFO L85 PathProgramCache]: Analyzing trace with hash 1356852720, now seen corresponding path program 1 times [2024-05-06 10:04:44,764 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 10:04:44,764 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1512372065] [2024-05-06 10:04:44,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:04:44,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:04:44,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 10:04:45,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 10:04:45,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 10:04:45,528 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1512372065] [2024-05-06 10:04:45,528 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1512372065] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 10:04:45,528 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 10:04:45,529 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-05-06 10:04:45,529 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1778041750] [2024-05-06 10:04:45,529 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 10:04:45,530 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-05-06 10:04:45,530 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 10:04:45,530 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 10:04:45,530 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-05-06 10:04:45,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:04:45,531 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 10:04:45,531 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.714285714285715) internal successors, (117), 7 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 10:04:45,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:04:45,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:06:02,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-06 10:06:02,120 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:06,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:06,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:06,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-06 10:06:09,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:09,409 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-06 10:06:09,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:10,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:10,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-06 10:06:10,359 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:10,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-06 10:06:10,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:11,210 INFO L85 PathProgramCache]: Analyzing trace with hash -441875712, now seen corresponding path program 1 times [2024-05-06 10:06:11,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:06:11,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:06:11,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 10:06:11,500 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 10:06:11,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:06:11,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:06:11,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 10:06:11,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 10:06:11,750 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-05-06 10:06:11,750 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2024-05-06 10:06:11,926 INFO L85 PathProgramCache]: Analyzing trace with hash -2145672222, now seen corresponding path program 1 times [2024-05-06 10:06:11,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:06:11,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:06:11,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:11,985 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:06:12,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:12,096 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:06:12,096 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-06 10:06:12,096 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,SelfDestructingSolverStorable3,SelfDestructingSolverStorable2,SelfDestructingSolverStorable1 [2024-05-06 10:06:12,097 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 10:06:12,097 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 10:06:12,097 INFO L85 PathProgramCache]: Analyzing trace with hash -1413620616, now seen corresponding path program 1 times [2024-05-06 10:06:12,097 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 10:06:12,097 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [303387218] [2024-05-06 10:06:12,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:06:12,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:06:12,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 10:06:12,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 10:06:12,403 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 10:06:12,403 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [303387218] [2024-05-06 10:06:12,404 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [303387218] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 10:06:12,404 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 10:06:12,404 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-05-06 10:06:12,404 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [499332120] [2024-05-06 10:06:12,404 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 10:06:12,405 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-06 10:06:12,405 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 10:06:12,406 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 10:06:12,406 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-05-06 10:06:12,408 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:06:12,408 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 10:06:12,410 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 10:06:12,410 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:06:12,410 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-06 10:06:12,410 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:06:12,515 INFO L85 PathProgramCache]: Analyzing trace with hash -2145672222, now seen corresponding path program 2 times [2024-05-06 10:06:12,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:06:12,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:06:12,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:12,542 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:06:12,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:12,665 INFO L85 PathProgramCache]: Analyzing trace with hash 972859065, now seen corresponding path program 1 times [2024-05-06 10:06:12,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:06:12,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:06:12,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:12,691 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:06:12,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:12,789 INFO L85 PathProgramCache]: Analyzing trace with hash -1530313311, now seen corresponding path program 1 times [2024-05-06 10:06:12,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:06:12,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:06:12,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:12,819 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:06:12,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:19,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:19,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:19,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:19,843 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:19,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:06:20,992 INFO L85 PathProgramCache]: Analyzing trace with hash -821478587, now seen corresponding path program 1 times [2024-05-06 10:06:20,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:06:20,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:06:21,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 10:06:21,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 10:06:21,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:06:21,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:06:21,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 10:06:21,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 10:06:21,487 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 10:06:21,488 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=128, Invalid=522, Unknown=0, NotChecked=0, Total=650 [2024-05-06 10:06:21,599 INFO L85 PathProgramCache]: Analyzing trace with hash -2145672222, now seen corresponding path program 3 times [2024-05-06 10:06:21,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:06:21,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:06:21,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:21,624 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:06:21,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:21,756 INFO L85 PathProgramCache]: Analyzing trace with hash 972859065, now seen corresponding path program 2 times [2024-05-06 10:06:21,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:06:21,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:06:21,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:21,780 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:06:21,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:21,927 INFO L85 PathProgramCache]: Analyzing trace with hash -1530313311, now seen corresponding path program 2 times [2024-05-06 10:06:21,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:06:21,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:06:22,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:06:22,015 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:06:22,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:02,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:07:03,499 INFO L85 PathProgramCache]: Analyzing trace with hash 1756717084, now seen corresponding path program 1 times [2024-05-06 10:07:03,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:03,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:03,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:03,519 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:03,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:04,740 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:07:05,630 INFO L85 PathProgramCache]: Analyzing trace with hash 1996330980, now seen corresponding path program 1 times [2024-05-06 10:07:05,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:05,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:05,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:05,644 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:05,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:06,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:07:09,280 INFO L85 PathProgramCache]: Analyzing trace with hash 1449871156, now seen corresponding path program 1 times [2024-05-06 10:07:09,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:09,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:09,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:09,297 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:09,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:10,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:07:14,601 INFO L85 PathProgramCache]: Analyzing trace with hash 1709338062, now seen corresponding path program 1 times [2024-05-06 10:07:14,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:14,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:14,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:14,617 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:14,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:15,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:07:18,334 INFO L85 PathProgramCache]: Analyzing trace with hash -637596632, now seen corresponding path program 1 times [2024-05-06 10:07:18,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:18,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:18,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:18,349 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:18,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:19,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:07:20,493 INFO L85 PathProgramCache]: Analyzing trace with hash 117979697, now seen corresponding path program 1 times [2024-05-06 10:07:20,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:20,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:20,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:20,509 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:20,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:21,620 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:07:22,572 INFO L85 PathProgramCache]: Analyzing trace with hash 1250731814, now seen corresponding path program 1 times [2024-05-06 10:07:22,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:22,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:22,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:22,604 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:22,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:23,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:07:26,155 INFO L85 PathProgramCache]: Analyzing trace with hash 1425819613, now seen corresponding path program 1 times [2024-05-06 10:07:26,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:26,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:26,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:26,170 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:26,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:27,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:07:27,690 INFO L85 PathProgramCache]: Analyzing trace with hash 805381283, now seen corresponding path program 1 times [2024-05-06 10:07:27,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:27,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:27,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:27,706 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:27,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:33,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:07:37,726 INFO L85 PathProgramCache]: Analyzing trace with hash 2016929227, now seen corresponding path program 1 times [2024-05-06 10:07:37,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:37,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:37,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:37,740 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:37,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:38,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:07:41,377 INFO L85 PathProgramCache]: Analyzing trace with hash -1320411051, now seen corresponding path program 1 times [2024-05-06 10:07:41,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:41,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:41,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:41,392 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:41,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:42,800 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:07:43,044 INFO L85 PathProgramCache]: Analyzing trace with hash 386869522, now seen corresponding path program 1 times [2024-05-06 10:07:43,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:43,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:43,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:43,058 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:43,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:44,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:07:44,864 INFO L85 PathProgramCache]: Analyzing trace with hash 817640290, now seen corresponding path program 1 times [2024-05-06 10:07:44,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:44,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:44,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:44,894 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:44,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:46,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:07:47,117 INFO L85 PathProgramCache]: Analyzing trace with hash 1691449265, now seen corresponding path program 1 times [2024-05-06 10:07:47,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:47,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:47,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:47,130 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:47,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:47,923 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 10:07:47,924 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 10:07:48,176 INFO L85 PathProgramCache]: Analyzing trace with hash -1512317691, now seen corresponding path program 1 times [2024-05-06 10:07:48,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:48,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:48,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 10:07:48,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 10:07:48,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:48,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:48,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 10:07:48,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 10:07:48,345 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-06 10:07:48,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=170, Invalid=822, Unknown=0, NotChecked=0, Total=992 [2024-05-06 10:07:49,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:07:50,237 INFO L85 PathProgramCache]: Analyzing trace with hash 805381283, now seen corresponding path program 2 times [2024-05-06 10:07:50,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:50,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:50,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:50,249 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:50,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:51,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:07:51,882 INFO L85 PathProgramCache]: Analyzing trace with hash 386869522, now seen corresponding path program 2 times [2024-05-06 10:07:51,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:51,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:51,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:51,895 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:51,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:53,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:07:53,810 INFO L85 PathProgramCache]: Analyzing trace with hash 817640290, now seen corresponding path program 2 times [2024-05-06 10:07:53,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:53,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:53,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:53,821 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:53,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:55,159 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:07:55,487 INFO L85 PathProgramCache]: Analyzing trace with hash 1691449265, now seen corresponding path program 2 times [2024-05-06 10:07:55,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:07:55,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:07:55,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:07:55,503 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:07:55,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:08,746 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:09:09,074 INFO L85 PathProgramCache]: Analyzing trace with hash 362792481, now seen corresponding path program 1 times [2024-05-06 10:09:09,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:09,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:09,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:09,083 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:09,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:09,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-06 10:09:10,119 INFO L85 PathProgramCache]: Analyzing trace with hash -1780932874, now seen corresponding path program 1 times [2024-05-06 10:09:10,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:10,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:10,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:10,139 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:10,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:11,712 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:09:13,103 INFO L85 PathProgramCache]: Analyzing trace with hash 1430015482, now seen corresponding path program 1 times [2024-05-06 10:09:13,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:13,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:13,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:13,117 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:13,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:14,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:09:15,398 INFO L85 PathProgramCache]: Analyzing trace with hash 1293055558, now seen corresponding path program 1 times [2024-05-06 10:09:15,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:15,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:15,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:15,412 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:15,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:16,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:09:17,587 INFO L85 PathProgramCache]: Analyzing trace with hash -789572462, now seen corresponding path program 1 times [2024-05-06 10:09:17,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:17,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:17,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:17,599 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:17,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:18,729 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:09:19,703 INFO L85 PathProgramCache]: Analyzing trace with hash 251624624, now seen corresponding path program 1 times [2024-05-06 10:09:19,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:19,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:19,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:19,716 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:19,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:20,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:09:23,195 INFO L85 PathProgramCache]: Analyzing trace with hash -546072314, now seen corresponding path program 1 times [2024-05-06 10:09:23,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:23,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:23,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:23,208 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:23,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:24,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:09:28,476 INFO L85 PathProgramCache]: Analyzing trace with hash 813668755, now seen corresponding path program 1 times [2024-05-06 10:09:28,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:28,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:28,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:28,488 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:28,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:29,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:09:30,660 INFO L85 PathProgramCache]: Analyzing trace with hash 718984068, now seen corresponding path program 1 times [2024-05-06 10:09:30,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:30,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:30,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:30,672 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:30,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:31,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:09:32,921 INFO L85 PathProgramCache]: Analyzing trace with hash 438835135, now seen corresponding path program 1 times [2024-05-06 10:09:32,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:32,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:32,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:32,934 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:32,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:34,038 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:09:38,252 INFO L85 PathProgramCache]: Analyzing trace with hash 1369829195, now seen corresponding path program 1 times [2024-05-06 10:09:38,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:38,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:38,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:38,265 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:38,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:39,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 10:09:40,399 INFO L85 PathProgramCache]: Analyzing trace with hash 1429661397, now seen corresponding path program 1 times [2024-05-06 10:09:40,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:40,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:40,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:40,423 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:40,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:44,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:09:45,240 INFO L85 PathProgramCache]: Analyzing trace with hash 625656400, now seen corresponding path program 1 times [2024-05-06 10:09:45,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:45,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:45,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:45,250 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:45,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:45,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-06 10:09:45,480 INFO L85 PathProgramCache]: Analyzing trace with hash -2079487433, now seen corresponding path program 1 times [2024-05-06 10:09:45,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:45,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:45,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:45,491 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:45,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:45,730 INFO L85 PathProgramCache]: Analyzing trace with hash 1075342941, now seen corresponding path program 1 times [2024-05-06 10:09:45,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:45,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:45,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:45,745 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:45,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:45,906 INFO L85 PathProgramCache]: Analyzing trace with hash 1004521585, now seen corresponding path program 1 times [2024-05-06 10:09:45,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:45,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:45,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:45,922 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:45,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,049 INFO L85 PathProgramCache]: Analyzing trace with hash 863690437, now seen corresponding path program 1 times [2024-05-06 10:09:46,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:46,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:46,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,064 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:46,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,201 INFO L85 PathProgramCache]: Analyzing trace with hash 1136241479, now seen corresponding path program 1 times [2024-05-06 10:09:46,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:46,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:46,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,217 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:46,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,376 INFO L85 PathProgramCache]: Analyzing trace with hash 2114866385, now seen corresponding path program 1 times [2024-05-06 10:09:46,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:46,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:46,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,399 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:46,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,502 INFO L85 PathProgramCache]: Analyzing trace with hash -1455798588, now seen corresponding path program 1 times [2024-05-06 10:09:46,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:46,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:46,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,516 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:46,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,619 INFO L85 PathProgramCache]: Analyzing trace with hash 645776915, now seen corresponding path program 1 times [2024-05-06 10:09:46,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:46,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:46,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,634 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:46,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,755 INFO L85 PathProgramCache]: Analyzing trace with hash -533353960, now seen corresponding path program 1 times [2024-05-06 10:09:46,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:46,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:46,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,771 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:46,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,957 INFO L85 PathProgramCache]: Analyzing trace with hash -910462964, now seen corresponding path program 1 times [2024-05-06 10:09:46,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:46,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:46,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:46,973 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:46,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:47,123 INFO L85 PathProgramCache]: Analyzing trace with hash 940463330, now seen corresponding path program 1 times [2024-05-06 10:09:47,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:47,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:47,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:47,165 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:47,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:47,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-06 10:09:47,557 INFO L85 PathProgramCache]: Analyzing trace with hash 469058803, now seen corresponding path program 1 times [2024-05-06 10:09:47,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:47,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:47,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:47,569 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:47,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:49,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:09:49,799 INFO L85 PathProgramCache]: Analyzing trace with hash 1885846616, now seen corresponding path program 1 times [2024-05-06 10:09:49,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:49,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:49,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:49,806 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:49,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:50,297 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-05-06 10:09:50,444 INFO L85 PathProgramCache]: Analyzing trace with hash 1262381781, now seen corresponding path program 2 times [2024-05-06 10:09:50,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:50,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:50,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:50,455 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:50,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:51,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-06 10:09:52,034 INFO L85 PathProgramCache]: Analyzing trace with hash -2013464940, now seen corresponding path program 1 times [2024-05-06 10:09:52,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:52,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:52,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:52,048 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:52,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:52,181 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-05-06 10:09:52,308 INFO L85 PathProgramCache]: Analyzing trace with hash 2090463829, now seen corresponding path program 1 times [2024-05-06 10:09:52,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:52,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:52,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:52,319 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:52,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:52,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-05-06 10:09:52,685 INFO L85 PathProgramCache]: Analyzing trace with hash 888529045, now seen corresponding path program 1 times [2024-05-06 10:09:52,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:52,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:52,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:52,697 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:52,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:54,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:09:54,896 INFO L85 PathProgramCache]: Analyzing trace with hash -210497034, now seen corresponding path program 1 times [2024-05-06 10:09:54,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:54,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:54,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:54,912 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:54,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:55,434 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-06 10:09:55,580 INFO L85 PathProgramCache]: Analyzing trace with hash 1137365747, now seen corresponding path program 2 times [2024-05-06 10:09:55,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:55,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:55,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:55,596 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:55,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:56,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-06 10:09:56,617 INFO L85 PathProgramCache]: Analyzing trace with hash -2110882603, now seen corresponding path program 1 times [2024-05-06 10:09:56,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:56,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:56,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:56,626 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:56,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:56,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-05-06 10:09:56,911 INFO L85 PathProgramCache]: Analyzing trace with hash -1333597098, now seen corresponding path program 1 times [2024-05-06 10:09:56,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:56,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:56,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:56,923 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:56,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:58,533 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:09:58,864 INFO L85 PathProgramCache]: Analyzing trace with hash -1634965193, now seen corresponding path program 1 times [2024-05-06 10:09:58,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:09:58,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:09:58,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:09:58,887 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:09:58,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:01,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:10:01,796 INFO L85 PathProgramCache]: Analyzing trace with hash -821002635, now seen corresponding path program 1 times [2024-05-06 10:10:01,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:10:01,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:10:01,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:01,803 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:10:01,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:03,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:10:04,209 INFO L85 PathProgramCache]: Analyzing trace with hash 619356694, now seen corresponding path program 1 times [2024-05-06 10:10:04,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:10:04,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:10:04,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:04,217 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:10:04,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:04,395 INFO L85 PathProgramCache]: Analyzing trace with hash 1645513550, now seen corresponding path program 1 times [2024-05-06 10:10:04,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:10:04,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:10:04,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:04,416 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:10:04,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:04,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:10:04,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-06 10:10:04,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 10:10:04,754 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable30,SelfDestructingSolverStorable31,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable32,SelfDestructingSolverStorable33,SelfDestructingSolverStorable34,SelfDestructingSolverStorable9,SelfDestructingSolverStorable35,SelfDestructingSolverStorable36,SelfDestructingSolverStorable37,SelfDestructingSolverStorable38,SelfDestructingSolverStorable39,SelfDestructingSolverStorable40,SelfDestructingSolverStorable41,SelfDestructingSolverStorable42,SelfDestructingSolverStorable43,SelfDestructingSolverStorable44,SelfDestructingSolverStorable45,SelfDestructingSolverStorable46,SelfDestructingSolverStorable47,SelfDestructingSolverStorable48,SelfDestructingSolverStorable49,SelfDestructingSolverStorable50,SelfDestructingSolverStorable51,SelfDestructingSolverStorable52,SelfDestructingSolverStorable53,SelfDestructingSolverStorable18,SelfDestructingSolverStorable19,SelfDestructingSolverStorable10,SelfDestructingSolverStorable54,SelfDestructingSolverStorable11,SelfDestructingSolverStorable55,SelfDestructingSolverStorable12,SelfDestructingSolverStorable56,SelfDestructingSolverStorable13,SelfDestructingSolverStorable57,SelfDestructingSolverStorable14,SelfDestructingSolverStorable58,SelfDestructingSolverStorable15,SelfDestructingSolverStorable59,SelfDestructingSolverStorable16,SelfDestructingSolverStorable17,SelfDestructingSolverStorable60,SelfDestructingSolverStorable61,SelfDestructingSolverStorable62,SelfDestructingSolverStorable63,SelfDestructingSolverStorable20,SelfDestructingSolverStorable64,SelfDestructingSolverStorable29,SelfDestructingSolverStorable21,SelfDestructingSolverStorable65,SelfDestructingSolverStorable22,SelfDestructingSolverStorable66,SelfDestructingSolverStorable23,SelfDestructingSolverStorable67,SelfDestructingSolverStorable24,SelfDestructingSolverStorable68,SelfDestructingSolverStorable25,SelfDestructingSolverStorable69,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28 [2024-05-06 10:10:04,755 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 10:10:04,755 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 10:10:04,755 INFO L85 PathProgramCache]: Analyzing trace with hash -1347726594, now seen corresponding path program 2 times [2024-05-06 10:10:04,755 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 10:10:04,755 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [424433643] [2024-05-06 10:10:04,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:10:04,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:10:04,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 10:10:04,975 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 10:10:04,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 10:10:04,976 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [424433643] [2024-05-06 10:10:04,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [424433643] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 10:10:04,976 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 10:10:04,976 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-05-06 10:10:04,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1475094520] [2024-05-06 10:10:04,976 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 10:10:04,977 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-05-06 10:10:04,977 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 10:10:04,978 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 10:10:04,978 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-05-06 10:10:04,978 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:10:04,978 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 10:10:04,978 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 17.428571428571427) internal successors, (122), 7 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 10:10:04,978 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:10:04,978 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-06 10:10:04,978 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 10:10:04,978 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:10:06,876 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:10:07,266 INFO L85 PathProgramCache]: Analyzing trace with hash 1885846616, now seen corresponding path program 2 times [2024-05-06 10:10:07,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:10:07,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:10:07,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:07,273 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:10:07,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:09,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:10:09,496 INFO L85 PathProgramCache]: Analyzing trace with hash -210497034, now seen corresponding path program 2 times [2024-05-06 10:10:09,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:10:09,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:10:09,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:09,503 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:10:09,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:11,308 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:10:11,693 INFO L85 PathProgramCache]: Analyzing trace with hash -1634965193, now seen corresponding path program 2 times [2024-05-06 10:10:11,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:10:11,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:10:11,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:11,700 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:10:11,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:13,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:10:13,880 INFO L85 PathProgramCache]: Analyzing trace with hash -821002635, now seen corresponding path program 2 times [2024-05-06 10:10:13,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:10:13,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:10:13,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:13,892 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:10:13,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:15,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 10:10:16,133 INFO L85 PathProgramCache]: Analyzing trace with hash 619356694, now seen corresponding path program 2 times [2024-05-06 10:10:16,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:10:16,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:10:16,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:16,140 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:10:16,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:19,212 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:10:19,212 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-06 10:10:19,212 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 10:10:19,212 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-06 10:10:19,212 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72,SelfDestructingSolverStorable73,SelfDestructingSolverStorable74,SelfDestructingSolverStorable75,SelfDestructingSolverStorable76,SelfDestructingSolverStorable77 [2024-05-06 10:10:19,212 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 10:10:19,213 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 10:10:19,213 INFO L85 PathProgramCache]: Analyzing trace with hash -1165444380, now seen corresponding path program 3 times [2024-05-06 10:10:19,213 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 10:10:19,213 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [723922729] [2024-05-06 10:10:19,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:10:19,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:10:19,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 10:10:20,482 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 10:10:20,482 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 10:10:20,482 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [723922729] [2024-05-06 10:10:20,482 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [723922729] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 10:10:20,482 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 10:10:20,482 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2024-05-06 10:10:20,482 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1804525292] [2024-05-06 10:10:20,483 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 10:10:20,483 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-05-06 10:10:20,483 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 10:10:20,484 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-05-06 10:10:20,484 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=131, Unknown=0, NotChecked=0, Total=182 [2024-05-06 10:10:20,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:10:20,484 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 10:10:20,484 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 8.714285714285714) internal successors, (122), 14 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 10:10:20,484 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:10:20,484 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-06 10:10:20,484 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 10:10:20,484 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-06 10:10:20,484 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:10:27,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 10:10:27,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-06 10:10:27,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 10:10:27,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-06 10:10:27,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 10:10:27,546 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable78 [2024-05-06 10:10:27,546 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 10:10:27,546 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 10:10:27,546 INFO L85 PathProgramCache]: Analyzing trace with hash -1809874444, now seen corresponding path program 4 times [2024-05-06 10:10:27,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 10:10:27,546 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1306001700] [2024-05-06 10:10:27,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 10:10:27,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 10:10:27,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:27,577 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 10:10:27,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 10:10:27,616 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-05-06 10:10:27,616 INFO L363 BasicCegarLoop]: Counterexample is feasible [2024-05-06 10:10:27,617 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (4 of 5 remaining) [2024-05-06 10:10:27,619 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 5 remaining) [2024-05-06 10:10:27,619 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 5 remaining) [2024-05-06 10:10:27,619 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 5 remaining) [2024-05-06 10:10:27,619 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 5 remaining) [2024-05-06 10:10:27,619 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable79 [2024-05-06 10:10:27,623 INFO L448 BasicCegarLoop]: Path program histogram: [4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-06 10:10:27,627 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-06 10:10:27,627 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-06 10:10:27,718 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre17 could not be translated [2024-05-06 10:10:27,719 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre19 could not be translated [2024-05-06 10:10:27,720 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre21 could not be translated [2024-05-06 10:10:27,722 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre23 could not be translated [2024-05-06 10:10:27,745 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 06.05 10:10:27 BasicIcfg [2024-05-06 10:10:27,745 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-06 10:10:27,745 INFO L158 Benchmark]: Toolchain (without parser) took 345141.45ms. Allocated memory was 184.5MB in the beginning and 2.1GB in the end (delta: 2.0GB). Free memory was 118.9MB in the beginning and 833.0MB in the end (delta: -714.1MB). Peak memory consumption was 1.3GB. Max. memory is 8.0GB. [2024-05-06 10:10:27,745 INFO L158 Benchmark]: CDTParser took 0.10ms. Allocated memory is still 184.5MB. Free memory is still 125.6MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 10:10:27,746 INFO L158 Benchmark]: CACSL2BoogieTranslator took 526.62ms. Allocated memory is still 184.5MB. Free memory was 118.7MB in the beginning and 146.5MB in the end (delta: -27.8MB). Peak memory consumption was 19.6MB. Max. memory is 8.0GB. [2024-05-06 10:10:27,746 INFO L158 Benchmark]: Boogie Procedure Inliner took 56.28ms. Allocated memory is still 184.5MB. Free memory was 146.5MB in the beginning and 143.8MB in the end (delta: 2.6MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. [2024-05-06 10:10:27,746 INFO L158 Benchmark]: Boogie Preprocessor took 29.95ms. Allocated memory is still 184.5MB. Free memory was 143.8MB in the beginning and 141.2MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 10:10:27,746 INFO L158 Benchmark]: RCFGBuilder took 722.45ms. Allocated memory is still 184.5MB. Free memory was 141.2MB in the beginning and 67.8MB in the end (delta: 73.4MB). Peak memory consumption was 73.4MB. Max. memory is 8.0GB. [2024-05-06 10:10:27,746 INFO L158 Benchmark]: TraceAbstraction took 343800.78ms. Allocated memory was 184.5MB in the beginning and 2.1GB in the end (delta: 2.0GB). Free memory was 66.3MB in the beginning and 833.0MB in the end (delta: -766.8MB). Peak memory consumption was 1.2GB. Max. memory is 8.0GB. [2024-05-06 10:10:27,747 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10ms. Allocated memory is still 184.5MB. Free memory is still 125.6MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 526.62ms. Allocated memory is still 184.5MB. Free memory was 118.7MB in the beginning and 146.5MB in the end (delta: -27.8MB). Peak memory consumption was 19.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 56.28ms. Allocated memory is still 184.5MB. Free memory was 146.5MB in the beginning and 143.8MB in the end (delta: 2.6MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 29.95ms. Allocated memory is still 184.5MB. Free memory was 143.8MB in the beginning and 141.2MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 722.45ms. Allocated memory is still 184.5MB. Free memory was 141.2MB in the beginning and 67.8MB in the end (delta: 73.4MB). Peak memory consumption was 73.4MB. Max. memory is 8.0GB. * TraceAbstraction took 343800.78ms. Allocated memory was 184.5MB in the beginning and 2.1GB in the end (delta: 2.0GB). Free memory was 66.3MB in the beginning and 833.0MB in the end (delta: -766.8MB). Peak memory consumption was 1.2GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre17 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre19 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre21 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre23 could not be translated - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 1560188, independent: 1526636, independent conditional: 1526431, independent unconditional: 205, dependent: 33552, dependent conditional: 33552, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1559953, independent: 1526636, independent conditional: 1526431, independent unconditional: 205, dependent: 33317, dependent conditional: 33317, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1559953, independent: 1526636, independent conditional: 1526431, independent unconditional: 205, dependent: 33317, dependent conditional: 33317, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 1559953, independent: 1526636, independent conditional: 1526431, independent unconditional: 205, dependent: 33317, dependent conditional: 33317, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1680068, independent: 1526636, independent conditional: 742554, independent unconditional: 784082, dependent: 153432, dependent conditional: 120118, dependent unconditional: 33314, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 1680068, independent: 1526636, independent conditional: 400440, independent unconditional: 1126196, dependent: 153432, dependent conditional: 48962, dependent unconditional: 104470, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 1680068, independent: 1526636, independent conditional: 400440, independent unconditional: 1126196, dependent: 153432, dependent conditional: 48962, dependent unconditional: 104470, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1596, independent: 1505, independent conditional: 324, independent unconditional: 1181, dependent: 91, dependent conditional: 64, dependent unconditional: 27, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1596, independent: 1457, independent conditional: 0, independent unconditional: 1457, dependent: 139, dependent conditional: 0, dependent unconditional: 139, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 139, independent: 48, independent conditional: 39, independent unconditional: 9, dependent: 91, dependent conditional: 64, dependent unconditional: 27, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 139, independent: 48, independent conditional: 39, independent unconditional: 9, dependent: 91, dependent conditional: 64, dependent unconditional: 27, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 921, independent: 250, independent conditional: 245, independent unconditional: 5, dependent: 671, dependent conditional: 558, dependent unconditional: 113, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 1680068, independent: 1525131, independent conditional: 400116, independent unconditional: 1125015, dependent: 153341, dependent conditional: 48898, dependent unconditional: 104443, unknown: 1596, unknown conditional: 388, unknown unconditional: 1208] , Statistics on independence cache: Total cache size (in pairs): 1596, Positive cache size: 1505, Positive conditional cache size: 324, Positive unconditional cache size: 1181, Negative cache size: 91, Negative conditional cache size: 64, Negative unconditional cache size: 27, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 413270, Maximal queried relation: 6, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1680068, independent: 1526636, independent conditional: 742554, independent unconditional: 784082, dependent: 153432, dependent conditional: 120118, dependent unconditional: 33314, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 1680068, independent: 1526636, independent conditional: 400440, independent unconditional: 1126196, dependent: 153432, dependent conditional: 48962, dependent unconditional: 104470, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 1680068, independent: 1526636, independent conditional: 400440, independent unconditional: 1126196, dependent: 153432, dependent conditional: 48962, dependent unconditional: 104470, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1596, independent: 1505, independent conditional: 324, independent unconditional: 1181, dependent: 91, dependent conditional: 64, dependent unconditional: 27, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1596, independent: 1457, independent conditional: 0, independent unconditional: 1457, dependent: 139, dependent conditional: 0, dependent unconditional: 139, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 139, independent: 48, independent conditional: 39, independent unconditional: 9, dependent: 91, dependent conditional: 64, dependent unconditional: 27, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 139, independent: 48, independent conditional: 39, independent unconditional: 9, dependent: 91, dependent conditional: 64, dependent unconditional: 27, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 921, independent: 250, independent conditional: 245, independent unconditional: 5, dependent: 671, dependent conditional: 558, dependent unconditional: 113, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 1680068, independent: 1525131, independent conditional: 400116, independent unconditional: 1125015, dependent: 153341, dependent conditional: 48898, dependent unconditional: 104443, unknown: 1596, unknown conditional: 388, unknown unconditional: 1208] , Statistics on independence cache: Total cache size (in pairs): 1596, Positive cache size: 1505, Positive conditional cache size: 324, Positive unconditional cache size: 1181, Negative cache size: 91, Negative conditional cache size: 64, Negative unconditional cache size: 27, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 413270 ], Independence queries for same thread: 235 - CounterExampleResult [Line: 19]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L711] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L713] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L714] 0 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX=0] [L715] 0 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX=0] [L716] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX=0] [L717] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX=0] [L718] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX=0] [L719] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX=0] [L720] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX=0] [L721] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX=0] [L722] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX=0] [L723] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX=0] [L724] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX=0] [L725] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX=0] [L726] 0 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX=0] [L727] 0 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX=0] [L728] 0 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX=0] [L729] 0 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX=0] [L730] 0 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX=0] [L731] 0 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0] [L733] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0] [L734] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L735] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L737] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L739] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={3:0}] [L740] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y={3:0}] [L741] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y={3:0}] [L742] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y={3:0}] [L743] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y={3:0}] [L744] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y={3:0}] [L745] 0 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y={3:0}] [L746] 0 _Bool y$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y={3:0}] [L747] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y={3:0}] [L748] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y={3:0}] [L749] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y={3:0}] [L750] 0 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y={3:0}] [L751] 0 _Bool y$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y={3:0}] [L752] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y={3:0}] [L753] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y={3:0}] [L754] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y={3:0}] [L755] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y={3:0}] [L756] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y={3:0}] [L757] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L758] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L759] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L760] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L851] 0 pthread_t t2161; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, t2161={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L852] FCALL, FORK 0 pthread_create(&t2161, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2161={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L853] 0 pthread_t t2162; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2161={7:0}, t2162={8:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L854] FCALL, FORK 0 pthread_create(&t2162, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2161={7:0}, t2162={8:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L855] 0 pthread_t t2163; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2161={7:0}, t2162={8:0}, t2163={5:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L856] FCALL, FORK 0 pthread_create(&t2163, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2161={7:0}, t2162={8:0}, t2163={5:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L857] 0 pthread_t t2164; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2161={7:0}, t2162={8:0}, t2163={5:0}, t2164={6:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L858] FCALL, FORK 0 pthread_create(&t2164, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2161={7:0}, t2162={8:0}, t2163={5:0}, t2164={6:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L764] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L765] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L766] 1 y$flush_delayed = weak$$choice2 [L767] EXPR 1 \read(y) [L767] 1 y$mem_tmp = y [L768] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L768] EXPR 1 \read(y) [L768] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L768] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L769] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L770] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L771] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L772] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L773] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L774] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L775] 1 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L776] 1 __unbuffered_p0_EAX$read_delayed_var = &y [L777] EXPR 1 \read(y) [L777] 1 __unbuffered_p0_EAX = y [L778] EXPR 1 y$flush_delayed ? y$mem_tmp : y [L778] 1 y = y$flush_delayed ? y$mem_tmp : y [L779] 1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L782] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L794] 2 x = 2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L799] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L801] 2 return 0; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L806] 3 __unbuffered_p2_EAX = x VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L809] 3 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L812] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L812] EXPR 3 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L812] EXPR 3 \read(y) [L812] EXPR 3 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L812] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L812] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L813] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L814] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L815] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L816] 3 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L819] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L821] 3 return 0; VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L826] 4 y = 2 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L829] EXPR 4 y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) [L829] EXPR 4 y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y [L829] EXPR 4 \read(y) [L829] EXPR 4 y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y [L829] EXPR 4 y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) [L829] 4 y = y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) [L830] 4 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used [L831] 4 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used [L832] 4 y$r_buff0_thd4 = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$r_buff0_thd4 [L833] 4 y$r_buff1_thd4 = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$r_buff1_thd4 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L836] 4 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L838] 4 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L787] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L860] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2161={7:0}, t2162={8:0}, t2163={5:0}, t2164={6:0}, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L862] CALL 0 assume_abort_if_not(main$tmp_guard0) [L4] COND FALSE 0 !(!cond) VAL [\old(cond)=1, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, cond=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L862] RET 0 assume_abort_if_not(main$tmp_guard0) [L864] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L864] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L864] EXPR 0 \read(y) [L864] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L864] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L864] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L865] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L866] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L867] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L868] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2161={7:0}, t2162={8:0}, t2163={5:0}, t2164={6:0}, weak$$choice1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L871] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L872] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L873] 0 y$flush_delayed = weak$$choice2 [L874] EXPR 0 \read(y) [L874] 0 y$mem_tmp = y [L875] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L875] EXPR 0 \read(y) [L875] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L875] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L876] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L877] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L878] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L879] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L880] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L881] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L882] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L883] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L883] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L883] EXPR 0 \read(*__unbuffered_p0_EAX$read_delayed_var) [L883] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L883] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L883] 0 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L884] EXPR 0 x == 2 && y == 2 [L884] EXPR 0 \read(y) [L884] EXPR 0 x == 2 && y == 2 [L884] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p0_EAX == 2 && __unbuffered_p2_EAX == 2) [L885] EXPR 0 y$flush_delayed ? y$mem_tmp : y [L885] EXPR 0 \read(y) [L885] EXPR 0 y$flush_delayed ? y$mem_tmp : y [L885] 0 y = y$flush_delayed ? y$mem_tmp : y [L886] 0 y$flush_delayed = (_Bool)0 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2161={7:0}, t2162={8:0}, t2163={5:0}, t2164={6:0}, weak$$choice1=1, weak$$choice2=0, x=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L888] CALL 0 __VERIFIER_assert(main$tmp_guard1) [L19] COND TRUE 0 !expression VAL [\old(expression)=0, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice1=1, weak$$choice2=0, x=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] [L19] 0 reach_error() VAL [\old(expression)=0, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice1=1, weak$$choice2=0, x=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y={3:0}] - UnprovableResult [Line: 858]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 856]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 854]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 852]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 9 procedures, 180 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 343.5s, OverallIterations: 6, TraceHistogramMax: 0, PathProgramHistogramMax: 4, EmptinessCheckTime: 340.4s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 38, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 723 NumberOfCodeBlocks, 723 NumberOfCodeBlocksAsserted, 6 NumberOfCheckSat, 596 ConstructedInterpolants, 0 QuantifiedInterpolants, 2847 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 5 InterpolantComputations, 5 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 326.1s, ConditionalCommutativityIAIntegrations: 0, ConditionalCommutativityDFSRestarts: 3, ConditionalCommutativityConditionCalculations: 191, ConditionalCommutativityTraceChecks: 71, ConditionalCommutativityImperfectProofs: 0 RESULT: Ultimate proved your program to be incorrect! [2024-05-06 10:10:27,773 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Ended with exit code 0 [2024-05-06 10:10:28,026 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...