/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 50 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/pthread-driver-races/char_pc8736x_gpio_pc8736x_gpio_open_pc8736x_gpio_set.i -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 16:18:12,999 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 16:18:13,059 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 16:18:13,061 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 16:18:13,062 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 16:18:13,079 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 16:18:13,080 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 16:18:13,080 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 16:18:13,080 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 16:18:13,081 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 16:18:13,081 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 16:18:13,081 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 16:18:13,081 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 16:18:13,082 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 16:18:13,082 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 16:18:13,082 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 16:18:13,082 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 16:18:13,083 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 16:18:13,083 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 16:18:13,083 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 16:18:13,083 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 16:18:13,083 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 16:18:13,084 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 16:18:13,084 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 16:18:13,084 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 16:18:13,084 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 16:18:13,084 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 16:18:13,085 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 16:18:13,085 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 16:18:13,085 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 16:18:13,085 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 16:18:13,085 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 16:18:13,086 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 16:18:13,086 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 16:18:13,086 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 16:18:13,086 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 16:18:13,086 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 16:18:13,086 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 16:18:13,086 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 16:18:13,086 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 50 [2024-05-06 16:18:13,251 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 16:18:13,273 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 16:18:13,275 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 16:18:13,276 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 16:18:13,277 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 16:18:13,277 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-driver-races/char_pc8736x_gpio_pc8736x_gpio_open_pc8736x_gpio_set.i [2024-05-06 16:18:14,332 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 16:18:14,686 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 16:18:14,686 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-driver-races/char_pc8736x_gpio_pc8736x_gpio_open_pc8736x_gpio_set.i [2024-05-06 16:18:14,728 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/80a88ca7a/8cc4820be3bc4bcebe382faa745bd925/FLAGcc4e8f32f [2024-05-06 16:18:14,742 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/80a88ca7a/8cc4820be3bc4bcebe382faa745bd925 [2024-05-06 16:18:14,744 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 16:18:14,746 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 16:18:14,747 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 16:18:14,747 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 16:18:14,751 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 16:18:14,751 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 04:18:14" (1/1) ... [2024-05-06 16:18:14,752 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@76e6f74c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:14, skipping insertion in model container [2024-05-06 16:18:14,752 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 04:18:14" (1/1) ... [2024-05-06 16:18:14,847 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 16:18:15,094 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-driver-races/char_pc8736x_gpio_pc8736x_gpio_open_pc8736x_gpio_set.i[5469,5482] [2024-05-06 16:18:17,729 WARN L1590 CHandler]: Possible shadowing of function iminor [2024-05-06 16:18:17,732 WARN L1590 CHandler]: Possible shadowing of function iminor [2024-05-06 16:18:17,785 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 16:18:17,801 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 16:18:17,818 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-driver-races/char_pc8736x_gpio_pc8736x_gpio_open_pc8736x_gpio_set.i[5469,5482] [2024-05-06 16:18:17,888 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: asm volatile ("" "xchg" "b %b0, %1\n" : "+q" (__ret), "+m" (*((&head->first))) : : "memory", "cc"); [3227] [2024-05-06 16:18:17,889 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: asm volatile ("" "xchg" "w %w0, %1\n" : "+r" (__ret), "+m" (*((&head->first))) : : "memory", "cc"); [3227] [2024-05-06 16:18:17,889 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: asm volatile ("" "xchg" "l %0, %1\n" : "+r" (__ret), "+m" (*((&head->first))) : : "memory", "cc"); [3227] [2024-05-06 16:18:17,890 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: asm volatile ("" "xchg" "q %q0, %1\n" : "+r" (__ret), "+m" (*((&head->first))) : : "memory", "cc"); [3227] [2024-05-06 16:18:17,956 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: asm volatile("ud2"); [5814] [2024-05-06 16:18:17,983 WARN L1590 CHandler]: Possible shadowing of function iminor [2024-05-06 16:18:17,983 WARN L1590 CHandler]: Possible shadowing of function iminor [2024-05-06 16:18:18,053 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 16:18:18,436 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 16:18:18,436 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 16:18:18,436 WARN L675 CHandler]: The function __xchg_wrong_size is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 16:18:18,436 WARN L675 CHandler]: The function release is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 16:18:18,436 WARN L675 CHandler]: The function ____ilog2_NaN is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 16:18:18,437 WARN L675 CHandler]: The function _whoop_init is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 16:18:18,442 INFO L206 MainTranslator]: Completed translation [2024-05-06 16:18:18,443 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18 WrapperNode [2024-05-06 16:18:18,443 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 16:18:18,444 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 16:18:18,444 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 16:18:18,444 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 16:18:18,449 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18" (1/1) ... [2024-05-06 16:18:18,553 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18" (1/1) ... [2024-05-06 16:18:18,601 INFO L138 Inliner]: procedures = 1393, calls = 1529, calls flagged for inlining = 392, calls inlined = 53, statements flattened = 718 [2024-05-06 16:18:18,602 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 16:18:18,602 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 16:18:18,602 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 16:18:18,602 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 16:18:18,609 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18" (1/1) ... [2024-05-06 16:18:18,610 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18" (1/1) ... [2024-05-06 16:18:18,614 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18" (1/1) ... [2024-05-06 16:18:18,614 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18" (1/1) ... [2024-05-06 16:18:18,628 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18" (1/1) ... [2024-05-06 16:18:18,632 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18" (1/1) ... [2024-05-06 16:18:18,636 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18" (1/1) ... [2024-05-06 16:18:18,639 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18" (1/1) ... [2024-05-06 16:18:18,645 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 16:18:18,645 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 16:18:18,645 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 16:18:18,646 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 16:18:18,646 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18" (1/1) ... [2024-05-06 16:18:18,650 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 16:18:18,660 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 16:18:18,689 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 16:18:18,712 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 16:18:18,753 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 16:18:18,753 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 16:18:18,753 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 16:18:18,753 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2024-05-06 16:18:18,753 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 16:18:18,753 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 16:18:18,753 INFO L130 BoogieDeclarations]: Found specification of procedure whoop_wrapper_pc8736x_gpio_open [2024-05-06 16:18:18,753 INFO L138 BoogieDeclarations]: Found implementation of procedure whoop_wrapper_pc8736x_gpio_open [2024-05-06 16:18:18,754 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2024-05-06 16:18:18,754 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 16:18:18,754 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2024-05-06 16:18:18,754 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 16:18:18,755 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 16:18:18,755 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2024-05-06 16:18:18,755 INFO L130 BoogieDeclarations]: Found specification of procedure whoop_wrapper_pc8736x_gpio_set [2024-05-06 16:18:18,755 INFO L138 BoogieDeclarations]: Found implementation of procedure whoop_wrapper_pc8736x_gpio_set [2024-05-06 16:18:18,755 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 16:18:18,757 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 16:18:19,135 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 16:18:19,137 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 16:18:19,667 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 16:18:19,680 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 16:18:19,680 INFO L309 CfgBuilder]: Removed 27 assume(true) statements. [2024-05-06 16:18:19,682 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 04:18:19 BoogieIcfgContainer [2024-05-06 16:18:19,682 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 16:18:19,684 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 16:18:19,684 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 16:18:19,686 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 16:18:19,686 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 04:18:14" (1/3) ... [2024-05-06 16:18:19,687 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3e681dc9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 04:18:19, skipping insertion in model container [2024-05-06 16:18:19,687 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:18:18" (2/3) ... [2024-05-06 16:18:19,687 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3e681dc9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 04:18:19, skipping insertion in model container [2024-05-06 16:18:19,687 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 04:18:19" (3/3) ... [2024-05-06 16:18:19,688 INFO L112 eAbstractionObserver]: Analyzing ICFG char_pc8736x_gpio_pc8736x_gpio_open_pc8736x_gpio_set.i [2024-05-06 16:18:19,694 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 16:18:19,701 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 16:18:19,701 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 3 error locations. [2024-05-06 16:18:19,702 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 16:18:19,776 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2024-05-06 16:18:19,815 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 16:18:19,815 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 16:18:19,815 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 16:18:19,817 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 16:18:19,830 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 16:18:19,845 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 16:18:19,855 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:18:19,856 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 16:18:19,862 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@32506c58, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=50, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 16:18:19,862 INFO L358 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2024-05-06 16:18:19,932 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION === [whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:18:19,933 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:18:19,934 INFO L85 PathProgramCache]: Analyzing trace with hash -1070240169, now seen corresponding path program 1 times [2024-05-06 16:18:19,989 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:18:19,990 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1666793043] [2024-05-06 16:18:19,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:19,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:20,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:20,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:20,570 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 16:18:20,570 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1666793043] [2024-05-06 16:18:20,571 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1666793043] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 16:18:20,571 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 16:18:20,571 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-05-06 16:18:20,572 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [500971511] [2024-05-06 16:18:20,574 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 16:18:20,581 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-05-06 16:18:20,582 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 16:18:20,602 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 16:18:20,603 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-05-06 16:18:20,603 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:20,604 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 16:18:20,606 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 137.0) internal successors, (274), 2 states have internal predecessors, (274), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 16:18:20,606 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:20,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:20,682 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-05-06 16:18:20,683 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION === [whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:18:20,683 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:18:20,683 INFO L85 PathProgramCache]: Analyzing trace with hash 852980537, now seen corresponding path program 1 times [2024-05-06 16:18:20,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:18:20,683 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315629501] [2024-05-06 16:18:20,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:20,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:20,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:21,209 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:21,210 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 16:18:21,210 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [315629501] [2024-05-06 16:18:21,210 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [315629501] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 16:18:21,210 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 16:18:21,210 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-05-06 16:18:21,211 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1901215162] [2024-05-06 16:18:21,212 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 16:18:21,213 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-05-06 16:18:21,213 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 16:18:21,214 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-05-06 16:18:21,215 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2024-05-06 16:18:21,215 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:21,215 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 16:18:21,215 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 30.333333333333332) internal successors, (273), 9 states have internal predecessors, (273), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 16:18:21,215 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:21,216 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:21,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:21,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:18:21,398 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-05-06 16:18:21,398 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION === [whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:18:21,399 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:18:21,399 INFO L85 PathProgramCache]: Analyzing trace with hash 217075821, now seen corresponding path program 1 times [2024-05-06 16:18:21,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:18:21,400 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019651872] [2024-05-06 16:18:21,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:21,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:21,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:22,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:22,013 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 16:18:22,014 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019651872] [2024-05-06 16:18:22,014 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1019651872] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 16:18:22,014 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 16:18:22,014 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-05-06 16:18:22,014 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [126081050] [2024-05-06 16:18:22,014 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 16:18:22,015 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-06 16:18:22,015 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 16:18:22,016 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 16:18:22,018 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-05-06 16:18:22,018 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:22,019 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 16:18:22,019 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 49.0) internal successors, (294), 6 states have internal predecessors, (294), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 16:18:22,019 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:22,020 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:18:22,020 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:22,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:22,175 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:18:22,175 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 16:18:22,175 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-05-06 16:18:22,175 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting whoop_wrapper_pc8736x_gpio_setErr0ASSERT_VIOLATIONERROR_FUNCTION === [whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:18:22,176 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:18:22,176 INFO L85 PathProgramCache]: Analyzing trace with hash -442535259, now seen corresponding path program 1 times [2024-05-06 16:18:22,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:18:22,176 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1208576509] [2024-05-06 16:18:22,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:22,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:22,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:22,674 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:22,675 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 16:18:22,675 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1208576509] [2024-05-06 16:18:22,675 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1208576509] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 16:18:22,675 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 16:18:22,676 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-05-06 16:18:22,680 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1333849078] [2024-05-06 16:18:22,680 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 16:18:22,680 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-05-06 16:18:22,680 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 16:18:22,681 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-06 16:18:22,681 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-05-06 16:18:22,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:22,681 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 16:18:22,681 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 73.0) internal successors, (365), 5 states have internal predecessors, (365), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 16:18:22,681 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:22,682 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:18:22,682 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 16:18:22,682 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:22,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:22,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:18:22,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 16:18:22,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 16:18:22,734 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-05-06 16:18:22,734 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting whoop_wrapper_pc8736x_gpio_setErr0ASSERT_VIOLATIONERROR_FUNCTION === [whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:18:22,735 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:18:22,735 INFO L85 PathProgramCache]: Analyzing trace with hash 1224485647, now seen corresponding path program 1 times [2024-05-06 16:18:22,735 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:18:22,735 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1305036107] [2024-05-06 16:18:22,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:22,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:22,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:23,275 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:23,275 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 16:18:23,275 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1305036107] [2024-05-06 16:18:23,275 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1305036107] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 16:18:23,275 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1155784533] [2024-05-06 16:18:23,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:23,276 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 16:18:23,276 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 16:18:23,326 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 16:18:23,388 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 16:18:23,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:23,893 INFO L262 TraceCheckSpWp]: Trace formula consists of 1181 conjuncts, 31 conjunts are in the unsatisfiable core [2024-05-06 16:18:23,910 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 16:18:24,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:18:24,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:18:24,248 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2024-05-06 16:18:24,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:18:24,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2024-05-06 16:18:24,384 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 16:18:24,384 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 16:18:24,384 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1155784533] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 16:18:24,384 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 16:18:24,384 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [6] total 16 [2024-05-06 16:18:24,386 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1320582192] [2024-05-06 16:18:24,387 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 16:18:24,387 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-05-06 16:18:24,387 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 16:18:24,388 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-05-06 16:18:24,388 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=204, Unknown=0, NotChecked=0, Total=240 [2024-05-06 16:18:24,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:24,388 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 16:18:24,389 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 31.083333333333332) internal successors, (373), 12 states have internal predecessors, (373), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 16:18:24,389 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:24,389 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:18:24,389 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 16:18:24,389 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 16:18:24,389 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:25,646 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 63 [2024-05-06 16:18:25,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:18:25,841 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:18:26,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:18:26,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:18:26,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:18:28,218 INFO L85 PathProgramCache]: Analyzing trace with hash -1678201690, now seen corresponding path program 1 times [2024-05-06 16:18:28,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:28,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:28,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:29,839 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 16:18:29,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:29,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:29,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:30,806 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 16:18:30,807 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-05-06 16:18:30,808 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2024-05-06 16:18:31,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:18:33,863 INFO L85 PathProgramCache]: Analyzing trace with hash 2002677462, now seen corresponding path program 1 times [2024-05-06 16:18:33,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:33,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:33,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:34,247 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:34,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:34,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:34,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:34,583 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:34,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:18:37,105 INFO L85 PathProgramCache]: Analyzing trace with hash -569205286, now seen corresponding path program 1 times [2024-05-06 16:18:37,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:37,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:37,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:37,482 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:37,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:37,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:37,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:37,797 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:37,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:18:40,202 INFO L85 PathProgramCache]: Analyzing trace with hash 2067378721, now seen corresponding path program 1 times [2024-05-06 16:18:40,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:40,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:40,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:40,620 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:40,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:40,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:40,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:40,916 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:43,601 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:18:45,791 INFO L85 PathProgramCache]: Analyzing trace with hash -2134549904, now seen corresponding path program 1 times [2024-05-06 16:18:45,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:45,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:45,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:46,214 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:46,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:46,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:46,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:46,556 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:46,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:18:47,315 INFO L85 PathProgramCache]: Analyzing trace with hash 1421878675, now seen corresponding path program 1 times [2024-05-06 16:18:47,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:47,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:47,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:47,599 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:47,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:47,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:47,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:47,945 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:48,150 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:48,150 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:18:48,150 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-06 16:18:48,150 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 16:18:48,150 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 16:18:48,162 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-05-06 16:18:48,359 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable4,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable10,SelfDestructingSolverStorable11,SelfDestructingSolverStorable12,SelfDestructingSolverStorable9,SelfDestructingSolverStorable13,SelfDestructingSolverStorable14,SelfDestructingSolverStorable15,SelfDestructingSolverStorable16 [2024-05-06 16:18:48,359 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting whoop_wrapper_pc8736x_gpio_setErr0ASSERT_VIOLATIONERROR_FUNCTION === [whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:18:48,360 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:18:48,360 INFO L85 PathProgramCache]: Analyzing trace with hash -176815865, now seen corresponding path program 1 times [2024-05-06 16:18:48,360 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:18:48,360 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712452769] [2024-05-06 16:18:48,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:48,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:48,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:48,731 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:48,731 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 16:18:48,731 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1712452769] [2024-05-06 16:18:48,731 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1712452769] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 16:18:48,731 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1196324015] [2024-05-06 16:18:48,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:48,732 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 16:18:48,732 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 16:18:48,733 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 16:18:48,735 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 16:18:49,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:49,327 INFO L262 TraceCheckSpWp]: Trace formula consists of 1165 conjuncts, 9 conjunts are in the unsatisfiable core [2024-05-06 16:18:49,333 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 16:18:49,393 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:49,394 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 16:18:49,453 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:49,453 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1196324015] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 16:18:49,453 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 16:18:49,453 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 11 [2024-05-06 16:18:49,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1815443389] [2024-05-06 16:18:49,453 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 16:18:49,454 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2024-05-06 16:18:49,455 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 16:18:49,455 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-05-06 16:18:49,455 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2024-05-06 16:18:49,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:49,456 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 16:18:49,456 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 34.81818181818182) internal successors, (383), 11 states have internal predecessors, (383), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 16:18:49,456 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:49,456 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:18:49,456 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-06 16:18:49,456 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 16:18:49,456 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 16:18:49,456 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:18:50,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:18:52,281 INFO L85 PathProgramCache]: Analyzing trace with hash -834717352, now seen corresponding path program 2 times [2024-05-06 16:18:52,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:52,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:52,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:52,743 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:52,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:52,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:52,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:53,243 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:53,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:18:55,669 INFO L85 PathProgramCache]: Analyzing trace with hash -1622555044, now seen corresponding path program 2 times [2024-05-06 16:18:55,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:55,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:55,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:56,077 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:56,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:56,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:56,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:56,573 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:56,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:18:58,929 INFO L85 PathProgramCache]: Analyzing trace with hash 976670499, now seen corresponding path program 2 times [2024-05-06 16:18:58,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:58,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:59,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:59,410 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:18:59,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:18:59,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:18:59,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:18:59,905 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:00,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:02,554 INFO L85 PathProgramCache]: Analyzing trace with hash 797132786, now seen corresponding path program 2 times [2024-05-06 16:19:02,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:02,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:02,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:02,943 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:02,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:02,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:03,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:03,460 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:03,621 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:19:04,287 INFO L85 PathProgramCache]: Analyzing trace with hash -2131049903, now seen corresponding path program 2 times [2024-05-06 16:19:04,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:04,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:04,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:04,600 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:04,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:04,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:04,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:04,985 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:05,110 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:19:05,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:19:05,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-06 16:19:05,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 16:19:05,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 16:19:05,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 16:19:05,121 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-05-06 16:19:05,311 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,SelfDestructingSolverStorable19,SelfDestructingSolverStorable20,SelfDestructingSolverStorable21,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22,SelfDestructingSolverStorable23,SelfDestructingSolverStorable24,SelfDestructingSolverStorable25,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable17 [2024-05-06 16:19:05,312 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting whoop_wrapper_pc8736x_gpio_setErr0ASSERT_VIOLATIONERROR_FUNCTION === [whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:19:05,312 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:19:05,312 INFO L85 PathProgramCache]: Analyzing trace with hash 511034309, now seen corresponding path program 2 times [2024-05-06 16:19:05,312 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:19:05,312 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327291527] [2024-05-06 16:19:05,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:05,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:05,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:05,745 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:05,746 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 16:19:05,746 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [327291527] [2024-05-06 16:19:05,746 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [327291527] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 16:19:05,746 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1538512425] [2024-05-06 16:19:05,747 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 16:19:05,747 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 16:19:05,749 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 16:19:05,769 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 16:19:05,805 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-05-06 16:19:06,492 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-05-06 16:19:06,492 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 16:19:06,499 INFO L262 TraceCheckSpWp]: Trace formula consists of 1143 conjuncts, 53 conjunts are in the unsatisfiable core [2024-05-06 16:19:06,507 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 16:19:06,759 INFO L349 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2024-05-06 16:19:06,760 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 16 [2024-05-06 16:19:06,785 INFO L349 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2024-05-06 16:19:06,786 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 16 [2024-05-06 16:19:06,811 INFO L349 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2024-05-06 16:19:06,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 16 [2024-05-06 16:19:06,829 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 16:19:06,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-05-06 16:19:08,008 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:19:08,123 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:19:08,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2024-05-06 16:19:08,134 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:19:08,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2024-05-06 16:19:08,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2024-05-06 16:19:08,379 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-06 16:19:08,383 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 16:19:08,384 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1538512425] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 16:19:08,384 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 16:19:08,384 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [9] total 26 [2024-05-06 16:19:08,384 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1592628239] [2024-05-06 16:19:08,384 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 16:19:08,385 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2024-05-06 16:19:08,385 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 16:19:08,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-05-06 16:19:08,386 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=575, Unknown=0, NotChecked=0, Total=650 [2024-05-06 16:19:08,386 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:19:08,386 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 16:19:08,386 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 19.105263157894736) internal successors, (363), 19 states have internal predecessors, (363), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 16:19:08,386 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:19:08,386 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:19:08,387 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-06 16:19:08,387 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 16:19:08,387 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 16:19:08,387 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 16:19:08,387 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:19:09,867 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:19:10,001 INFO L85 PathProgramCache]: Analyzing trace with hash -834717352, now seen corresponding path program 3 times [2024-05-06 16:19:10,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:10,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:10,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:10,367 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:10,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:10,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:10,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:10,660 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:10,889 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:19:11,033 INFO L85 PathProgramCache]: Analyzing trace with hash -1622555044, now seen corresponding path program 3 times [2024-05-06 16:19:11,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:11,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:11,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:11,426 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:11,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:11,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:11,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:11,713 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:11,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:19:11,981 INFO L85 PathProgramCache]: Analyzing trace with hash 976670499, now seen corresponding path program 3 times [2024-05-06 16:19:11,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:11,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:12,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:12,276 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:12,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:12,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:12,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:12,592 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:13,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:13,374 INFO L85 PathProgramCache]: Analyzing trace with hash 797132786, now seen corresponding path program 3 times [2024-05-06 16:19:13,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:13,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:13,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:13,720 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:13,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:13,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:13,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:14,058 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:14,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:19:14,470 INFO L85 PathProgramCache]: Analyzing trace with hash -2131049903, now seen corresponding path program 3 times [2024-05-06 16:19:14,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:14,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:14,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:14,955 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:14,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:14,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:15,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:15,233 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:16,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:16,506 INFO L85 PathProgramCache]: Analyzing trace with hash 2034229191, now seen corresponding path program 1 times [2024-05-06 16:19:16,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:16,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:16,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:16,804 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:16,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:16,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:17,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:17,284 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:17,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:17,724 INFO L85 PathProgramCache]: Analyzing trace with hash -1747740033, now seen corresponding path program 1 times [2024-05-06 16:19:17,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:17,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:17,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:18,022 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:18,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:18,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:18,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:18,367 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:18,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:18,637 INFO L85 PathProgramCache]: Analyzing trace with hash -1627899750, now seen corresponding path program 1 times [2024-05-06 16:19:18,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:18,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:18,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:19,036 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:19,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:19,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:19,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:19,337 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:20,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:20,119 INFO L85 PathProgramCache]: Analyzing trace with hash -1129372579, now seen corresponding path program 1 times [2024-05-06 16:19:20,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:20,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:20,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:20,428 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:20,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:20,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:20,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:20,811 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:21,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:21,626 INFO L85 PathProgramCache]: Analyzing trace with hash 1459580280, now seen corresponding path program 1 times [2024-05-06 16:19:21,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:21,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:21,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:21,956 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:21,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:21,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:22,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:22,256 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:22,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:22,758 INFO L85 PathProgramCache]: Analyzing trace with hash 1206472251, now seen corresponding path program 1 times [2024-05-06 16:19:22,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:22,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:22,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:23,144 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:23,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:23,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:23,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:23,453 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:23,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:23,748 INFO L85 PathProgramCache]: Analyzing trace with hash 307495510, now seen corresponding path program 1 times [2024-05-06 16:19:23,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:23,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:23,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:24,056 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:24,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:24,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:24,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:24,449 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:24,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:24,947 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:25,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:25,057 INFO L85 PathProgramCache]: Analyzing trace with hash -2136336359, now seen corresponding path program 1 times [2024-05-06 16:19:25,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:25,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:25,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:25,405 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:25,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:25,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:25,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:25,710 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:25,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:26,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:26,203 INFO L85 PathProgramCache]: Analyzing trace with hash 80607028, now seen corresponding path program 1 times [2024-05-06 16:19:26,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:26,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:26,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:26,545 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:26,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:26,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:26,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:26,987 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:27,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:27,234 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:27,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:27,334 INFO L85 PathProgramCache]: Analyzing trace with hash 1478066679, now seen corresponding path program 1 times [2024-05-06 16:19:27,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:27,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:27,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:27,655 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:27,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:27,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:27,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:27,966 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:28,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:28,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:28,478 INFO L85 PathProgramCache]: Analyzing trace with hash 1303285027, now seen corresponding path program 1 times [2024-05-06 16:19:28,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:28,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:28,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:28,890 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:28,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:28,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:28,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:29,210 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:29,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:29,626 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:29,661 INFO L85 PathProgramCache]: Analyzing trace with hash 757078301, now seen corresponding path program 1 times [2024-05-06 16:19:29,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:29,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:29,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:29,981 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:29,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:29,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:30,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:30,366 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:30,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:30,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:30,873 INFO L85 PathProgramCache]: Analyzing trace with hash 16958082, now seen corresponding path program 1 times [2024-05-06 16:19:30,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:30,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:30,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:31,326 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:31,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:31,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:31,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:31,658 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:31,913 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:32,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:32,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:32,101 INFO L85 PathProgramCache]: Analyzing trace with hash -1837796068, now seen corresponding path program 1 times [2024-05-06 16:19:32,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:32,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:32,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:32,611 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:32,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:32,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:32,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:32,973 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:33,267 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:33,441 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:33,475 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:33,486 INFO L85 PathProgramCache]: Analyzing trace with hash 843555809, now seen corresponding path program 1 times [2024-05-06 16:19:33,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:33,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:33,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:33,780 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:33,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:33,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:33,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:34,090 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:34,292 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:34,441 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:34,509 INFO L85 PathProgramCache]: Analyzing trace with hash -485186277, now seen corresponding path program 1 times [2024-05-06 16:19:34,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:34,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:34,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:34,907 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:34,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:34,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:34,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:35,316 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:35,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:35,692 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:35,758 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:35,786 INFO L85 PathProgramCache]: Analyzing trace with hash -1112002240, now seen corresponding path program 1 times [2024-05-06 16:19:35,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:35,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:35,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:36,090 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:36,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:36,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:36,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:36,383 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:36,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:37,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:37,083 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:37,109 INFO L85 PathProgramCache]: Analyzing trace with hash 1331865882, now seen corresponding path program 1 times [2024-05-06 16:19:37,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:37,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:37,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:37,562 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:37,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:37,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:37,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:37,864 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:38,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:38,240 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:38,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:38,399 INFO L85 PathProgramCache]: Analyzing trace with hash -1281226946, now seen corresponding path program 1 times [2024-05-06 16:19:38,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:38,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:38,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:38,717 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:38,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:38,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:38,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:39,006 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:39,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:39,346 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:39,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:39,567 INFO L85 PathProgramCache]: Analyzing trace with hash -1286500904, now seen corresponding path program 1 times [2024-05-06 16:19:39,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:39,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:39,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:39,907 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:39,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:39,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:39,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:40,337 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:40,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:40,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:40,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:40,894 INFO L85 PathProgramCache]: Analyzing trace with hash -514915012, now seen corresponding path program 1 times [2024-05-06 16:19:40,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:40,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:40,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:41,238 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:41,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:41,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:41,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:41,719 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:41,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:42,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:42,328 INFO L85 PathProgramCache]: Analyzing trace with hash -965195114, now seen corresponding path program 1 times [2024-05-06 16:19:42,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:42,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:42,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:42,671 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:42,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:42,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:42,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:43,016 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:43,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:43,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:43,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:43,465 INFO L85 PathProgramCache]: Analyzing trace with hash 761867066, now seen corresponding path program 1 times [2024-05-06 16:19:43,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:43,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:43,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:43,754 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:43,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:43,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:43,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:44,270 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:44,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:44,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:44,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:44,741 INFO L85 PathProgramCache]: Analyzing trace with hash 619503444, now seen corresponding path program 1 times [2024-05-06 16:19:44,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:44,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:44,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:45,028 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:45,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:45,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:45,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:45,324 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:45,826 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:45,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:46,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:46,068 INFO L85 PathProgramCache]: Analyzing trace with hash 555383096, now seen corresponding path program 1 times [2024-05-06 16:19:46,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:46,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:46,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:46,394 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:46,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:46,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:46,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:46,834 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:47,117 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:47,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:47,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:47,343 INFO L85 PathProgramCache]: Analyzing trace with hash 2017807378, now seen corresponding path program 1 times [2024-05-06 16:19:47,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:47,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:47,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:47,634 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:47,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:47,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:47,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:47,944 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:48,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:48,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:48,333 INFO L85 PathProgramCache]: Analyzing trace with hash -379614251, now seen corresponding path program 1 times [2024-05-06 16:19:48,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:48,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:48,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:48,659 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:48,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:48,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:48,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:49,066 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:49,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:49,605 INFO L85 PathProgramCache]: Analyzing trace with hash 925826452, now seen corresponding path program 1 times [2024-05-06 16:19:49,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:49,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:49,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:49,916 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:49,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:49,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:49,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:50,230 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:50,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:50,949 INFO L85 PathProgramCache]: Analyzing trace with hash 213086804, now seen corresponding path program 1 times [2024-05-06 16:19:50,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:50,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:51,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:51,242 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:51,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:51,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:51,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:51,738 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:52,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:52,495 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:52,803 INFO L85 PathProgramCache]: Analyzing trace with hash -903964078, now seen corresponding path program 1 times [2024-05-06 16:19:52,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:52,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:52,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:53,155 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:53,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:53,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:53,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:53,460 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:53,813 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:54,149 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:54,296 INFO L85 PathProgramCache]: Analyzing trace with hash -1403434575, now seen corresponding path program 1 times [2024-05-06 16:19:54,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:54,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:54,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:54,589 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:54,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:54,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:54,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:55,002 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:55,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:55,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:55,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:55,718 INFO L85 PathProgramCache]: Analyzing trace with hash 672982832, now seen corresponding path program 1 times [2024-05-06 16:19:55,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:55,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:55,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:56,038 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:56,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:56,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:56,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:56,334 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:56,741 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:57,088 INFO L85 PathProgramCache]: Analyzing trace with hash -291981264, now seen corresponding path program 1 times [2024-05-06 16:19:57,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:57,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:57,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:57,384 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:57,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:57,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:57,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:57,817 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:58,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:58,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:58,495 INFO L85 PathProgramCache]: Analyzing trace with hash -1632149105, now seen corresponding path program 1 times [2024-05-06 16:19:58,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:58,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:58,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:58,826 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:58,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:58,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:58,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:19:59,110 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:19:59,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:19:59,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:59,769 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 4 [2024-05-06 16:19:59,798 INFO L85 PathProgramCache]: Analyzing trace with hash 894905007, now seen corresponding path program 1 times [2024-05-06 16:19:59,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:19:59,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:19:59,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:00,094 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:00,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:00,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:00,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:00,394 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:00,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:20:00,663 INFO L85 PathProgramCache]: Analyzing trace with hash -1897935969, now seen corresponding path program 1 times [2024-05-06 16:20:00,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:00,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:00,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:01,097 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:01,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:01,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:01,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:01,354 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:01,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:01,602 INFO L85 PathProgramCache]: Analyzing trace with hash 1293529243, now seen corresponding path program 1 times [2024-05-06 16:20:01,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:01,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:01,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:01,899 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:01,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:01,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:01,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:02,201 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:02,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:20:02,506 INFO L85 PathProgramCache]: Analyzing trace with hash -432856669, now seen corresponding path program 1 times [2024-05-06 16:20:02,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:02,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:02,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:02,782 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:02,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:02,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:02,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:03,186 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:03,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:03,439 INFO L85 PathProgramCache]: Analyzing trace with hash -533652705, now seen corresponding path program 1 times [2024-05-06 16:20:03,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:03,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:03,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:03,731 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:03,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:03,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:03,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:04,028 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:04,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:20:04,299 INFO L85 PathProgramCache]: Analyzing trace with hash -1610653142, now seen corresponding path program 1 times [2024-05-06 16:20:04,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:04,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:04,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:04,565 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:04,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:04,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:04,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:04,872 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:04,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:05,122 INFO L85 PathProgramCache]: Analyzing trace with hash 1609362310, now seen corresponding path program 1 times [2024-05-06 16:20:05,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:05,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:05,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:05,536 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:05,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:05,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:05,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:05,854 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:06,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:06,322 INFO L85 PathProgramCache]: Analyzing trace with hash -1025353746, now seen corresponding path program 1 times [2024-05-06 16:20:06,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:06,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:06,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:06,636 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:06,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:06,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:06,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:06,928 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:07,388 INFO L349 Elim1Store]: treesize reduction 12, result has 7.7 percent of original size [2024-05-06 16:20:07,388 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 27 [2024-05-06 16:20:07,606 INFO L85 PathProgramCache]: Analyzing trace with hash -1721192877, now seen corresponding path program 1 times [2024-05-06 16:20:07,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:07,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:07,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:07,933 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:07,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:07,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:08,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:08,389 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:08,610 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:08,739 INFO L85 PathProgramCache]: Analyzing trace with hash -595222226, now seen corresponding path program 1 times [2024-05-06 16:20:08,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:08,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:08,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:09,054 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:09,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:09,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:09,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:09,362 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:10,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:10,456 INFO L85 PathProgramCache]: Analyzing trace with hash 1988938317, now seen corresponding path program 1 times [2024-05-06 16:20:10,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:10,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:10,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:10,845 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:10,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:10,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:10,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:11,424 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:12,200 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:12,321 INFO L85 PathProgramCache]: Analyzing trace with hash -2007688275, now seen corresponding path program 1 times [2024-05-06 16:20:12,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:12,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:12,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:12,768 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:12,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:12,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:12,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:13,194 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:14,920 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:15,041 INFO L85 PathProgramCache]: Analyzing trace with hash 1264957612, now seen corresponding path program 1 times [2024-05-06 16:20:15,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:15,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:15,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:15,339 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:15,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:15,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:15,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:15,626 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:15,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:15,969 INFO L85 PathProgramCache]: Analyzing trace with hash 892770860, now seen corresponding path program 1 times [2024-05-06 16:20:15,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:15,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:16,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:16,275 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:16,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:16,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:16,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:16,575 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:16,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:16,910 INFO L85 PathProgramCache]: Analyzing trace with hash 1927029515, now seen corresponding path program 1 times [2024-05-06 16:20:16,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:16,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:16,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:17,223 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:17,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:17,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:17,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:17,585 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:17,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:17,913 INFO L85 PathProgramCache]: Analyzing trace with hash 1205542059, now seen corresponding path program 1 times [2024-05-06 16:20:17,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:17,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:17,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:18,211 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:18,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:18,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:18,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:18,509 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:18,710 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:18,847 INFO L85 PathProgramCache]: Analyzing trace with hash -1373697686, now seen corresponding path program 1 times [2024-05-06 16:20:18,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:18,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:18,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:19,141 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:19,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:19,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:19,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:19,442 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:19,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:20:19,755 INFO L85 PathProgramCache]: Analyzing trace with hash -1373697686, now seen corresponding path program 2 times [2024-05-06 16:20:19,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:19,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:19,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:20,130 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:20,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:20,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:20,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:20,435 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:20,763 INFO L349 Elim1Store]: treesize reduction 12, result has 7.7 percent of original size [2024-05-06 16:20:20,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 27 [2024-05-06 16:20:20,931 INFO L85 PathProgramCache]: Analyzing trace with hash 1837736155, now seen corresponding path program 2 times [2024-05-06 16:20:20,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:20,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:20,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:21,213 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:21,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:21,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:21,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:21,568 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:21,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:21,944 INFO L85 PathProgramCache]: Analyzing trace with hash -1657560278, now seen corresponding path program 1 times [2024-05-06 16:20:21,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:21,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:22,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:22,222 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:22,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:22,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:22,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:22,620 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:22,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:23,045 INFO L85 PathProgramCache]: Analyzing trace with hash 1042115529, now seen corresponding path program 1 times [2024-05-06 16:20:23,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:23,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:23,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:23,338 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:23,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:23,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:23,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:23,631 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:23,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:23,946 INFO L85 PathProgramCache]: Analyzing trace with hash -1703858775, now seen corresponding path program 1 times [2024-05-06 16:20:23,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:23,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:24,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:24,278 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:24,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:24,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:24,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:24,580 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:27,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:27,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:27,472 INFO L85 PathProgramCache]: Analyzing trace with hash -746173912, now seen corresponding path program 1 times [2024-05-06 16:20:27,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:27,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:27,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:27,771 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:27,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:27,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:27,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:28,206 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:29,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:29,390 INFO L85 PathProgramCache]: Analyzing trace with hash 1023720488, now seen corresponding path program 1 times [2024-05-06 16:20:29,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:29,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:29,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:29,683 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:29,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:29,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:29,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:29,997 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:30,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:30,277 INFO L85 PathProgramCache]: Analyzing trace with hash 2127078535, now seen corresponding path program 1 times [2024-05-06 16:20:30,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:30,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:30,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:30,562 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:30,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:30,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:30,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:30,860 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:31,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:20:31,114 INFO L85 PathProgramCache]: Analyzing trace with hash 715083431, now seen corresponding path program 1 times [2024-05-06 16:20:31,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:31,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:31,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:31,520 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:31,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:31,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:31,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:31,813 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:32,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:20:32,587 INFO L85 PathProgramCache]: Analyzing trace with hash -1147784576, now seen corresponding path program 1 times [2024-05-06 16:20:32,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:32,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:32,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:32,865 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:32,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:32,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:32,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:33,173 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:33,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:20:33,503 INFO L85 PathProgramCache]: Analyzing trace with hash -1857480828, now seen corresponding path program 1 times [2024-05-06 16:20:33,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:33,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:33,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:33,788 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:33,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:33,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:33,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:34,070 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:34,222 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:20:34,379 INFO L85 PathProgramCache]: Analyzing trace with hash -1193477557, now seen corresponding path program 1 times [2024-05-06 16:20:34,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:34,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:34,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:34,672 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:34,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:34,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:34,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:35,039 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:35,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:20:35,793 INFO L85 PathProgramCache]: Analyzing trace with hash 1766668841, now seen corresponding path program 1 times [2024-05-06 16:20:35,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:35,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:35,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:36,087 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:36,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:36,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:36,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:36,382 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:37,155 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:20:37,314 INFO L85 PathProgramCache]: Analyzing trace with hash -422300851, now seen corresponding path program 1 times [2024-05-06 16:20:37,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:37,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:37,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:37,596 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:37,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:37,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:37,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:37,862 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:38,034 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:20:38,185 INFO L85 PathProgramCache]: Analyzing trace with hash 1498676049, now seen corresponding path program 1 times [2024-05-06 16:20:38,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:38,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:38,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:38,490 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:38,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:38,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:38,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:38,791 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:38,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:20:39,047 INFO L85 PathProgramCache]: Analyzing trace with hash 726840152, now seen corresponding path program 1 times [2024-05-06 16:20:39,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:39,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:39,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:39,345 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:39,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:39,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:39,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:39,741 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:40,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:20:40,483 INFO L85 PathProgramCache]: Analyzing trace with hash 957655164, now seen corresponding path program 1 times [2024-05-06 16:20:40,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:40,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:40,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:40,817 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:40,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:40,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:40,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:41,104 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:41,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:20:41,738 INFO L85 PathProgramCache]: Analyzing trace with hash -790710084, now seen corresponding path program 1 times [2024-05-06 16:20:41,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:41,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:41,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:42,073 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:42,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:42,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:42,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:42,387 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:42,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:20:42,911 INFO L85 PathProgramCache]: Analyzing trace with hash 1890951616, now seen corresponding path program 1 times [2024-05-06 16:20:42,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:42,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:42,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:43,193 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:43,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:43,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:43,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:43,492 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:43,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:20:43,829 INFO L85 PathProgramCache]: Analyzing trace with hash -2114131065, now seen corresponding path program 1 times [2024-05-06 16:20:43,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:43,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:43,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:44,082 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:44,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:44,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:44,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:44,358 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:45,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 357 treesize of output 333 [2024-05-06 16:20:46,233 INFO L85 PathProgramCache]: Analyzing trace with hash 150948081, now seen corresponding path program 1 times [2024-05-06 16:20:46,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:46,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:46,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:46,496 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:46,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:46,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:46,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:46,937 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:51,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2024-05-06 16:20:51,746 INFO L85 PathProgramCache]: Analyzing trace with hash 384425392, now seen corresponding path program 1 times [2024-05-06 16:20:51,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:51,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:51,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:52,063 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:52,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:52,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:52,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:52,351 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:52,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:20:52,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:20:52,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-06 16:20:52,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 16:20:52,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 16:20:52,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 16:20:52,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2024-05-06 16:20:52,509 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-05-06 16:20:52,705 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable151,SelfDestructingSolverStorable152,SelfDestructingSolverStorable153,SelfDestructingSolverStorable154,SelfDestructingSolverStorable30,SelfDestructingSolverStorable31,SelfDestructingSolverStorable150,SelfDestructingSolverStorable32,SelfDestructingSolverStorable148,SelfDestructingSolverStorable33,SelfDestructingSolverStorable149,SelfDestructingSolverStorable34,SelfDestructingSolverStorable35,SelfDestructingSolverStorable36,SelfDestructingSolverStorable144,SelfDestructingSolverStorable37,SelfDestructingSolverStorable145,SelfDestructingSolverStorable38,SelfDestructingSolverStorable146,SelfDestructingSolverStorable39,SelfDestructingSolverStorable147,SelfDestructingSolverStorable140,SelfDestructingSolverStorable141,SelfDestructingSolverStorable142,SelfDestructingSolverStorable143,SelfDestructingSolverStorable40,SelfDestructingSolverStorable41,SelfDestructingSolverStorable42,SelfDestructingSolverStorable43,SelfDestructingSolverStorable137,SelfDestructingSolverStorable44,SelfDestructingSolverStorable138,SelfDestructingSolverStorable45,SelfDestructingSolverStorable139,SelfDestructingSolverStorable46,SelfDestructingSolverStorable47,SelfDestructingSolverStorable133,SelfDestructingSolverStorable48,SelfDestructingSolverStorable134,SelfDestructingSolverStorable49,SelfDestructingSolverStorable135,SelfDestructingSolverStorable136,SelfDestructingSolverStorable90,SelfDestructingSolverStorable173,SelfDestructingSolverStorable91,SelfDestructingSolverStorable174,SelfDestructingSolverStorable92,SelfDestructingSolverStorable175,SelfDestructingSolverStorable93,SelfDestructingSolverStorable176,SelfDestructingSolverStorable94,SelfDestructingSolverStorable95,SelfDestructingSolverStorable170,SelfDestructingSolverStorable96,SelfDestructingSolverStorable171,SelfDestructingSolverStorable97,SelfDestructingSolverStorable172,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable98,SelfDestructingSolverStorable99,SelfDestructingSolverStorable166,SelfDestructingSolverStorable167,SelfDestructingSolverStorable168,SelfDestructingSolverStorable169,SelfDestructingSolverStorable162,SelfDestructingSolverStorable163,SelfDestructingSolverStorable164,SelfDestructingSolverStorable165,SelfDestructingSolverStorable160,SelfDestructingSolverStorable161,SelfDestructingSolverStorable29,SelfDestructingSolverStorable159,SelfDestructingSolverStorable155,SelfDestructingSolverStorable156,SelfDestructingSolverStorable157,SelfDestructingSolverStorable28,SelfDestructingSolverStorable158,SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable110,SelfDestructingSolverStorable72,SelfDestructingSolverStorable73,SelfDestructingSolverStorable74,SelfDestructingSolverStorable75,SelfDestructingSolverStorable108,SelfDestructingSolverStorable109,SelfDestructingSolverStorable76,SelfDestructingSolverStorable104,SelfDestructingSolverStorable77,SelfDestructingSolverStorable105,SelfDestructingSolverStorable78,SelfDestructingSolverStorable106,SelfDestructingSolverStorable79,SelfDestructingSolverStorable107,SelfDestructingSolverStorable100,SelfDestructingSolverStorable101,SelfDestructingSolverStorable102,SelfDestructingSolverStorable103,SelfDestructingSolverStorable184,SelfDestructingSolverStorable80,SelfDestructingSolverStorable81,SelfDestructingSolverStorable82,SelfDestructingSolverStorable83,SelfDestructingSolverStorable180,SelfDestructingSolverStorable84,SelfDestructingSolverStorable181,SelfDestructingSolverStorable85,SelfDestructingSolverStorable182,SelfDestructingSolverStorable86,SelfDestructingSolverStorable183,SelfDestructingSolverStorable87,SelfDestructingSolverStorable88,SelfDestructingSolverStorable89,SelfDestructingSolverStorable177,SelfDestructingSolverStorable178,SelfDestructingSolverStorable179,SelfDestructingSolverStorable130,SelfDestructingSolverStorable131,SelfDestructingSolverStorable132,SelfDestructingSolverStorable50,SelfDestructingSolverStorable51,SelfDestructingSolverStorable52,SelfDestructingSolverStorable53,SelfDestructingSolverStorable54,SelfDestructingSolverStorable126,SelfDestructingSolverStorable55,SelfDestructingSolverStorable127,SelfDestructingSolverStorable56,SelfDestructingSolverStorable128,SelfDestructingSolverStorable57,SelfDestructingSolverStorable129,SelfDestructingSolverStorable58,SelfDestructingSolverStorable122,SelfDestructingSolverStorable59,SelfDestructingSolverStorable123,SelfDestructingSolverStorable124,SelfDestructingSolverStorable125,SelfDestructingSolverStorable120,SelfDestructingSolverStorable60,SelfDestructingSolverStorable121,SelfDestructingSolverStorable61,SelfDestructingSolverStorable62,SelfDestructingSolverStorable63,SelfDestructingSolverStorable64,SelfDestructingSolverStorable119,SelfDestructingSolverStorable65,SelfDestructingSolverStorable115,SelfDestructingSolverStorable66,SelfDestructingSolverStorable116,SelfDestructingSolverStorable67,SelfDestructingSolverStorable117,SelfDestructingSolverStorable68,SelfDestructingSolverStorable118,SelfDestructingSolverStorable69,SelfDestructingSolverStorable111,SelfDestructingSolverStorable112,SelfDestructingSolverStorable113,SelfDestructingSolverStorable114 [2024-05-06 16:20:52,707 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting whoop_wrapper_pc8736x_gpio_setErr0ASSERT_VIOLATIONERROR_FUNCTION === [whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:20:52,707 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:20:52,707 INFO L85 PathProgramCache]: Analyzing trace with hash -465818095, now seen corresponding path program 3 times [2024-05-06 16:20:52,707 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:20:52,707 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1137112166] [2024-05-06 16:20:52,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:20:52,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:20:52,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:20:53,100 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:20:53,100 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 16:20:53,100 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1137112166] [2024-05-06 16:20:53,100 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1137112166] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 16:20:53,100 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2036538317] [2024-05-06 16:20:53,100 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-06 16:20:53,101 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 16:20:53,101 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 16:20:53,102 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 16:20:53,104 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-05-06 16:20:54,703 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2024-05-06 16:20:54,703 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 16:20:54,712 INFO L262 TraceCheckSpWp]: Trace formula consists of 1143 conjuncts, 120 conjunts are in the unsatisfiable core [2024-05-06 16:20:54,734 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 16:20:55,012 INFO L349 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2024-05-06 16:20:55,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 16 [2024-05-06 16:20:55,041 INFO L349 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2024-05-06 16:20:55,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 16 [2024-05-06 16:20:55,063 INFO L349 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2024-05-06 16:20:55,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 14 [2024-05-06 16:20:55,148 INFO L349 Elim1Store]: treesize reduction 48, result has 28.4 percent of original size [2024-05-06 16:20:55,149 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 24 treesize of output 28 [2024-05-06 16:20:55,281 INFO L349 Elim1Store]: treesize reduction 32, result has 37.3 percent of original size [2024-05-06 16:20:55,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 25 [2024-05-06 16:20:55,409 INFO L349 Elim1Store]: treesize reduction 32, result has 52.2 percent of original size [2024-05-06 16:20:55,409 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 32 treesize of output 52 [2024-05-06 16:20:55,534 INFO L349 Elim1Store]: treesize reduction 24, result has 52.9 percent of original size [2024-05-06 16:20:55,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 27 treesize of output 41 [2024-05-06 16:20:55,683 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:55,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:55,736 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:55,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:55,797 INFO L349 Elim1Store]: treesize reduction 12, result has 60.0 percent of original size [2024-05-06 16:20:55,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 23 treesize of output 28 [2024-05-06 16:20:55,851 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:55,851 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:55,899 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:55,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:56,107 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:56,107 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:56,187 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:56,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:56,239 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:56,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:56,309 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:56,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:56,367 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:56,367 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:56,430 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:56,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:56,489 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:56,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:56,566 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:56,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:56,628 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:56,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:56,919 INFO L349 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2024-05-06 16:20:56,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 23 treesize of output 20 [2024-05-06 16:20:57,164 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 16:20:57,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 16:20:58,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2024-05-06 16:20:58,955 INFO L349 Elim1Store]: treesize reduction 12, result has 60.0 percent of original size [2024-05-06 16:20:58,955 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 23 treesize of output 28 [2024-05-06 16:20:59,001 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 16:20:59,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2024-05-06 16:21:00,259 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:00,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2024-05-06 16:21:00,795 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:00,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:00,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2024-05-06 16:21:00,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2024-05-06 16:21:01,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2024-05-06 16:21:01,186 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-06 16:21:01,186 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 16:21:01,186 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2036538317] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 16:21:01,186 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 16:21:01,186 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [29] imperfect sequences [10] total 37 [2024-05-06 16:21:01,186 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [428032548] [2024-05-06 16:21:01,186 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 16:21:01,187 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2024-05-06 16:21:01,187 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 16:21:01,188 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2024-05-06 16:21:01,188 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=1216, Unknown=0, NotChecked=0, Total=1332 [2024-05-06 16:21:01,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:21:01,188 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 16:21:01,188 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 12.517241379310345) internal successors, (363), 29 states have internal predecessors, (363), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 16:21:01,188 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:21:01,188 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:21:01,189 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-06 16:21:01,189 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 16:21:01,189 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 16:21:01,189 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 16:21:01,189 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 39 states. [2024-05-06 16:21:01,189 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:21:02,914 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:21:03,394 INFO L85 PathProgramCache]: Analyzing trace with hash -834717352, now seen corresponding path program 4 times [2024-05-06 16:21:03,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:03,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:03,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:03,673 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:03,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:03,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:03,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:03,952 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:04,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:21:04,584 INFO L85 PathProgramCache]: Analyzing trace with hash -1622555044, now seen corresponding path program 4 times [2024-05-06 16:21:04,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:04,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:04,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:04,864 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:04,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:04,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:04,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:05,158 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:05,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2024-05-06 16:21:05,794 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:05,795 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:05,940 INFO L85 PathProgramCache]: Analyzing trace with hash 976670499, now seen corresponding path program 4 times [2024-05-06 16:21:05,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:05,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:05,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:06,230 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:06,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:06,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:06,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:06,647 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:08,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2024-05-06 16:21:09,042 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:09,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:09,339 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:09,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:11,528 INFO L85 PathProgramCache]: Analyzing trace with hash 797132786, now seen corresponding path program 4 times [2024-05-06 16:21:11,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:11,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:11,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:12,016 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-06 16:21:12,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:12,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:12,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:12,333 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-06 16:21:12,336 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-05-06 16:21:12,337 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=441, Invalid=4961, Unknown=0, NotChecked=0, Total=5402 [2024-05-06 16:21:13,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:13,469 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:13,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:13,756 INFO L85 PathProgramCache]: Analyzing trace with hash -834717352, now seen corresponding path program 5 times [2024-05-06 16:21:13,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:13,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:13,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:14,194 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:14,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:14,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:14,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:14,525 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:14,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:15,327 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:15,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:15,487 INFO L85 PathProgramCache]: Analyzing trace with hash -1622555044, now seen corresponding path program 5 times [2024-05-06 16:21:15,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:15,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:15,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:15,793 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:15,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:15,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:15,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:16,157 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:16,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:16,953 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:16,953 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:17,316 INFO L85 PathProgramCache]: Analyzing trace with hash 976670499, now seen corresponding path program 5 times [2024-05-06 16:21:17,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:17,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:17,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:17,795 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:17,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:17,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:17,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:18,118 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:20,836 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:21:21,417 INFO L85 PathProgramCache]: Analyzing trace with hash -2131049903, now seen corresponding path program 4 times [2024-05-06 16:21:21,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:21,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:21,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:21,724 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:21,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:21,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:21,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:22,012 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:23,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 16:21:23,822 INFO L85 PathProgramCache]: Analyzing trace with hash 2034229191, now seen corresponding path program 2 times [2024-05-06 16:21:23,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:23,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:23,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:23,967 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-06 16:21:23,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:23,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:24,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:24,122 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-06 16:21:24,123 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-06 16:21:24,124 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=465, Invalid=5855, Unknown=0, NotChecked=0, Total=6320 [2024-05-06 16:21:24,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:25,149 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:25,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:25,249 INFO L85 PathProgramCache]: Analyzing trace with hash -834717352, now seen corresponding path program 6 times [2024-05-06 16:21:25,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:25,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:25,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:25,537 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:25,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:25,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:25,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:25,851 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:26,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:26,855 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:26,855 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:27,037 INFO L85 PathProgramCache]: Analyzing trace with hash -1622555044, now seen corresponding path program 6 times [2024-05-06 16:21:27,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:27,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:27,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:27,328 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:27,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:27,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:27,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:27,622 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:27,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:28,351 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:28,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:28,535 INFO L85 PathProgramCache]: Analyzing trace with hash 976670499, now seen corresponding path program 6 times [2024-05-06 16:21:28,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:28,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:28,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:28,834 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:28,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:28,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:28,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:29,137 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:30,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:21:31,019 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:31,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:31,222 INFO L85 PathProgramCache]: Analyzing trace with hash -2131049903, now seen corresponding path program 5 times [2024-05-06 16:21:31,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:31,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:31,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:31,527 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:31,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:31,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:31,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:31,828 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:33,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:33,516 INFO L85 PathProgramCache]: Analyzing trace with hash -1897935969, now seen corresponding path program 2 times [2024-05-06 16:21:33,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:33,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:33,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:33,939 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:33,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:33,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:33,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:34,210 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:34,678 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:35,030 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:35,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:35,438 INFO L85 PathProgramCache]: Analyzing trace with hash -432856669, now seen corresponding path program 2 times [2024-05-06 16:21:35,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:35,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:35,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:35,771 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:35,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:35,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:35,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:36,058 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:36,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:37,241 INFO L85 PathProgramCache]: Analyzing trace with hash -1610653142, now seen corresponding path program 2 times [2024-05-06 16:21:37,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:37,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:37,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:37,550 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:37,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:37,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:37,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:37,839 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:39,242 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:21:39,752 INFO L85 PathProgramCache]: Analyzing trace with hash -1373697686, now seen corresponding path program 3 times [2024-05-06 16:21:39,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:39,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:39,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:40,042 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:40,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:40,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:40,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:40,871 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:42,223 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:43,040 INFO L85 PathProgramCache]: Analyzing trace with hash -1147784576, now seen corresponding path program 2 times [2024-05-06 16:21:43,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:43,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:43,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:43,400 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:43,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:43,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:43,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:43,694 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:44,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:44,756 INFO L85 PathProgramCache]: Analyzing trace with hash -1857480828, now seen corresponding path program 2 times [2024-05-06 16:21:44,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:44,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:44,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:45,072 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:45,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:45,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:45,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:45,371 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:45,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:46,189 INFO L85 PathProgramCache]: Analyzing trace with hash -1193477557, now seen corresponding path program 2 times [2024-05-06 16:21:46,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:46,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:46,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:46,487 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:46,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:46,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:46,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:46,791 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:48,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:21:49,164 INFO L85 PathProgramCache]: Analyzing trace with hash 1766668841, now seen corresponding path program 2 times [2024-05-06 16:21:49,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:49,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:49,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:49,461 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:49,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:49,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:49,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:49,759 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:50,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:51,296 INFO L85 PathProgramCache]: Analyzing trace with hash -422300851, now seen corresponding path program 2 times [2024-05-06 16:21:51,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:51,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:51,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:51,705 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:51,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:51,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:51,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:52,162 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:52,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:53,009 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:53,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:53,107 INFO L85 PathProgramCache]: Analyzing trace with hash 1498676049, now seen corresponding path program 2 times [2024-05-06 16:21:53,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:53,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:53,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:53,391 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:53,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:53,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:53,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:53,699 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:54,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:54,757 INFO L85 PathProgramCache]: Analyzing trace with hash 726840152, now seen corresponding path program 2 times [2024-05-06 16:21:54,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:54,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:54,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:55,057 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:55,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:55,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:55,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:55,353 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:56,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:21:57,401 INFO L85 PathProgramCache]: Analyzing trace with hash 957655164, now seen corresponding path program 2 times [2024-05-06 16:21:57,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:57,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:57,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:57,721 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:57,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:57,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:57,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:58,160 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:58,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:21:58,975 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:58,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:59,186 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:21:59,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:21:59,285 INFO L85 PathProgramCache]: Analyzing trace with hash -790710084, now seen corresponding path program 2 times [2024-05-06 16:21:59,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:59,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:59,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:59,561 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:21:59,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:21:59,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:21:59,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:21:59,819 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:00,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:00,481 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:00,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:00,782 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:00,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:00,828 INFO L85 PathProgramCache]: Analyzing trace with hash 1890951616, now seen corresponding path program 2 times [2024-05-06 16:22:00,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:00,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:00,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:01,089 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:01,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:01,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:01,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:01,511 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:01,766 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:02,326 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:02,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:02,393 INFO L85 PathProgramCache]: Analyzing trace with hash -2114131065, now seen corresponding path program 2 times [2024-05-06 16:22:02,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:02,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:02,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:02,665 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:02,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:02,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:02,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:02,927 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:08,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:08,411 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:08,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:08,646 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:08,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:08,705 INFO L85 PathProgramCache]: Analyzing trace with hash -44053469, now seen corresponding path program 1 times [2024-05-06 16:22:08,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:08,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:08,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:08,961 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:08,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:08,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:09,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:09,194 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:09,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:09,732 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:09,732 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:09,939 INFO L85 PathProgramCache]: Analyzing trace with hash -1859437774, now seen corresponding path program 1 times [2024-05-06 16:22:09,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:09,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:09,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:10,189 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:10,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:10,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:10,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:10,625 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:11,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:11,713 INFO L85 PathProgramCache]: Analyzing trace with hash 1979185283, now seen corresponding path program 1 times [2024-05-06 16:22:11,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:11,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:11,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:11,990 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:11,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:11,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:12,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:12,241 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:14,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:22:14,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:22:14,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-06 16:22:14,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 16:22:14,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2024-05-06 16:22:14,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 16:22:14,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2024-05-06 16:22:14,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-05-06 16:22:14,700 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-05-06 16:22:14,876 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable195,SelfDestructingSolverStorable196,SelfDestructingSolverStorable197,SelfDestructingSolverStorable230,SelfDestructingSolverStorable198,SelfDestructingSolverStorable231,SelfDestructingSolverStorable191,SelfDestructingSolverStorable192,SelfDestructingSolverStorable193,SelfDestructingSolverStorable194,SelfDestructingSolverStorable190,SelfDestructingSolverStorable229,SelfDestructingSolverStorable225,SelfDestructingSolverStorable226,SelfDestructingSolverStorable227,SelfDestructingSolverStorable228,SelfDestructingSolverStorable188,SelfDestructingSolverStorable221,SelfDestructingSolverStorable189,SelfDestructingSolverStorable222,SelfDestructingSolverStorable223,SelfDestructingSolverStorable224,SelfDestructingSolverStorable185,SelfDestructingSolverStorable186,SelfDestructingSolverStorable187,SelfDestructingSolverStorable220,SelfDestructingSolverStorable218,SelfDestructingSolverStorable219,SelfDestructingSolverStorable214,SelfDestructingSolverStorable215,SelfDestructingSolverStorable216,SelfDestructingSolverStorable217,SelfDestructingSolverStorable210,SelfDestructingSolverStorable211,SelfDestructingSolverStorable212,SelfDestructingSolverStorable213,6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable207,SelfDestructingSolverStorable208,SelfDestructingSolverStorable209,SelfDestructingSolverStorable203,SelfDestructingSolverStorable247,SelfDestructingSolverStorable204,SelfDestructingSolverStorable205,SelfDestructingSolverStorable206,SelfDestructingSolverStorable243,SelfDestructingSolverStorable200,SelfDestructingSolverStorable244,SelfDestructingSolverStorable201,SelfDestructingSolverStorable245,SelfDestructingSolverStorable202,SelfDestructingSolverStorable246,SelfDestructingSolverStorable240,SelfDestructingSolverStorable241,SelfDestructingSolverStorable242,SelfDestructingSolverStorable236,SelfDestructingSolverStorable237,SelfDestructingSolverStorable238,SelfDestructingSolverStorable239,SelfDestructingSolverStorable199,SelfDestructingSolverStorable232,SelfDestructingSolverStorable233,SelfDestructingSolverStorable234,SelfDestructingSolverStorable235 [2024-05-06 16:22:14,877 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:22:14,877 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:22:14,877 INFO L85 PathProgramCache]: Analyzing trace with hash 1343047839, now seen corresponding path program 1 times [2024-05-06 16:22:14,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:22:14,877 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [601246657] [2024-05-06 16:22:14,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:14,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:14,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:15,163 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:15,163 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 16:22:15,163 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [601246657] [2024-05-06 16:22:15,163 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [601246657] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 16:22:15,163 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1014176787] [2024-05-06 16:22:15,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:15,167 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 16:22:15,168 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 16:22:15,169 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 16:22:15,170 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-05-06 16:22:16,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:16,956 INFO L262 TraceCheckSpWp]: Trace formula consists of 990 conjuncts, 28 conjunts are in the unsatisfiable core [2024-05-06 16:22:16,959 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 16:22:16,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2024-05-06 16:22:16,969 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:16,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2024-05-06 16:22:16,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2024-05-06 16:22:17,010 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-06 16:22:17,010 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 16:22:17,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1014176787] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 16:22:17,010 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 16:22:17,011 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [9] total 13 [2024-05-06 16:22:17,011 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [757676681] [2024-05-06 16:22:17,011 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 16:22:17,011 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-06 16:22:17,011 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 16:22:17,012 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 16:22:17,012 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2024-05-06 16:22:17,012 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:22:17,012 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 16:22:17,012 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 44.0) internal successors, (264), 6 states have internal predecessors, (264), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 16:22:17,012 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:22:17,012 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 16:22:17,012 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-06 16:22:17,012 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 16:22:17,012 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 37 states. [2024-05-06 16:22:17,012 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 16:22:17,012 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 39 states. [2024-05-06 16:22:17,012 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2024-05-06 16:22:17,013 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:22:17,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:18,411 INFO L85 PathProgramCache]: Analyzing trace with hash -834717352, now seen corresponding path program 7 times [2024-05-06 16:22:18,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:18,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:18,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:18,699 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:18,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:18,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:18,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:18,974 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:19,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:19,690 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:19,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:19,855 INFO L85 PathProgramCache]: Analyzing trace with hash -1622555044, now seen corresponding path program 7 times [2024-05-06 16:22:19,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:19,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:19,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:20,159 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:20,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:20,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:20,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:20,527 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:20,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:21,362 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:21,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:21,532 INFO L85 PathProgramCache]: Analyzing trace with hash 976670499, now seen corresponding path program 7 times [2024-05-06 16:22:21,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:21,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:21,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:21,832 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:21,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:21,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:21,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:22,150 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:23,874 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:22:24,201 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:24,203 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:24,373 INFO L85 PathProgramCache]: Analyzing trace with hash -2131049903, now seen corresponding path program 6 times [2024-05-06 16:22:24,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:24,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:24,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:24,804 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:24,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:24,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:24,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:25,173 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:26,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:26,599 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:26,600 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:26,716 INFO L85 PathProgramCache]: Analyzing trace with hash -1897935969, now seen corresponding path program 3 times [2024-05-06 16:22:26,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:26,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:26,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:27,141 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:27,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:27,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:27,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:27,430 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:28,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:28,241 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:28,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:28,502 INFO L85 PathProgramCache]: Analyzing trace with hash -432856669, now seen corresponding path program 3 times [2024-05-06 16:22:28,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:28,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:28,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:28,779 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:28,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:28,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:28,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:29,093 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:29,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:30,303 INFO L85 PathProgramCache]: Analyzing trace with hash -1610653142, now seen corresponding path program 3 times [2024-05-06 16:22:30,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:30,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:30,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:30,594 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:30,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:30,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:30,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:30,886 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:32,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:22:32,477 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:32,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:32,697 INFO L85 PathProgramCache]: Analyzing trace with hash -1373697686, now seen corresponding path program 4 times [2024-05-06 16:22:32,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:32,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:32,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:32,974 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:32,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:32,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:33,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:33,386 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:34,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:34,951 INFO L85 PathProgramCache]: Analyzing trace with hash -1147784576, now seen corresponding path program 3 times [2024-05-06 16:22:34,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:34,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:35,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:35,238 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:35,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:35,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:35,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:35,515 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:35,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:36,329 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:36,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:36,525 INFO L85 PathProgramCache]: Analyzing trace with hash -1857480828, now seen corresponding path program 3 times [2024-05-06 16:22:36,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:36,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:36,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:36,817 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:36,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:36,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:36,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:37,086 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:37,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:38,256 INFO L85 PathProgramCache]: Analyzing trace with hash -1193477557, now seen corresponding path program 3 times [2024-05-06 16:22:38,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:38,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:38,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:38,573 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:38,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:38,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:38,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:39,008 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:39,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:22:40,422 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:40,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:40,448 INFO L85 PathProgramCache]: Analyzing trace with hash 1766668841, now seen corresponding path program 3 times [2024-05-06 16:22:40,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:40,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:40,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:40,729 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:40,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:40,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:40,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:41,026 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:42,134 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:42,687 INFO L85 PathProgramCache]: Analyzing trace with hash -422300851, now seen corresponding path program 3 times [2024-05-06 16:22:42,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:42,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:42,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:42,955 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:42,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:42,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:43,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:43,351 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:43,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:44,330 INFO L85 PathProgramCache]: Analyzing trace with hash 1498676049, now seen corresponding path program 3 times [2024-05-06 16:22:44,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:44,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:44,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:44,759 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:44,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:44,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:44,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:45,051 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:45,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:45,927 INFO L85 PathProgramCache]: Analyzing trace with hash 726840152, now seen corresponding path program 3 times [2024-05-06 16:22:45,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:45,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:46,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:46,217 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:46,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:46,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:46,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:46,515 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:47,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2024-05-06 16:22:48,186 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:48,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:48,248 INFO L85 PathProgramCache]: Analyzing trace with hash 957655164, now seen corresponding path program 3 times [2024-05-06 16:22:48,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:48,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:48,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:48,530 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:48,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:48,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:48,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:48,813 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:49,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:49,625 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:49,626 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:49,843 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:49,843 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:49,882 INFO L85 PathProgramCache]: Analyzing trace with hash -790710084, now seen corresponding path program 3 times [2024-05-06 16:22:49,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:49,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:49,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:50,155 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:50,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:50,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:50,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:50,550 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:50,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:51,099 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:51,100 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:51,371 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:51,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:51,428 INFO L85 PathProgramCache]: Analyzing trace with hash 1890951616, now seen corresponding path program 3 times [2024-05-06 16:22:51,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:51,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:51,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:51,694 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:51,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:51,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:51,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:51,962 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:52,181 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:52,448 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:52,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:52,672 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:52,672 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:52,788 INFO L85 PathProgramCache]: Analyzing trace with hash -2114131065, now seen corresponding path program 3 times [2024-05-06 16:22:52,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:52,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:52,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:53,303 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:53,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:53,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:53,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:53,567 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:55,734 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:56,351 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:56,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:56,383 INFO L85 PathProgramCache]: Analyzing trace with hash -44053469, now seen corresponding path program 2 times [2024-05-06 16:22:56,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:56,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:56,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:56,761 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:56,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:56,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:56,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:57,005 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:57,273 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:57,674 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 16:22:57,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 9 [2024-05-06 16:22:57,887 INFO L85 PathProgramCache]: Analyzing trace with hash -1859437774, now seen corresponding path program 2 times [2024-05-06 16:22:57,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:57,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:57,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:58,150 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:58,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:58,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:58,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:58,403 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:58,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2024-05-06 16:22:59,714 INFO L85 PathProgramCache]: Analyzing trace with hash 1979185283, now seen corresponding path program 2 times [2024-05-06 16:22:59,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:59,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:22:59,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:22:59,983 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:22:59,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:22:59,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:23:00,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:23:00,253 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:23:00,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:23:00,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-06 16:23:00,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-06 16:23:00,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 16:23:00,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2024-05-06 16:23:00,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-05-06 16:23:00,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2024-05-06 16:23:00,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-05-06 16:23:00,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 16:23:00,759 INFO L805 garLoopResultBuilder]: Registering result SAFE for location whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION (6 of 7 remaining) [2024-05-06 16:23:00,760 INFO L805 garLoopResultBuilder]: Registering result SAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (5 of 7 remaining) [2024-05-06 16:23:00,760 INFO L805 garLoopResultBuilder]: Registering result SAFE for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (4 of 7 remaining) [2024-05-06 16:23:00,760 INFO L805 garLoopResultBuilder]: Registering result SAFE for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 7 remaining) [2024-05-06 16:23:00,760 INFO L805 garLoopResultBuilder]: Registering result SAFE for location whoop_wrapper_pc8736x_gpio_setErr0ASSERT_VIOLATIONERROR_FUNCTION (2 of 7 remaining) [2024-05-06 16:23:00,760 INFO L805 garLoopResultBuilder]: Registering result SAFE for location whoop_wrapper_pc8736x_gpio_openErr0ASSERT_VIOLATIONERROR_FUNCTION (1 of 7 remaining) [2024-05-06 16:23:00,760 INFO L805 garLoopResultBuilder]: Registering result SAFE for location whoop_wrapper_pc8736x_gpio_setErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 7 remaining) [2024-05-06 16:23:00,790 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-05-06 16:23:00,977 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable250,SelfDestructingSolverStorable272,SelfDestructingSolverStorable251,SelfDestructingSolverStorable273,SelfDestructingSolverStorable252,SelfDestructingSolverStorable274,SelfDestructingSolverStorable253,SelfDestructingSolverStorable275,SelfDestructingSolverStorable290,SelfDestructingSolverStorable291,SelfDestructingSolverStorable270,SelfDestructingSolverStorable292,SelfDestructingSolverStorable271,7 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable269,SelfDestructingSolverStorable248,SelfDestructingSolverStorable249,SelfDestructingSolverStorable265,SelfDestructingSolverStorable287,SelfDestructingSolverStorable266,SelfDestructingSolverStorable288,SelfDestructingSolverStorable267,SelfDestructingSolverStorable289,SelfDestructingSolverStorable268,SelfDestructingSolverStorable261,SelfDestructingSolverStorable283,SelfDestructingSolverStorable262,SelfDestructingSolverStorable284,SelfDestructingSolverStorable263,SelfDestructingSolverStorable285,SelfDestructingSolverStorable264,SelfDestructingSolverStorable286,SelfDestructingSolverStorable280,SelfDestructingSolverStorable281,SelfDestructingSolverStorable260,SelfDestructingSolverStorable282,SelfDestructingSolverStorable258,SelfDestructingSolverStorable259,SelfDestructingSolverStorable254,SelfDestructingSolverStorable276,SelfDestructingSolverStorable255,SelfDestructingSolverStorable277,SelfDestructingSolverStorable256,SelfDestructingSolverStorable278,SelfDestructingSolverStorable257,SelfDestructingSolverStorable279 [2024-05-06 16:23:00,981 INFO L448 BasicCegarLoop]: Path program histogram: [7, 7, 7, 6, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-06 16:23:00,985 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-06 16:23:00,985 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-06 16:23:00,988 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 06.05 04:23:00 BasicIcfg [2024-05-06 16:23:00,988 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-06 16:23:00,988 INFO L158 Benchmark]: Toolchain (without parser) took 286242.68ms. Allocated memory was 156.2MB in the beginning and 2.9GB in the end (delta: 2.7GB). Free memory was 81.2MB in the beginning and 881.8MB in the end (delta: -800.7MB). Peak memory consumption was 1.9GB. Max. memory is 8.0GB. [2024-05-06 16:23:00,988 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 156.2MB. Free memory was 134.8MB in the beginning and 134.8MB in the end (delta: 63.2kB). There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 16:23:00,988 INFO L158 Benchmark]: CACSL2BoogieTranslator took 3696.25ms. Allocated memory was 156.2MB in the beginning and 205.5MB in the end (delta: 49.3MB). Free memory was 81.0MB in the beginning and 123.9MB in the end (delta: -43.0MB). Peak memory consumption was 67.2MB. Max. memory is 8.0GB. [2024-05-06 16:23:00,988 INFO L158 Benchmark]: Boogie Procedure Inliner took 157.80ms. Allocated memory is still 205.5MB. Free memory was 123.9MB in the beginning and 112.4MB in the end (delta: 11.5MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. [2024-05-06 16:23:00,991 INFO L158 Benchmark]: Boogie Preprocessor took 42.79ms. Allocated memory is still 205.5MB. Free memory was 112.4MB in the beginning and 106.6MB in the end (delta: 5.8MB). Peak memory consumption was 5.2MB. Max. memory is 8.0GB. [2024-05-06 16:23:00,991 INFO L158 Benchmark]: RCFGBuilder took 1036.60ms. Allocated memory is still 205.5MB. Free memory was 106.6MB in the beginning and 112.4MB in the end (delta: -5.7MB). Peak memory consumption was 48.2MB. Max. memory is 8.0GB. [2024-05-06 16:23:00,991 INFO L158 Benchmark]: TraceAbstraction took 281304.45ms. Allocated memory was 205.5MB in the beginning and 2.9GB in the end (delta: 2.7GB). Free memory was 111.3MB in the beginning and 881.8MB in the end (delta: -770.5MB). Peak memory consumption was 1.9GB. Max. memory is 8.0GB. [2024-05-06 16:23:00,992 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 156.2MB. Free memory was 134.8MB in the beginning and 134.8MB in the end (delta: 63.2kB). There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 3696.25ms. Allocated memory was 156.2MB in the beginning and 205.5MB in the end (delta: 49.3MB). Free memory was 81.0MB in the beginning and 123.9MB in the end (delta: -43.0MB). Peak memory consumption was 67.2MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 157.80ms. Allocated memory is still 205.5MB. Free memory was 123.9MB in the beginning and 112.4MB in the end (delta: 11.5MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. * Boogie Preprocessor took 42.79ms. Allocated memory is still 205.5MB. Free memory was 112.4MB in the beginning and 106.6MB in the end (delta: 5.8MB). Peak memory consumption was 5.2MB. Max. memory is 8.0GB. * RCFGBuilder took 1036.60ms. Allocated memory is still 205.5MB. Free memory was 106.6MB in the beginning and 112.4MB in the end (delta: -5.7MB). Peak memory consumption was 48.2MB. Max. memory is 8.0GB. * TraceAbstraction took 281304.45ms. Allocated memory was 205.5MB in the beginning and 2.9GB in the end (delta: 2.7GB). Free memory was 111.3MB in the beginning and 881.8MB in the end (delta: -770.5MB). Peak memory consumption was 1.9GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResultAtLocation [Line: 3227]: Unsoundness Warning Ignoring inline assembler instruction C: asm volatile ("" "xchg" "b %b0, %1\n" : "+q" (__ret), "+m" (*((&head->first))) : : "memory", "cc"); [3227] - GenericResultAtLocation [Line: 3227]: Unsoundness Warning Ignoring inline assembler instruction C: asm volatile ("" "xchg" "w %w0, %1\n" : "+r" (__ret), "+m" (*((&head->first))) : : "memory", "cc"); [3227] - GenericResultAtLocation [Line: 3227]: Unsoundness Warning Ignoring inline assembler instruction C: asm volatile ("" "xchg" "l %0, %1\n" : "+r" (__ret), "+m" (*((&head->first))) : : "memory", "cc"); [3227] - GenericResultAtLocation [Line: 3227]: Unsoundness Warning Ignoring inline assembler instruction C: asm volatile ("" "xchg" "q %q0, %1\n" : "+r" (__ret), "+m" (*((&head->first))) : : "memory", "cc"); [3227] - GenericResultAtLocation [Line: 5814]: Unsoundness Warning Ignoring inline assembler instruction C: asm volatile("ud2"); [5814] * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 367766, independent: 356268, independent conditional: 356057, independent unconditional: 211, dependent: 11478, dependent conditional: 11478, dependent unconditional: 0, unknown: 20, unknown conditional: 20, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 356962, independent: 356268, independent conditional: 356057, independent unconditional: 211, dependent: 674, dependent conditional: 674, dependent unconditional: 0, unknown: 20, unknown conditional: 20, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 356962, independent: 356268, independent conditional: 356057, independent unconditional: 211, dependent: 674, dependent conditional: 674, dependent unconditional: 0, unknown: 20, unknown conditional: 20, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 356962, independent: 356268, independent conditional: 356057, independent unconditional: 211, dependent: 674, dependent conditional: 674, dependent unconditional: 0, unknown: 20, unknown conditional: 20, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 359805, independent: 356268, independent conditional: 175188, independent unconditional: 181080, dependent: 3444, dependent conditional: 2773, dependent unconditional: 671, unknown: 93, unknown conditional: 73, unknown unconditional: 20] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 359805, independent: 356268, independent conditional: 39713, independent unconditional: 316555, dependent: 3444, dependent conditional: 2238, dependent unconditional: 1206, unknown: 93, unknown conditional: 62, unknown unconditional: 31] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 359805, independent: 356268, independent conditional: 39713, independent unconditional: 316555, dependent: 3444, dependent conditional: 2238, dependent unconditional: 1206, unknown: 93, unknown conditional: 62, unknown unconditional: 31] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 12563, independent: 12444, independent conditional: 1248, independent unconditional: 11196, dependent: 109, dependent conditional: 93, dependent unconditional: 16, unknown: 10, unknown conditional: 8, unknown unconditional: 2] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 12563, independent: 12434, independent conditional: 0, independent unconditional: 12434, dependent: 129, dependent conditional: 0, dependent unconditional: 129, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 129, independent: 10, independent conditional: 10, independent unconditional: 0, dependent: 109, dependent conditional: 93, dependent unconditional: 16, unknown: 10, unknown conditional: 8, unknown unconditional: 2] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 129, independent: 10, independent conditional: 10, independent unconditional: 0, dependent: 109, dependent conditional: 93, dependent unconditional: 16, unknown: 10, unknown conditional: 8, unknown unconditional: 2] , SemanticIndependenceRelation.Query Time [ms]: [ total: 10987, independent: 113, independent conditional: 113, independent unconditional: 0, dependent: 297, dependent conditional: 268, dependent unconditional: 29, unknown: 10576, unknown conditional: 8475, unknown unconditional: 2101] , Protected Queries: 0 ], Cache Queries: [ total: 359805, independent: 343824, independent conditional: 38465, independent unconditional: 305359, dependent: 3335, dependent conditional: 2145, dependent unconditional: 1190, unknown: 12646, unknown conditional: 1403, unknown unconditional: 11243] , Statistics on independence cache: Total cache size (in pairs): 12553, Positive cache size: 12444, Positive conditional cache size: 1248, Positive unconditional cache size: 11196, Negative cache size: 109, Negative conditional cache size: 93, Negative unconditional cache size: 16, Unknown cache size: 10, Unknown conditional cache size: 8, Unknown unconditional cache size: 2, Eliminated conditions: 136021, Maximal queried relation: 8, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 359805, independent: 356268, independent conditional: 175188, independent unconditional: 181080, dependent: 3444, dependent conditional: 2773, dependent unconditional: 671, unknown: 93, unknown conditional: 73, unknown unconditional: 20] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 359805, independent: 356268, independent conditional: 39713, independent unconditional: 316555, dependent: 3444, dependent conditional: 2238, dependent unconditional: 1206, unknown: 93, unknown conditional: 62, unknown unconditional: 31] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 359805, independent: 356268, independent conditional: 39713, independent unconditional: 316555, dependent: 3444, dependent conditional: 2238, dependent unconditional: 1206, unknown: 93, unknown conditional: 62, unknown unconditional: 31] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 12563, independent: 12444, independent conditional: 1248, independent unconditional: 11196, dependent: 109, dependent conditional: 93, dependent unconditional: 16, unknown: 10, unknown conditional: 8, unknown unconditional: 2] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 12563, independent: 12434, independent conditional: 0, independent unconditional: 12434, dependent: 129, dependent conditional: 0, dependent unconditional: 129, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 129, independent: 10, independent conditional: 10, independent unconditional: 0, dependent: 109, dependent conditional: 93, dependent unconditional: 16, unknown: 10, unknown conditional: 8, unknown unconditional: 2] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 129, independent: 10, independent conditional: 10, independent unconditional: 0, dependent: 109, dependent conditional: 93, dependent unconditional: 16, unknown: 10, unknown conditional: 8, unknown unconditional: 2] , SemanticIndependenceRelation.Query Time [ms]: [ total: 10987, independent: 113, independent conditional: 113, independent unconditional: 0, dependent: 297, dependent conditional: 268, dependent unconditional: 29, unknown: 10576, unknown conditional: 8475, unknown unconditional: 2101] , Protected Queries: 0 ], Cache Queries: [ total: 359805, independent: 343824, independent conditional: 38465, independent unconditional: 305359, dependent: 3335, dependent conditional: 2145, dependent unconditional: 1190, unknown: 12646, unknown conditional: 1403, unknown unconditional: 11243] , Statistics on independence cache: Total cache size (in pairs): 12553, Positive cache size: 12444, Positive conditional cache size: 1248, Positive unconditional cache size: 11196, Negative cache size: 109, Negative conditional cache size: 93, Negative unconditional cache size: 16, Unknown cache size: 10, Unknown conditional cache size: 8, Unknown unconditional cache size: 2, Eliminated conditions: 136021 ], Independence queries for same thread: 10804 - PositiveResult [Line: 174]: a call to reach_error is unreachable For all program executions holds that a call to reach_error is unreachable at this location - PositiveResult [Line: 174]: a call to reach_error is unreachable For all program executions holds that a call to reach_error is unreachable at this location - PositiveResult [Line: 174]: a call to reach_error is unreachable For all program executions holds that a call to reach_error is unreachable at this location - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 5 procedures, 992 locations, 7 error locations. Started 1 CEGAR loops. OverallTime: 281.2s, OverallIterations: 9, TraceHistogramMax: 0, PathProgramHistogramMax: 7, EmptinessCheckTime: 261.3s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 153, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.3s SsaConstructionTime, 1.7s SatisfiabilityAnalysisTime, 12.2s InterpolantComputationTime, 4802 NumberOfCodeBlocks, 4738 NumberOfCodeBlocksAsserted, 14 NumberOfCheckSat, 5150 ConstructedInterpolants, 0 QuantifiedInterpolants, 21395 SizeOfPredicates, 108 NumberOfNonLiveVariables, 5622 ConjunctsInSsa, 241 ConjunctsInUnsatCore, 15 InterpolantComputations, 8 PerfectInterpolantSequences, 157/317 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 240.7s, ConditionalCommutativityIAIntegrations: 0, ConditionalCommutativityDFSRestarts: 3, ConditionalCommutativityConditionCalculations: 256, ConditionalCommutativityTraceChecks: 142, ConditionalCommutativityImperfectProofs: 139 - AllSpecificationsHoldResult: All specifications hold 3 specifications checked. All of them hold RESULT: Ultimate proved your program to be correct! [2024-05-06 16:23:01,027 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2024-05-06 16:23:01,268 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...