/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 50 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-bad-buffer-mult-alt2.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 17:44:29,099 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 17:44:29,168 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 17:44:29,173 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 17:44:29,173 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 17:44:29,197 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 17:44:29,197 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 17:44:29,198 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 17:44:29,198 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 17:44:29,201 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 17:44:29,201 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 17:44:29,201 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 17:44:29,202 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 17:44:29,203 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 17:44:29,203 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 17:44:29,203 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 17:44:29,203 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 17:44:29,203 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 17:44:29,204 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 17:44:29,204 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 17:44:29,204 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 17:44:29,204 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 17:44:29,204 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 17:44:29,205 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 17:44:29,205 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 17:44:29,206 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 17:44:29,206 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 17:44:29,206 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 17:44:29,206 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 17:44:29,206 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 17:44:29,207 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 17:44:29,207 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 17:44:29,207 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 17:44:29,207 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 17:44:29,208 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 17:44:29,208 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 17:44:29,208 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 17:44:29,208 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 17:44:29,208 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 17:44:29,208 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 50 [2024-05-06 17:44:29,413 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 17:44:29,433 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 17:44:29,435 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 17:44:29,436 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 17:44:29,436 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 17:44:29,437 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-bad-buffer-mult-alt2.wvr.c [2024-05-06 17:44:30,386 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 17:44:30,547 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 17:44:30,552 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-bad-buffer-mult-alt2.wvr.c [2024-05-06 17:44:30,558 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/7e54010b5/dbd07bc29af74f1a8d5d4bf1d6df7a71/FLAGea55013e5 [2024-05-06 17:44:30,568 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/7e54010b5/dbd07bc29af74f1a8d5d4bf1d6df7a71 [2024-05-06 17:44:30,570 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 17:44:30,571 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 17:44:30,572 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 17:44:30,572 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 17:44:30,578 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 17:44:30,578 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,579 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3c8e94e2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30, skipping insertion in model container [2024-05-06 17:44:30,579 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,605 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 17:44:30,775 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-bad-buffer-mult-alt2.wvr.c[4174,4187] [2024-05-06 17:44:30,789 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 17:44:30,798 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 17:44:30,829 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-bad-buffer-mult-alt2.wvr.c[4174,4187] [2024-05-06 17:44:30,832 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 17:44:30,841 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 17:44:30,842 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 17:44:30,847 INFO L206 MainTranslator]: Completed translation [2024-05-06 17:44:30,848 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30 WrapperNode [2024-05-06 17:44:30,848 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 17:44:30,849 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 17:44:30,849 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 17:44:30,849 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 17:44:30,854 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,867 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,900 INFO L138 Inliner]: procedures = 26, calls = 75, calls flagged for inlining = 17, calls inlined = 21, statements flattened = 327 [2024-05-06 17:44:30,900 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 17:44:30,901 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 17:44:30,901 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 17:44:30,901 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 17:44:30,908 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,908 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,920 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,920 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,927 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,930 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,932 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,936 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,938 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 17:44:30,939 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 17:44:30,939 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 17:44:30,939 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 17:44:30,940 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30" (1/1) ... [2024-05-06 17:44:30,944 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 17:44:30,952 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:44:30,964 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 17:44:30,970 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 17:44:31,001 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 17:44:31,001 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 17:44:31,002 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 17:44:31,002 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 17:44:31,002 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 17:44:31,002 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 17:44:31,002 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 17:44:31,003 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 17:44:31,003 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 17:44:31,003 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 17:44:31,003 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 17:44:31,004 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 17:44:31,004 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 17:44:31,004 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 17:44:31,004 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 17:44:31,004 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 17:44:31,004 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 17:44:31,004 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 17:44:31,005 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 17:44:31,006 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 17:44:31,109 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 17:44:31,110 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 17:44:31,561 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 17:44:31,686 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 17:44:31,686 INFO L309 CfgBuilder]: Removed 6 assume(true) statements. [2024-05-06 17:44:31,687 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 05:44:31 BoogieIcfgContainer [2024-05-06 17:44:31,688 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 17:44:31,689 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 17:44:31,689 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 17:44:31,691 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 17:44:31,692 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 05:44:30" (1/3) ... [2024-05-06 17:44:31,693 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3817ec12 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 05:44:31, skipping insertion in model container [2024-05-06 17:44:31,694 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:44:30" (2/3) ... [2024-05-06 17:44:31,694 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3817ec12 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 05:44:31, skipping insertion in model container [2024-05-06 17:44:31,694 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 05:44:31" (3/3) ... [2024-05-06 17:44:31,695 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-bad-buffer-mult-alt2.wvr.c [2024-05-06 17:44:31,701 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 17:44:31,708 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 17:44:31,708 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 17:44:31,708 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 17:44:31,776 INFO L144 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2024-05-06 17:44:31,817 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 17:44:31,818 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 17:44:31,818 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:44:31,819 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 17:44:31,822 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 17:44:31,850 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 17:44:31,859 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:44:31,860 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 17:44:31,867 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@795565c6, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=50, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 17:44:31,867 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-06 17:44:32,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:44:32,476 INFO L85 PathProgramCache]: Analyzing trace with hash -2077127929, now seen corresponding path program 1 times [2024-05-06 17:44:32,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:32,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:32,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:32,802 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:44:32,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:32,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:32,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:32,917 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:44:32,941 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 17:44:32,942 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 17:44:33,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:44:33,279 INFO L85 PathProgramCache]: Analyzing trace with hash -1068720971, now seen corresponding path program 1 times [2024-05-06 17:44:33,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:33,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:33,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:33,651 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:44:33,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:33,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:33,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:33,865 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:44:33,866 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 17:44:33,866 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-05-06 17:44:34,143 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:44:34,211 INFO L85 PathProgramCache]: Analyzing trace with hash 770006213, now seen corresponding path program 1 times [2024-05-06 17:44:34,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:34,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:34,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:34,384 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:44:34,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:34,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:34,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:34,514 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:44:34,515 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 17:44:34,515 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2024-05-06 17:44:34,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:44:34,799 INFO L85 PathProgramCache]: Analyzing trace with hash -144408207, now seen corresponding path program 1 times [2024-05-06 17:44:34,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:34,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:34,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:35,237 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:44:35,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:35,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:35,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:35,556 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:44:35,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:44:35,754 INFO L85 PathProgramCache]: Analyzing trace with hash 1236617145, now seen corresponding path program 1 times [2024-05-06 17:44:35,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:35,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:35,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:35,992 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:44:35,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:35,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:36,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:36,269 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:44:36,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:44:36,465 INFO L85 PathProgramCache]: Analyzing trace with hash 1107724429, now seen corresponding path program 2 times [2024-05-06 17:44:36,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:36,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:36,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:36,780 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:36,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:36,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:36,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:37,029 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:37,284 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:44:37,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:44:39,258 INFO L85 PathProgramCache]: Analyzing trace with hash -1277820888, now seen corresponding path program 3 times [2024-05-06 17:44:39,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:39,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:39,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:39,544 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:44:39,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:39,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:39,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:39,829 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:44:40,039 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:44:40,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:44:40,601 INFO L85 PathProgramCache]: Analyzing trace with hash 1423923767, now seen corresponding path program 4 times [2024-05-06 17:44:40,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:40,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:40,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:40,871 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:40,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:40,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:40,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:41,141 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:41,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:44:41,369 INFO L85 PathProgramCache]: Analyzing trace with hash 2113942971, now seen corresponding path program 5 times [2024-05-06 17:44:41,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:41,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:41,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:41,580 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:41,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:41,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:41,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:41,790 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:41,971 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:44:41,971 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:44:42,133 INFO L85 PathProgramCache]: Analyzing trace with hash -1138289334, now seen corresponding path program 6 times [2024-05-06 17:44:42,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:42,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:42,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:42,426 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:42,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:42,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:42,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:42,639 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:42,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:44:42,866 INFO L85 PathProgramCache]: Analyzing trace with hash -927230098, now seen corresponding path program 7 times [2024-05-06 17:44:42,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:42,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:42,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:43,096 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:43,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:43,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:43,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:43,319 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:43,500 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:44:43,504 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:44:43,664 INFO L85 PathProgramCache]: Analyzing trace with hash 596969549, now seen corresponding path program 8 times [2024-05-06 17:44:43,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:43,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:43,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:43,919 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:43,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:43,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:43,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:44,124 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:44,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:44:44,303 INFO L85 PathProgramCache]: Analyzing trace with hash 1453664975, now seen corresponding path program 9 times [2024-05-06 17:44:44,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:44,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:44,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:44,528 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:44:44,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:44,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:44,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:44,706 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:44:44,898 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:44:44,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:44:53,667 WARN L293 SmtUtils]: Spent 6.07s on a formula simplification that was a NOOP. DAG size: 37 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 17:44:53,876 INFO L85 PathProgramCache]: Analyzing trace with hash -654374612, now seen corresponding path program 10 times [2024-05-06 17:44:53,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:53,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:53,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:54,131 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:44:54,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:54,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:54,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:54,349 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:44:54,508 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:44:54,508 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:44:54,675 INFO L85 PathProgramCache]: Analyzing trace with hash 1189224377, now seen corresponding path program 11 times [2024-05-06 17:44:54,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:54,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:54,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:54,938 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:44:54,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:54,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:54,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:55,138 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:44:55,367 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:44:55,367 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:44:55,923 INFO L85 PathProgramCache]: Analyzing trace with hash -1788749105, now seen corresponding path program 12 times [2024-05-06 17:44:55,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:55,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:55,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:56,225 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:44:56,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:56,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:56,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:56,468 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:44:56,604 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:44:56,710 INFO L85 PathProgramCache]: Analyzing trace with hash 2000731204, now seen corresponding path program 1 times [2024-05-06 17:44:56,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:56,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:56,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:56,907 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:44:56,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:56,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:56,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:57,104 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:44:57,270 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:44:57,353 INFO L85 PathProgramCache]: Analyzing trace with hash 1677679365, now seen corresponding path program 2 times [2024-05-06 17:44:57,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:57,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:57,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:57,641 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:57,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:57,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:57,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:57,863 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:57,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:44:58,075 INFO L85 PathProgramCache]: Analyzing trace with hash 895823651, now seen corresponding path program 1 times [2024-05-06 17:44:58,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:58,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:58,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:58,267 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:44:58,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:58,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:58,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:58,528 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:44:58,660 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:44:58,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:44:58,800 INFO L85 PathProgramCache]: Analyzing trace with hash -1689246030, now seen corresponding path program 2 times [2024-05-06 17:44:58,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:58,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:58,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:59,010 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:59,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:59,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:59,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:59,217 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:59,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:44:59,410 INFO L85 PathProgramCache]: Analyzing trace with hash -827018490, now seen corresponding path program 3 times [2024-05-06 17:44:59,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:59,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:59,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:59,665 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:44:59,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:44:59,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:44:59,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:44:59,865 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:45:00,005 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:45:00,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:45:00,149 INFO L85 PathProgramCache]: Analyzing trace with hash 47951845, now seen corresponding path program 4 times [2024-05-06 17:45:00,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:00,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:00,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:00,343 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:45:00,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:00,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:00,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:00,620 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:45:00,741 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:45:00,850 INFO L85 PathProgramCache]: Analyzing trace with hash 998728806, now seen corresponding path program 1 times [2024-05-06 17:45:00,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:00,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:00,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:01,077 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:45:01,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:01,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:01,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:01,249 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:45:01,381 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:45:01,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:45:01,531 INFO L85 PathProgramCache]: Analyzing trace with hash 1482057973, now seen corresponding path program 2 times [2024-05-06 17:45:01,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:01,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:01,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:01,722 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:45:01,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:01,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:01,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:01,961 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:45:02,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:45:02,155 INFO L85 PathProgramCache]: Analyzing trace with hash -1300842205, now seen corresponding path program 3 times [2024-05-06 17:45:02,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:02,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:02,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:02,352 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:45:02,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:02,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:02,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:02,548 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:45:02,694 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:45:02,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:45:04,836 INFO L85 PathProgramCache]: Analyzing trace with hash 1697074306, now seen corresponding path program 4 times [2024-05-06 17:45:04,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:04,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:04,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:05,022 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:45:05,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:05,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:05,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:05,269 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:45:05,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:45:05,459 INFO L85 PathProgramCache]: Analyzing trace with hash 863500998, now seen corresponding path program 13 times [2024-05-06 17:45:05,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:05,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:05,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:05,632 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:45:05,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:05,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:05,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:05,800 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:45:05,961 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:45:05,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:45:06,106 INFO L85 PathProgramCache]: Analyzing trace with hash 318414677, now seen corresponding path program 14 times [2024-05-06 17:45:06,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:06,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:06,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:06,287 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:45:06,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:06,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:06,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:06,553 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:45:06,679 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:45:06,743 INFO L85 PathProgramCache]: Analyzing trace with hash 1280921283, now seen corresponding path program 15 times [2024-05-06 17:45:06,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:06,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:06,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:06,948 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:45:06,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:06,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:06,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:07,143 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:45:07,285 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:45:07,286 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:45:07,411 INFO L85 PathProgramCache]: Analyzing trace with hash 2113253922, now seen corresponding path program 16 times [2024-05-06 17:45:07,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:07,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:07,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:07,594 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:45:07,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:07,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:07,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:07,888 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:45:08,139 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:45:08,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:45:09,134 INFO L85 PathProgramCache]: Analyzing trace with hash 1230561548, now seen corresponding path program 17 times [2024-05-06 17:45:09,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:09,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:09,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:09,294 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:09,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:09,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:09,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:09,438 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:09,571 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:45:09,571 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:45:09,723 INFO L85 PathProgramCache]: Analyzing trace with hash 2114094871, now seen corresponding path program 18 times [2024-05-06 17:45:09,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:09,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:09,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:09,869 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:09,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:09,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:09,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:10,112 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:10,324 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:45:10,324 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:45:17,921 INFO L85 PathProgramCache]: Analyzing trace with hash 1112432454, now seen corresponding path program 19 times [2024-05-06 17:45:17,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:17,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:17,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:18,084 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:18,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:18,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:18,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:18,242 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:18,392 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:45:18,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:45:18,531 INFO L85 PathProgramCache]: Analyzing trace with hash 125668602, now seen corresponding path program 20 times [2024-05-06 17:45:18,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:18,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:18,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:18,752 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:18,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:18,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:18,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:18,903 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:19,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:45:19,102 INFO L85 PathProgramCache]: Analyzing trace with hash -399239746, now seen corresponding path program 21 times [2024-05-06 17:45:19,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:19,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:19,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:19,265 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:45:19,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:19,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:19,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:19,423 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:45:19,624 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:45:19,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:45:28,297 WARN L293 SmtUtils]: Spent 6.07s on a formula simplification that was a NOOP. DAG size: 37 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 17:45:30,813 INFO L85 PathProgramCache]: Analyzing trace with hash -690031756, now seen corresponding path program 1 times [2024-05-06 17:45:30,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:30,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:30,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:31,002 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:31,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:31,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:31,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:31,173 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:31,393 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:45:31,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:45:32,030 INFO L85 PathProgramCache]: Analyzing trace with hash -968614693, now seen corresponding path program 2 times [2024-05-06 17:45:32,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:32,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:32,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:32,205 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:45:32,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:32,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:32,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:32,380 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:45:32,594 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:45:32,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:45:33,252 INFO L85 PathProgramCache]: Analyzing trace with hash -1407732218, now seen corresponding path program 1 times [2024-05-06 17:45:33,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:33,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:33,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:33,403 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:33,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:33,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:33,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:33,566 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:33,786 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:45:33,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:45:45,372 INFO L85 PathProgramCache]: Analyzing trace with hash 1235754633, now seen corresponding path program 2 times [2024-05-06 17:45:45,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:45,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:45,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:45,536 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:45:45,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:45,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:45,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:45,716 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:45:45,917 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:45:45,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:45:46,609 INFO L85 PathProgramCache]: Analyzing trace with hash 508778795, now seen corresponding path program 1 times [2024-05-06 17:45:46,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:46,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:46,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:46,759 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:46,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:46,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:46,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:46,979 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:47,184 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:45:47,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:45:49,863 INFO L85 PathProgramCache]: Analyzing trace with hash 997274884, now seen corresponding path program 2 times [2024-05-06 17:45:49,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:49,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:49,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:50,027 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:45:50,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:50,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:50,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:50,197 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:45:50,419 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:45:50,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:45:53,424 INFO L85 PathProgramCache]: Analyzing trace with hash -399229821, now seen corresponding path program 1 times [2024-05-06 17:45:53,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:53,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:53,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:53,576 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:53,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:53,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:53,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:53,729 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:53,939 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:45:53,940 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:45:54,598 INFO L85 PathProgramCache]: Analyzing trace with hash -1507945300, now seen corresponding path program 2 times [2024-05-06 17:45:54,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:54,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:54,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:54,773 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:45:54,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:54,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:54,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:54,931 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:45:55,135 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:45:55,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:45:58,361 INFO L85 PathProgramCache]: Analyzing trace with hash 125668940, now seen corresponding path program 1 times [2024-05-06 17:45:58,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:58,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:58,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:58,513 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:58,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:58,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:58,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:58,667 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:45:58,870 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:45:58,871 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:45:59,583 INFO L85 PathProgramCache]: Analyzing trace with hash -1284885245, now seen corresponding path program 2 times [2024-05-06 17:45:59,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:59,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:59,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:45:59,831 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:45:59,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:45:59,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:45:59,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:00,005 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:46:00,213 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:46:00,214 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:46:00,697 INFO L85 PathProgramCache]: Analyzing trace with hash 1112432485, now seen corresponding path program 1 times [2024-05-06 17:46:00,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:00,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:00,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:00,843 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:46:00,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:00,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:00,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:00,987 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:46:01,207 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:46:01,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:46:02,315 INFO L85 PathProgramCache]: Analyzing trace with hash 1931513866, now seen corresponding path program 2 times [2024-05-06 17:46:02,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:02,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:02,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:02,474 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:46:02,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:02,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:02,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:02,635 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:46:02,849 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:46:02,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:46:19,610 WARN L293 SmtUtils]: Spent 14.11s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 17:46:21,621 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q1~0.offset_In_46 Int) (v_~q1_front~0_In_44 Int) (v_~q1~0.base_In_46 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_46) (+ (* v_~q1_front~0_In_44 4) v_~q1~0.offset_In_46)))) (or (< (+ 4294967295 .cse0) 0) (< 4294967295 .cse0) (= .cse0 0) (< v_~q1_front~0_In_44 0)))) (forall ((v_~q2~0.base_In_25 Int) (v_~q2~0.offset_In_25 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_25) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_25)) 0))) is different from false [2024-05-06 17:46:21,623 INFO L85 PathProgramCache]: Analyzing trace with hash 2114094895, now seen corresponding path program 22 times [2024-05-06 17:46:21,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:21,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:21,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:21,770 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:46:21,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:21,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:21,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:21,919 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:46:22,211 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:46:22,211 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:46:22,758 INFO L85 PathProgramCache]: Analyzing trace with hash 337349504, now seen corresponding path program 23 times [2024-05-06 17:46:22,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:22,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:22,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:22,927 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:46:22,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:22,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:22,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:23,100 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:46:23,262 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:46:23,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:46:23,388 INFO L85 PathProgramCache]: Analyzing trace with hash -1787666221, now seen corresponding path program 24 times [2024-05-06 17:46:23,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:23,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:23,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:23,520 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:46:23,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:23,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:23,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:23,680 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:46:23,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:46:23,862 INFO L85 PathProgramCache]: Analyzing trace with hash 416922885, now seen corresponding path program 25 times [2024-05-06 17:46:23,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:23,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:23,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:24,074 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:46:24,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:24,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:24,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:24,206 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:46:24,420 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:46:24,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:46:38,109 WARN L293 SmtUtils]: Spent 10.11s on a formula simplification. DAG size of input: 34 DAG size of output: 14 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 17:46:38,141 INFO L85 PathProgramCache]: Analyzing trace with hash -494869139, now seen corresponding path program 26 times [2024-05-06 17:46:38,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:38,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:38,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:38,284 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:46:38,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:38,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:38,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:38,421 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:46:38,557 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:46:38,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:46:38,689 INFO L85 PathProgramCache]: Analyzing trace with hash -494869139, now seen corresponding path program 27 times [2024-05-06 17:46:38,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:38,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:38,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:38,905 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:46:38,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:38,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:38,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:39,051 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:46:39,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:46:39,242 INFO L85 PathProgramCache]: Analyzing trace with hash 1838926763, now seen corresponding path program 28 times [2024-05-06 17:46:39,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:39,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:39,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:39,383 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:46:39,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:39,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:39,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:39,524 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:46:39,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:46:39,710 INFO L85 PathProgramCache]: Analyzing trace with hash 1172155701, now seen corresponding path program 29 times [2024-05-06 17:46:39,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:39,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:39,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:39,856 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:46:39,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:39,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:39,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:40,002 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:46:40,217 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:46:40,278 INFO L85 PathProgramCache]: Analyzing trace with hash -2072044789, now seen corresponding path program 30 times [2024-05-06 17:46:40,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:40,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:40,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:40,402 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:46:40,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:40,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:40,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:40,526 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:46:40,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:46:40,724 INFO L85 PathProgramCache]: Analyzing trace with hash -1631065167, now seen corresponding path program 31 times [2024-05-06 17:46:40,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:40,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:40,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:40,881 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:46:40,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:40,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:40,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:41,045 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:46:41,285 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:46:41,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:46:42,142 INFO L85 PathProgramCache]: Analyzing trace with hash -1631065178, now seen corresponding path program 32 times [2024-05-06 17:46:42,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:42,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:42,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:42,377 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:46:42,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:42,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:42,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:42,530 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:46:42,652 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:46:42,727 INFO L85 PathProgramCache]: Analyzing trace with hash 209455406, now seen corresponding path program 33 times [2024-05-06 17:46:42,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:42,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:42,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:42,892 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:46:42,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:42,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:42,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:43,061 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:46:43,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:46:43,265 INFO L85 PathProgramCache]: Analyzing trace with hash -700589385, now seen corresponding path program 34 times [2024-05-06 17:46:43,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:43,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:43,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:43,432 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:46:43,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:43,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:43,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:43,677 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:46:43,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:46:43,880 INFO L85 PathProgramCache]: Analyzing trace with hash -2114595299, now seen corresponding path program 35 times [2024-05-06 17:46:43,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:43,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:43,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:44,064 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:46:44,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:44,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:44,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:44,249 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:46:44,457 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:46:44,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:46:45,338 INFO L85 PathProgramCache]: Analyzing trace with hash -892466831, now seen corresponding path program 36 times [2024-05-06 17:46:45,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:45,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:45,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:45,564 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:46:45,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:45,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:45,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:45,711 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:46:45,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:46:45,890 INFO L85 PathProgramCache]: Analyzing trace with hash -1896667089, now seen corresponding path program 37 times [2024-05-06 17:46:45,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:45,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:45,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:46,047 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:46:46,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:46,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:46,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:46,209 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:46:46,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:46:46,405 INFO L85 PathProgramCache]: Analyzing trace with hash 1332863273, now seen corresponding path program 38 times [2024-05-06 17:46:46,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:46,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:46,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:46,575 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:46:46,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:46,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:46,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:46,844 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:46:47,067 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:46:47,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:46:47,571 INFO L85 PathProgramCache]: Analyzing trace with hash 358286248, now seen corresponding path program 39 times [2024-05-06 17:46:47,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:47,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:47,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:47,732 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:46:47,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:47,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:47,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:47,900 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:46:48,104 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:46:48,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:46:56,681 WARN L293 SmtUtils]: Spent 6.09s on a formula simplification. DAG size of input: 34 DAG size of output: 14 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 17:46:56,712 INFO L85 PathProgramCache]: Analyzing trace with hash -85672937, now seen corresponding path program 1 times [2024-05-06 17:46:56,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:56,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:56,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:56,956 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:46:56,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:46:56,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:46:56,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:46:57,125 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:46:57,330 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:46:57,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:47:02,293 INFO L85 PathProgramCache]: Analyzing trace with hash 1124227992, now seen corresponding path program 2 times [2024-05-06 17:47:02,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:02,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:02,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:02,477 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:47:02,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:02,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:02,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:02,733 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:47:02,939 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:47:02,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:47:25,823 WARN L293 SmtUtils]: Spent 20.25s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 17:47:27,830 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.offset_In_40 Int) (v_~q2~0.base_In_40 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_40) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_40)) 0)) (forall ((v_~q1_front~0_In_57 Int) (v_~q1~0.base_In_59 Int) (v_~q1~0.offset_In_59 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_59) (+ (* v_~q1_front~0_In_57 4) v_~q1~0.offset_In_59)))) (or (= .cse0 0) (< v_~q1_front~0_In_57 0) (< (+ 4294967295 .cse0) 0) (< 4294967295 .cse0))))) is different from false [2024-05-06 17:47:27,832 INFO L85 PathProgramCache]: Analyzing trace with hash 2075446320, now seen corresponding path program 1 times [2024-05-06 17:47:27,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:27,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:27,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:28,013 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:47:28,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:28,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:28,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:28,185 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:47:28,415 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:47:28,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:47:35,651 INFO L85 PathProgramCache]: Analyzing trace with hash 510678943, now seen corresponding path program 2 times [2024-05-06 17:47:35,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:35,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:35,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:35,844 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:47:35,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:35,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:35,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:36,038 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:47:36,269 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:47:36,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:47:39,961 INFO L85 PathProgramCache]: Analyzing trace with hash 621139193, now seen corresponding path program 1 times [2024-05-06 17:47:39,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:39,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:39,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:40,138 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:47:40,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:40,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:40,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:40,383 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:47:40,593 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:47:40,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:47:41,193 INFO L85 PathProgramCache]: Analyzing trace with hash 2037522678, now seen corresponding path program 2 times [2024-05-06 17:47:41,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:41,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:41,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:41,388 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:47:41,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:41,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:41,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:41,576 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:47:41,802 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:47:41,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:47:42,289 INFO L85 PathProgramCache]: Analyzing trace with hash 712773395, now seen corresponding path program 40 times [2024-05-06 17:47:42,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:42,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:42,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:42,530 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:47:42,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:42,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:42,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:42,706 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:47:42,919 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:47:42,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:47:47,718 INFO L85 PathProgramCache]: Analyzing trace with hash -1412258788, now seen corresponding path program 41 times [2024-05-06 17:47:47,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:47,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:47,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:47,918 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:47:47,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:47,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:47,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:48,114 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:47:48,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:48,401 INFO L85 PathProgramCache]: Analyzing trace with hash 715729301, now seen corresponding path program 42 times [2024-05-06 17:47:48,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:48,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:48,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:48,569 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:47:48,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:48,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:48,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:48,742 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:47:48,973 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:47:48,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:47:49,696 INFO L85 PathProgramCache]: Analyzing trace with hash 715728715, now seen corresponding path program 43 times [2024-05-06 17:47:49,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:49,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:49,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:49,861 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:47:49,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:49,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:49,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:50,026 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:47:50,151 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:50,294 INFO L85 PathProgramCache]: Analyzing trace with hash -2109794671, now seen corresponding path program 44 times [2024-05-06 17:47:50,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:50,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:50,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:50,483 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:47:50,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:50,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:50,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:50,662 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:47:50,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:50,857 INFO L85 PathProgramCache]: Analyzing trace with hash -2109763888, now seen corresponding path program 1 times [2024-05-06 17:47:50,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:50,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:50,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:51,036 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:47:51,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:51,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:51,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:51,215 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:47:51,335 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:51,403 INFO L85 PathProgramCache]: Analyzing trace with hash 1144037889, now seen corresponding path program 2 times [2024-05-06 17:47:51,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:51,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:51,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:51,670 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:47:51,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:51,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:51,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:51,871 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:47:51,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:52,068 INFO L85 PathProgramCache]: Analyzing trace with hash 901774383, now seen corresponding path program 1 times [2024-05-06 17:47:52,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:52,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:52,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:52,242 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:47:52,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:52,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:52,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:52,416 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:47:52,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:52,624 INFO L85 PathProgramCache]: Analyzing trace with hash 1830539138, now seen corresponding path program 2 times [2024-05-06 17:47:52,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:52,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:52,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:52,893 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:47:52,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:52,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:52,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:53,089 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:47:53,213 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:53,286 INFO L85 PathProgramCache]: Analyzing trace with hash -2049120526, now seen corresponding path program 1 times [2024-05-06 17:47:53,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:53,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:53,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:53,470 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:47:53,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:53,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:53,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:53,646 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:47:53,766 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:53,831 INFO L85 PathProgramCache]: Analyzing trace with hash -1311289313, now seen corresponding path program 2 times [2024-05-06 17:47:53,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:53,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:53,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:54,029 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:47:54,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:54,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:54,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:54,291 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:47:54,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:54,488 INFO L85 PathProgramCache]: Analyzing trace with hash 1457919954, now seen corresponding path program 45 times [2024-05-06 17:47:54,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:54,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:54,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:54,671 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:47:54,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:54,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:54,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:54,844 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:47:54,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:55,026 INFO L85 PathProgramCache]: Analyzing trace with hash -2140726465, now seen corresponding path program 46 times [2024-05-06 17:47:55,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:55,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:55,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:55,216 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:47:55,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:55,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:55,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:55,486 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:47:55,707 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:47:55,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:47:56,222 INFO L85 PathProgramCache]: Analyzing trace with hash 1494648200, now seen corresponding path program 47 times [2024-05-06 17:47:56,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:56,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:56,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:56,367 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:47:56,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:56,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:56,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:56,511 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:47:56,651 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:47:56,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:47:56,768 INFO L85 PathProgramCache]: Analyzing trace with hash -880418171, now seen corresponding path program 48 times [2024-05-06 17:47:56,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:56,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:56,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:56,897 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:47:56,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:56,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:56,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:57,101 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:47:57,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:47:57,289 INFO L85 PathProgramCache]: Analyzing trace with hash -1523158637, now seen corresponding path program 49 times [2024-05-06 17:47:57,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:57,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:57,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:57,422 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:47:57,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:57,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:57,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:57,558 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:47:57,678 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:57,739 INFO L85 PathProgramCache]: Analyzing trace with hash 1548716675, now seen corresponding path program 50 times [2024-05-06 17:47:57,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:57,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:57,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:57,879 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:47:57,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:57,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:57,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:58,021 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:47:58,155 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:47:58,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:47:58,279 INFO L85 PathProgramCache]: Analyzing trace with hash 1280645200, now seen corresponding path program 51 times [2024-05-06 17:47:58,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:58,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:58,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:58,497 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:47:58,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:58,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:58,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:58,643 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:47:58,754 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:47:58,831 INFO L85 PathProgramCache]: Analyzing trace with hash 1045296424, now seen corresponding path program 52 times [2024-05-06 17:47:58,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:58,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:58,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:58,980 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:47:58,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:58,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:59,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:59,129 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:47:59,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:59,315 INFO L85 PathProgramCache]: Analyzing trace with hash -1955548347, now seen corresponding path program 53 times [2024-05-06 17:47:59,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:59,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:59,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:59,486 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:47:59,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:59,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:59,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:47:59,641 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:47:59,863 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:47:59,928 INFO L85 PathProgramCache]: Analyzing trace with hash -73879252, now seen corresponding path program 54 times [2024-05-06 17:47:59,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:47:59,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:47:59,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:00,096 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:00,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:00,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:00,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:00,265 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:00,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:48:00,450 INFO L85 PathProgramCache]: Analyzing trace with hash 1045296413, now seen corresponding path program 55 times [2024-05-06 17:48:00,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:00,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:00,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:00,594 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:48:00,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:00,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:00,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:00,748 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:48:00,956 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:48:00,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:48:01,527 INFO L85 PathProgramCache]: Analyzing trace with hash -813580678, now seen corresponding path program 56 times [2024-05-06 17:48:01,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:01,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:01,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:01,686 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:48:01,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:01,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:01,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:01,841 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:48:01,974 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:48:01,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:48:02,096 INFO L85 PathProgramCache]: Analyzing trace with hash 548803654, now seen corresponding path program 57 times [2024-05-06 17:48:02,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:02,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:02,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:02,255 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:48:02,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:02,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:02,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:02,410 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 17:48:02,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:02,582 INFO L85 PathProgramCache]: Analyzing trace with hash -166955022, now seen corresponding path program 58 times [2024-05-06 17:48:02,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:02,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:02,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:02,822 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:48:02,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:02,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:02,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:02,981 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:48:03,188 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:48:03,188 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:48:03,732 INFO L85 PathProgramCache]: Analyzing trace with hash -1529948500, now seen corresponding path program 59 times [2024-05-06 17:48:03,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:03,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:03,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:03,897 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:48:03,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:03,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:03,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:04,059 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:48:04,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:48:04,254 INFO L85 PathProgramCache]: Analyzing trace with hash -183762348, now seen corresponding path program 60 times [2024-05-06 17:48:04,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:04,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:04,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:04,505 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:48:04,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:04,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:04,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:04,666 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:48:04,799 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:48:04,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:48:04,924 INFO L85 PathProgramCache]: Analyzing trace with hash -183762348, now seen corresponding path program 61 times [2024-05-06 17:48:04,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:04,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:04,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:05,086 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:48:05,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:05,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:05,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:05,247 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:48:05,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:48:05,423 INFO L85 PathProgramCache]: Analyzing trace with hash -1401664604, now seen corresponding path program 62 times [2024-05-06 17:48:05,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:05,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:05,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:05,593 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:05,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:05,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:05,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:05,880 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:06,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:06,089 INFO L85 PathProgramCache]: Analyzing trace with hash -1401664604, now seen corresponding path program 63 times [2024-05-06 17:48:06,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:06,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:06,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:06,307 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:06,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:06,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:06,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:06,489 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:06,612 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:48:06,687 INFO L85 PathProgramCache]: Analyzing trace with hash -501928874, now seen corresponding path program 64 times [2024-05-06 17:48:06,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:06,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:06,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:06,865 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:06,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:06,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:06,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:07,034 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:07,169 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:48:07,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:48:07,285 INFO L85 PathProgramCache]: Analyzing trace with hash 1537486671, now seen corresponding path program 65 times [2024-05-06 17:48:07,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:07,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:07,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:07,545 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:48:07,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:07,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:07,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:07,739 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:48:07,851 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:07,912 INFO L85 PathProgramCache]: Analyzing trace with hash 417447433, now seen corresponding path program 66 times [2024-05-06 17:48:07,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:07,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:07,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:08,095 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:48:08,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:08,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:08,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:08,284 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 17:48:08,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:08,465 INFO L85 PathProgramCache]: Analyzing trace with hash -56500662, now seen corresponding path program 67 times [2024-05-06 17:48:08,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:08,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:08,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:08,645 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:08,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:08,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:08,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:08,820 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:08,954 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:48:08,955 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:48:09,076 INFO L85 PathProgramCache]: Analyzing trace with hash 1106556008, now seen corresponding path program 68 times [2024-05-06 17:48:09,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:09,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:09,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:09,342 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:09,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:09,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:09,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:09,516 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:09,725 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:48:09,726 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:48:20,329 WARN L293 SmtUtils]: Spent 8.10s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 17:48:22,338 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.base_In_67 Int) (v_~q2~0.offset_In_67 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_67) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_67)) 0)) (forall ((v_~q1~0.base_In_81 Int) (v_~q1_front~0_In_79 Int) (v_~q1~0.offset_In_81 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_81) (+ (* v_~q1_front~0_In_79 4) v_~q1~0.offset_In_81)))) (or (< (+ .cse0 4294967295) 0) (< v_~q1_front~0_In_79 0) (< 4294967295 .cse0) (= .cse0 0))))) is different from false [2024-05-06 17:48:22,340 INFO L85 PathProgramCache]: Analyzing trace with hash -1401646743, now seen corresponding path program 3 times [2024-05-06 17:48:22,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:22,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:22,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:22,505 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:48:22,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:22,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:22,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:22,673 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 17:48:22,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:22,863 INFO L85 PathProgramCache]: Analyzing trace with hash 1637239585, now seen corresponding path program 4 times [2024-05-06 17:48:22,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:22,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:22,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:23,127 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:23,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:23,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:23,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:23,302 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:48:23,526 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:48:23,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:48:23,989 INFO L85 PathProgramCache]: Analyzing trace with hash 39402190, now seen corresponding path program 1 times [2024-05-06 17:48:23,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:23,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:24,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:24,189 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:48:24,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:24,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:24,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:24,386 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:48:24,395 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:48:24,396 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:48:24,396 INFO L85 PathProgramCache]: Analyzing trace with hash 331231590, now seen corresponding path program 1 times [2024-05-06 17:48:24,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:48:24,400 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [115181528] [2024-05-06 17:48:24,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:24,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:24,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:24,632 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 35 proven. 37 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2024-05-06 17:48:24,633 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:48:24,633 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [115181528] [2024-05-06 17:48:24,633 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [115181528] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:48:24,633 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1438449329] [2024-05-06 17:48:24,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:24,633 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:48:24,634 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:48:24,677 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:48:24,677 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 17:48:25,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:25,244 INFO L262 TraceCheckSpWp]: Trace formula consists of 724 conjuncts, 9 conjunts are in the unsatisfiable core [2024-05-06 17:48:25,255 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:48:25,566 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 76 proven. 1 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2024-05-06 17:48:25,566 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:48:25,825 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 68 proven. 9 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2024-05-06 17:48:25,827 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1438449329] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:48:25,827 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:48:25,827 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 22 [2024-05-06 17:48:25,839 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [862655292] [2024-05-06 17:48:25,840 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:48:25,842 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2024-05-06 17:48:25,843 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:48:25,845 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-05-06 17:48:25,845 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=392, Unknown=0, NotChecked=0, Total=462 [2024-05-06 17:48:25,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:48:25,846 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:48:25,846 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 18.818181818181817) internal successors, (414), 22 states have internal predecessors, (414), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:48:25,846 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:48:26,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:48:26,565 INFO L85 PathProgramCache]: Analyzing trace with hash -1311258067, now seen corresponding path program 2 times [2024-05-06 17:48:26,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:26,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:26,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:48:26,642 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:48:26,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:48:26,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:26,955 INFO L85 PathProgramCache]: Analyzing trace with hash -1146743947, now seen corresponding path program 69 times [2024-05-06 17:48:26,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:26,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:27,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:48:27,066 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:48:27,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:48:27,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:27,414 INFO L85 PathProgramCache]: Analyzing trace with hash -142136239, now seen corresponding path program 70 times [2024-05-06 17:48:27,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:27,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:27,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:27,722 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:27,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:27,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:27,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:27,932 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:28,177 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:48:28,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:48:30,968 INFO L85 PathProgramCache]: Analyzing trace with hash -1236379676, now seen corresponding path program 71 times [2024-05-06 17:48:30,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:30,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:31,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:31,278 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:48:31,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:31,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:31,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:31,492 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:48:31,715 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:48:31,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:48:32,294 INFO L85 PathProgramCache]: Analyzing trace with hash 1310751739, now seen corresponding path program 72 times [2024-05-06 17:48:32,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:32,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:32,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:32,487 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:32,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:32,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:32,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:32,686 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:32,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:32,874 INFO L85 PathProgramCache]: Analyzing trace with hash -4585097, now seen corresponding path program 73 times [2024-05-06 17:48:32,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:32,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:32,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:33,147 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:33,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:33,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:33,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:33,329 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:33,471 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:48:33,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:48:33,598 INFO L85 PathProgramCache]: Analyzing trace with hash -1096848122, now seen corresponding path program 74 times [2024-05-06 17:48:33,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:33,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:33,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:33,922 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:48:33,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:33,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:33,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:34,125 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:48:34,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:34,303 INFO L85 PathProgramCache]: Analyzing trace with hash 357447474, now seen corresponding path program 75 times [2024-05-06 17:48:34,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:34,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:34,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:34,507 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:48:34,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:34,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:34,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:34,829 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:48:34,966 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:48:34,966 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:48:35,099 INFO L85 PathProgramCache]: Analyzing trace with hash 483797521, now seen corresponding path program 76 times [2024-05-06 17:48:35,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:35,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:35,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:35,284 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:35,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:35,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:35,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:35,464 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:35,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:35,667 INFO L85 PathProgramCache]: Analyzing trace with hash 415494035, now seen corresponding path program 77 times [2024-05-06 17:48:35,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:35,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:35,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:35,842 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:35,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:35,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:35,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:36,014 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:36,251 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:48:36,252 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:48:41,668 INFO L85 PathProgramCache]: Analyzing trace with hash 820366320, now seen corresponding path program 78 times [2024-05-06 17:48:41,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:41,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:41,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:41,866 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:41,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:41,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:41,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:42,055 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:42,197 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:48:42,198 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:48:42,326 INFO L85 PathProgramCache]: Analyzing trace with hash -338446987, now seen corresponding path program 79 times [2024-05-06 17:48:42,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:42,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:42,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:42,507 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:42,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:42,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:42,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:42,693 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:42,931 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:48:42,931 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:48:54,080 INFO L85 PathProgramCache]: Analyzing trace with hash -1901921133, now seen corresponding path program 80 times [2024-05-06 17:48:54,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:54,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:54,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:54,266 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:54,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:54,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:54,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:54,453 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:48:54,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:54,639 INFO L85 PathProgramCache]: Analyzing trace with hash -164242936, now seen corresponding path program 3 times [2024-05-06 17:48:54,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:54,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:54,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:54,837 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:48:54,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:54,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:54,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:55,032 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:48:55,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:55,397 INFO L85 PathProgramCache]: Analyzing trace with hash 1119189441, now seen corresponding path program 4 times [2024-05-06 17:48:55,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:55,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:55,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:55,609 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:48:55,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:55,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:55,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:55,826 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:48:55,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:56,044 INFO L85 PathProgramCache]: Analyzing trace with hash 271796447, now seen corresponding path program 5 times [2024-05-06 17:48:56,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:56,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:56,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:56,242 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:48:56,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:56,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:56,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:56,441 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:48:56,578 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:48:56,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:48:56,716 INFO L85 PathProgramCache]: Analyzing trace with hash 1496761454, now seen corresponding path program 6 times [2024-05-06 17:48:56,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:56,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:56,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:57,019 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:48:57,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:57,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:57,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:57,230 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:48:57,349 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:57,413 INFO L85 PathProgramCache]: Analyzing trace with hash -845034294, now seen corresponding path program 7 times [2024-05-06 17:48:57,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:57,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:57,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:57,629 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:48:57,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:57,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:57,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:57,852 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:48:57,994 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:48:57,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:48:58,120 INFO L85 PathProgramCache]: Analyzing trace with hash -1564193879, now seen corresponding path program 8 times [2024-05-06 17:48:58,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:58,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:58,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:58,325 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:48:58,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:58,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:58,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:58,615 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:48:58,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:48:58,805 INFO L85 PathProgramCache]: Analyzing trace with hash -1376705750, now seen corresponding path program 5 times [2024-05-06 17:48:58,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:58,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:58,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:58,997 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:48:58,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:58,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:59,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:59,196 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:48:59,331 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:48:59,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:48:59,450 INFO L85 PathProgramCache]: Analyzing trace with hash -1601756231, now seen corresponding path program 6 times [2024-05-06 17:48:59,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:59,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:59,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:59,661 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:48:59,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:48:59,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:48:59,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:48:59,873 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:48:59,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:49:00,163 INFO L85 PathProgramCache]: Analyzing trace with hash 1885165279, now seen corresponding path program 7 times [2024-05-06 17:49:00,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:00,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:00,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:00,372 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:49:00,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:00,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:00,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:00,584 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:49:00,721 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:49:00,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:49:00,848 INFO L85 PathProgramCache]: Analyzing trace with hash -1818613698, now seen corresponding path program 8 times [2024-05-06 17:49:00,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:00,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:00,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:01,055 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:01,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:01,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:01,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:01,261 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:01,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:49:01,452 INFO L85 PathProgramCache]: Analyzing trace with hash 2033800066, now seen corresponding path program 81 times [2024-05-06 17:49:01,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:01,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:01,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:01,736 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:01,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:01,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:01,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:01,933 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:02,081 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:49:02,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:49:02,246 INFO L85 PathProgramCache]: Analyzing trace with hash 1881504785, now seen corresponding path program 82 times [2024-05-06 17:49:02,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:02,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:02,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:02,451 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:49:02,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:02,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:02,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:02,655 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:49:02,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:49:02,833 INFO L85 PathProgramCache]: Analyzing trace with hash -1802892921, now seen corresponding path program 83 times [2024-05-06 17:49:02,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:02,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:02,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:03,042 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:49:03,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:03,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:03,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:03,344 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:49:03,479 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:49:03,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:49:03,607 INFO L85 PathProgramCache]: Analyzing trace with hash 337276646, now seen corresponding path program 84 times [2024-05-06 17:49:03,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:03,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:03,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:03,808 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:03,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:03,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:03,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:04,008 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:04,215 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:49:04,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:49:04,763 INFO L85 PathProgramCache]: Analyzing trace with hash 992610000, now seen corresponding path program 85 times [2024-05-06 17:49:04,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:04,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:04,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:05,017 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 17:49:05,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:05,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:05,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:05,338 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:49:05,484 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:49:05,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:49:05,618 INFO L85 PathProgramCache]: Analyzing trace with hash -4433197, now seen corresponding path program 86 times [2024-05-06 17:49:05,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:05,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:05,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:05,794 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:05,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:05,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:05,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:05,984 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:06,194 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:49:06,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:49:08,811 INFO L85 PathProgramCache]: Analyzing trace with hash -137428214, now seen corresponding path program 87 times [2024-05-06 17:49:08,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:08,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:08,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:08,993 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:08,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:08,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:09,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:09,258 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:09,397 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:49:09,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:49:11,501 INFO L85 PathProgramCache]: Analyzing trace with hash 34693558, now seen corresponding path program 88 times [2024-05-06 17:49:11,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:11,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:11,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:11,682 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:49:11,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:11,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:11,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:11,868 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:49:11,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:49:12,048 INFO L85 PathProgramCache]: Analyzing trace with hash 1075501186, now seen corresponding path program 89 times [2024-05-06 17:49:12,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:12,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:12,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:12,231 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:49:12,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:12,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:12,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:12,412 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:49:12,642 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:49:12,642 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:49:13,369 INFO L85 PathProgramCache]: Analyzing trace with hash 96602672, now seen corresponding path program 3 times [2024-05-06 17:49:13,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:13,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:13,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:13,598 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:13,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:13,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:13,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:13,781 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:13,990 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:49:13,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:49:16,754 INFO L85 PathProgramCache]: Analyzing trace with hash 1550375327, now seen corresponding path program 4 times [2024-05-06 17:49:16,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:16,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:16,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:16,952 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:49:16,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:16,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:16,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:17,153 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:49:17,444 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:49:17,444 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:49:45,525 WARN L293 SmtUtils]: Spent 14.16s on a formula simplification. DAG size of input: 33 DAG size of output: 30 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 17:49:45,613 INFO L85 PathProgramCache]: Analyzing trace with hash -1520904246, now seen corresponding path program 3 times [2024-05-06 17:49:45,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:45,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:45,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:45,792 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:45,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:45,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:45,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:45,971 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:46,176 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:49:46,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:49:48,812 INFO L85 PathProgramCache]: Analyzing trace with hash -1453934267, now seen corresponding path program 4 times [2024-05-06 17:49:48,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:48,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:48,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:49,017 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:49:49,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:49,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:49,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:49,216 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:49:49,422 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:49:49,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:49:50,041 INFO L85 PathProgramCache]: Analyzing trace with hash -1018892569, now seen corresponding path program 3 times [2024-05-06 17:49:50,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:50,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:50,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:50,222 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:50,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:49:50,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:49:50,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:49:50,493 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:49:50,716 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 17:49:50,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 17:50:10,464 WARN L293 SmtUtils]: Spent 6.02s on a formula simplification. DAG size of input: 34 DAG size of output: 14 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 17:50:10,495 INFO L85 PathProgramCache]: Analyzing trace with hash -1167699256, now seen corresponding path program 4 times [2024-05-06 17:50:10,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:10,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:10,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:10,700 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:50:10,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:10,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:10,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:10,912 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:50:11,091 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:11,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:11,217 INFO L85 PathProgramCache]: Analyzing trace with hash 219459983, now seen corresponding path program 90 times [2024-05-06 17:50:11,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:11,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:11,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:11,553 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:50:11,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:11,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:11,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:11,800 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 17:50:11,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:50:12,023 INFO L85 PathProgramCache]: Analyzing trace with hash -1786674231, now seen corresponding path program 91 times [2024-05-06 17:50:12,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:12,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:12,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:12,188 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 17:50:12,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:12,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:12,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:12,371 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 17:50:12,505 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:12,505 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:12,650 INFO L85 PathProgramCache]: Analyzing trace with hash 718567465, now seen corresponding path program 92 times [2024-05-06 17:50:12,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:12,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:12,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:12,820 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 17:50:12,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:12,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:12,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:13,088 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 17:50:13,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:50:13,277 INFO L85 PathProgramCache]: Analyzing trace with hash 800755823, now seen corresponding path program 93 times [2024-05-06 17:50:13,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:13,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:13,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:13,449 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:13,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:13,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:13,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:13,621 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:13,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:50:13,799 INFO L85 PathProgramCache]: Analyzing trace with hash -946372367, now seen corresponding path program 94 times [2024-05-06 17:50:13,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:13,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:13,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:13,974 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:13,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:13,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:14,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:14,149 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:14,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:14,337 INFO L85 PathProgramCache]: Analyzing trace with hash 746531271, now seen corresponding path program 95 times [2024-05-06 17:50:14,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:14,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:14,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:14,624 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:14,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:14,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:14,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:14,824 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:14,948 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:15,015 INFO L85 PathProgramCache]: Analyzing trace with hash 1279765621, now seen corresponding path program 96 times [2024-05-06 17:50:15,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:15,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:15,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:15,209 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:15,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:15,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:15,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:15,404 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:15,534 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:15,594 INFO L85 PathProgramCache]: Analyzing trace with hash 1494132978, now seen corresponding path program 97 times [2024-05-06 17:50:15,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:15,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:15,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:15,791 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:50:15,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:15,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:15,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:16,069 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:50:16,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:16,303 INFO L85 PathProgramCache]: Analyzing trace with hash -1324616589, now seen corresponding path program 98 times [2024-05-06 17:50:16,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:16,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:16,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:16,503 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:50:16,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:16,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:16,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:16,703 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:50:16,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:16,896 INFO L85 PathProgramCache]: Analyzing trace with hash -551505191, now seen corresponding path program 99 times [2024-05-06 17:50:16,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:16,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:16,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:17,116 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:50:17,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:17,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:17,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:17,420 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:50:17,544 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:17,602 INFO L85 PathProgramCache]: Analyzing trace with hash -2009839117, now seen corresponding path program 100 times [2024-05-06 17:50:17,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:17,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:17,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:17,784 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 17:50:17,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:17,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:17,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:17,968 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 17:50:18,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:18,184 INFO L85 PathProgramCache]: Analyzing trace with hash 2119497701, now seen corresponding path program 101 times [2024-05-06 17:50:18,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:18,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:18,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:18,374 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:18,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:18,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:18,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:18,562 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:18,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:18,768 INFO L85 PathProgramCache]: Analyzing trace with hash -1659705255, now seen corresponding path program 102 times [2024-05-06 17:50:18,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:18,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:18,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:19,056 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 17:50:19,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:19,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:19,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:19,250 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 17:50:19,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:19,448 INFO L85 PathProgramCache]: Analyzing trace with hash -898641579, now seen corresponding path program 103 times [2024-05-06 17:50:19,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:19,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:19,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:19,672 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:50:19,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:19,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:19,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:19,887 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:50:20,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:20,083 INFO L85 PathProgramCache]: Analyzing trace with hash -898610796, now seen corresponding path program 3 times [2024-05-06 17:50:20,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:20,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:20,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:20,373 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:20,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:20,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:20,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:20,583 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:20,702 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:20,768 INFO L85 PathProgramCache]: Analyzing trace with hash -1771322435, now seen corresponding path program 4 times [2024-05-06 17:50:20,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:20,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:20,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:20,997 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:50:20,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:20,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:21,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:21,226 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:50:21,359 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:21,423 INFO L85 PathProgramCache]: Analyzing trace with hash -1830102805, now seen corresponding path program 3 times [2024-05-06 17:50:21,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:21,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:21,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:21,720 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:21,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:21,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:21,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:21,929 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:22,058 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:22,114 INFO L85 PathProgramCache]: Analyzing trace with hash -1034451386, now seen corresponding path program 4 times [2024-05-06 17:50:22,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:22,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:22,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:22,351 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:50:22,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:22,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:22,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:22,592 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:50:22,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:22,795 INFO L85 PathProgramCache]: Analyzing trace with hash 633701046, now seen corresponding path program 3 times [2024-05-06 17:50:22,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:22,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:22,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:23,006 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:23,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:23,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:23,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:23,297 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:23,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:23,497 INFO L85 PathProgramCache]: Analyzing trace with hash -156782373, now seen corresponding path program 4 times [2024-05-06 17:50:23,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:23,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:23,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:23,723 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:50:23,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:23,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:23,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:23,950 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:50:24,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:24,137 INFO L85 PathProgramCache]: Analyzing trace with hash -2057768050, now seen corresponding path program 104 times [2024-05-06 17:50:24,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:24,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:24,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:24,352 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:24,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:24,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:24,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:24,655 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:24,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:24,839 INFO L85 PathProgramCache]: Analyzing trace with hash -1410747645, now seen corresponding path program 105 times [2024-05-06 17:50:24,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:24,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:24,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:25,075 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:50:25,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:25,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:25,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:25,312 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 17:50:25,461 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:25,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:27,583 INFO L85 PathProgramCache]: Analyzing trace with hash 1210952009, now seen corresponding path program 106 times [2024-05-06 17:50:27,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:27,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:27,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:27,786 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 17:50:27,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:27,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:27,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:28,087 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:28,209 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:50:28,290 INFO L85 PathProgramCache]: Analyzing trace with hash -1115192497, now seen corresponding path program 107 times [2024-05-06 17:50:28,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:28,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:28,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:28,457 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:28,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:28,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:28,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:28,626 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:28,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:28,822 INFO L85 PathProgramCache]: Analyzing trace with hash -569811393, now seen corresponding path program 108 times [2024-05-06 17:50:28,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:28,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:28,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:28,997 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:28,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:28,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:29,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:29,250 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:29,386 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:29,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:29,517 INFO L85 PathProgramCache]: Analyzing trace with hash -1539581164, now seen corresponding path program 109 times [2024-05-06 17:50:29,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:29,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:29,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:29,696 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:29,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:29,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:29,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:29,875 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:29,988 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:50:30,080 INFO L85 PathProgramCache]: Analyzing trace with hash -482374940, now seen corresponding path program 110 times [2024-05-06 17:50:30,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:30,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:30,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:30,262 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:50:30,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:30,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:30,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:30,444 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:50:30,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:30,630 INFO L85 PathProgramCache]: Analyzing trace with hash -2068720375, now seen corresponding path program 111 times [2024-05-06 17:50:30,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:30,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:30,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:30,917 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:50:30,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:30,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:30,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:31,103 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:50:31,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:31,298 INFO L85 PathProgramCache]: Analyzing trace with hash 1531399144, now seen corresponding path program 112 times [2024-05-06 17:50:31,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:31,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:31,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:31,509 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:31,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:31,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:31,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:31,715 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:31,841 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 17:50:31,915 INFO L85 PathProgramCache]: Analyzing trace with hash -482374951, now seen corresponding path program 113 times [2024-05-06 17:50:31,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:31,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:31,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:32,176 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:32,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:32,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:32,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:32,359 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:32,495 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:32,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:32,615 INFO L85 PathProgramCache]: Analyzing trace with hash 1833481226, now seen corresponding path program 114 times [2024-05-06 17:50:32,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:32,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:32,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:32,804 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:32,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:32,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:32,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:32,995 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 17:50:33,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:50:33,184 INFO L85 PathProgramCache]: Analyzing trace with hash 1003344046, now seen corresponding path program 115 times [2024-05-06 17:50:33,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:33,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:33,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:33,470 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:50:33,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:33,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:33,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:33,720 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 17:50:33,859 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:33,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:33,999 INFO L85 PathProgramCache]: Analyzing trace with hash 1946230808, now seen corresponding path program 116 times [2024-05-06 17:50:33,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:33,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:34,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:34,203 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 17:50:34,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:34,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:34,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:34,404 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 17:50:34,517 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:50:34,581 INFO L85 PathProgramCache]: Analyzing trace with hash 203613792, now seen corresponding path program 117 times [2024-05-06 17:50:34,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:34,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:34,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:34,785 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:34,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:34,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:34,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:35,077 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:35,212 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:35,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:35,343 INFO L85 PathProgramCache]: Analyzing trace with hash 978996747, now seen corresponding path program 118 times [2024-05-06 17:50:35,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:35,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:35,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:35,563 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:50:35,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:35,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:35,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:35,782 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:50:35,902 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:50:35,957 INFO L85 PathProgramCache]: Analyzing trace with hash 284128973, now seen corresponding path program 119 times [2024-05-06 17:50:35,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:35,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:35,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:36,177 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 17:50:36,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:36,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:36,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:36,492 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 17:50:36,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:50:36,683 INFO L85 PathProgramCache]: Analyzing trace with hash -1165460474, now seen corresponding path program 120 times [2024-05-06 17:50:36,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:36,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:36,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:36,900 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:50:36,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:36,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:36,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:37,115 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:50:37,252 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:37,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:37,427 INFO L85 PathProgramCache]: Analyzing trace with hash -1977258196, now seen corresponding path program 121 times [2024-05-06 17:50:37,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:37,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:37,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:37,648 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:37,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:37,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:37,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:37,861 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:38,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:50:38,146 INFO L85 PathProgramCache]: Analyzing trace with hash -1878448419, now seen corresponding path program 5 times [2024-05-06 17:50:38,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:38,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:38,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:38,356 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:38,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:38,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:38,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:38,565 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 17:50:38,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:50:38,604 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-05-06 17:50:38,800 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable272,SelfDestructingSolverStorable273,SelfDestructingSolverStorable274,SelfDestructingSolverStorable275,SelfDestructingSolverStorable270,SelfDestructingSolverStorable271,SelfDestructingSolverStorable306,SelfDestructingSolverStorable307,SelfDestructingSolverStorable308,SelfDestructingSolverStorable309,SelfDestructingSolverStorable269,SelfDestructingSolverStorable302,SelfDestructingSolverStorable303,SelfDestructingSolverStorable304,SelfDestructingSolverStorable305,SelfDestructingSolverStorable265,SelfDestructingSolverStorable266,SelfDestructingSolverStorable267,SelfDestructingSolverStorable300,SelfDestructingSolverStorable268,SelfDestructingSolverStorable301,SelfDestructingSolverStorable261,SelfDestructingSolverStorable262,SelfDestructingSolverStorable263,SelfDestructingSolverStorable264,SelfDestructingSolverStorable260,SelfDestructingSolverStorable258,SelfDestructingSolverStorable259,SelfDestructingSolverStorable254,SelfDestructingSolverStorable255,SelfDestructingSolverStorable256,SelfDestructingSolverStorable257,SelfDestructingSolverStorable294,SelfDestructingSolverStorable295,SelfDestructingSolverStorable296,SelfDestructingSolverStorable297,SelfDestructingSolverStorable330,SelfDestructingSolverStorable290,SelfDestructingSolverStorable291,SelfDestructingSolverStorable292,SelfDestructingSolverStorable293,SelfDestructingSolverStorable328,SelfDestructingSolverStorable329,SelfDestructingSolverStorable324,SelfDestructingSolverStorable325,SelfDestructingSolverStorable326,SelfDestructingSolverStorable327,SelfDestructingSolverStorable287,SelfDestructingSolverStorable320,SelfDestructingSolverStorable288,SelfDestructingSolverStorable321,SelfDestructingSolverStorable289,SelfDestructingSolverStorable322,SelfDestructingSolverStorable323,SelfDestructingSolverStorable283,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable284,SelfDestructingSolverStorable285,SelfDestructingSolverStorable286,SelfDestructingSolverStorable280,SelfDestructingSolverStorable281,SelfDestructingSolverStorable282,SelfDestructingSolverStorable317,SelfDestructingSolverStorable318,SelfDestructingSolverStorable319,SelfDestructingSolverStorable313,SelfDestructingSolverStorable314,SelfDestructingSolverStorable315,SelfDestructingSolverStorable316,SelfDestructingSolverStorable276,SelfDestructingSolverStorable277,SelfDestructingSolverStorable310,SelfDestructingSolverStorable278,SelfDestructingSolverStorable311,SelfDestructingSolverStorable279,SelfDestructingSolverStorable312,SelfDestructingSolverStorable350,SelfDestructingSolverStorable230,SelfDestructingSolverStorable351,SelfDestructingSolverStorable231,SelfDestructingSolverStorable352,SelfDestructingSolverStorable229,SelfDestructingSolverStorable225,SelfDestructingSolverStorable346,SelfDestructingSolverStorable226,SelfDestructingSolverStorable347,SelfDestructingSolverStorable227,SelfDestructingSolverStorable348,SelfDestructingSolverStorable228,SelfDestructingSolverStorable349,SelfDestructingSolverStorable221,SelfDestructingSolverStorable342,SelfDestructingSolverStorable222,SelfDestructingSolverStorable343,SelfDestructingSolverStorable223,SelfDestructingSolverStorable344,SelfDestructingSolverStorable224,SelfDestructingSolverStorable345,SelfDestructingSolverStorable340,SelfDestructingSolverStorable220,SelfDestructingSolverStorable341,SelfDestructingSolverStorable218,SelfDestructingSolverStorable339,SelfDestructingSolverStorable219,SelfDestructingSolverStorable335,SelfDestructingSolverStorable336,SelfDestructingSolverStorable337,SelfDestructingSolverStorable338,SelfDestructingSolverStorable298,SelfDestructingSolverStorable331,SelfDestructingSolverStorable299,SelfDestructingSolverStorable332,SelfDestructingSolverStorable333,SelfDestructingSolverStorable334,SelfDestructingSolverStorable250,SelfDestructingSolverStorable251,SelfDestructingSolverStorable252,SelfDestructingSolverStorable253,SelfDestructingSolverStorable370,SelfDestructingSolverStorable247,SelfDestructingSolverStorable368,SelfDestructingSolverStorable248,SelfDestructingSolverStorable369,SelfDestructingSolverStorable249,SelfDestructingSolverStorable243,SelfDestructingSolverStorable364,SelfDestructingSolverStorable244,SelfDestructingSolverStorable365,SelfDestructingSolverStorable245,SelfDestructingSolverStorable366,SelfDestructingSolverStorable246,SelfDestructingSolverStorable367,SelfDestructingSolverStorable360,SelfDestructingSolverStorable240,SelfDestructingSolverStorable361,SelfDestructingSolverStorable241,SelfDestructingSolverStorable362,SelfDestructingSolverStorable242,SelfDestructingSolverStorable363,SelfDestructingSolverStorable236,SelfDestructingSolverStorable357,SelfDestructingSolverStorable237,SelfDestructingSolverStorable358,SelfDestructingSolverStorable238,SelfDestructingSolverStorable359,SelfDestructingSolverStorable239,SelfDestructingSolverStorable232,SelfDestructingSolverStorable353,SelfDestructingSolverStorable233,SelfDestructingSolverStorable354,SelfDestructingSolverStorable234,SelfDestructingSolverStorable355,SelfDestructingSolverStorable235,SelfDestructingSolverStorable356 [2024-05-06 17:50:38,800 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:50:38,800 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:50:38,800 INFO L85 PathProgramCache]: Analyzing trace with hash -1298554590, now seen corresponding path program 2 times [2024-05-06 17:50:38,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:50:38,800 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1121528308] [2024-05-06 17:50:38,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:38,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:38,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:39,101 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 38 proven. 59 refuted. 0 times theorem prover too weak. 82 trivial. 0 not checked. [2024-05-06 17:50:39,101 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:50:39,101 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1121528308] [2024-05-06 17:50:39,101 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1121528308] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:50:39,102 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1478089990] [2024-05-06 17:50:39,102 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 17:50:39,102 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:50:39,102 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:50:39,103 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:50:39,103 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 17:50:39,942 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 17:50:39,943 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:50:39,946 INFO L262 TraceCheckSpWp]: Trace formula consists of 752 conjuncts, 12 conjunts are in the unsatisfiable core [2024-05-06 17:50:39,949 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:50:40,271 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 115 proven. 10 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 17:50:40,272 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:50:40,613 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 86 proven. 39 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 17:50:40,613 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1478089990] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:50:40,613 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:50:40,614 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 31 [2024-05-06 17:50:40,614 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1624240029] [2024-05-06 17:50:40,614 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:50:40,615 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2024-05-06 17:50:40,615 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:50:40,615 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2024-05-06 17:50:40,616 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=808, Unknown=0, NotChecked=0, Total=930 [2024-05-06 17:50:40,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:50:40,616 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:50:40,616 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 14.96774193548387) internal successors, (464), 31 states have internal predecessors, (464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:50:40,616 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:50:40,616 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:50:41,484 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:50:41,544 INFO L85 PathProgramCache]: Analyzing trace with hash 1131627313, now seen corresponding path program 122 times [2024-05-06 17:50:41,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:41,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:41,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:50:41,720 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:50:41,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:50:41,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 17:50:42,094 INFO L85 PathProgramCache]: Analyzing trace with hash -2030048235, now seen corresponding path program 123 times [2024-05-06 17:50:42,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:42,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:42,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:42,533 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 4 proven. 30 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 17:50:42,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:42,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:42,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:42,857 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 4 proven. 30 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 17:50:43,009 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:43,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:43,149 INFO L85 PathProgramCache]: Analyzing trace with hash -519558974, now seen corresponding path program 124 times [2024-05-06 17:50:43,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:43,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:43,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:43,404 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 2 proven. 30 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 17:50:43,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:43,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:43,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:43,734 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 2 proven. 30 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 17:50:43,873 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:43,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:44,007 INFO L85 PathProgramCache]: Analyzing trace with hash -1096718379, now seen corresponding path program 125 times [2024-05-06 17:50:44,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:44,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:44,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:44,279 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 4 proven. 30 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 17:50:44,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:44,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:44,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:44,542 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 4 proven. 30 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 17:50:44,681 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:44,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:44,803 INFO L85 PathProgramCache]: Analyzing trace with hash -527978703, now seen corresponding path program 126 times [2024-05-06 17:50:44,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:44,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:44,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:45,067 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 4 proven. 30 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 17:50:45,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:45,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:45,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:45,428 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 4 proven. 30 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 17:50:45,574 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:45,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:45,697 INFO L85 PathProgramCache]: Analyzing trace with hash -40384982, now seen corresponding path program 9 times [2024-05-06 17:50:45,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:45,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:45,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:45,946 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 1 proven. 28 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-06 17:50:45,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:45,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:45,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:46,199 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 1 proven. 28 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-06 17:50:46,337 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:46,337 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:46,459 INFO L85 PathProgramCache]: Analyzing trace with hash -1058208915, now seen corresponding path program 10 times [2024-05-06 17:50:46,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:46,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:46,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:46,705 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 1 proven. 30 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 17:50:46,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:46,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:46,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:46,947 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 1 proven. 30 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 17:50:47,179 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:47,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:47,303 INFO L85 PathProgramCache]: Analyzing trace with hash -681510275, now seen corresponding path program 9 times [2024-05-06 17:50:47,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:47,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:47,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:47,557 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 1 proven. 28 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-06 17:50:47,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:47,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:47,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:47,817 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 1 proven. 28 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-06 17:50:47,962 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:47,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:48,092 INFO L85 PathProgramCache]: Analyzing trace with hash -1386649606, now seen corresponding path program 10 times [2024-05-06 17:50:48,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:48,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:48,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:48,341 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 1 proven. 30 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 17:50:48,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:48,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:48,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:48,591 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 1 proven. 30 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 17:50:48,730 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:48,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:49,126 INFO L85 PathProgramCache]: Analyzing trace with hash 387169485, now seen corresponding path program 127 times [2024-05-06 17:50:49,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:49,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:49,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:49,476 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 1 proven. 28 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-06 17:50:49,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:49,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:49,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:49,738 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 1 proven. 28 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-06 17:50:49,882 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:49,882 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:50,012 INFO L85 PathProgramCache]: Analyzing trace with hash -1311357014, now seen corresponding path program 128 times [2024-05-06 17:50:50,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:50,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:50,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:50,252 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 1 proven. 30 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 17:50:50,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:50,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:50,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:50,492 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 1 proven. 30 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 17:50:50,631 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:50,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:50,764 INFO L85 PathProgramCache]: Analyzing trace with hash -1173712241, now seen corresponding path program 129 times [2024-05-06 17:50:50,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:50,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:50,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:51,147 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 2 proven. 31 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 17:50:51,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:51,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:51,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:51,443 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 2 proven. 31 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 17:50:51,578 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:51,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:51,710 INFO L85 PathProgramCache]: Analyzing trace with hash 1638963826, now seen corresponding path program 130 times [2024-05-06 17:50:51,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:51,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:51,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:52,048 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 2 proven. 28 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-05-06 17:50:52,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:52,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:52,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:52,267 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 2 proven. 28 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-05-06 17:50:52,427 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:50:52,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 17:50:52,558 INFO L85 PathProgramCache]: Analyzing trace with hash 1298556491, now seen corresponding path program 131 times [2024-05-06 17:50:52,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:52,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:52,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:50:52,632 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:50:52,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:50:52,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:50:52,825 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:50:52,835 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-05-06 17:50:53,035 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable371,SelfDestructingSolverStorable393,SelfDestructingSolverStorable372,SelfDestructingSolverStorable394,SelfDestructingSolverStorable373,SelfDestructingSolverStorable395,SelfDestructingSolverStorable374,SelfDestructingSolverStorable396,SelfDestructingSolverStorable390,SelfDestructingSolverStorable391,SelfDestructingSolverStorable392,SelfDestructingSolverStorable386,SelfDestructingSolverStorable387,SelfDestructingSolverStorable388,SelfDestructingSolverStorable389,SelfDestructingSolverStorable382,SelfDestructingSolverStorable383,SelfDestructingSolverStorable384,SelfDestructingSolverStorable385,SelfDestructingSolverStorable380,SelfDestructingSolverStorable381,SelfDestructingSolverStorable379,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable375,SelfDestructingSolverStorable397,SelfDestructingSolverStorable376,SelfDestructingSolverStorable377,SelfDestructingSolverStorable378 [2024-05-06 17:50:53,035 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:50:53,035 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:50:53,035 INFO L85 PathProgramCache]: Analyzing trace with hash -1853000482, now seen corresponding path program 3 times [2024-05-06 17:50:53,035 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:50:53,036 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [462624497] [2024-05-06 17:50:53,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:53,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:53,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:53,482 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 37 proven. 106 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 17:50:53,482 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:50:53,482 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [462624497] [2024-05-06 17:50:53,482 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [462624497] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:50:53,482 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1303519210] [2024-05-06 17:50:53,482 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-06 17:50:53,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:50:53,482 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:50:53,483 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:50:53,485 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-05-06 17:50:54,513 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2024-05-06 17:50:54,513 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:50:54,517 INFO L262 TraceCheckSpWp]: Trace formula consists of 769 conjuncts, 31 conjunts are in the unsatisfiable core [2024-05-06 17:50:54,522 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:50:54,986 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 88 proven. 72 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-05-06 17:50:54,986 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:50:55,531 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 55 proven. 90 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 17:50:55,531 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1303519210] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:50:55,531 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:50:55,531 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 19, 15] total 41 [2024-05-06 17:50:55,531 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1772494577] [2024-05-06 17:50:55,531 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:50:55,532 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2024-05-06 17:50:55,532 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:50:55,533 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2024-05-06 17:50:55,533 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=262, Invalid=1378, Unknown=0, NotChecked=0, Total=1640 [2024-05-06 17:50:55,533 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:50:55,533 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:50:55,533 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 41 states have (on average 10.097560975609756) internal successors, (414), 41 states have internal predecessors, (414), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:50:55,534 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:50:55,534 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:50:55,534 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:50:56,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:50:56,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:50:56,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:50:56,208 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-05-06 17:50:56,408 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable398 [2024-05-06 17:50:56,408 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:50:56,408 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:50:56,408 INFO L85 PathProgramCache]: Analyzing trace with hash -215615250, now seen corresponding path program 4 times [2024-05-06 17:50:56,408 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:50:56,409 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1216111808] [2024-05-06 17:50:56,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:50:56,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:50:56,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:50:56,833 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 73 proven. 116 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-05-06 17:50:56,833 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:50:56,833 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1216111808] [2024-05-06 17:50:56,833 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1216111808] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:50:56,833 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1821298995] [2024-05-06 17:50:56,834 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-05-06 17:50:56,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:50:56,834 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:50:56,835 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:50:56,835 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-05-06 17:50:57,694 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-05-06 17:50:57,695 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:50:57,697 INFO L262 TraceCheckSpWp]: Trace formula consists of 537 conjuncts, 20 conjunts are in the unsatisfiable core [2024-05-06 17:50:57,701 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:50:58,404 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 133 proven. 27 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2024-05-06 17:50:58,404 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:50:58,789 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 17:50:58,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 17:50:59,113 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 106 proven. 54 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2024-05-06 17:50:59,113 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1821298995] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:50:59,113 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:50:59,113 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 16, 16] total 46 [2024-05-06 17:50:59,113 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1726977138] [2024-05-06 17:50:59,113 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:50:59,114 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 46 states [2024-05-06 17:50:59,114 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:50:59,115 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2024-05-06 17:50:59,115 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=1817, Unknown=0, NotChecked=0, Total=2070 [2024-05-06 17:50:59,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:50:59,115 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:50:59,116 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 46 states, 46 states have (on average 12.978260869565217) internal successors, (597), 46 states have internal predecessors, (597), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:50:59,116 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:50:59,116 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:50:59,116 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:50:59,116 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:00,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:00,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:00,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:00,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:00,588 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-05-06 17:51:00,777 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable399 [2024-05-06 17:51:00,777 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:51:00,781 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:51:00,782 INFO L85 PathProgramCache]: Analyzing trace with hash 573458518, now seen corresponding path program 5 times [2024-05-06 17:51:00,782 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:51:00,782 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748375928] [2024-05-06 17:51:00,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:00,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:00,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:01,292 INFO L134 CoverageAnalysis]: Checked inductivity of 329 backedges. 105 proven. 129 refuted. 0 times theorem prover too weak. 95 trivial. 0 not checked. [2024-05-06 17:51:01,293 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:51:01,293 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748375928] [2024-05-06 17:51:01,293 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [748375928] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:51:01,293 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1828937656] [2024-05-06 17:51:01,293 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-05-06 17:51:01,293 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:01,293 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:51:01,294 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:51:01,296 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-05-06 17:51:02,306 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2024-05-06 17:51:02,306 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:51:02,310 INFO L262 TraceCheckSpWp]: Trace formula consists of 836 conjuncts, 21 conjunts are in the unsatisfiable core [2024-05-06 17:51:02,313 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:51:02,982 INFO L134 CoverageAnalysis]: Checked inductivity of 329 backedges. 145 proven. 85 refuted. 0 times theorem prover too weak. 99 trivial. 0 not checked. [2024-05-06 17:51:02,982 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:51:03,729 INFO L134 CoverageAnalysis]: Checked inductivity of 329 backedges. 82 proven. 148 refuted. 0 times theorem prover too weak. 99 trivial. 0 not checked. [2024-05-06 17:51:03,729 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1828937656] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:51:03,729 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:51:03,729 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21] total 58 [2024-05-06 17:51:03,733 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [843957506] [2024-05-06 17:51:03,734 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:51:03,735 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 58 states [2024-05-06 17:51:03,735 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:51:03,736 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2024-05-06 17:51:03,737 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=374, Invalid=2932, Unknown=0, NotChecked=0, Total=3306 [2024-05-06 17:51:03,737 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:03,738 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:51:03,740 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 58 states, 58 states have (on average 10.655172413793103) internal successors, (618), 58 states have internal predecessors, (618), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:51:03,740 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:03,740 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:03,740 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:03,740 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:03,741 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:05,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:05,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:05,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:05,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:05,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:05,320 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-05-06 17:51:05,508 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable400 [2024-05-06 17:51:05,509 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:51:05,509 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:51:05,509 INFO L85 PathProgramCache]: Analyzing trace with hash -1223473134, now seen corresponding path program 6 times [2024-05-06 17:51:05,509 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:51:05,509 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2061472925] [2024-05-06 17:51:05,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:05,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:05,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:05,962 INFO L134 CoverageAnalysis]: Checked inductivity of 411 backedges. 72 proven. 31 refuted. 0 times theorem prover too weak. 308 trivial. 0 not checked. [2024-05-06 17:51:05,963 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:51:05,963 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2061472925] [2024-05-06 17:51:05,963 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2061472925] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:51:05,963 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1766068839] [2024-05-06 17:51:05,963 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-05-06 17:51:05,963 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:05,963 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:51:05,971 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:51:06,029 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-05-06 17:51:07,242 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2024-05-06 17:51:07,243 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:51:07,247 INFO L262 TraceCheckSpWp]: Trace formula consists of 864 conjuncts, 15 conjunts are in the unsatisfiable core [2024-05-06 17:51:07,251 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:51:07,398 INFO L134 CoverageAnalysis]: Checked inductivity of 411 backedges. 101 proven. 13 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2024-05-06 17:51:07,398 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:51:07,800 INFO L134 CoverageAnalysis]: Checked inductivity of 411 backedges. 40 proven. 107 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2024-05-06 17:51:07,800 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1766068839] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:51:07,800 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:51:07,800 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 14] total 25 [2024-05-06 17:51:07,800 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1071111777] [2024-05-06 17:51:07,801 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:51:07,801 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2024-05-06 17:51:07,801 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:51:07,802 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-05-06 17:51:07,802 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=133, Invalid=467, Unknown=0, NotChecked=0, Total=600 [2024-05-06 17:51:07,802 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:07,802 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:51:07,802 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 16.64) internal successors, (416), 25 states have internal predecessors, (416), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:51:07,802 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:07,802 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:07,802 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:07,802 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:07,802 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:07,802 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:08,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:08,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:08,276 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:08,276 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:08,276 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:08,276 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-05-06 17:51:08,289 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2024-05-06 17:51:08,487 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable401 [2024-05-06 17:51:08,487 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:51:08,487 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:51:08,488 INFO L85 PathProgramCache]: Analyzing trace with hash -225337923, now seen corresponding path program 7 times [2024-05-06 17:51:08,488 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:51:08,488 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2027943986] [2024-05-06 17:51:08,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:08,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:08,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:09,170 INFO L134 CoverageAnalysis]: Checked inductivity of 583 backedges. 146 proven. 280 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2024-05-06 17:51:09,171 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:51:09,171 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2027943986] [2024-05-06 17:51:09,171 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2027943986] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:51:09,171 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1451535024] [2024-05-06 17:51:09,171 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-05-06 17:51:09,171 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:09,171 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:51:09,172 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:51:09,173 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-05-06 17:51:10,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:10,103 INFO L262 TraceCheckSpWp]: Trace formula consists of 930 conjuncts, 24 conjunts are in the unsatisfiable core [2024-05-06 17:51:10,107 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:51:10,822 INFO L134 CoverageAnalysis]: Checked inductivity of 583 backedges. 317 proven. 126 refuted. 0 times theorem prover too weak. 140 trivial. 0 not checked. [2024-05-06 17:51:10,822 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:51:11,681 INFO L134 CoverageAnalysis]: Checked inductivity of 583 backedges. 188 proven. 255 refuted. 0 times theorem prover too weak. 140 trivial. 0 not checked. [2024-05-06 17:51:11,682 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1451535024] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:51:11,682 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:51:11,682 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 64 [2024-05-06 17:51:11,682 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [900157673] [2024-05-06 17:51:11,682 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:51:11,683 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 64 states [2024-05-06 17:51:11,683 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:51:11,684 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2024-05-06 17:51:11,685 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=637, Invalid=3395, Unknown=0, NotChecked=0, Total=4032 [2024-05-06 17:51:11,685 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:11,685 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:51:11,685 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 64 states, 64 states have (on average 8.78125) internal successors, (562), 64 states have internal predecessors, (562), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:51:11,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:11,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:11,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:11,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:11,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:11,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-05-06 17:51:11,685 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:12,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:12,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:12,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:12,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:12,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:12,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-05-06 17:51:12,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:12,537 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-05-06 17:51:12,737 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable402,9 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:12,737 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:51:12,737 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:51:12,737 INFO L85 PathProgramCache]: Analyzing trace with hash -808344659, now seen corresponding path program 8 times [2024-05-06 17:51:12,737 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:51:12,737 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1413256059] [2024-05-06 17:51:12,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:12,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:12,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:13,500 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 199 proven. 293 refuted. 0 times theorem prover too weak. 140 trivial. 0 not checked. [2024-05-06 17:51:13,501 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:51:13,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1413256059] [2024-05-06 17:51:13,501 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1413256059] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:51:13,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [362706790] [2024-05-06 17:51:13,501 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 17:51:13,501 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:13,501 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:51:13,502 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:51:13,503 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-05-06 17:51:14,488 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 17:51:14,488 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:51:14,492 INFO L262 TraceCheckSpWp]: Trace formula consists of 944 conjuncts, 27 conjunts are in the unsatisfiable core [2024-05-06 17:51:14,496 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:51:15,287 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 323 proven. 175 refuted. 0 times theorem prover too weak. 134 trivial. 0 not checked. [2024-05-06 17:51:15,287 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:51:16,182 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 233 proven. 265 refuted. 0 times theorem prover too weak. 134 trivial. 0 not checked. [2024-05-06 17:51:16,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [362706790] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:51:16,183 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:51:16,183 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27] total 73 [2024-05-06 17:51:16,183 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [30764144] [2024-05-06 17:51:16,183 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:51:16,183 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 73 states [2024-05-06 17:51:16,184 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:51:16,184 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 73 interpolants. [2024-05-06 17:51:16,186 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=815, Invalid=4441, Unknown=0, NotChecked=0, Total=5256 [2024-05-06 17:51:16,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:16,186 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:51:16,186 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 73 states, 73 states have (on average 8.287671232876713) internal successors, (605), 73 states have internal predecessors, (605), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:51:16,186 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:16,186 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:16,186 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:16,186 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:16,186 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:16,186 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-05-06 17:51:16,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:16,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:17,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:17,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:17,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:17,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:17,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:17,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-05-06 17:51:17,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:17,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:17,085 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-05-06 17:51:17,285 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable403,10 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:17,285 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:51:17,285 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:51:17,285 INFO L85 PathProgramCache]: Analyzing trace with hash -1016809059, now seen corresponding path program 9 times [2024-05-06 17:51:17,285 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:51:17,285 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [409096821] [2024-05-06 17:51:17,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:17,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:17,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:18,202 INFO L134 CoverageAnalysis]: Checked inductivity of 689 backedges. 263 proven. 294 refuted. 0 times theorem prover too weak. 132 trivial. 0 not checked. [2024-05-06 17:51:18,202 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:51:18,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [409096821] [2024-05-06 17:51:18,202 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [409096821] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:51:18,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [491685920] [2024-05-06 17:51:18,202 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-06 17:51:18,202 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:18,202 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:51:18,203 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:51:18,204 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-05-06 17:51:19,524 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2024-05-06 17:51:19,525 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:51:19,529 INFO L262 TraceCheckSpWp]: Trace formula consists of 813 conjuncts, 25 conjunts are in the unsatisfiable core [2024-05-06 17:51:19,538 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:51:20,353 INFO L134 CoverageAnalysis]: Checked inductivity of 689 backedges. 211 proven. 53 refuted. 0 times theorem prover too weak. 425 trivial. 0 not checked. [2024-05-06 17:51:20,354 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:51:20,725 INFO L134 CoverageAnalysis]: Checked inductivity of 689 backedges. 236 proven. 33 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2024-05-06 17:51:20,725 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [491685920] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:51:20,725 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:51:20,725 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 15, 12] total 53 [2024-05-06 17:51:20,726 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [583113665] [2024-05-06 17:51:20,726 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:51:20,726 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 53 states [2024-05-06 17:51:20,726 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:51:20,728 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2024-05-06 17:51:20,729 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=2507, Unknown=0, NotChecked=0, Total=2756 [2024-05-06 17:51:20,729 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:20,729 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:51:20,730 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 53 states, 53 states have (on average 13.830188679245284) internal successors, (733), 53 states have internal predecessors, (733), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:51:20,730 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:20,730 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:20,730 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:20,730 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:20,730 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:20,730 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-05-06 17:51:20,730 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:20,730 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:20,730 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:23,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:23,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:23,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:23,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:23,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:23,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:23,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:23,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:23,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2024-05-06 17:51:23,815 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2024-05-06 17:51:24,004 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable404 [2024-05-06 17:51:24,004 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:51:24,005 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:51:24,005 INFO L85 PathProgramCache]: Analyzing trace with hash 1409432710, now seen corresponding path program 10 times [2024-05-06 17:51:24,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:51:24,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991585090] [2024-05-06 17:51:24,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:24,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:24,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:24,703 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 63 proven. 191 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2024-05-06 17:51:24,703 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:51:24,703 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1991585090] [2024-05-06 17:51:24,703 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1991585090] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:51:24,703 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1890593853] [2024-05-06 17:51:24,703 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-05-06 17:51:24,704 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:24,704 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:51:24,705 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:51:24,706 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-05-06 17:51:25,624 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-05-06 17:51:25,624 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:51:25,627 INFO L262 TraceCheckSpWp]: Trace formula consists of 639 conjuncts, 28 conjunts are in the unsatisfiable core [2024-05-06 17:51:25,631 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:51:26,713 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 128 proven. 126 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2024-05-06 17:51:26,714 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:51:27,316 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 17:51:27,316 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 17:51:27,811 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 82 proven. 172 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2024-05-06 17:51:27,812 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1890593853] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:51:27,812 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:51:27,812 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 64 [2024-05-06 17:51:27,812 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2085540431] [2024-05-06 17:51:27,813 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:51:27,813 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 64 states [2024-05-06 17:51:27,813 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:51:27,815 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2024-05-06 17:51:27,816 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=601, Invalid=3431, Unknown=0, NotChecked=0, Total=4032 [2024-05-06 17:51:27,816 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:27,816 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:51:27,816 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 64 states, 64 states have (on average 8.296875) internal successors, (531), 64 states have internal predecessors, (531), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:51:27,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:27,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:27,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:27,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:27,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:27,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:27,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:27,817 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:27,817 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 85 states. [2024-05-06 17:51:27,817 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:28,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:28,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:28,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:28,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:28,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:28,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:28,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:28,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:28,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2024-05-06 17:51:28,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:28,715 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2024-05-06 17:51:28,904 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable405,12 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:28,904 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:51:28,904 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:51:28,904 INFO L85 PathProgramCache]: Analyzing trace with hash -1172537806, now seen corresponding path program 11 times [2024-05-06 17:51:28,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:51:28,904 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1136951743] [2024-05-06 17:51:28,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:28,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:28,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:29,195 INFO L134 CoverageAnalysis]: Checked inductivity of 600 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 552 trivial. 0 not checked. [2024-05-06 17:51:29,195 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:51:29,195 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1136951743] [2024-05-06 17:51:29,195 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1136951743] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 17:51:29,195 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 17:51:29,195 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-05-06 17:51:29,195 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1951653348] [2024-05-06 17:51:29,195 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 17:51:29,196 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-05-06 17:51:29,196 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:51:29,196 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-06 17:51:29,196 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-05-06 17:51:29,196 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:29,196 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:51:29,196 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:51:29,196 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:29,196 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:29,196 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:29,196 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:29,196 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:29,196 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:29,197 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:29,197 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:29,197 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 85 states. [2024-05-06 17:51:29,197 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:29,197 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:29,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:29,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:29,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:29,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:29,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:29,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:29,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:29,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:29,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2024-05-06 17:51:29,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:29,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 17:51:29,785 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable406 [2024-05-06 17:51:29,785 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:51:29,785 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:51:29,785 INFO L85 PathProgramCache]: Analyzing trace with hash 1993833056, now seen corresponding path program 12 times [2024-05-06 17:51:29,786 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:51:29,786 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695212215] [2024-05-06 17:51:29,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:29,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:29,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:30,193 INFO L134 CoverageAnalysis]: Checked inductivity of 614 backedges. 111 proven. 20 refuted. 0 times theorem prover too weak. 483 trivial. 0 not checked. [2024-05-06 17:51:30,193 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:51:30,193 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [695212215] [2024-05-06 17:51:30,193 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [695212215] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:51:30,193 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1144722144] [2024-05-06 17:51:30,193 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-05-06 17:51:30,193 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:30,193 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:51:30,194 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:51:30,196 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-05-06 17:51:31,669 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2024-05-06 17:51:31,669 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:51:31,674 INFO L262 TraceCheckSpWp]: Trace formula consists of 821 conjuncts, 17 conjunts are in the unsatisfiable core [2024-05-06 17:51:31,678 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:51:32,164 INFO L134 CoverageAnalysis]: Checked inductivity of 614 backedges. 100 proven. 31 refuted. 0 times theorem prover too weak. 483 trivial. 0 not checked. [2024-05-06 17:51:32,164 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:51:32,223 INFO L134 CoverageAnalysis]: Checked inductivity of 614 backedges. 112 proven. 19 refuted. 0 times theorem prover too weak. 483 trivial. 0 not checked. [2024-05-06 17:51:32,223 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1144722144] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:51:32,223 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:51:32,223 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 13, 6] total 19 [2024-05-06 17:51:32,223 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1838599257] [2024-05-06 17:51:32,223 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:51:32,224 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2024-05-06 17:51:32,224 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:51:32,224 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-05-06 17:51:32,224 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=273, Unknown=0, NotChecked=0, Total=342 [2024-05-06 17:51:32,225 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:32,225 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:51:32,225 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 25.157894736842106) internal successors, (478), 19 states have internal predecessors, (478), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:51:32,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:32,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:32,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:32,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:32,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:32,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:32,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:32,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:32,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 92 states. [2024-05-06 17:51:32,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:32,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 17:51:32,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:35,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:35,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:35,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:35,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:35,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:35,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-05-06 17:51:35,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:35,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:35,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2024-05-06 17:51:35,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:35,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 17:51:35,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:35,109 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2024-05-06 17:51:35,293 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable407 [2024-05-06 17:51:35,294 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:51:35,294 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:51:35,294 INFO L85 PathProgramCache]: Analyzing trace with hash 2026480117, now seen corresponding path program 13 times [2024-05-06 17:51:35,294 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:51:35,294 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159736763] [2024-05-06 17:51:35,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:35,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:35,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:36,825 INFO L134 CoverageAnalysis]: Checked inductivity of 1721 backedges. 507 proven. 873 refuted. 0 times theorem prover too weak. 341 trivial. 0 not checked. [2024-05-06 17:51:36,825 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:51:36,825 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159736763] [2024-05-06 17:51:36,825 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1159736763] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:51:36,825 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [559795010] [2024-05-06 17:51:36,825 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-05-06 17:51:36,826 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:36,826 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:51:36,827 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:51:36,827 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-05-06 17:51:37,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:37,934 INFO L262 TraceCheckSpWp]: Trace formula consists of 1354 conjuncts, 27 conjunts are in the unsatisfiable core [2024-05-06 17:51:37,938 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:51:38,927 INFO L134 CoverageAnalysis]: Checked inductivity of 1721 backedges. 1039 proven. 175 refuted. 0 times theorem prover too weak. 507 trivial. 0 not checked. [2024-05-06 17:51:38,927 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:51:39,990 INFO L134 CoverageAnalysis]: Checked inductivity of 1721 backedges. 866 proven. 348 refuted. 0 times theorem prover too weak. 507 trivial. 0 not checked. [2024-05-06 17:51:39,991 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [559795010] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:51:39,991 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:51:39,991 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 27, 27] total 82 [2024-05-06 17:51:39,991 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1924163860] [2024-05-06 17:51:39,991 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:51:39,992 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 82 states [2024-05-06 17:51:39,992 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:51:39,993 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 82 interpolants. [2024-05-06 17:51:39,994 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=681, Invalid=5961, Unknown=0, NotChecked=0, Total=6642 [2024-05-06 17:51:39,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:39,995 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:51:39,995 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 82 states, 82 states have (on average 9.658536585365853) internal successors, (792), 82 states have internal predecessors, (792), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 27 states. [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 98 states. [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:39,995 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2024-05-06 17:51:43,893 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2024-05-06 17:51:44,082 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable408 [2024-05-06 17:51:44,082 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:51:44,082 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:51:44,082 INFO L85 PathProgramCache]: Analyzing trace with hash 743439033, now seen corresponding path program 14 times [2024-05-06 17:51:44,082 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:51:44,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1297927048] [2024-05-06 17:51:44,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:44,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:44,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:45,713 INFO L134 CoverageAnalysis]: Checked inductivity of 1851 backedges. 609 proven. 892 refuted. 0 times theorem prover too weak. 350 trivial. 0 not checked. [2024-05-06 17:51:45,713 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:51:45,713 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1297927048] [2024-05-06 17:51:45,713 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1297927048] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:51:45,714 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1149481879] [2024-05-06 17:51:45,714 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 17:51:45,714 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:45,714 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:51:45,715 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:51:45,716 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-05-06 17:51:46,800 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 17:51:46,800 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:51:46,806 INFO L262 TraceCheckSpWp]: Trace formula consists of 1382 conjuncts, 30 conjunts are in the unsatisfiable core [2024-05-06 17:51:46,810 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:51:47,955 INFO L134 CoverageAnalysis]: Checked inductivity of 1851 backedges. 1108 proven. 232 refuted. 0 times theorem prover too weak. 511 trivial. 0 not checked. [2024-05-06 17:51:47,955 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:51:49,182 INFO L134 CoverageAnalysis]: Checked inductivity of 1851 backedges. 866 proven. 474 refuted. 0 times theorem prover too weak. 511 trivial. 0 not checked. [2024-05-06 17:51:49,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1149481879] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:51:49,182 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:51:49,182 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 30, 30] total 91 [2024-05-06 17:51:49,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508699106] [2024-05-06 17:51:49,183 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:51:49,183 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 91 states [2024-05-06 17:51:49,183 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:51:49,184 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 91 interpolants. [2024-05-06 17:51:49,186 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=835, Invalid=7355, Unknown=0, NotChecked=0, Total=8190 [2024-05-06 17:51:49,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:49,186 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:51:49,187 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 91 states, 91 states have (on average 9.351648351648352) internal successors, (851), 91 states have internal predecessors, (851), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 27 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 98 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 90 states. [2024-05-06 17:51:49,187 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2024-05-06 17:51:53,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2024-05-06 17:51:53,676 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2024-05-06 17:51:53,872 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable409,15 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:53,872 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:51:53,872 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:51:53,873 INFO L85 PathProgramCache]: Analyzing trace with hash -1510903939, now seen corresponding path program 15 times [2024-05-06 17:51:53,873 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:51:53,873 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865856260] [2024-05-06 17:51:53,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:53,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:53,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:55,657 INFO L134 CoverageAnalysis]: Checked inductivity of 1997 backedges. 711 proven. 908 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2024-05-06 17:51:55,657 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:51:55,657 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [865856260] [2024-05-06 17:51:55,657 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [865856260] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:51:55,657 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1502935939] [2024-05-06 17:51:55,657 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-06 17:51:55,657 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:51:55,657 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:51:55,658 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:51:55,659 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-05-06 17:51:56,851 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2024-05-06 17:51:56,852 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:51:56,855 INFO L262 TraceCheckSpWp]: Trace formula consists of 693 conjuncts, 14 conjunts are in the unsatisfiable core [2024-05-06 17:51:56,859 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:51:57,148 INFO L134 CoverageAnalysis]: Checked inductivity of 1997 backedges. 280 proven. 15 refuted. 0 times theorem prover too weak. 1702 trivial. 0 not checked. [2024-05-06 17:51:57,148 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:51:57,519 INFO L134 CoverageAnalysis]: Checked inductivity of 1997 backedges. 279 proven. 16 refuted. 0 times theorem prover too weak. 1702 trivial. 0 not checked. [2024-05-06 17:51:57,519 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1502935939] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:51:57,519 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:51:57,519 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 10, 11] total 56 [2024-05-06 17:51:57,519 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [66754484] [2024-05-06 17:51:57,519 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:51:57,520 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 56 states [2024-05-06 17:51:57,520 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:51:57,521 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2024-05-06 17:51:57,521 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=347, Invalid=2733, Unknown=0, NotChecked=0, Total=3080 [2024-05-06 17:51:57,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:51:57,522 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:51:57,522 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 56 states, 56 states have (on average 10.678571428571429) internal successors, (598), 56 states have internal predecessors, (598), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 27 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 98 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 90 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 99 states. [2024-05-06 17:51:57,522 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2024-05-06 17:52:01,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2024-05-06 17:52:01,136 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2024-05-06 17:52:01,336 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable410 [2024-05-06 17:52:01,336 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:52:01,336 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:52:01,336 INFO L85 PathProgramCache]: Analyzing trace with hash 1639198581, now seen corresponding path program 16 times [2024-05-06 17:52:01,337 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:52:01,337 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096798383] [2024-05-06 17:52:01,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:01,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:01,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:03,185 INFO L134 CoverageAnalysis]: Checked inductivity of 1683 backedges. 745 proven. 631 refuted. 0 times theorem prover too weak. 307 trivial. 0 not checked. [2024-05-06 17:52:03,185 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:52:03,185 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096798383] [2024-05-06 17:52:03,185 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1096798383] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:52:03,185 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [685435357] [2024-05-06 17:52:03,185 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-05-06 17:52:03,185 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:52:03,185 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:52:03,186 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:52:03,188 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-05-06 17:52:04,214 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-05-06 17:52:04,214 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:52:04,218 INFO L262 TraceCheckSpWp]: Trace formula consists of 864 conjuncts, 37 conjunts are in the unsatisfiable core [2024-05-06 17:52:04,235 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:52:06,439 INFO L134 CoverageAnalysis]: Checked inductivity of 1683 backedges. 811 proven. 297 refuted. 0 times theorem prover too weak. 575 trivial. 0 not checked. [2024-05-06 17:52:06,439 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:52:07,650 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-05-06 17:52:07,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 17:52:08,637 INFO L134 CoverageAnalysis]: Checked inductivity of 1683 backedges. 471 proven. 637 refuted. 0 times theorem prover too weak. 575 trivial. 0 not checked. [2024-05-06 17:52:08,637 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [685435357] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:52:08,637 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:52:08,638 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 33, 33] total 103 [2024-05-06 17:52:08,638 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1118657188] [2024-05-06 17:52:08,638 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:52:08,638 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 103 states [2024-05-06 17:52:08,638 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:52:08,639 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2024-05-06 17:52:08,642 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1045, Invalid=9461, Unknown=0, NotChecked=0, Total=10506 [2024-05-06 17:52:08,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:52:08,642 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:52:08,643 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 103 states, 103 states have (on average 8.883495145631068) internal successors, (915), 103 states have internal predecessors, (915), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 27 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 98 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 90 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 99 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 73 states. [2024-05-06 17:52:08,643 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:52:13,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:52:13,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:52:13,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:52:13,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:52:13,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:52:13,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-05-06 17:52:13,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:52:13,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:52:13,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2024-05-06 17:52:13,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:52:13,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 17:52:13,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:52:13,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2024-05-06 17:52:13,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2024-05-06 17:52:13,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2024-05-06 17:52:13,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 113 states. [2024-05-06 17:52:13,736 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2024-05-06 17:52:13,925 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable411 [2024-05-06 17:52:13,925 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:52:13,926 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:52:13,926 INFO L85 PathProgramCache]: Analyzing trace with hash 397004601, now seen corresponding path program 17 times [2024-05-06 17:52:13,926 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:52:13,926 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [586132472] [2024-05-06 17:52:13,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:13,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:14,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:15,485 INFO L134 CoverageAnalysis]: Checked inductivity of 1853 backedges. 701 proven. 493 refuted. 0 times theorem prover too weak. 659 trivial. 0 not checked. [2024-05-06 17:52:15,486 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:52:15,486 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [586132472] [2024-05-06 17:52:15,486 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [586132472] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:52:15,486 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [371796199] [2024-05-06 17:52:15,486 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-05-06 17:52:15,486 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:52:15,486 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:52:15,487 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:52:15,488 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-05-06 17:52:22,111 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2024-05-06 17:52:22,111 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:52:22,126 INFO L262 TraceCheckSpWp]: Trace formula consists of 1336 conjuncts, 37 conjunts are in the unsatisfiable core [2024-05-06 17:52:22,131 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:52:23,277 INFO L134 CoverageAnalysis]: Checked inductivity of 1853 backedges. 816 proven. 370 refuted. 0 times theorem prover too weak. 667 trivial. 0 not checked. [2024-05-06 17:52:23,277 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:52:24,648 INFO L134 CoverageAnalysis]: Checked inductivity of 1853 backedges. 515 proven. 671 refuted. 0 times theorem prover too weak. 667 trivial. 0 not checked. [2024-05-06 17:52:24,648 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [371796199] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:52:24,649 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:52:24,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36] total 100 [2024-05-06 17:52:24,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [305473398] [2024-05-06 17:52:24,649 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:52:24,650 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 100 states [2024-05-06 17:52:24,650 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:52:24,651 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 100 interpolants. [2024-05-06 17:52:24,653 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1371, Invalid=8529, Unknown=0, NotChecked=0, Total=9900 [2024-05-06 17:52:24,653 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:52:24,653 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:52:24,654 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 100 states, 100 states have (on average 8.02) internal successors, (802), 100 states have internal predecessors, (802), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 27 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 98 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 90 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 99 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 73 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 113 states. [2024-05-06 17:52:24,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2024-05-06 17:52:27,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2024-05-06 17:52:27,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2024-05-06 17:52:27,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 113 states. [2024-05-06 17:52:27,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2024-05-06 17:52:27,268 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2024-05-06 17:52:27,453 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable412,18 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:52:27,453 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:52:27,453 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:52:27,453 INFO L85 PathProgramCache]: Analyzing trace with hash -1433547507, now seen corresponding path program 18 times [2024-05-06 17:52:27,454 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:52:27,454 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [207220968] [2024-05-06 17:52:27,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:27,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:28,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:25,000 INFO L134 CoverageAnalysis]: Checked inductivity of 1934 backedges. 289 proven. 1645 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:53:25,001 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:53:25,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [207220968] [2024-05-06 17:53:25,001 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [207220968] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:53:25,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1957615891] [2024-05-06 17:53:25,001 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-05-06 17:53:25,001 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:53:25,001 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:53:25,002 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:53:25,003 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-05-06 17:53:36,793 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2024-05-06 17:53:36,794 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:53:36,818 INFO L262 TraceCheckSpWp]: Trace formula consists of 1350 conjuncts, 377 conjunts are in the unsatisfiable core [2024-05-06 17:53:36,833 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:53:48,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-05-06 17:53:49,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-05-06 17:53:49,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-05-06 17:53:50,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-05-06 17:53:52,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 17:53:53,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 17:53:53,434 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 17:53:53,734 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 17:54:38,019 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,022 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,023 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,024 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,024 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,025 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,026 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,027 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,028 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,028 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,029 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,030 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,030 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,031 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,032 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,032 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,033 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,034 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,034 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,035 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,036 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,036 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,037 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,038 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,038 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,039 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,040 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,041 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,041 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,042 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,043 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,043 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,044 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,045 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,045 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,046 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,047 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,047 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,048 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,049 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,049 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,050 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,051 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,051 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,052 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,053 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,054 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,055 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,056 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,057 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,058 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,059 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,059 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,060 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,061 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,062 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,062 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,063 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,064 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,064 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,065 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,066 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,066 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,067 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,068 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,068 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,069 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,070 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,071 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,071 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,072 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,073 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,074 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,074 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,075 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,076 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,076 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,077 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,077 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,078 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,079 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,080 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,080 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,081 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,081 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,082 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,083 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,084 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,085 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,086 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,087 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,087 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,088 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,089 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,090 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,090 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,091 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,092 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,093 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,093 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,094 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,095 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,096 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,097 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,098 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,098 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,099 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,100 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,100 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,101 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,102 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,103 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,104 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,104 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,105 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,106 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,107 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,107 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,108 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,109 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,110 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 17:54:38,110 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 17:54:38,154 INFO L349 Elim1Store]: treesize reduction 132, result has 14.8 percent of original size [2024-05-06 17:54:38,155 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 30 select indices, 30 select index equivalence classes, 78 disjoint index pairs (out of 435 index pairs), introduced 30 new quantified variables, introduced 435 case distinctions, treesize of input 486 treesize of output 144 [2024-05-06 17:54:38,500 INFO L134 CoverageAnalysis]: Checked inductivity of 1934 backedges. 14 proven. 1920 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:54:38,500 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:57:18,414 WARN L249 Executor]: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-05-06 17:57:18,415 WARN L320 FreeRefinementEngine]: Global settings require throwing the following exception [2024-05-06 17:57:18,420 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 101 [2024-05-06 17:57:18,434 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2024-05-06 17:57:18,620 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable413 [2024-05-06 17:57:18,621 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseSuccess(Executor.java:277) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.pop(Scriptor.java:140) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.arrays.DiffWrapperScript.pop(DiffWrapperScript.java:99) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.pop(WrapperScript.java:153) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.pop(HistoryRecordingScript.java:117) at de.uni_freiburg.informatik.ultimate.logic.Util.checkSat(Util.java:67) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SimplifyDDA2.checkRedundancy(SimplifyDDA2.java:286) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SimplifyDDA2.convertForPreprocessedInputTerms(SimplifyDDA2.java:410) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SimplifyDDA2.convert(SimplifyDDA2.java:394) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SimplifyDDA2.convert(SimplifyDDA2.java:1) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:88) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:84) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SimplifyDDA2.simplify(SimplifyDDA2.java:500) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SmtUtils.simplify(SmtUtils.java:252) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SmtUtils.simplifyWithStatistics(SmtUtils.java:324) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify(QuantifierPusher.java:731) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:140) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:1) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine$ApplicationTermTask.doStep(TermContextTransformationEngine.java:209) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:100) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:84) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:297) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.pushInner(QuantifierPusher.java:275) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:194) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:1) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine$ApplicationTermTask.doStep(TermContextTransformationEngine.java:209) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:100) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:84) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:297) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:283) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.PartialQuantifierElimination.eliminate(PartialQuantifierElimination.java:51) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:238) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:420) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:399) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:271) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:341) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:184) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:110) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:267) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:340) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:431) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:225) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 67 more [2024-05-06 17:57:18,625 INFO L158 Benchmark]: Toolchain (without parser) took 768054.02ms. Allocated memory was 285.2MB in the beginning and 3.0GB in the end (delta: 2.8GB). Free memory was 215.5MB in the beginning and 2.1GB in the end (delta: -1.9GB). Peak memory consumption was 2.7GB. Max. memory is 8.0GB. [2024-05-06 17:57:18,625 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 285.2MB. Free memory is still 254.3MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 17:57:18,626 INFO L158 Benchmark]: CACSL2BoogieTranslator took 276.41ms. Allocated memory is still 285.2MB. Free memory was 215.2MB in the beginning and 202.1MB in the end (delta: 13.1MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2024-05-06 17:57:18,626 INFO L158 Benchmark]: Boogie Procedure Inliner took 51.70ms. Allocated memory is still 285.2MB. Free memory was 202.1MB in the beginning and 199.2MB in the end (delta: 2.9MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. [2024-05-06 17:57:18,626 INFO L158 Benchmark]: Boogie Preprocessor took 37.37ms. Allocated memory is still 285.2MB. Free memory was 199.2MB in the beginning and 197.1MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 17:57:18,626 INFO L158 Benchmark]: RCFGBuilder took 748.75ms. Allocated memory is still 285.2MB. Free memory was 197.0MB in the beginning and 211.1MB in the end (delta: -14.1MB). Peak memory consumption was 16.6MB. Max. memory is 8.0GB. [2024-05-06 17:57:18,627 INFO L158 Benchmark]: TraceAbstraction took 766935.42ms. Allocated memory was 285.2MB in the beginning and 3.0GB in the end (delta: 2.8GB). Free memory was 210.0MB in the beginning and 2.1GB in the end (delta: -1.9GB). Peak memory consumption was 2.7GB. Max. memory is 8.0GB. [2024-05-06 17:57:18,628 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 285.2MB. Free memory is still 254.3MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 276.41ms. Allocated memory is still 285.2MB. Free memory was 215.2MB in the beginning and 202.1MB in the end (delta: 13.1MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 51.70ms. Allocated memory is still 285.2MB. Free memory was 202.1MB in the beginning and 199.2MB in the end (delta: 2.9MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 37.37ms. Allocated memory is still 285.2MB. Free memory was 199.2MB in the beginning and 197.1MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 748.75ms. Allocated memory is still 285.2MB. Free memory was 197.0MB in the beginning and 211.1MB in the end (delta: -14.1MB). Peak memory consumption was 16.6MB. Max. memory is 8.0GB. * TraceAbstraction took 766935.42ms. Allocated memory was 285.2MB in the beginning and 3.0GB in the end (delta: 2.8GB). Free memory was 210.0MB in the beginning and 2.1GB in the end (delta: -1.9GB). Peak memory consumption was 2.7GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2024-05-06 17:57:18,638 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 Received shutdown request...