/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 50 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-bad-three-array-sum-alt.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 17:51:02,019 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 17:51:02,067 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 17:51:02,071 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 17:51:02,071 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 17:51:02,090 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 17:51:02,091 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 17:51:02,091 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 17:51:02,092 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 17:51:02,095 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 17:51:02,095 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 17:51:02,096 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 17:51:02,096 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 17:51:02,097 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 17:51:02,097 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 17:51:02,098 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 17:51:02,098 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 17:51:02,098 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 17:51:02,098 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 17:51:02,098 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 17:51:02,098 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 17:51:02,099 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 17:51:02,100 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 17:51:02,100 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 17:51:02,100 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 17:51:02,100 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 17:51:02,100 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 17:51:02,101 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 17:51:02,101 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 17:51:02,101 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 17:51:02,102 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 17:51:02,102 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 17:51:02,102 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 17:51:02,102 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 17:51:02,103 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 17:51:02,103 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 17:51:02,103 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 17:51:02,103 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 17:51:02,103 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 17:51:02,103 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 50 [2024-05-06 17:51:02,323 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 17:51:02,342 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 17:51:02,346 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 17:51:02,347 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 17:51:02,347 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 17:51:02,349 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-bad-three-array-sum-alt.wvr.c [2024-05-06 17:51:03,312 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 17:51:03,447 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 17:51:03,447 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-bad-three-array-sum-alt.wvr.c [2024-05-06 17:51:03,460 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/fb87fbec0/ca2260e5c01e48bc98eaa005c6faa312/FLAGd75db951b [2024-05-06 17:51:03,470 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/fb87fbec0/ca2260e5c01e48bc98eaa005c6faa312 [2024-05-06 17:51:03,472 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 17:51:03,473 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 17:51:03,474 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 17:51:03,474 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 17:51:03,482 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 17:51:03,482 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,483 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@68b1688 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03, skipping insertion in model container [2024-05-06 17:51:03,483 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,505 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 17:51:03,669 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-bad-three-array-sum-alt.wvr.c[2412,2425] [2024-05-06 17:51:03,683 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 17:51:03,690 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 17:51:03,726 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-bad-three-array-sum-alt.wvr.c[2412,2425] [2024-05-06 17:51:03,732 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 17:51:03,745 INFO L206 MainTranslator]: Completed translation [2024-05-06 17:51:03,745 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03 WrapperNode [2024-05-06 17:51:03,746 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 17:51:03,746 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 17:51:03,746 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 17:51:03,747 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 17:51:03,752 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,761 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,783 INFO L138 Inliner]: procedures = 26, calls = 45, calls flagged for inlining = 15, calls inlined = 27, statements flattened = 280 [2024-05-06 17:51:03,786 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 17:51:03,786 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 17:51:03,786 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 17:51:03,787 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 17:51:03,798 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,798 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,801 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,801 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,817 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,821 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,823 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,824 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,858 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 17:51:03,859 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 17:51:03,859 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 17:51:03,859 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 17:51:03,860 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03" (1/1) ... [2024-05-06 17:51:03,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 17:51:03,905 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:51:03,917 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 17:51:03,923 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 17:51:03,952 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 17:51:03,952 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 17:51:03,952 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 17:51:03,952 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 17:51:03,952 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 17:51:03,952 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 17:51:03,952 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 17:51:03,952 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 17:51:03,952 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 17:51:03,953 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 17:51:03,953 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 17:51:03,953 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 17:51:03,953 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 17:51:03,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 17:51:03,953 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 17:51:03,954 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 17:51:04,079 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 17:51:04,081 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 17:51:04,415 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 17:51:04,426 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 17:51:04,426 INFO L309 CfgBuilder]: Removed 6 assume(true) statements. [2024-05-06 17:51:04,427 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 05:51:04 BoogieIcfgContainer [2024-05-06 17:51:04,427 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 17:51:04,429 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 17:51:04,429 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 17:51:04,431 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 17:51:04,432 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 05:51:03" (1/3) ... [2024-05-06 17:51:04,432 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e0b9c40 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 05:51:04, skipping insertion in model container [2024-05-06 17:51:04,432 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:51:03" (2/3) ... [2024-05-06 17:51:04,432 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e0b9c40 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 05:51:04, skipping insertion in model container [2024-05-06 17:51:04,432 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 05:51:04" (3/3) ... [2024-05-06 17:51:04,433 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-bad-three-array-sum-alt.wvr.c [2024-05-06 17:51:04,439 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 17:51:04,445 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 17:51:04,445 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 17:51:04,446 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 17:51:04,521 INFO L144 ThreadInstanceAdder]: Constructed 3 joinOtherThreadTransitions. [2024-05-06 17:51:04,566 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 17:51:04,566 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 17:51:04,567 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:51:04,568 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 17:51:04,569 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 17:51:04,592 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 17:51:04,600 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:51:04,601 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 17:51:04,606 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2c687107, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=50, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 17:51:04,606 INFO L358 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2024-05-06 17:51:09,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:09,374 INFO L85 PathProgramCache]: Analyzing trace with hash -643721061, now seen corresponding path program 1 times [2024-05-06 17:51:09,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:09,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:09,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:09,620 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:09,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:09,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:09,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:09,751 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:09,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 17:51:09,771 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 17:51:09,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:10,055 INFO L85 PathProgramCache]: Analyzing trace with hash -636545574, now seen corresponding path program 1 times [2024-05-06 17:51:10,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:10,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:10,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:10,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:51:10,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:10,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:10,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:10,493 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:51:10,493 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 17:51:10,494 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2024-05-06 17:51:10,895 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:12,157 INFO L85 PathProgramCache]: Analyzing trace with hash -1851807893, now seen corresponding path program 1 times [2024-05-06 17:51:12,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:12,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:12,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:12,473 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:12,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:12,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:12,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:12,685 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:12,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:13,355 INFO L85 PathProgramCache]: Analyzing trace with hash 1281797863, now seen corresponding path program 1 times [2024-05-06 17:51:13,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:13,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:13,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:15,748 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:51:15,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:15,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:15,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:17,355 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:51:17,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:17,521 INFO L85 PathProgramCache]: Analyzing trace with hash -567164337, now seen corresponding path program 1 times [2024-05-06 17:51:17,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:17,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:17,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:17,694 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:17,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:17,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:17,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:17,941 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:18,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:20,106 INFO L85 PathProgramCache]: Analyzing trace with hash 251539659, now seen corresponding path program 1 times [2024-05-06 17:51:20,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:20,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:20,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:22,081 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:51:22,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:22,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:22,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:23,639 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:51:23,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:24,282 INFO L85 PathProgramCache]: Analyzing trace with hash 1136556999, now seen corresponding path program 1 times [2024-05-06 17:51:24,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:24,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:24,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:24,608 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:24,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:24,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:24,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:24,833 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:24,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:51:26,933 INFO L85 PathProgramCache]: Analyzing trace with hash 492280726, now seen corresponding path program 1 times [2024-05-06 17:51:26,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:26,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:26,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:27,297 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:27,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:27,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:27,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:27,518 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:27,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:29,671 INFO L85 PathProgramCache]: Analyzing trace with hash -205754365, now seen corresponding path program 1 times [2024-05-06 17:51:29,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:29,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:29,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:29,828 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:29,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:29,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:29,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:30,093 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:30,117 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:51:30,203 INFO L85 PathProgramCache]: Analyzing trace with hash 436660714, now seen corresponding path program 1 times [2024-05-06 17:51:30,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:30,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:30,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:30,394 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:30,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:30,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:30,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:30,562 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:30,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:30,745 INFO L85 PathProgramCache]: Analyzing trace with hash -953315157, now seen corresponding path program 1 times [2024-05-06 17:51:30,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:30,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:30,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:30,887 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:30,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:30,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:30,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:31,024 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:31,046 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:51:33,083 INFO L85 PathProgramCache]: Analyzing trace with hash 222688562, now seen corresponding path program 1 times [2024-05-06 17:51:33,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:33,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:33,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:33,246 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:33,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:33,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:33,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:33,391 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:33,453 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:33,526 INFO L85 PathProgramCache]: Analyzing trace with hash -279287321, now seen corresponding path program 1 times [2024-05-06 17:51:33,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:33,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:33,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:33,654 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:33,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:33,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:33,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:33,790 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:33,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:51:35,847 INFO L85 PathProgramCache]: Analyzing trace with hash -680753786, now seen corresponding path program 1 times [2024-05-06 17:51:35,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:35,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:35,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:36,146 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:36,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:36,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:36,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:36,289 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:51:39,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:39,701 INFO L85 PathProgramCache]: Analyzing trace with hash -2082775221, now seen corresponding path program 1 times [2024-05-06 17:51:39,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:39,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:39,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:39,818 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:39,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:39,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:39,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:39,938 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:39,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:40,936 INFO L85 PathProgramCache]: Analyzing trace with hash -1660548417, now seen corresponding path program 2 times [2024-05-06 17:51:40,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:40,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:40,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:41,069 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:41,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:41,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:41,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:41,199 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:41,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:41,312 INFO L85 PathProgramCache]: Analyzing trace with hash -101855950, now seen corresponding path program 1 times [2024-05-06 17:51:41,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:41,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:41,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:41,496 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:41,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:41,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:41,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:41,682 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:41,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:51:41,758 INFO L85 PathProgramCache]: Analyzing trace with hash 1833682523, now seen corresponding path program 1 times [2024-05-06 17:51:41,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:41,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:41,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:42,088 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:42,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:42,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:42,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:42,291 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:42,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:42,485 INFO L85 PathProgramCache]: Analyzing trace with hash -715579586, now seen corresponding path program 2 times [2024-05-06 17:51:42,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:42,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:42,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:42,646 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:42,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:42,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:42,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:42,818 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:42,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:51:42,905 INFO L85 PathProgramCache]: Analyzing trace with hash 1828424319, now seen corresponding path program 2 times [2024-05-06 17:51:42,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:42,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:42,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:43,088 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:43,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:43,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:43,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:43,248 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:43,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:44,127 INFO L85 PathProgramCache]: Analyzing trace with hash -999096324, now seen corresponding path program 3 times [2024-05-06 17:51:44,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:44,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:44,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:44,300 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:44,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:44,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:44,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:44,484 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:44,505 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:51:44,560 INFO L85 PathProgramCache]: Analyzing trace with hash -1081356463, now seen corresponding path program 3 times [2024-05-06 17:51:44,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:44,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:44,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:44,865 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:44,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:44,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:44,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:45,062 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:45,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:45,263 INFO L85 PathProgramCache]: Analyzing trace with hash -1539281016, now seen corresponding path program 4 times [2024-05-06 17:51:45,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:45,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:45,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:45,421 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:45,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:45,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:45,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:45,579 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:45,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:51:45,654 INFO L85 PathProgramCache]: Analyzing trace with hash -663955339, now seen corresponding path program 4 times [2024-05-06 17:51:45,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:45,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:45,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:45,810 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:45,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:45,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:45,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:45,976 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:46,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:46,078 INFO L85 PathProgramCache]: Analyzing trace with hash -1551953677, now seen corresponding path program 5 times [2024-05-06 17:51:46,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:46,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:46,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:46,251 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:46,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:46,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:46,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:46,636 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:46,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:51:48,736 INFO L85 PathProgramCache]: Analyzing trace with hash 1099244282, now seen corresponding path program 5 times [2024-05-06 17:51:48,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:48,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:48,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:48,933 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:48,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:48,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:48,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:49,128 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:49,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:49,319 INFO L85 PathProgramCache]: Analyzing trace with hash -1424049473, now seen corresponding path program 6 times [2024-05-06 17:51:49,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:49,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:49,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:49,469 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:49,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:49,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:49,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:49,636 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:49,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:51:51,758 INFO L85 PathProgramCache]: Analyzing trace with hash -979372130, now seen corresponding path program 6 times [2024-05-06 17:51:51,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:51,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:51,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:51,915 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:51,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:51,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:51,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:52,219 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:52,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:53,824 INFO L85 PathProgramCache]: Analyzing trace with hash -708228579, now seen corresponding path program 7 times [2024-05-06 17:51:53,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:53,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:53,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:54,001 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:54,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:54,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:54,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:54,163 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:54,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:51:54,286 INFO L85 PathProgramCache]: Analyzing trace with hash 1088915856, now seen corresponding path program 7 times [2024-05-06 17:51:54,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:54,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:54,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:54,490 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:54,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:54,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:54,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:54,675 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:54,792 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:54,851 INFO L85 PathProgramCache]: Analyzing trace with hash 1492416873, now seen corresponding path program 8 times [2024-05-06 17:51:54,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:54,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:54,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:55,013 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:55,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:55,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:55,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:55,351 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:55,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:51:57,448 INFO L85 PathProgramCache]: Analyzing trace with hash -808922316, now seen corresponding path program 8 times [2024-05-06 17:51:57,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:57,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:57,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:57,626 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:57,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:57,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:57,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:57,796 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:51:57,833 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:51:57,949 INFO L85 PathProgramCache]: Analyzing trace with hash -1759115084, now seen corresponding path program 9 times [2024-05-06 17:51:57,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:57,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:57,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:58,118 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:58,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:51:58,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:51:58,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:51:58,284 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:51:58,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:00,378 INFO L85 PathProgramCache]: Analyzing trace with hash -1624487015, now seen corresponding path program 9 times [2024-05-06 17:52:00,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:00,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:00,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:00,570 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:00,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:00,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:00,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:00,755 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:00,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:01,507 INFO L85 PathProgramCache]: Analyzing trace with hash 204278336, now seen corresponding path program 10 times [2024-05-06 17:52:01,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:01,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:01,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:01,658 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:01,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:01,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:01,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:01,821 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:01,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:03,915 INFO L85 PathProgramCache]: Analyzing trace with hash -2008272707, now seen corresponding path program 10 times [2024-05-06 17:52:03,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:03,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:03,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:04,074 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:04,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:04,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:04,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:04,236 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:04,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:05,081 INFO L85 PathProgramCache]: Analyzing trace with hash -377266114, now seen corresponding path program 11 times [2024-05-06 17:52:05,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:05,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:05,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:05,250 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:05,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:05,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:05,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:05,416 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:05,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:05,548 INFO L85 PathProgramCache]: Analyzing trace with hash -1377044529, now seen corresponding path program 11 times [2024-05-06 17:52:05,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:05,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:05,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:05,731 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:05,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:05,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:05,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:06,053 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:06,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:06,973 INFO L85 PathProgramCache]: Analyzing trace with hash 1551454026, now seen corresponding path program 12 times [2024-05-06 17:52:06,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:06,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:06,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:07,138 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:07,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:07,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:07,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:07,301 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:07,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:07,740 INFO L85 PathProgramCache]: Analyzing trace with hash 1458799091, now seen corresponding path program 12 times [2024-05-06 17:52:07,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:07,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:07,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:07,894 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:07,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:07,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:07,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:08,050 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:08,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:09,513 INFO L85 PathProgramCache]: Analyzing trace with hash 113226869, now seen corresponding path program 13 times [2024-05-06 17:52:09,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:09,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:09,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:09,678 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:09,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:09,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:09,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:09,983 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:10,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:12,081 INFO L85 PathProgramCache]: Analyzing trace with hash 1598308408, now seen corresponding path program 13 times [2024-05-06 17:52:12,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:12,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:12,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:12,273 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:12,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:12,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:12,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:12,453 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:12,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:14,317 INFO L85 PathProgramCache]: Analyzing trace with hash -618590783, now seen corresponding path program 14 times [2024-05-06 17:52:14,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:14,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:14,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:14,474 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:14,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:14,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:14,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:14,636 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:14,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:14,748 INFO L85 PathProgramCache]: Analyzing trace with hash -326945316, now seen corresponding path program 14 times [2024-05-06 17:52:14,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:14,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:14,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:14,903 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:14,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:14,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:14,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:15,060 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:15,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:15,157 INFO L85 PathProgramCache]: Analyzing trace with hash -1641790881, now seen corresponding path program 15 times [2024-05-06 17:52:15,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:15,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:15,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:15,450 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:15,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:15,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:15,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:15,616 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:15,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:15,733 INFO L85 PathProgramCache]: Analyzing trace with hash -2127160818, now seen corresponding path program 15 times [2024-05-06 17:52:15,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:15,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:15,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:15,921 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:15,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:15,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:15,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:16,110 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:16,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:16,849 INFO L85 PathProgramCache]: Analyzing trace with hash -2070810325, now seen corresponding path program 16 times [2024-05-06 17:52:16,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:16,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:16,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:17,000 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:17,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:17,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:17,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:17,148 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:17,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:18,384 INFO L85 PathProgramCache]: Analyzing trace with hash -1173756750, now seen corresponding path program 16 times [2024-05-06 17:52:18,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:18,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:18,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:18,535 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:18,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:18,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:18,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:18,920 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:18,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:19,013 INFO L85 PathProgramCache]: Analyzing trace with hash -144108490, now seen corresponding path program 17 times [2024-05-06 17:52:19,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:19,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:19,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:19,176 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:19,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:19,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:19,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:19,347 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:19,368 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:19,464 INFO L85 PathProgramCache]: Analyzing trace with hash -1081081641, now seen corresponding path program 17 times [2024-05-06 17:52:19,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:19,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:19,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:19,653 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:19,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:19,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:19,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:19,834 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:19,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:20,025 INFO L85 PathProgramCache]: Analyzing trace with hash -36190910, now seen corresponding path program 18 times [2024-05-06 17:52:20,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:20,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:20,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:20,323 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:20,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:20,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:20,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:20,487 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:20,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:20,601 INFO L85 PathProgramCache]: Analyzing trace with hash 780666619, now seen corresponding path program 18 times [2024-05-06 17:52:20,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:20,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:20,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:20,767 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:20,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:20,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:20,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:20,931 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:20,970 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:21,517 INFO L85 PathProgramCache]: Analyzing trace with hash 1458499712, now seen corresponding path program 19 times [2024-05-06 17:52:21,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:21,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:21,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:21,682 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:21,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:21,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:21,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:21,846 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:21,867 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:23,903 INFO L85 PathProgramCache]: Analyzing trace with hash 950202445, now seen corresponding path program 19 times [2024-05-06 17:52:23,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:23,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:23,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:24,081 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:24,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:24,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:24,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:24,373 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:24,491 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:24,571 INFO L85 PathProgramCache]: Analyzing trace with hash 1002528524, now seen corresponding path program 20 times [2024-05-06 17:52:24,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:24,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:24,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:24,723 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:24,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:24,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:24,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:24,875 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:24,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:26,971 INFO L85 PathProgramCache]: Analyzing trace with hash -1469514895, now seen corresponding path program 20 times [2024-05-06 17:52:26,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:26,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:26,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:27,131 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:27,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:27,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:27,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:27,282 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:27,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:27,383 INFO L85 PathProgramCache]: Analyzing trace with hash 293545975, now seen corresponding path program 21 times [2024-05-06 17:52:27,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:27,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:27,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:27,541 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:27,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:27,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:27,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:27,700 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:27,719 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:27,764 INFO L85 PathProgramCache]: Analyzing trace with hash -1835889290, now seen corresponding path program 21 times [2024-05-06 17:52:27,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:27,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:27,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:28,068 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:28,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:28,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:28,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:28,247 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:28,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:28,429 INFO L85 PathProgramCache]: Analyzing trace with hash 762196163, now seen corresponding path program 22 times [2024-05-06 17:52:28,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:28,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:28,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:28,576 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:28,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:28,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:28,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:28,721 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:28,741 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:30,810 INFO L85 PathProgramCache]: Analyzing trace with hash -1084382182, now seen corresponding path program 22 times [2024-05-06 17:52:30,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:30,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:30,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:30,958 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:30,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:30,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:30,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:31,105 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:31,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:33,190 INFO L85 PathProgramCache]: Analyzing trace with hash 1810262689, now seen corresponding path program 23 times [2024-05-06 17:52:33,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:33,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:33,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:33,348 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:33,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:33,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:33,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:33,652 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:33,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:33,764 INFO L85 PathProgramCache]: Analyzing trace with hash 625965708, now seen corresponding path program 23 times [2024-05-06 17:52:33,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:33,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:33,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:33,942 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:33,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:33,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:33,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:34,132 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:34,251 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:34,312 INFO L85 PathProgramCache]: Analyzing trace with hash -1320511251, now seen corresponding path program 24 times [2024-05-06 17:52:34,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:34,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:34,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:34,464 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:34,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:34,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:34,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:34,612 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:34,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:36,708 INFO L85 PathProgramCache]: Analyzing trace with hash 78497328, now seen corresponding path program 24 times [2024-05-06 17:52:36,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:36,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:36,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:36,856 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:36,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:36,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:36,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:37,012 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:37,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:37,881 INFO L85 PathProgramCache]: Analyzing trace with hash 1889464248, now seen corresponding path program 25 times [2024-05-06 17:52:37,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:37,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:37,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:38,038 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:38,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:38,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:38,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:38,334 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:38,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:40,385 INFO L85 PathProgramCache]: Analyzing trace with hash 1871635989, now seen corresponding path program 25 times [2024-05-06 17:52:40,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:40,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:40,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:40,568 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:40,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:40,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:40,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:40,746 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:40,869 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:40,923 INFO L85 PathProgramCache]: Analyzing trace with hash -968798140, now seen corresponding path program 26 times [2024-05-06 17:52:40,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:40,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:40,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:41,087 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:41,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:41,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:41,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:41,245 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:41,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:43,346 INFO L85 PathProgramCache]: Analyzing trace with hash 1959202105, now seen corresponding path program 26 times [2024-05-06 17:52:43,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:43,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:43,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:43,510 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:43,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:43,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:43,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:43,658 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:43,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:45,745 INFO L85 PathProgramCache]: Analyzing trace with hash 1121285571, now seen corresponding path program 27 times [2024-05-06 17:52:45,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:45,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:45,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:46,046 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:46,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:46,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:46,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:46,209 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:46,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:46,527 INFO L85 PathProgramCache]: Analyzing trace with hash 1473383466, now seen corresponding path program 27 times [2024-05-06 17:52:46,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:46,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:46,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:46,708 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:46,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:46,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:46,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:46,885 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:47,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:49,091 INFO L85 PathProgramCache]: Analyzing trace with hash 434531215, now seen corresponding path program 28 times [2024-05-06 17:52:49,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:49,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:49,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:49,238 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:49,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:49,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:49,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:49,391 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:49,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:51,494 INFO L85 PathProgramCache]: Analyzing trace with hash 857098446, now seen corresponding path program 28 times [2024-05-06 17:52:51,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:51,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:51,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:51,657 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:51,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:51,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:51,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:51,806 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:51,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:51,923 INFO L85 PathProgramCache]: Analyzing trace with hash -1475343270, now seen corresponding path program 29 times [2024-05-06 17:52:51,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:51,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:51,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:52,230 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:52,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:52,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:52,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:52,398 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:52,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:54,492 INFO L85 PathProgramCache]: Analyzing trace with hash 883553843, now seen corresponding path program 29 times [2024-05-06 17:52:54,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:54,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:54,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:54,675 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:54,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:54,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:54,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:54,857 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:54,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:56,027 INFO L85 PathProgramCache]: Analyzing trace with hash 1179047014, now seen corresponding path program 30 times [2024-05-06 17:52:56,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:56,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:56,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:56,171 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:56,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:56,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:56,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:56,326 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:56,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:56,454 INFO L85 PathProgramCache]: Analyzing trace with hash -1449603497, now seen corresponding path program 30 times [2024-05-06 17:52:56,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:56,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:56,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:56,603 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:56,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:56,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:56,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:56,755 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:52:56,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:56,847 INFO L85 PathProgramCache]: Analyzing trace with hash -143356956, now seen corresponding path program 31 times [2024-05-06 17:52:56,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:56,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:56,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:57,147 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:57,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:57,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:57,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:57,309 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:57,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:52:59,424 INFO L85 PathProgramCache]: Analyzing trace with hash -1848542615, now seen corresponding path program 31 times [2024-05-06 17:52:59,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:59,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:59,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:59,624 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:59,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:59,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:52:59,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:52:59,812 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:52:59,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:52:59,992 INFO L85 PathProgramCache]: Analyzing trace with hash -317701776, now seen corresponding path program 32 times [2024-05-06 17:52:59,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:52:59,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:00,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:00,139 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:00,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:00,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:00,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:00,286 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:00,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:00,355 INFO L85 PathProgramCache]: Analyzing trace with hash -373557363, now seen corresponding path program 32 times [2024-05-06 17:53:00,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:00,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:00,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:00,506 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:00,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:00,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:00,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:00,653 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:00,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:01,163 INFO L85 PathProgramCache]: Analyzing trace with hash 1176811547, now seen corresponding path program 33 times [2024-05-06 17:53:01,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:01,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:01,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:01,464 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:01,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:01,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:01,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:01,626 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:01,646 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:01,748 INFO L85 PathProgramCache]: Analyzing trace with hash 476506834, now seen corresponding path program 33 times [2024-05-06 17:53:01,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:01,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:01,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:01,944 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:01,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:01,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:01,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:02,141 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:02,261 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:04,325 INFO L85 PathProgramCache]: Analyzing trace with hash 1022744551, now seen corresponding path program 34 times [2024-05-06 17:53:04,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:04,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:04,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:04,469 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:04,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:04,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:04,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:04,612 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:04,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:06,712 INFO L85 PathProgramCache]: Analyzing trace with hash -2097884298, now seen corresponding path program 34 times [2024-05-06 17:53:06,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:06,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:06,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:06,867 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:06,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:06,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:06,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:07,016 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:07,058 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:09,110 INFO L85 PathProgramCache]: Analyzing trace with hash 1111125509, now seen corresponding path program 35 times [2024-05-06 17:53:09,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:09,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:09,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:09,411 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:09,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:09,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:09,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:09,569 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:09,591 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:11,632 INFO L85 PathProgramCache]: Analyzing trace with hash 886480040, now seen corresponding path program 35 times [2024-05-06 17:53:11,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:11,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:11,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:11,824 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:11,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:11,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:11,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:12,002 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:12,126 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:12,194 INFO L85 PathProgramCache]: Analyzing trace with hash -1978801327, now seen corresponding path program 36 times [2024-05-06 17:53:12,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:12,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:12,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:12,347 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:12,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:12,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:12,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:12,494 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:12,513 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:12,670 INFO L85 PathProgramCache]: Analyzing trace with hash 520968780, now seen corresponding path program 36 times [2024-05-06 17:53:12,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:12,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:12,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:12,819 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:12,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:12,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:12,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:12,968 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:13,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:15,056 INFO L85 PathProgramCache]: Analyzing trace with hash -938928164, now seen corresponding path program 37 times [2024-05-06 17:53:15,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:15,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:15,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:15,233 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:15,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:15,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:15,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:15,398 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:15,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:15,512 INFO L85 PathProgramCache]: Analyzing trace with hash 1234676593, now seen corresponding path program 37 times [2024-05-06 17:53:15,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:15,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:15,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:15,690 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:15,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:15,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:15,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:16,027 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:16,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:16,223 INFO L85 PathProgramCache]: Analyzing trace with hash 975671144, now seen corresponding path program 38 times [2024-05-06 17:53:16,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:16,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:16,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:16,376 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:16,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:16,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:16,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:16,535 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:16,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:16,604 INFO L85 PathProgramCache]: Analyzing trace with hash 1063167125, now seen corresponding path program 38 times [2024-05-06 17:53:16,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:16,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:16,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:16,763 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:16,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:16,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:16,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:16,909 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:16,948 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:18,999 INFO L85 PathProgramCache]: Analyzing trace with hash -1083055833, now seen corresponding path program 39 times [2024-05-06 17:53:18,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:18,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:19,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:19,220 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:19,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:19,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:19,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:19,377 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:19,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:20,663 INFO L85 PathProgramCache]: Analyzing trace with hash -1963473338, now seen corresponding path program 39 times [2024-05-06 17:53:20,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:20,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:20,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:20,838 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:20,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:20,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:20,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:21,015 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:21,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:22,861 INFO L85 PathProgramCache]: Analyzing trace with hash -1139270157, now seen corresponding path program 40 times [2024-05-06 17:53:22,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:22,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:23,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:23,209 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:23,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:23,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:23,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:23,368 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:23,390 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:23,447 INFO L85 PathProgramCache]: Analyzing trace with hash -1329040150, now seen corresponding path program 40 times [2024-05-06 17:53:23,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:23,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:23,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:23,619 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:23,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:23,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:23,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:23,772 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:23,841 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:23,896 INFO L85 PathProgramCache]: Analyzing trace with hash -1165702018, now seen corresponding path program 41 times [2024-05-06 17:53:23,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:23,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:23,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:24,208 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:24,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:24,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:24,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:24,366 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:24,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:26,477 INFO L85 PathProgramCache]: Analyzing trace with hash 820061071, now seen corresponding path program 41 times [2024-05-06 17:53:26,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:26,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:26,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:26,662 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:26,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:26,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:26,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:26,842 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:26,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:29,015 INFO L85 PathProgramCache]: Analyzing trace with hash 1431415690, now seen corresponding path program 42 times [2024-05-06 17:53:29,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:29,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:29,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:29,162 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:29,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:29,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:29,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:29,313 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:29,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:31,410 INFO L85 PathProgramCache]: Analyzing trace with hash -1876243021, now seen corresponding path program 42 times [2024-05-06 17:53:31,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:31,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:31,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:31,554 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:31,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:31,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:31,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:31,702 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:31,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:33,788 INFO L85 PathProgramCache]: Analyzing trace with hash 1632853832, now seen corresponding path program 43 times [2024-05-06 17:53:33,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:33,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:33,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:34,041 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:34,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:34,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:34,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:34,197 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:34,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:36,294 INFO L85 PathProgramCache]: Analyzing trace with hash -279196539, now seen corresponding path program 43 times [2024-05-06 17:53:36,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:36,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:36,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:36,479 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:36,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:36,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:36,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:36,652 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:36,769 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:36,825 INFO L85 PathProgramCache]: Analyzing trace with hash 824859604, now seen corresponding path program 44 times [2024-05-06 17:53:36,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:36,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:36,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:36,976 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:36,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:36,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:36,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:37,130 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:37,149 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:39,225 INFO L85 PathProgramCache]: Analyzing trace with hash 780581801, now seen corresponding path program 44 times [2024-05-06 17:53:39,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:39,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:39,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:39,374 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:39,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:39,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:39,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:39,529 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:39,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:41,745 INFO L85 PathProgramCache]: Analyzing trace with hash 1128693806, now seen corresponding path program 45 times [2024-05-06 17:53:41,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:41,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:41,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:41,927 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:41,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:41,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:41,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:42,110 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:42,236 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2024-05-06 17:53:44,323 INFO L85 PathProgramCache]: Analyzing trace with hash -1862583598, now seen corresponding path program 46 times [2024-05-06 17:53:44,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:44,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:44,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:44,472 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:44,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:44,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:44,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:44,621 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:45,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:47,492 INFO L85 PathProgramCache]: Analyzing trace with hash 1940833378, now seen corresponding path program 3 times [2024-05-06 17:53:47,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:47,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:47,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:47,614 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:47,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:47,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:47,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:47,733 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:47,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:47,846 INFO L85 PathProgramCache]: Analyzing trace with hash 1088582061, now seen corresponding path program 45 times [2024-05-06 17:53:47,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:47,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:47,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:48,003 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:48,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:48,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:48,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:48,156 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:53:48,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:50,223 INFO L85 PathProgramCache]: Analyzing trace with hash 467852130, now seen corresponding path program 46 times [2024-05-06 17:53:50,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:50,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:50,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:50,557 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:50,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:50,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:50,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:50,738 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:53:50,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:52,812 INFO L85 PathProgramCache]: Analyzing trace with hash 224989800, now seen corresponding path program 47 times [2024-05-06 17:53:52,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:52,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:52,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:53,063 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:53:53,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:53,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:53,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:53,337 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:53:53,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:53,468 INFO L85 PathProgramCache]: Analyzing trace with hash -1018723676, now seen corresponding path program 48 times [2024-05-06 17:53:53,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:53,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:53,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:53,721 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:53:53,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:53,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:53,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:53,973 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:53:54,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:54,725 INFO L85 PathProgramCache]: Analyzing trace with hash -993646894, now seen corresponding path program 49 times [2024-05-06 17:53:54,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:54,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:54,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:54,993 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:53:54,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:54,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:55,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:55,362 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:53:55,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:55,467 INFO L85 PathProgramCache]: Analyzing trace with hash -639415154, now seen corresponding path program 50 times [2024-05-06 17:53:55,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:55,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:55,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:55,723 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:53:55,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:55,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:55,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:55,971 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:53:56,010 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:56,067 INFO L85 PathProgramCache]: Analyzing trace with hash -716306775, now seen corresponding path program 51 times [2024-05-06 17:53:56,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:56,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:56,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:56,330 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:53:56,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:56,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:56,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:56,580 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:53:56,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:56,704 INFO L85 PathProgramCache]: Analyzing trace with hash 395882149, now seen corresponding path program 52 times [2024-05-06 17:53:56,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:56,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:56,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:56,950 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:53:56,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:56,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:56,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:57,310 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:53:57,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:57,396 INFO L85 PathProgramCache]: Analyzing trace with hash -2053277325, now seen corresponding path program 53 times [2024-05-06 17:53:57,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:57,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:57,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:57,657 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:53:57,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:57,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:57,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:57,919 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:53:57,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:58,053 INFO L85 PathProgramCache]: Analyzing trace with hash -71680273, now seen corresponding path program 54 times [2024-05-06 17:53:58,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:58,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:58,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:58,287 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:53:58,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:58,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:58,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:58,533 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:53:58,573 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:58,626 INFO L85 PathProgramCache]: Analyzing trace with hash -532828438, now seen corresponding path program 55 times [2024-05-06 17:53:58,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:58,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:58,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:58,880 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:53:58,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:58,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:58,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:59,129 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:53:59,183 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:59,235 INFO L85 PathProgramCache]: Analyzing trace with hash -1696100698, now seen corresponding path program 56 times [2024-05-06 17:53:59,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:59,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:59,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:59,607 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:53:59,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:59,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:59,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:53:59,843 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:53:59,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:53:59,929 INFO L85 PathProgramCache]: Analyzing trace with hash -582772716, now seen corresponding path program 57 times [2024-05-06 17:53:59,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:53:59,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:53:59,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:00,177 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:00,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:00,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:00,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:00,422 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:00,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:00,521 INFO L85 PathProgramCache]: Analyzing trace with hash -32703152, now seen corresponding path program 58 times [2024-05-06 17:54:00,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:00,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:00,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:00,751 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:00,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:00,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:00,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:00,988 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:01,024 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:01,073 INFO L85 PathProgramCache]: Analyzing trace with hash 425003819, now seen corresponding path program 59 times [2024-05-06 17:54:01,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:01,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:01,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:01,323 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:01,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:01,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:01,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:01,717 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:01,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:01,831 INFO L85 PathProgramCache]: Analyzing trace with hash -1726930265, now seen corresponding path program 60 times [2024-05-06 17:54:01,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:01,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:01,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:02,065 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:02,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:02,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:02,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:02,302 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:02,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:02,388 INFO L85 PathProgramCache]: Analyzing trace with hash -1996782923, now seen corresponding path program 61 times [2024-05-06 17:54:02,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:02,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:02,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:02,633 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:02,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:02,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:02,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:02,879 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:02,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:04,977 INFO L85 PathProgramCache]: Analyzing trace with hash 626952113, now seen corresponding path program 62 times [2024-05-06 17:54:04,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:04,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:05,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:05,210 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:05,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:05,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:05,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:05,440 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:05,475 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:07,677 INFO L85 PathProgramCache]: Analyzing trace with hash -1896801428, now seen corresponding path program 63 times [2024-05-06 17:54:07,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:07,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:07,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:07,939 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:07,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:07,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:07,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:08,187 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:08,242 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:10,290 INFO L85 PathProgramCache]: Analyzing trace with hash -1322095960, now seen corresponding path program 64 times [2024-05-06 17:54:10,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:10,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:10,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:10,521 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:10,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:10,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:10,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:10,757 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:10,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:10,939 INFO L85 PathProgramCache]: Analyzing trace with hash -1161283242, now seen corresponding path program 65 times [2024-05-06 17:54:10,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:10,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:10,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:11,209 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:11,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:11,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:11,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:11,493 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:11,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:11,698 INFO L85 PathProgramCache]: Analyzing trace with hash -84812270, now seen corresponding path program 66 times [2024-05-06 17:54:11,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:11,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:11,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:11,930 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:11,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:11,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:12,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:12,331 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:12,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:12,417 INFO L85 PathProgramCache]: Analyzing trace with hash 1118756781, now seen corresponding path program 67 times [2024-05-06 17:54:12,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:12,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:12,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:12,677 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:12,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:12,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:12,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:12,940 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:12,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:13,053 INFO L85 PathProgramCache]: Analyzing trace with hash -1515690327, now seen corresponding path program 68 times [2024-05-06 17:54:13,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:13,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:13,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:13,286 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:13,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:13,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:13,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:13,526 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:13,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:15,621 INFO L85 PathProgramCache]: Analyzing trace with hash 1231862775, now seen corresponding path program 69 times [2024-05-06 17:54:15,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:15,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:15,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:15,869 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:15,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:15,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:15,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:16,124 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:16,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:16,226 INFO L85 PathProgramCache]: Analyzing trace with hash 2093613171, now seen corresponding path program 70 times [2024-05-06 17:54:16,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:16,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:16,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:16,640 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:16,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:16,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:16,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:16,874 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:16,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:18,957 INFO L85 PathProgramCache]: Analyzing trace with hash -110405650, now seen corresponding path program 71 times [2024-05-06 17:54:18,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:18,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:18,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:19,204 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:19,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:19,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:19,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:19,452 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:19,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:19,557 INFO L85 PathProgramCache]: Analyzing trace with hash 739251882, now seen corresponding path program 72 times [2024-05-06 17:54:19,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:19,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:19,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:19,792 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:19,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:19,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:19,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:20,026 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:20,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:20,121 INFO L85 PathProgramCache]: Analyzing trace with hash 756691993, now seen corresponding path program 73 times [2024-05-06 17:54:20,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:20,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:20,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:20,362 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:20,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:20,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:20,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:20,765 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:20,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:22,874 INFO L85 PathProgramCache]: Analyzing trace with hash -1137639403, now seen corresponding path program 74 times [2024-05-06 17:54:22,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:22,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:22,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:23,103 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:23,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:23,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:23,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:23,348 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:23,388 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:25,426 INFO L85 PathProgramCache]: Analyzing trace with hash 448133520, now seen corresponding path program 75 times [2024-05-06 17:54:25,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:25,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:25,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:25,667 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:25,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:25,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:25,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:26,078 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:26,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:26,188 INFO L85 PathProgramCache]: Analyzing trace with hash -537534516, now seen corresponding path program 76 times [2024-05-06 17:54:26,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:26,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:26,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:26,415 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:26,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:26,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:26,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:26,651 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:26,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:28,729 INFO L85 PathProgramCache]: Analyzing trace with hash 1863209658, now seen corresponding path program 77 times [2024-05-06 17:54:28,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:28,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:28,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:28,970 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:28,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:28,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:28,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:29,216 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:29,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:31,318 INFO L85 PathProgramCache]: Analyzing trace with hash 89243254, now seen corresponding path program 78 times [2024-05-06 17:54:31,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:31,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:31,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:31,658 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:31,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:31,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:31,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:31,889 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:31,924 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:31,972 INFO L85 PathProgramCache]: Analyzing trace with hash -406891055, now seen corresponding path program 79 times [2024-05-06 17:54:31,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:31,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:32,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:32,222 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:32,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:32,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:32,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:32,461 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:32,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:34,574 INFO L85 PathProgramCache]: Analyzing trace with hash -2054065203, now seen corresponding path program 80 times [2024-05-06 17:54:34,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:34,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:34,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:34,808 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:34,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:34,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:34,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:35,036 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:35,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:37,120 INFO L85 PathProgramCache]: Analyzing trace with hash 1083456859, now seen corresponding path program 81 times [2024-05-06 17:54:37,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:37,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:37,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:37,482 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:37,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:37,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:37,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:37,736 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:37,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:39,838 INFO L85 PathProgramCache]: Analyzing trace with hash -823047977, now seen corresponding path program 82 times [2024-05-06 17:54:39,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:39,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:39,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:40,067 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:40,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:40,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:40,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:40,306 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:40,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:40,488 INFO L85 PathProgramCache]: Analyzing trace with hash 1171088914, now seen corresponding path program 83 times [2024-05-06 17:54:40,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:40,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:40,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:40,729 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:40,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:40,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:40,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:40,989 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:41,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:41,135 INFO L85 PathProgramCache]: Analyzing trace with hash 2040839118, now seen corresponding path program 84 times [2024-05-06 17:54:41,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:41,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:41,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:41,482 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:41,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:41,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:41,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:41,714 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:41,760 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:43,812 INFO L85 PathProgramCache]: Analyzing trace with hash 6102397, now seen corresponding path program 85 times [2024-05-06 17:54:43,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:43,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:43,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:44,059 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:44,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:44,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:44,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:44,305 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:44,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:44,448 INFO L85 PathProgramCache]: Analyzing trace with hash -254168967, now seen corresponding path program 86 times [2024-05-06 17:54:44,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:44,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:44,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:44,691 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:44,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:44,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:44,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:44,924 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:54:44,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2024-05-06 17:54:45,013 INFO L85 PathProgramCache]: Analyzing trace with hash 1710202804, now seen corresponding path program 87 times [2024-05-06 17:54:45,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:45,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:45,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:45,377 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:45,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:45,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:45,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:45,617 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:54:46,126 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-06 17:54:46,127 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:54:46,127 INFO L85 PathProgramCache]: Analyzing trace with hash 357252943, now seen corresponding path program 1 times [2024-05-06 17:54:46,131 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:54:46,131 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568708391] [2024-05-06 17:54:46,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:46,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:46,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:46,679 INFO L134 CoverageAnalysis]: Checked inductivity of 1076 backedges. 287 proven. 2 refuted. 0 times theorem prover too weak. 787 trivial. 0 not checked. [2024-05-06 17:54:46,679 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:54:46,679 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1568708391] [2024-05-06 17:54:46,680 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1568708391] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:54:46,680 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1810092590] [2024-05-06 17:54:46,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:46,680 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:54:46,680 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:54:46,713 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:54:46,713 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 17:54:47,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:54:47,258 INFO L262 TraceCheckSpWp]: Trace formula consists of 1266 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-06 17:54:47,276 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:54:47,711 INFO L134 CoverageAnalysis]: Checked inductivity of 1076 backedges. 288 proven. 1 refuted. 0 times theorem prover too weak. 787 trivial. 0 not checked. [2024-05-06 17:54:47,711 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:54:48,037 INFO L134 CoverageAnalysis]: Checked inductivity of 1076 backedges. 288 proven. 1 refuted. 0 times theorem prover too weak. 787 trivial. 0 not checked. [2024-05-06 17:54:48,038 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1810092590] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:54:48,038 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:54:48,038 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 24 [2024-05-06 17:54:48,039 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [433578653] [2024-05-06 17:54:48,040 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:54:48,043 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-05-06 17:54:48,043 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:54:48,045 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-05-06 17:54:48,046 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=434, Unknown=0, NotChecked=0, Total=552 [2024-05-06 17:54:48,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:54:48,047 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:54:48,048 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 24.833333333333332) internal successors, (596), 24 states have internal predecessors, (596), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:54:48,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:54:58,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 17:54:58,778 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-05-06 17:54:58,977 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable300 [2024-05-06 17:54:58,978 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-06 17:54:58,978 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:54:58,978 INFO L85 PathProgramCache]: Analyzing trace with hash 301323998, now seen corresponding path program 2 times [2024-05-06 17:54:58,978 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:54:58,978 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [601010827] [2024-05-06 17:54:58,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:54:58,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:54:59,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:55:00,418 INFO L134 CoverageAnalysis]: Checked inductivity of 1103 backedges. 558 proven. 525 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 17:55:00,418 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:55:00,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [601010827] [2024-05-06 17:55:00,418 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [601010827] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:55:00,419 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1628270192] [2024-05-06 17:55:00,419 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 17:55:00,419 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:55:00,419 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:55:00,420 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:55:00,422 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 17:55:00,969 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 17:55:00,969 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:55:00,974 INFO L262 TraceCheckSpWp]: Trace formula consists of 1308 conjuncts, 14 conjunts are in the unsatisfiable core [2024-05-06 17:55:00,983 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:55:01,649 INFO L134 CoverageAnalysis]: Checked inductivity of 1103 backedges. 409 proven. 10 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2024-05-06 17:55:01,650 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:55:02,219 INFO L134 CoverageAnalysis]: Checked inductivity of 1103 backedges. 409 proven. 10 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2024-05-06 17:55:02,219 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1628270192] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:55:02,219 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:55:02,220 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 15, 15] total 53 [2024-05-06 17:55:02,220 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [469846026] [2024-05-06 17:55:02,220 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:55:02,221 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 53 states [2024-05-06 17:55:02,221 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:55:02,223 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2024-05-06 17:55:02,224 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=287, Invalid=2469, Unknown=0, NotChecked=0, Total=2756 [2024-05-06 17:55:02,224 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:55:02,224 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:55:02,224 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 53 states, 53 states have (on average 21.20754716981132) internal successors, (1124), 53 states have internal predecessors, (1124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:55:02,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 17:55:02,225 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:55:13,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 17:55:13,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-06 17:55:13,944 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-05-06 17:55:14,134 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable301 [2024-05-06 17:55:14,135 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-06 17:55:14,135 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:55:14,135 INFO L85 PathProgramCache]: Analyzing trace with hash 1663968621, now seen corresponding path program 3 times [2024-05-06 17:55:14,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:55:14,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1431722146] [2024-05-06 17:55:14,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:55:14,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:55:14,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:55:14,735 INFO L134 CoverageAnalysis]: Checked inductivity of 1154 backedges. 626 proven. 182 refuted. 0 times theorem prover too weak. 346 trivial. 0 not checked. [2024-05-06 17:55:14,735 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:55:14,735 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1431722146] [2024-05-06 17:55:14,736 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1431722146] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:55:14,736 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [146562743] [2024-05-06 17:55:14,736 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-06 17:55:14,736 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:55:14,736 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:55:14,737 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:55:14,738 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-05-06 17:55:15,551 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2024-05-06 17:55:15,551 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:55:15,557 INFO L262 TraceCheckSpWp]: Trace formula consists of 1350 conjuncts, 24 conjunts are in the unsatisfiable core [2024-05-06 17:55:15,564 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:55:16,607 INFO L134 CoverageAnalysis]: Checked inductivity of 1154 backedges. 634 proven. 174 refuted. 0 times theorem prover too weak. 346 trivial. 0 not checked. [2024-05-06 17:55:16,607 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:55:17,383 INFO L134 CoverageAnalysis]: Checked inductivity of 1154 backedges. 382 proven. 545 refuted. 0 times theorem prover too weak. 227 trivial. 0 not checked. [2024-05-06 17:55:17,383 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [146562743] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:55:17,383 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:55:17,384 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 18] total 37 [2024-05-06 17:55:17,384 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [488374437] [2024-05-06 17:55:17,384 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:55:17,385 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2024-05-06 17:55:17,385 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:55:17,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2024-05-06 17:55:17,386 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=211, Invalid=1121, Unknown=0, NotChecked=0, Total=1332 [2024-05-06 17:55:17,386 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:55:17,386 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:55:17,387 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 28.45945945945946) internal successors, (1053), 37 states have internal predecessors, (1053), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:55:17,387 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 17:55:17,387 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-05-06 17:55:17,387 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states.