/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 50 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-min-max-dec.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 17:55:56,918 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 17:55:56,956 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 17:55:56,960 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 17:55:56,976 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 17:55:56,990 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 17:55:56,991 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 17:55:56,991 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 17:55:56,992 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 17:55:56,992 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 17:55:56,992 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 17:55:56,993 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 17:55:56,993 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 17:55:56,993 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 17:55:56,993 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 17:55:56,994 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 17:55:56,994 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 17:55:56,994 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 17:55:56,994 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 17:55:56,995 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 17:55:56,995 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 17:55:56,998 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 17:55:56,999 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 17:55:56,999 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 17:55:57,002 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 17:55:57,002 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 17:55:57,003 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 17:55:57,003 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 17:55:57,004 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 17:55:57,004 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 17:55:57,005 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 17:55:57,005 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 17:55:57,005 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 17:55:57,005 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 17:55:57,006 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 17:55:57,006 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 17:55:57,006 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 17:55:57,006 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 17:55:57,006 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 17:55:57,006 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 50 [2024-05-06 17:55:57,215 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 17:55:57,240 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 17:55:57,241 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 17:55:57,242 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 17:55:57,243 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 17:55:57,244 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-min-max-dec.wvr.c [2024-05-06 17:55:58,336 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 17:55:58,502 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 17:55:58,503 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-dec.wvr.c [2024-05-06 17:55:58,508 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/f09d4c0aa/3ce706fe2c2a4cbea0098a58dd56e541/FLAG34332b82c [2024-05-06 17:55:58,522 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/f09d4c0aa/3ce706fe2c2a4cbea0098a58dd56e541 [2024-05-06 17:55:58,525 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 17:55:58,526 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 17:55:58,529 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 17:55:58,530 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 17:55:58,534 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 17:55:58,534 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,535 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@358fa406 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58, skipping insertion in model container [2024-05-06 17:55:58,535 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,552 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 17:55:58,675 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-dec.wvr.c[3019,3032] [2024-05-06 17:55:58,681 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 17:55:58,688 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 17:55:58,708 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-dec.wvr.c[3019,3032] [2024-05-06 17:55:58,711 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 17:55:58,716 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 17:55:58,717 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 17:55:58,722 INFO L206 MainTranslator]: Completed translation [2024-05-06 17:55:58,722 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58 WrapperNode [2024-05-06 17:55:58,722 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 17:55:58,723 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 17:55:58,723 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 17:55:58,723 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 17:55:58,728 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,733 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,748 INFO L138 Inliner]: procedures = 26, calls = 63, calls flagged for inlining = 8, calls inlined = 8, statements flattened = 140 [2024-05-06 17:55:58,749 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 17:55:58,749 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 17:55:58,749 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 17:55:58,749 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 17:55:58,757 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,757 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,765 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,765 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,770 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,773 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,774 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,775 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,792 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 17:55:58,793 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 17:55:58,793 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 17:55:58,793 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 17:55:58,793 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58" (1/1) ... [2024-05-06 17:55:58,797 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 17:55:58,807 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:55:58,821 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 17:55:58,827 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 17:55:58,859 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 17:55:58,860 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 17:55:58,860 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 17:55:58,860 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 17:55:58,860 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 17:55:58,860 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 17:55:58,860 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 17:55:58,860 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 17:55:58,860 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 17:55:58,861 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 17:55:58,861 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 17:55:58,862 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 17:55:58,862 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 17:55:58,863 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 17:55:58,863 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 17:55:58,863 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 17:55:58,863 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 17:55:58,863 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 17:55:58,863 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 17:55:58,864 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 17:55:58,949 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 17:55:58,951 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 17:55:59,205 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 17:55:59,358 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 17:55:59,358 INFO L309 CfgBuilder]: Removed 4 assume(true) statements. [2024-05-06 17:55:59,359 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 05:55:59 BoogieIcfgContainer [2024-05-06 17:55:59,360 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 17:55:59,361 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 17:55:59,361 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 17:55:59,363 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 17:55:59,364 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 05:55:58" (1/3) ... [2024-05-06 17:55:59,364 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22879152 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 05:55:59, skipping insertion in model container [2024-05-06 17:55:59,364 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:55:58" (2/3) ... [2024-05-06 17:55:59,364 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22879152 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 05:55:59, skipping insertion in model container [2024-05-06 17:55:59,364 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 05:55:59" (3/3) ... [2024-05-06 17:55:59,365 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-min-max-dec.wvr.c [2024-05-06 17:55:59,373 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 17:55:59,380 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 17:55:59,380 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 17:55:59,380 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 17:55:59,426 INFO L144 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2024-05-06 17:55:59,473 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 17:55:59,473 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 17:55:59,473 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:55:59,475 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 17:55:59,518 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 17:55:59,534 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 17:55:59,551 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:55:59,553 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 17:55:59,560 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@177aec2e, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=50, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 17:55:59,560 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-06 17:56:00,101 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:56:00,113 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:00,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:56:00,162 INFO L85 PathProgramCache]: Analyzing trace with hash 440850748, now seen corresponding path program 1 times [2024-05-06 17:56:00,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:00,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:00,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:00,323 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:00,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:00,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:00,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:00,379 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:00,395 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 17:56:00,395 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 17:56:00,578 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:56:00,598 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:00,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:56:00,622 INFO L85 PathProgramCache]: Analyzing trace with hash 154181502, now seen corresponding path program 1 times [2024-05-06 17:56:00,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:00,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:00,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:00,984 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:00,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:00,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:01,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:01,149 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:01,150 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 17:56:01,150 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-05-06 17:56:01,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:56:01,436 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:01,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:56:01,457 INFO L85 PathProgramCache]: Analyzing trace with hash -229856278, now seen corresponding path program 1 times [2024-05-06 17:56:01,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:01,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:01,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:01,672 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:01,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:01,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:01,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:01,849 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:01,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:56:01,970 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:01,971 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:56:02,110 INFO L85 PathProgramCache]: Analyzing trace with hash 358425867, now seen corresponding path program 2 times [2024-05-06 17:56:02,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:02,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:02,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:02,222 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:02,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:02,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:02,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:02,303 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:02,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:56:02,389 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:02,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:56:02,408 INFO L85 PathProgramCache]: Analyzing trace with hash 1257764385, now seen corresponding path program 1 times [2024-05-06 17:56:02,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:02,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:02,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:02,552 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:02,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:02,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:02,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:02,664 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:02,700 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:56:02,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:56:04,786 INFO L85 PathProgramCache]: Analyzing trace with hash -766650886, now seen corresponding path program 1 times [2024-05-06 17:56:04,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:04,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:04,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:04,933 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:04,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:04,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:04,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:05,078 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:05,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:56:05,165 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:05,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:56:05,181 INFO L85 PathProgramCache]: Analyzing trace with hash 1239757295, now seen corresponding path program 2 times [2024-05-06 17:56:05,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:05,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:05,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:05,288 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:05,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:05,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:05,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:05,389 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:05,421 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:56:05,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:56:07,508 INFO L85 PathProgramCache]: Analyzing trace with hash -2120086952, now seen corresponding path program 2 times [2024-05-06 17:56:07,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:07,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:07,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:07,645 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:07,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:07,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:07,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:07,755 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:07,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:56:07,840 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:07,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:56:07,856 INFO L85 PathProgramCache]: Analyzing trace with hash -1250216473, now seen corresponding path program 3 times [2024-05-06 17:56:07,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:07,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:07,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:07,960 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:07,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:07,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:07,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:08,123 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:08,158 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:56:08,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:56:10,249 INFO L85 PathProgramCache]: Analyzing trace with hash -1510959552, now seen corresponding path program 3 times [2024-05-06 17:56:10,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:10,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:10,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:10,370 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:10,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:10,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:10,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:10,478 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:10,558 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:56:10,563 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:10,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:56:10,579 INFO L85 PathProgramCache]: Analyzing trace with hash -1004622231, now seen corresponding path program 4 times [2024-05-06 17:56:10,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:10,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:10,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:10,703 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:10,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:10,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:10,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:10,805 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:10,837 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:56:10,838 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:56:12,940 INFO L85 PathProgramCache]: Analyzing trace with hash -333100514, now seen corresponding path program 4 times [2024-05-06 17:56:12,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:12,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:12,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:13,062 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:13,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:13,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:13,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:13,175 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:13,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:56:13,260 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:13,261 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:56:13,276 INFO L85 PathProgramCache]: Analyzing trace with hash 1863797475, now seen corresponding path program 5 times [2024-05-06 17:56:13,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:13,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:13,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:13,436 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:13,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:13,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:13,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:13,567 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:13,600 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:56:13,601 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:56:15,669 INFO L85 PathProgramCache]: Analyzing trace with hash 2074320956, now seen corresponding path program 5 times [2024-05-06 17:56:15,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:15,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:15,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:15,775 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:15,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:15,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:15,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:15,890 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:16,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:56:16,017 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:16,018 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:56:16,034 INFO L85 PathProgramCache]: Analyzing trace with hash 642804717, now seen corresponding path program 6 times [2024-05-06 17:56:16,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:16,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:16,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:16,122 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:16,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:16,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:16,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:16,214 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:16,245 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:56:16,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:56:18,313 INFO L85 PathProgramCache]: Analyzing trace with hash -1514053862, now seen corresponding path program 6 times [2024-05-06 17:56:18,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:18,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:18,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:18,406 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:18,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:18,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:18,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:18,572 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:18,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:56:18,663 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:18,663 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:56:18,684 INFO L85 PathProgramCache]: Analyzing trace with hash -1773699519, now seen corresponding path program 3 times [2024-05-06 17:56:18,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:18,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:18,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:18,776 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:18,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:18,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:18,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:18,852 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:18,933 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:56:18,938 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:18,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:56:20,967 INFO L85 PathProgramCache]: Analyzing trace with hash 849890254, now seen corresponding path program 4 times [2024-05-06 17:56:20,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:20,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:20,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:21,059 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:21,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:21,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:21,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:21,127 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:21,203 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:56:21,208 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:21,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:56:23,247 INFO L85 PathProgramCache]: Analyzing trace with hash 1117088227, now seen corresponding path program 7 times [2024-05-06 17:56:23,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:23,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:23,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:23,442 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:23,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:23,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:23,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:23,539 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:23,603 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:56:23,608 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:23,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:56:25,646 INFO L85 PathProgramCache]: Analyzing trace with hash 680518143, now seen corresponding path program 8 times [2024-05-06 17:56:25,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:25,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:25,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:25,734 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:25,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:25,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:25,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:25,824 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:25,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:56:25,897 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:25,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:56:25,918 INFO L85 PathProgramCache]: Analyzing trace with hash 680518143, now seen corresponding path program 9 times [2024-05-06 17:56:25,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:25,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:25,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:26,066 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:26,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:26,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:26,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:26,150 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:26,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:56:26,225 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:26,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:56:28,263 INFO L85 PathProgramCache]: Analyzing trace with hash -1774298156, now seen corresponding path program 10 times [2024-05-06 17:56:28,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:28,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:28,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:28,417 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:56:28,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:28,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:28,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:28,526 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:56:28,602 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:56:28,607 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:28,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:56:30,639 INFO L85 PathProgramCache]: Analyzing trace with hash -1965969463, now seen corresponding path program 11 times [2024-05-06 17:56:30,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:30,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:30,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:30,798 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:30,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:30,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:30,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:30,906 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:30,978 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:56:30,982 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:30,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:56:33,012 INFO L85 PathProgramCache]: Analyzing trace with hash -126047627, now seen corresponding path program 12 times [2024-05-06 17:56:33,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:33,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:33,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:33,119 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:56:33,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:33,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:33,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:33,218 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:56:33,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:56:33,290 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:33,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:56:35,367 INFO L85 PathProgramCache]: Analyzing trace with hash -892141432, now seen corresponding path program 13 times [2024-05-06 17:56:35,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:35,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:35,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:35,504 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:35,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:35,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:35,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:35,618 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:35,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:56:35,691 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:35,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:56:37,795 INFO L85 PathProgramCache]: Analyzing trace with hash -2053826830, now seen corresponding path program 14 times [2024-05-06 17:56:37,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:37,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:37,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:37,913 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:56:37,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:37,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:37,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:38,005 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:56:38,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:56:38,084 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:38,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:56:40,112 INFO L85 PathProgramCache]: Analyzing trace with hash -1147274773, now seen corresponding path program 15 times [2024-05-06 17:56:40,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:40,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:40,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:40,245 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:40,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:40,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:40,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:40,345 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:40,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:56:40,428 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:40,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:56:40,444 INFO L85 PathProgramCache]: Analyzing trace with hash -1732158298, now seen corresponding path program 16 times [2024-05-06 17:56:40,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:40,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:40,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:40,549 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:40,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:40,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:40,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:40,640 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:40,719 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:56:40,724 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:40,724 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:56:42,752 INFO L85 PathProgramCache]: Analyzing trace with hash 2137668115, now seen corresponding path program 17 times [2024-05-06 17:56:42,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:42,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:42,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:42,857 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:42,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:42,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:42,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:43,018 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:43,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:56:43,086 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:43,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:56:43,103 INFO L85 PathProgramCache]: Analyzing trace with hash 1843202633, now seen corresponding path program 18 times [2024-05-06 17:56:43,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:43,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:43,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:43,196 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:43,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:43,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:43,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:43,290 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:43,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:56:43,370 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:43,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:56:43,386 INFO L85 PathProgramCache]: Analyzing trace with hash 776362208, now seen corresponding path program 1 times [2024-05-06 17:56:43,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:43,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:43,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:43,477 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:43,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:43,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:43,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:43,570 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:56:43,638 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:56:43,642 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:43,644 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:56:43,659 INFO L85 PathProgramCache]: Analyzing trace with hash -985486280, now seen corresponding path program 2 times [2024-05-06 17:56:43,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:43,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:43,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:43,810 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:43,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:43,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:43,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:43,906 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:43,941 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:56:43,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:56:46,000 INFO L85 PathProgramCache]: Analyzing trace with hash 1874402129, now seen corresponding path program 1 times [2024-05-06 17:56:46,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:46,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:46,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:46,111 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:46,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:46,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:46,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:46,204 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:56:46,215 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:56:46,216 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:56:46,216 INFO L85 PathProgramCache]: Analyzing trace with hash -1283961915, now seen corresponding path program 1 times [2024-05-06 17:56:46,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:56:46,220 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1793262932] [2024-05-06 17:56:46,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:46,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:46,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:46,431 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 41 proven. 2 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2024-05-06 17:56:46,431 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:56:46,432 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1793262932] [2024-05-06 17:56:46,432 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1793262932] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:56:46,432 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1761707002] [2024-05-06 17:56:46,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:46,432 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:56:46,433 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:56:46,462 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:56:46,477 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 17:56:46,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:46,668 INFO L262 TraceCheckSpWp]: Trace formula consists of 439 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-06 17:56:46,675 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:56:46,893 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 42 proven. 1 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2024-05-06 17:56:46,894 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 17:56:47,107 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 42 proven. 1 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2024-05-06 17:56:47,107 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1761707002] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 17:56:47,107 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 17:56:47,108 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 24 [2024-05-06 17:56:47,109 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1445962359] [2024-05-06 17:56:47,110 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 17:56:47,113 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-05-06 17:56:47,113 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:56:47,117 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-05-06 17:56:47,120 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=434, Unknown=0, NotChecked=0, Total=552 [2024-05-06 17:56:47,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:56:47,121 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:56:47,121 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 11.25) internal successors, (270), 24 states have internal predecessors, (270), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:56:47,121 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:56:47,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:56:47,503 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:47,503 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:56:47,521 INFO L85 PathProgramCache]: Analyzing trace with hash -1048867754, now seen corresponding path program 5 times [2024-05-06 17:56:47,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:47,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:47,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:56:47,553 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:56:47,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:56:47,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:56:47,700 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:47,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:56:49,785 INFO L85 PathProgramCache]: Analyzing trace with hash -2000312289, now seen corresponding path program 6 times [2024-05-06 17:56:49,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:49,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:49,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:49,869 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:56:49,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:49,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:49,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:49,926 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:56:50,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:56:50,015 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:50,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:56:50,039 INFO L85 PathProgramCache]: Analyzing trace with hash -186415563, now seen corresponding path program 19 times [2024-05-06 17:56:50,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:50,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:50,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:50,337 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:50,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:50,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:50,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:50,456 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:50,486 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:56:50,486 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:56:52,522 INFO L85 PathProgramCache]: Analyzing trace with hash -1729929970, now seen corresponding path program 7 times [2024-05-06 17:56:52,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:52,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:52,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:52,634 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:52,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:52,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:52,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:52,741 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:52,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:56:52,904 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:52,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:56:52,922 INFO L85 PathProgramCache]: Analyzing trace with hash -702749349, now seen corresponding path program 20 times [2024-05-06 17:56:52,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:52,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:52,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:53,053 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:53,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:53,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:53,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:53,162 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:53,194 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:56:53,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:56:55,260 INFO L85 PathProgramCache]: Analyzing trace with hash 730700396, now seen corresponding path program 8 times [2024-05-06 17:56:55,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:55,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:55,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:56:55,295 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:56:55,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:56:55,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:56:55,427 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:55,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:56:55,444 INFO L85 PathProgramCache]: Analyzing trace with hash 781407059, now seen corresponding path program 21 times [2024-05-06 17:56:55,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:55,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:55,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:55,580 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:55,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:55,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:55,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:55,691 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:55,722 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:56:55,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:56:57,797 INFO L85 PathProgramCache]: Analyzing trace with hash 1506008236, now seen corresponding path program 9 times [2024-05-06 17:56:57,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:57,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:57,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:58,020 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:58,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:58,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:58,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:58,142 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:58,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:56:58,217 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:56:58,217 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:56:58,235 INFO L85 PathProgramCache]: Analyzing trace with hash -374547075, now seen corresponding path program 22 times [2024-05-06 17:56:58,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:58,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:58,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:58,329 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:58,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:56:58,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:56:58,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:56:58,432 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:56:58,464 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:56:58,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:57:00,547 INFO L85 PathProgramCache]: Analyzing trace with hash 1698523018, now seen corresponding path program 10 times [2024-05-06 17:57:00,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:00,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:00,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:57:00,577 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:57:00,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:57:00,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:57:00,686 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:00,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:57:00,702 INFO L85 PathProgramCache]: Analyzing trace with hash -1257254921, now seen corresponding path program 23 times [2024-05-06 17:57:00,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:00,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:00,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:00,862 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:00,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:00,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:00,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:00,964 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:00,994 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:00,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:57:03,056 INFO L85 PathProgramCache]: Analyzing trace with hash 509074512, now seen corresponding path program 11 times [2024-05-06 17:57:03,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:03,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:03,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:03,157 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:03,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:03,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:03,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:03,256 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:03,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:57:03,328 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:03,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:57:03,344 INFO L85 PathProgramCache]: Analyzing trace with hash -445248935, now seen corresponding path program 24 times [2024-05-06 17:57:03,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:03,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:03,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:03,434 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:03,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:03,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:03,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:03,567 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:03,599 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:03,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:57:05,673 INFO L85 PathProgramCache]: Analyzing trace with hash -340138962, now seen corresponding path program 12 times [2024-05-06 17:57:05,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:05,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:05,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:57:05,717 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:57:05,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:57:05,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:57:05,834 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:05,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:57:05,850 INFO L85 PathProgramCache]: Analyzing trace with hash -1880138323, now seen corresponding path program 7 times [2024-05-06 17:57:05,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:05,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:05,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:05,941 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:05,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:05,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:05,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:06,030 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:06,098 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:06,110 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:06,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:08,158 INFO L85 PathProgramCache]: Analyzing trace with hash 1845254626, now seen corresponding path program 8 times [2024-05-06 17:57:08,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:08,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:08,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:08,221 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:57:08,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:08,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:08,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:08,272 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:57:08,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:08,346 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:08,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:10,392 INFO L85 PathProgramCache]: Analyzing trace with hash 1028924407, now seen corresponding path program 25 times [2024-05-06 17:57:10,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:10,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:10,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:10,555 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:10,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:10,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:10,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:10,659 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:10,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:10,737 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:10,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:12,767 INFO L85 PathProgramCache]: Analyzing trace with hash 98024723, now seen corresponding path program 26 times [2024-05-06 17:57:12,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:12,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:12,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:12,974 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:12,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:12,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:12,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:13,082 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:13,151 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:57:13,156 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:13,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:57:13,174 INFO L85 PathProgramCache]: Analyzing trace with hash 98024723, now seen corresponding path program 27 times [2024-05-06 17:57:13,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:13,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:13,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:13,355 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:13,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:13,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:13,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:13,544 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:13,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:13,624 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:13,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:15,683 INFO L85 PathProgramCache]: Analyzing trace with hash 582293992, now seen corresponding path program 28 times [2024-05-06 17:57:15,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:15,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:15,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:16,691 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:57:16,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:16,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:16,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:17,077 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:57:17,162 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:17,168 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:17,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:18,018 INFO L85 PathProgramCache]: Analyzing trace with hash 431584565, now seen corresponding path program 29 times [2024-05-06 17:57:18,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:18,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:18,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:18,302 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:18,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:18,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:18,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:18,451 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:18,521 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:18,526 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:18,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:20,571 INFO L85 PathProgramCache]: Analyzing trace with hash -1712596511, now seen corresponding path program 30 times [2024-05-06 17:57:20,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:20,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:20,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:20,823 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:57:20,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:20,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:20,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:21,146 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:57:21,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:21,229 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:21,230 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:23,256 INFO L85 PathProgramCache]: Analyzing trace with hash -1368990308, now seen corresponding path program 31 times [2024-05-06 17:57:23,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:23,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:23,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:23,372 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:23,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:23,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:23,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:23,492 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:23,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:23,582 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:23,582 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:25,613 INFO L85 PathProgramCache]: Analyzing trace with hash -1827911162, now seen corresponding path program 32 times [2024-05-06 17:57:25,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:25,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:25,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:25,979 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:57:25,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:25,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:25,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:26,250 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:57:26,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:26,338 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:26,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:28,369 INFO L85 PathProgramCache]: Analyzing trace with hash 777005655, now seen corresponding path program 33 times [2024-05-06 17:57:28,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:28,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:28,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:28,487 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:28,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:28,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:28,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:28,650 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:28,742 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:57:28,747 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:28,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:57:28,765 INFO L85 PathProgramCache]: Analyzing trace with hash -422427462, now seen corresponding path program 34 times [2024-05-06 17:57:28,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:28,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:28,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:28,886 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:57:28,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:28,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:28,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:28,998 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:57:29,081 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:29,085 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:29,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:31,109 INFO L85 PathProgramCache]: Analyzing trace with hash -210348929, now seen corresponding path program 35 times [2024-05-06 17:57:31,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:31,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:31,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:31,369 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:57:31,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:31,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:31,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:31,755 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:57:31,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:57:31,840 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:31,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:57:31,859 INFO L85 PathProgramCache]: Analyzing trace with hash 2069118301, now seen corresponding path program 36 times [2024-05-06 17:57:31,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:31,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:31,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:32,179 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:57:32,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:32,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:32,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:32,453 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:57:32,544 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:57:32,548 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:32,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:57:32,565 INFO L85 PathProgramCache]: Analyzing trace with hash -1121051060, now seen corresponding path program 3 times [2024-05-06 17:57:32,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:32,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:32,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:33,267 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:33,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:33,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:33,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:33,455 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:33,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:57:33,530 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:33,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:57:33,548 INFO L85 PathProgramCache]: Analyzing trace with hash 348250444, now seen corresponding path program 4 times [2024-05-06 17:57:33,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:33,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:33,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:34,232 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:34,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:34,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:34,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:34,442 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:34,471 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:34,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:57:36,544 INFO L85 PathProgramCache]: Analyzing trace with hash -1487403163, now seen corresponding path program 2 times [2024-05-06 17:57:36,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:36,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:36,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:36,853 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:36,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:36,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:36,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:37,150 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:37,162 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 17:57:37,180 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-05-06 17:57:37,369 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable110,SelfDestructingSolverStorable72,SelfDestructingSolverStorable73,SelfDestructingSolverStorable74,SelfDestructingSolverStorable75,SelfDestructingSolverStorable108,SelfDestructingSolverStorable109,SelfDestructingSolverStorable76,SelfDestructingSolverStorable104,SelfDestructingSolverStorable77,SelfDestructingSolverStorable105,SelfDestructingSolverStorable78,SelfDestructingSolverStorable106,SelfDestructingSolverStorable79,SelfDestructingSolverStorable107,SelfDestructingSolverStorable100,SelfDestructingSolverStorable101,SelfDestructingSolverStorable102,SelfDestructingSolverStorable103,SelfDestructingSolverStorable80,SelfDestructingSolverStorable81,SelfDestructingSolverStorable82,SelfDestructingSolverStorable83,SelfDestructingSolverStorable84,SelfDestructingSolverStorable85,SelfDestructingSolverStorable86,SelfDestructingSolverStorable87,SelfDestructingSolverStorable88,SelfDestructingSolverStorable89,SelfDestructingSolverStorable90,SelfDestructingSolverStorable91,SelfDestructingSolverStorable92,SelfDestructingSolverStorable93,SelfDestructingSolverStorable94,SelfDestructingSolverStorable95,SelfDestructingSolverStorable96,SelfDestructingSolverStorable97,SelfDestructingSolverStorable98,SelfDestructingSolverStorable99,SelfDestructingSolverStorable122,SelfDestructingSolverStorable123,SelfDestructingSolverStorable124,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable120,SelfDestructingSolverStorable121,SelfDestructingSolverStorable119,SelfDestructingSolverStorable115,SelfDestructingSolverStorable66,SelfDestructingSolverStorable116,SelfDestructingSolverStorable67,SelfDestructingSolverStorable117,SelfDestructingSolverStorable68,SelfDestructingSolverStorable118,SelfDestructingSolverStorable69,SelfDestructingSolverStorable111,SelfDestructingSolverStorable112,SelfDestructingSolverStorable113,SelfDestructingSolverStorable114 [2024-05-06 17:57:37,369 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 17:57:37,370 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:57:37,370 INFO L85 PathProgramCache]: Analyzing trace with hash 1272527833, now seen corresponding path program 2 times [2024-05-06 17:57:37,370 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 17:57:37,370 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [903944361] [2024-05-06 17:57:37,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:37,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:37,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:37,606 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 58 proven. 15 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-05-06 17:57:37,606 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 17:57:37,606 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [903944361] [2024-05-06 17:57:37,606 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [903944361] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 17:57:37,606 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [465867674] [2024-05-06 17:57:37,606 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 17:57:37,607 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 17:57:37,607 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:57:37,608 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 17:57:37,609 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 17:57:37,917 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-05-06 17:57:37,917 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 17:57:37,918 INFO L262 TraceCheckSpWp]: Trace formula consists of 317 conjuncts, 33 conjunts are in the unsatisfiable core [2024-05-06 17:57:37,922 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 17:57:37,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2024-05-06 17:57:37,946 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 17:57:37,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 13 [2024-05-06 17:57:37,971 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 17:57:37,971 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 17:57:38,102 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:38,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2024-05-06 17:57:38,231 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-05-06 17:57:38,251 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-05-06 17:57:38,409 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2024-05-06 17:57:38,409 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 17:57:38,409 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [465867674] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 17:57:38,410 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 17:57:38,410 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [15] total 30 [2024-05-06 17:57:38,410 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [734078455] [2024-05-06 17:57:38,410 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 17:57:38,411 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2024-05-06 17:57:38,411 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 17:57:38,411 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-05-06 17:57:38,411 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=799, Unknown=0, NotChecked=0, Total=870 [2024-05-06 17:57:38,411 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:57:38,411 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 17:57:38,412 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 8.529411764705882) internal successors, (145), 17 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 17:57:38,412 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 17:57:38,412 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 17:57:38,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:57:38,994 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:38,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:57:39,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:57:39,164 INFO L85 PathProgramCache]: Analyzing trace with hash -1048867754, now seen corresponding path program 9 times [2024-05-06 17:57:39,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:39,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:39,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:57:39,186 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:57:39,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:57:39,395 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:39,403 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:39,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:39,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:57:41,521 INFO L85 PathProgramCache]: Analyzing trace with hash -2000312289, now seen corresponding path program 10 times [2024-05-06 17:57:41,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:41,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:41,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:41,584 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:57:41,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:41,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:41,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:41,633 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:57:41,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:57:41,765 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:41,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:57:41,862 INFO L85 PathProgramCache]: Analyzing trace with hash -186415563, now seen corresponding path program 37 times [2024-05-06 17:57:41,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:41,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:41,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:41,964 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:41,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:41,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:41,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:42,071 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:42,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:57:42,202 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:42,202 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:57:42,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:57:42,262 INFO L85 PathProgramCache]: Analyzing trace with hash -702749349, now seen corresponding path program 38 times [2024-05-06 17:57:42,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:42,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:42,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:42,354 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:42,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:42,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:42,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:42,495 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:42,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:57:42,611 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:42,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:57:42,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:57:42,667 INFO L85 PathProgramCache]: Analyzing trace with hash 781407059, now seen corresponding path program 39 times [2024-05-06 17:57:42,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:42,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:42,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:42,772 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:42,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:42,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:42,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:42,876 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:43,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:57:43,017 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:43,018 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:57:43,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:57:43,066 INFO L85 PathProgramCache]: Analyzing trace with hash -374547075, now seen corresponding path program 40 times [2024-05-06 17:57:43,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:43,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:43,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:43,181 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:43,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:43,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:43,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:43,270 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:43,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:57:43,402 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:43,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:57:43,520 INFO L85 PathProgramCache]: Analyzing trace with hash -1257254921, now seen corresponding path program 41 times [2024-05-06 17:57:43,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:43,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:43,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:43,628 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:43,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:43,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:43,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:43,738 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:43,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:57:43,886 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:43,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:57:43,974 INFO L85 PathProgramCache]: Analyzing trace with hash -445248935, now seen corresponding path program 42 times [2024-05-06 17:57:43,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:43,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:43,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:44,066 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:44,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:44,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:44,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:44,159 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:44,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:57:44,311 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:44,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:57:44,388 INFO L85 PathProgramCache]: Analyzing trace with hash -1880138323, now seen corresponding path program 11 times [2024-05-06 17:57:44,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:44,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:44,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:44,482 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:44,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:44,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:44,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:44,635 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:44,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:44,761 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:44,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:46,861 INFO L85 PathProgramCache]: Analyzing trace with hash 1845254626, now seen corresponding path program 12 times [2024-05-06 17:57:46,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:46,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:46,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:46,928 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:57:46,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:46,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:46,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:46,986 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 17:57:47,136 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:47,145 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:47,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:47,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:57:51,491 INFO L85 PathProgramCache]: Analyzing trace with hash 1028924407, now seen corresponding path program 43 times [2024-05-06 17:57:51,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:51,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:51,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:51,610 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:51,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:51,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:51,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:51,725 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:57:51,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:51,918 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:51,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:51,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:57:54,071 INFO L85 PathProgramCache]: Analyzing trace with hash 98024723, now seen corresponding path program 44 times [2024-05-06 17:57:54,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:54,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:54,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:54,244 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:54,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:54,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:54,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:54,371 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:54,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:57:54,533 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:54,533 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:57:54,625 INFO L85 PathProgramCache]: Analyzing trace with hash 98024723, now seen corresponding path program 45 times [2024-05-06 17:57:54,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:54,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:54,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:54,729 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:54,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:54,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:54,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:54,835 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:54,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:54,992 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:54,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:55,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:57:55,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:57:56,770 INFO L85 PathProgramCache]: Analyzing trace with hash 582293992, now seen corresponding path program 46 times [2024-05-06 17:57:56,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:56,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:56,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:57,111 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:57:57,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:57,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:57,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:57,376 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:57:57,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:57:57,556 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:57,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:57:57,610 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:57:59,802 INFO L85 PathProgramCache]: Analyzing trace with hash 431584565, now seen corresponding path program 47 times [2024-05-06 17:57:59,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:59,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:59,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:59,919 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:57:59,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:59,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:59,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:00,114 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:00,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:00,261 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:00,261 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:00,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:00,861 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:01,300 INFO L85 PathProgramCache]: Analyzing trace with hash -1712596511, now seen corresponding path program 48 times [2024-05-06 17:58:01,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:01,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:01,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:01,541 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:58:01,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:01,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:01,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:01,880 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:58:02,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:02,033 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:02,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:02,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:04,166 INFO L85 PathProgramCache]: Analyzing trace with hash -1368990308, now seen corresponding path program 49 times [2024-05-06 17:58:04,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:04,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:04,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:04,272 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:04,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:04,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:04,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:04,379 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:04,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:04,538 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:04,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:04,597 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:06,646 INFO L85 PathProgramCache]: Analyzing trace with hash -1827911162, now seen corresponding path program 50 times [2024-05-06 17:58:06,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:06,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:06,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:06,987 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:58:06,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:06,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:07,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:07,240 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:58:07,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:07,402 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:07,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:07,462 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:09,556 INFO L85 PathProgramCache]: Analyzing trace with hash 777005655, now seen corresponding path program 51 times [2024-05-06 17:58:09,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:09,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:09,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:09,665 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:09,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:09,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:09,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:09,808 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:09,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:58:09,958 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:09,958 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:58:10,104 INFO L85 PathProgramCache]: Analyzing trace with hash -422427462, now seen corresponding path program 52 times [2024-05-06 17:58:10,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:10,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:10,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:10,208 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:10,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:10,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:10,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:10,316 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:10,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:10,469 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:10,469 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:10,527 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:12,595 INFO L85 PathProgramCache]: Analyzing trace with hash -210348929, now seen corresponding path program 53 times [2024-05-06 17:58:12,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:12,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:12,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:12,831 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:58:12,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:12,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:12,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:13,150 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:58:13,291 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:58:13,297 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:13,297 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:58:13,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:13,371 INFO L85 PathProgramCache]: Analyzing trace with hash 2069118301, now seen corresponding path program 54 times [2024-05-06 17:58:13,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:13,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:13,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:13,615 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:58:13,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:13,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:13,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:13,916 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:58:14,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:58:14,077 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:14,078 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:58:14,170 INFO L85 PathProgramCache]: Analyzing trace with hash -1121051060, now seen corresponding path program 5 times [2024-05-06 17:58:14,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:14,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:14,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:14,356 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:14,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:14,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:14,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:14,524 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:14,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:58:14,676 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:14,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:58:14,740 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:14,753 INFO L85 PathProgramCache]: Analyzing trace with hash 348250444, now seen corresponding path program 6 times [2024-05-06 17:58:14,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:14,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:14,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:15,013 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:15,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:15,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:15,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:15,233 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:15,319 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:15,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:58:15,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:17,666 INFO L85 PathProgramCache]: Analyzing trace with hash -49650012, now seen corresponding path program 1 times [2024-05-06 17:58:17,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:17,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:17,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:18,030 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:18,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:18,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:18,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:18,437 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:18,589 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:18,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:58:18,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:20,866 INFO L85 PathProgramCache]: Analyzing trace with hash -400848100, now seen corresponding path program 2 times [2024-05-06 17:58:20,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:20,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:20,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:21,168 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:21,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:21,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:21,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:21,372 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:21,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:58:21,509 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:21,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:58:21,598 INFO L85 PathProgramCache]: Analyzing trace with hash -2114372933, now seen corresponding path program 1 times [2024-05-06 17:58:21,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:21,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:21,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:21,823 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:21,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:21,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:21,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:21,991 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:22,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:58:22,138 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:22,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:58:22,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:22,218 INFO L85 PathProgramCache]: Analyzing trace with hash -2095417091, now seen corresponding path program 2 times [2024-05-06 17:58:22,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:22,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:22,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:22,473 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:22,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:22,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:22,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:22,747 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:22,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:58:22,898 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:22,898 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:58:22,982 INFO L85 PathProgramCache]: Analyzing trace with hash 70341742, now seen corresponding path program 1 times [2024-05-06 17:58:22,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:22,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:22,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:23,149 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:23,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:23,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:23,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:23,320 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:23,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:58:23,466 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:23,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:58:23,558 INFO L85 PathProgramCache]: Analyzing trace with hash 1099653866, now seen corresponding path program 2 times [2024-05-06 17:58:23,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:23,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:23,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:23,786 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:23,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:23,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:23,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:24,058 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:24,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:58:24,216 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:24,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:58:24,308 INFO L85 PathProgramCache]: Analyzing trace with hash -1937393571, now seen corresponding path program 1 times [2024-05-06 17:58:24,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:24,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:24,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:24,486 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:24,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:24,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:24,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:24,651 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:24,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 17:58:24,773 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:24,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 17:58:24,836 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:24,848 INFO L85 PathProgramCache]: Analyzing trace with hash -2035104997, now seen corresponding path program 2 times [2024-05-06 17:58:24,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:24,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:24,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:25,114 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:25,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:25,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:25,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:25,326 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:25,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 17:58:25,475 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:25,475 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 17:58:25,541 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:25,555 INFO L85 PathProgramCache]: Analyzing trace with hash -1725064559, now seen corresponding path program 55 times [2024-05-06 17:58:25,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:25,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:25,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:25,729 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:25,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:25,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:25,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:25,963 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:26,098 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:58:26,104 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:26,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:58:26,162 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:26,183 INFO L85 PathProgramCache]: Analyzing trace with hash 1319875175, now seen corresponding path program 56 times [2024-05-06 17:58:26,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:26,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:26,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:26,409 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:26,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:26,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:26,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:26,629 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:58:26,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:26,762 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:26,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:28,863 INFO L85 PathProgramCache]: Analyzing trace with hash -1549937964, now seen corresponding path program 1 times [2024-05-06 17:58:28,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:28,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:28,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:29,015 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:29,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:29,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:29,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:29,117 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:29,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:29,224 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:29,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:29,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:29,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:31,640 INFO L85 PathProgramCache]: Analyzing trace with hash 1461445790, now seen corresponding path program 2 times [2024-05-06 17:58:31,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:31,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:31,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:31,782 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:31,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:31,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:31,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:31,889 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:31,956 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:31,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:58:32,028 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:34,238 INFO L85 PathProgramCache]: Analyzing trace with hash -1664318736, now seen corresponding path program 3 times [2024-05-06 17:58:34,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:34,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:34,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:34,363 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:34,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:34,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:34,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:34,525 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:34,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:34,771 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:34,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:34,833 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:36,889 INFO L85 PathProgramCache]: Analyzing trace with hash -604187212, now seen corresponding path program 13 times [2024-05-06 17:58:36,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:36,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:36,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:36,987 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:36,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:36,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:37,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:37,086 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:37,223 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:37,229 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:37,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:37,274 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:37,432 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:39,667 INFO L85 PathProgramCache]: Analyzing trace with hash -130366018, now seen corresponding path program 14 times [2024-05-06 17:58:39,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:39,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:39,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:39,772 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:39,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:39,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:39,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:39,880 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:40,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:40,042 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:40,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:40,120 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:42,251 INFO L85 PathProgramCache]: Analyzing trace with hash -1404963093, now seen corresponding path program 1 times [2024-05-06 17:58:42,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:42,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:42,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:42,453 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:42,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:42,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:42,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:42,555 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:42,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:42,674 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:42,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:42,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:44,788 INFO L85 PathProgramCache]: Analyzing trace with hash 960901031, now seen corresponding path program 2 times [2024-05-06 17:58:44,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:44,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:44,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:44,915 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:44,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:44,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:44,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:45,029 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:45,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:45,167 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:45,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:47,404 INFO L85 PathProgramCache]: Analyzing trace with hash -322416092, now seen corresponding path program 1 times [2024-05-06 17:58:47,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:47,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:47,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:47,504 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:47,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:47,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:47,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:47,613 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:47,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:47,767 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:47,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:47,895 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:50,019 INFO L85 PathProgramCache]: Analyzing trace with hash 794352462, now seen corresponding path program 2 times [2024-05-06 17:58:50,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:50,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:50,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:50,159 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:50,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:50,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:50,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:50,297 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:50,413 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:50,418 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:50,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:52,524 INFO L85 PathProgramCache]: Analyzing trace with hash -287495184, now seen corresponding path program 1 times [2024-05-06 17:58:52,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:52,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:52,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:52,634 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:52,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:52,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:52,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:52,735 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:52,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:52,904 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:52,904 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:52,970 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:55,134 INFO L85 PathProgramCache]: Analyzing trace with hash -1475104766, now seen corresponding path program 2 times [2024-05-06 17:58:55,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:55,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:55,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:55,244 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:55,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:55,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:55,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:55,350 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:58:55,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:55,480 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:55,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:58:55,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:58:57,593 INFO L85 PathProgramCache]: Analyzing trace with hash -1256200026, now seen corresponding path program 1 times [2024-05-06 17:58:57,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:57,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:57,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:57,757 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:57,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:57,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:57,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:57,853 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:58:57,988 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:58:57,995 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:57,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:59:00,154 INFO L85 PathProgramCache]: Analyzing trace with hash -768266100, now seen corresponding path program 2 times [2024-05-06 17:59:00,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:00,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:00,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:00,257 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:59:00,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:00,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:00,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:00,361 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:59:00,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:59:00,512 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:00,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:59:02,733 INFO L85 PathProgramCache]: Analyzing trace with hash 98024754, now seen corresponding path program 1 times [2024-05-06 17:59:02,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:02,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:02,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:02,829 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:59:02,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:02,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:02,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:02,928 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:59:03,078 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:59:03,087 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:03,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:59:03,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:05,295 INFO L85 PathProgramCache]: Analyzing trace with hash 1142960768, now seen corresponding path program 2 times [2024-05-06 17:59:05,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:05,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:05,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:05,478 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:59:05,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:05,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:05,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:05,582 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:59:05,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:59:05,731 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:05,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:59:05,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:06,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:07,258 INFO L85 PathProgramCache]: Analyzing trace with hash 1942824745, now seen corresponding path program 57 times [2024-05-06 17:59:07,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:07,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:07,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:07,358 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:59:07,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:07,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:07,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:07,460 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 17:59:07,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:59:07,602 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:07,602 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:59:07,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:09,733 INFO L85 PathProgramCache]: Analyzing trace with hash 88652713, now seen corresponding path program 58 times [2024-05-06 17:59:09,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:09,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:09,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:09,841 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:59:09,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:09,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:09,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:09,951 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 17:59:10,068 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:10,068 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:10,164 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:12,421 INFO L85 PathProgramCache]: Analyzing trace with hash 1977853054, now seen corresponding path program 1 times [2024-05-06 17:59:12,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:12,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:12,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:12,476 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:59:12,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:12,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 17:59:12,739 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:12,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 17:59:12,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:12,803 INFO L85 PathProgramCache]: Analyzing trace with hash 1183903022, now seen corresponding path program 2 times [2024-05-06 17:59:12,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:12,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:12,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:12,822 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:59:12,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:12,924 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:12,924 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:13,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:15,170 INFO L85 PathProgramCache]: Analyzing trace with hash -1953711487, now seen corresponding path program 3 times [2024-05-06 17:59:15,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:15,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:15,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:15,204 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:59:15,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:15,329 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:15,329 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:15,432 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:17,649 INFO L85 PathProgramCache]: Analyzing trace with hash -307738324, now seen corresponding path program 1 times [2024-05-06 17:59:17,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:17,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:17,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:17,673 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:59:17,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:17,793 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:17,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:17,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:20,051 INFO L85 PathProgramCache]: Analyzing trace with hash -1941994161, now seen corresponding path program 1 times [2024-05-06 17:59:20,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:20,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:20,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:20,147 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:20,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:20,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:20,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:20,242 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:20,335 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:20,335 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:20,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:22,680 INFO L85 PathProgramCache]: Analyzing trace with hash -1586665640, now seen corresponding path program 1 times [2024-05-06 17:59:22,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:22,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:22,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:22,779 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:22,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:22,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:22,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:22,877 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:22,934 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:22,934 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:22,988 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:25,107 INFO L85 PathProgramCache]: Analyzing trace with hash -882466767, now seen corresponding path program 1 times [2024-05-06 17:59:25,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:25,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:25,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:25,288 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:25,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:25,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:25,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:25,384 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:25,481 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:25,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:25,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:27,726 INFO L85 PathProgramCache]: Analyzing trace with hash 1634101306, now seen corresponding path program 1 times [2024-05-06 17:59:27,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:27,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:27,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:27,822 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:27,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:27,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:27,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:27,929 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:28,012 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:28,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:28,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:30,333 INFO L85 PathProgramCache]: Analyzing trace with hash 1438186260, now seen corresponding path program 2 times [2024-05-06 17:59:30,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:30,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:30,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:30,428 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:30,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:30,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:30,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:30,521 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:30,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 17:59:30,642 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:30,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 17:59:30,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:32,303 INFO L85 PathProgramCache]: Analyzing trace with hash -949952947, now seen corresponding path program 3 times [2024-05-06 17:59:32,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:32,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:32,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:32,714 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:59:32,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:32,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:32,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:32,830 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:59:32,921 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:32,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:32,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:35,235 INFO L85 PathProgramCache]: Analyzing trace with hash 616230223, now seen corresponding path program 4 times [2024-05-06 17:59:35,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:35,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:35,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:35,352 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:59:35,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:35,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:35,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:35,449 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:59:35,542 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:35,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:35,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:37,791 INFO L85 PathProgramCache]: Analyzing trace with hash -798591791, now seen corresponding path program 5 times [2024-05-06 17:59:37,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:37,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:37,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:37,888 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:59:37,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:37,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:37,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:37,986 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 17:59:38,063 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:38,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:38,147 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:40,351 INFO L85 PathProgramCache]: Analyzing trace with hash -702663718, now seen corresponding path program 6 times [2024-05-06 17:59:40,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:40,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:40,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:40,372 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:59:40,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:40,481 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:40,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:40,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:42,662 INFO L85 PathProgramCache]: Analyzing trace with hash -1962329234, now seen corresponding path program 7 times [2024-05-06 17:59:42,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:42,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:42,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:42,683 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:59:42,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:42,791 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:42,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:42,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:45,203 INFO L85 PathProgramCache]: Analyzing trace with hash 887342512, now seen corresponding path program 8 times [2024-05-06 17:59:45,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:45,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:45,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:45,223 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:59:45,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:45,314 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:45,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:45,413 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:47,622 INFO L85 PathProgramCache]: Analyzing trace with hash 700365973, now seen corresponding path program 4 times [2024-05-06 17:59:47,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:47,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:47,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:47,641 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:59:47,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:47,778 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:47,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:47,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:50,140 INFO L85 PathProgramCache]: Analyzing trace with hash 236509193, now seen corresponding path program 5 times [2024-05-06 17:59:50,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:50,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:50,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:50,158 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:59:50,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:50,269 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:50,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:50,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:52,502 INFO L85 PathProgramCache]: Analyzing trace with hash -1258149097, now seen corresponding path program 6 times [2024-05-06 17:59:52,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:52,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:52,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:52,538 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 17:59:52,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 17:59:52,649 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:52,649 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:52,746 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:54,965 INFO L85 PathProgramCache]: Analyzing trace with hash -1104795281, now seen corresponding path program 9 times [2024-05-06 17:59:54,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:54,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:54,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:55,067 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:55,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:55,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:55,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:55,169 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:55,238 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:55,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:55,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 17:59:57,525 INFO L85 PathProgramCache]: Analyzing trace with hash -851327182, now seen corresponding path program 10 times [2024-05-06 17:59:57,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:57,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:57,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:57,642 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:57,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:57,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:57,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:57,873 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 17:59:57,954 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:57,955 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 17:59:58,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:00,278 INFO L85 PathProgramCache]: Analyzing trace with hash -1005469884, now seen corresponding path program 11 times [2024-05-06 18:00:00,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:00,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:00,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:00,374 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:00,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:00,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:00,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:00,470 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:00,539 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:00,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:00,646 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:02,876 INFO L85 PathProgramCache]: Analyzing trace with hash 1075944145, now seen corresponding path program 12 times [2024-05-06 18:00:02,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:02,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:02,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:02,983 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:02,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:02,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:02,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:03,084 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:03,177 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:03,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:03,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:05,460 INFO L85 PathProgramCache]: Analyzing trace with hash 1802234931, now seen corresponding path program 13 times [2024-05-06 18:00:05,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:05,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:05,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:05,558 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:05,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:05,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:05,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:05,682 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:05,753 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:05,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:05,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:08,187 INFO L85 PathProgramCache]: Analyzing trace with hash 407067436, now seen corresponding path program 1 times [2024-05-06 18:00:08,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:08,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:08,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:08,292 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:08,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:08,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:08,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:08,418 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:08,489 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:08,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:08,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:10,791 INFO L85 PathProgramCache]: Analyzing trace with hash 1121509864, now seen corresponding path program 1 times [2024-05-06 18:00:10,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:10,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:10,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:10,890 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:10,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:10,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:10,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:10,994 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:11,055 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:11,055 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:11,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:13,249 INFO L85 PathProgramCache]: Analyzing trace with hash -933653586, now seen corresponding path program 1 times [2024-05-06 18:00:13,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:13,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:13,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:13,352 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:13,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:13,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:13,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:13,453 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:13,536 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:13,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:13,638 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:15,968 INFO L85 PathProgramCache]: Analyzing trace with hash 246976810, now seen corresponding path program 1 times [2024-05-06 18:00:15,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:15,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:15,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:16,204 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:16,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:16,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:16,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:16,313 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:16,406 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:16,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:16,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:18,680 INFO L85 PathProgramCache]: Analyzing trace with hash 839250993, now seen corresponding path program 14 times [2024-05-06 18:00:18,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:18,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:18,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:18,787 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:18,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:18,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:18,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:18,897 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:18,993 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:18,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:19,085 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:21,260 INFO L85 PathProgramCache]: Analyzing trace with hash -1677275167, now seen corresponding path program 15 times [2024-05-06 18:00:21,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:21,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:21,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:21,361 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:21,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:21,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:21,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:21,464 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:21,534 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:21,534 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:21,597 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:23,831 INFO L85 PathProgramCache]: Analyzing trace with hash -1248683740, now seen corresponding path program 16 times [2024-05-06 18:00:23,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:23,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:23,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:24,008 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:24,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:24,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:24,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:24,140 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:24,247 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:24,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:24,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:26,577 INFO L85 PathProgramCache]: Analyzing trace with hash -1993768302, now seen corresponding path program 17 times [2024-05-06 18:00:26,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:26,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:26,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:26,682 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:26,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:26,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:26,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:26,784 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:26,874 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:26,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:26,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:29,091 INFO L85 PathProgramCache]: Analyzing trace with hash 1182610883, now seen corresponding path program 18 times [2024-05-06 18:00:29,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:29,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:29,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:29,180 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:29,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:29,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:29,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:29,273 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:29,329 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:29,329 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:29,379 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:31,480 INFO L85 PathProgramCache]: Analyzing trace with hash -847930459, now seen corresponding path program 19 times [2024-05-06 18:00:31,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:31,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:31,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:31,574 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:31,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:31,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:31,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:31,761 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:31,843 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:31,843 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:31,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:34,113 INFO L85 PathProgramCache]: Analyzing trace with hash 1047647482, now seen corresponding path program 2 times [2024-05-06 18:00:34,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:34,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:34,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:34,210 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:34,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:34,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:34,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:34,307 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:34,381 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:34,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:34,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:36,687 INFO L85 PathProgramCache]: Analyzing trace with hash -1490225574, now seen corresponding path program 2 times [2024-05-06 18:00:36,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:36,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:36,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:36,797 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:36,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:36,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:36,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:36,921 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:37,016 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:37,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:37,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:39,386 INFO L85 PathProgramCache]: Analyzing trace with hash -740808452, now seen corresponding path program 2 times [2024-05-06 18:00:39,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:39,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:39,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:39,504 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:39,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:39,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:39,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:39,617 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:39,728 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:39,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:39,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:42,139 INFO L85 PathProgramCache]: Analyzing trace with hash -578086372, now seen corresponding path program 2 times [2024-05-06 18:00:42,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:42,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:42,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:42,242 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:42,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:42,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:42,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:42,349 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:42,420 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:42,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:42,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:44,705 INFO L85 PathProgramCache]: Analyzing trace with hash 119899391, now seen corresponding path program 20 times [2024-05-06 18:00:44,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:44,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:44,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:44,812 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:44,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:44,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:44,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:44,916 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:44,986 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:44,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:45,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:47,199 INFO L85 PathProgramCache]: Analyzing trace with hash 1236366701, now seen corresponding path program 21 times [2024-05-06 18:00:47,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:47,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:47,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:47,302 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:47,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:47,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:47,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:47,404 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:47,474 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:47,474 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:47,564 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:49,788 INFO L85 PathProgramCache]: Analyzing trace with hash -1557525584, now seen corresponding path program 22 times [2024-05-06 18:00:49,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:49,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:49,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:50,024 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:50,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:50,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:50,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:50,135 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:50,225 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:50,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:50,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:52,436 INFO L85 PathProgramCache]: Analyzing trace with hash -1207043194, now seen corresponding path program 23 times [2024-05-06 18:00:52,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:52,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:52,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:52,538 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:52,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:52,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:52,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:52,634 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:52,700 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:52,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:52,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:54,942 INFO L85 PathProgramCache]: Analyzing trace with hash -177484209, now seen corresponding path program 24 times [2024-05-06 18:00:54,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:54,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:54,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:55,046 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:55,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:55,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:55,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:55,145 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:55,211 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:55,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:55,273 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:00:57,429 INFO L85 PathProgramCache]: Analyzing trace with hash -737614031, now seen corresponding path program 25 times [2024-05-06 18:00:57,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:57,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:57,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:57,539 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:57,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:57,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:57,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:57,719 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:00:57,803 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:57,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:00:57,874 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:00,051 INFO L85 PathProgramCache]: Analyzing trace with hash 1041935598, now seen corresponding path program 3 times [2024-05-06 18:01:00,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:00,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:00,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:00,152 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:00,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:00,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:00,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:00,251 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:00,340 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:00,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:00,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:02,657 INFO L85 PathProgramCache]: Analyzing trace with hash 1003442150, now seen corresponding path program 3 times [2024-05-06 18:01:02,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:02,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:02,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:02,755 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:02,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:02,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:02,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:02,852 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:02,916 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:02,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:02,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:05,225 INFO L85 PathProgramCache]: Analyzing trace with hash 1140747760, now seen corresponding path program 3 times [2024-05-06 18:01:05,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:05,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:05,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:05,324 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:05,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:05,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:05,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:05,423 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:05,628 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:05,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:05,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:07,997 INFO L85 PathProgramCache]: Analyzing trace with hash 1976460968, now seen corresponding path program 3 times [2024-05-06 18:01:07,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:07,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:08,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:08,095 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:08,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:08,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:08,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:08,194 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:08,267 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:08,267 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:08,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:10,556 INFO L85 PathProgramCache]: Analyzing trace with hash -767527181, now seen corresponding path program 26 times [2024-05-06 18:01:10,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:10,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:10,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:10,662 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:10,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:10,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:10,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:10,771 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:10,838 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:10,838 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:10,903 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:13,146 INFO L85 PathProgramCache]: Analyzing trace with hash 236508682, now seen corresponding path program 7 times [2024-05-06 18:01:13,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:13,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:13,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:13,234 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:13,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:13,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:13,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:13,322 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:13,389 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:13,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:13,455 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:15,703 INFO L85 PathProgramCache]: Analyzing trace with hash 1374025759, now seen corresponding path program 27 times [2024-05-06 18:01:15,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:15,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:15,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:15,903 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:15,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:15,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:15,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:15,994 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:16,060 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:16,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:16,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:18,391 INFO L85 PathProgramCache]: Analyzing trace with hash -1766599877, now seen corresponding path program 28 times [2024-05-06 18:01:18,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:18,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:18,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:18,490 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:18,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:18,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:18,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:18,588 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:18,673 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:18,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:18,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:20,989 INFO L85 PathProgramCache]: Analyzing trace with hash 1269250435, now seen corresponding path program 4 times [2024-05-06 18:01:20,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:20,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:21,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:21,101 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:01:21,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:21,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:21,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:21,211 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:01:21,967 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:21,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:22,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:24,244 INFO L85 PathProgramCache]: Analyzing trace with hash -1709017196, now seen corresponding path program 1 times [2024-05-06 18:01:24,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:24,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:24,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:24,488 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:24,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:24,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:24,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:24,870 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:24,966 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:24,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:25,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:27,213 INFO L85 PathProgramCache]: Analyzing trace with hash 2113341452, now seen corresponding path program 2 times [2024-05-06 18:01:27,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:27,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:27,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:27,436 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:27,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:27,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:27,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:27,667 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:27,807 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:27,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:27,898 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:30,162 INFO L85 PathProgramCache]: Analyzing trace with hash 849870816, now seen corresponding path program 3 times [2024-05-06 18:01:30,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:30,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:30,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:30,290 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:01:30,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:30,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:30,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:30,415 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:01:31,462 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:31,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:31,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:33,769 INFO L85 PathProgramCache]: Analyzing trace with hash 52102949, now seen corresponding path program 1 times [2024-05-06 18:01:33,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:33,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:33,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:34,153 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:34,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:34,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:34,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:34,421 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:34,522 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:34,523 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:34,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:36,879 INFO L85 PathProgramCache]: Analyzing trace with hash 755083485, now seen corresponding path program 2 times [2024-05-06 18:01:36,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:36,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:36,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:37,178 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:37,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:37,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:37,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:37,480 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:37,643 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:37,644 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:37,712 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:39,905 INFO L85 PathProgramCache]: Analyzing trace with hash -508387151, now seen corresponding path program 3 times [2024-05-06 18:01:39,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:39,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:40,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:40,164 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:01:40,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:40,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:40,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:40,291 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:01:41,282 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:41,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:41,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:43,671 INFO L85 PathProgramCache]: Analyzing trace with hash -154648587, now seen corresponding path program 1 times [2024-05-06 18:01:43,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:43,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:43,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:43,932 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:43,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:43,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:43,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:44,192 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:44,281 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:44,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:44,350 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:46,585 INFO L85 PathProgramCache]: Analyzing trace with hash 241739181, now seen corresponding path program 2 times [2024-05-06 18:01:46,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:46,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:46,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:46,803 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:46,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:46,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:46,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:47,115 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:01:47,259 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:47,259 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:47,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:49,563 INFO L85 PathProgramCache]: Analyzing trace with hash -1021731455, now seen corresponding path program 3 times [2024-05-06 18:01:49,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:49,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:49,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:49,686 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:01:49,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:49,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:49,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:49,808 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:01:50,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:01:50,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:01:51,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:51,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:53,272 INFO L85 PathProgramCache]: Analyzing trace with hash -1835273440, now seen corresponding path program 1 times [2024-05-06 18:01:53,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:53,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:53,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:01:53,288 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:01:53,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:01:53,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:01:53,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:01:53,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:53,590 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:55,763 INFO L85 PathProgramCache]: Analyzing trace with hash -760746091, now seen corresponding path program 1 times [2024-05-06 18:01:55,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:55,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:55,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:01:55,783 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:01:55,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:01:55,909 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:55,910 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1352 treesize of output 1116 [2024-05-06 18:01:56,119 INFO L85 PathProgramCache]: Analyzing trace with hash -1357004533, now seen corresponding path program 1 times [2024-05-06 18:01:56,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:56,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:56,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:01:56,134 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:01:56,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:01:56,291 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:01:56,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:01:56,469 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:58,570 INFO L85 PathProgramCache]: Analyzing trace with hash 2044990766, now seen corresponding path program 1 times [2024-05-06 18:01:58,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:58,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:58,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:01:58,586 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:01:58,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:01:58,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:01:58,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:01:58,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:01:58,947 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:01,070 INFO L85 PathProgramCache]: Analyzing trace with hash 1426646599, now seen corresponding path program 2 times [2024-05-06 18:02:01,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:01,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:01,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:01,088 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:02:01,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:01,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:01,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:01,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:01,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:03,733 INFO L85 PathProgramCache]: Analyzing trace with hash 268016777, now seen corresponding path program 1 times [2024-05-06 18:02:03,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:03,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:03,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:03,830 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:03,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:03,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:03,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:03,943 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:04,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:04,094 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:04,197 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:04,268 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:06,384 INFO L85 PathProgramCache]: Analyzing trace with hash 1948308341, now seen corresponding path program 1 times [2024-05-06 18:02:06,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:06,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:06,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:06,479 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:06,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:06,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:06,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:06,584 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:06,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:06,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:06,972 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:09,121 INFO L85 PathProgramCache]: Analyzing trace with hash 201395979, now seen corresponding path program 1 times [2024-05-06 18:02:09,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:09,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:09,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:09,222 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:09,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:09,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:09,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:09,334 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:09,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:09,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:09,795 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:09,903 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:12,051 INFO L85 PathProgramCache]: Analyzing trace with hash 1946159287, now seen corresponding path program 1 times [2024-05-06 18:02:12,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:12,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:12,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:12,146 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:12,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:12,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:12,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:12,242 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:12,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:12,390 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:12,565 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:14,679 INFO L85 PathProgramCache]: Analyzing trace with hash -1599788658, now seen corresponding path program 3 times [2024-05-06 18:02:14,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:14,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:14,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:14,774 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:14,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:14,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:14,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:14,874 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:15,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:15,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:15,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:15,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:17,388 INFO L85 PathProgramCache]: Analyzing trace with hash 1056772533, now seen corresponding path program 4 times [2024-05-06 18:02:17,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:17,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:17,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:17,484 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:17,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:17,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:17,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:17,584 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:17,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:17,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:17,818 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:17,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:20,165 INFO L85 PathProgramCache]: Analyzing trace with hash -1767025917, now seen corresponding path program 5 times [2024-05-06 18:02:20,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:20,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:20,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:20,257 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:20,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:20,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:20,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:20,350 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:20,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:20,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:20,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:22,848 INFO L85 PathProgramCache]: Analyzing trace with hash 912830455, now seen corresponding path program 6 times [2024-05-06 18:02:22,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:22,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:22,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:22,945 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:22,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:22,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:22,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:23,046 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:23,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:23,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:23,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:23,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:25,565 INFO L85 PathProgramCache]: Analyzing trace with hash 1276372101, now seen corresponding path program 7 times [2024-05-06 18:02:25,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:25,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:25,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:25,662 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:25,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:25,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:25,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:25,756 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:25,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:25,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:26,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:28,315 INFO L85 PathProgramCache]: Analyzing trace with hash 912829962, now seen corresponding path program 8 times [2024-05-06 18:02:28,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:28,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:28,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:28,413 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:28,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:28,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:28,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:28,507 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:28,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:28,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:28,841 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:30,958 INFO L85 PathProgramCache]: Analyzing trace with hash 1057726837, now seen corresponding path program 1 times [2024-05-06 18:02:30,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:30,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:30,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:31,582 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:31,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:31,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:31,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:31,655 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:31,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:31,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:31,915 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:34,098 INFO L85 PathProgramCache]: Analyzing trace with hash -1766995134, now seen corresponding path program 1 times [2024-05-06 18:02:34,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:34,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:34,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:34,176 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:34,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:34,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:34,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:34,253 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:34,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:34,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:34,503 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:36,801 INFO L85 PathProgramCache]: Analyzing trace with hash 912831447, now seen corresponding path program 1 times [2024-05-06 18:02:36,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:36,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:36,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:36,872 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:36,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:36,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:36,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:36,944 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:37,062 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:37,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:37,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:37,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:39,401 INFO L85 PathProgramCache]: Analyzing trace with hash 1276372132, now seen corresponding path program 1 times [2024-05-06 18:02:39,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:39,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:39,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:39,469 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:39,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:39,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:39,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:39,536 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:39,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:39,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:39,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:39,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:41,896 INFO L85 PathProgramCache]: Analyzing trace with hash 1426646586, now seen corresponding path program 9 times [2024-05-06 18:02:41,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:41,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:41,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:41,980 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:41,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:41,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:41,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:42,061 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:02:42,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:42,153 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:42,209 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:42,252 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:44,398 INFO L85 PathProgramCache]: Analyzing trace with hash 323115510, now seen corresponding path program 10 times [2024-05-06 18:02:44,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:44,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:44,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:44,415 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:02:44,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:44,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:44,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:44,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:46,881 INFO L85 PathProgramCache]: Analyzing trace with hash -1790692247, now seen corresponding path program 11 times [2024-05-06 18:02:46,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:46,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:46,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:46,898 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:02:46,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:47,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:47,046 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:47,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:47,173 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:49,340 INFO L85 PathProgramCache]: Analyzing trace with hash -1858879592, now seen corresponding path program 12 times [2024-05-06 18:02:49,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:49,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:49,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:49,357 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:02:49,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:49,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:49,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:49,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:51,829 INFO L85 PathProgramCache]: Analyzing trace with hash -1029795189, now seen corresponding path program 13 times [2024-05-06 18:02:51,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:51,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:51,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:51,845 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:02:51,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:51,949 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:51,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:52,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:54,268 INFO L85 PathProgramCache]: Analyzing trace with hash -1858879279, now seen corresponding path program 14 times [2024-05-06 18:02:54,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:54,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:54,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:54,285 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:02:54,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:54,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:54,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:54,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:54,590 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:56,768 INFO L85 PathProgramCache]: Analyzing trace with hash 2005630047, now seen corresponding path program 1 times [2024-05-06 18:02:56,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:56,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:56,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:56,785 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:02:56,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:56,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:56,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:57,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:57,078 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:59,248 INFO L85 PathProgramCache]: Analyzing trace with hash -561556042, now seen corresponding path program 2 times [2024-05-06 18:02:59,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:59,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:59,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:59,266 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:02:59,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:02:59,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:02:59,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:02:59,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:02:59,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:01,808 INFO L85 PathProgramCache]: Analyzing trace with hash 404756986, now seen corresponding path program 1 times [2024-05-06 18:03:01,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:01,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:01,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:01,900 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:01,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:01,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:01,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:01,989 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:02,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:02,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:02,214 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:02,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:04,447 INFO L85 PathProgramCache]: Analyzing trace with hash -1788058652, now seen corresponding path program 1 times [2024-05-06 18:03:04,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:04,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:04,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:04,537 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:04,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:04,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:04,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:04,626 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:04,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:04,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:04,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:04,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:07,102 INFO L85 PathProgramCache]: Analyzing trace with hash 635057340, now seen corresponding path program 1 times [2024-05-06 18:03:07,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:07,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:07,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:07,191 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:07,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:07,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:07,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:07,372 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:07,515 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:07,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:07,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:09,921 INFO L85 PathProgramCache]: Analyzing trace with hash 713222374, now seen corresponding path program 1 times [2024-05-06 18:03:09,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:09,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:09,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:10,014 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:10,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:10,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:10,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:10,106 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:10,209 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:10,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:10,355 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:12,534 INFO L85 PathProgramCache]: Analyzing trace with hash 2101217151, now seen corresponding path program 3 times [2024-05-06 18:03:12,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:12,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:12,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:12,626 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:12,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:12,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:12,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:12,716 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:12,823 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:12,838 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:12,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:15,092 INFO L85 PathProgramCache]: Analyzing trace with hash -70766172, now seen corresponding path program 4 times [2024-05-06 18:03:15,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:15,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:15,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:15,273 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:15,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:15,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:15,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:15,355 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:15,444 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:15,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:15,511 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:15,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:17,637 INFO L85 PathProgramCache]: Analyzing trace with hash -417924812, now seen corresponding path program 5 times [2024-05-06 18:03:17,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:17,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:17,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:17,722 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:17,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:17,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:17,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:17,806 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:17,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:17,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:17,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:18,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:20,193 INFO L85 PathProgramCache]: Analyzing trace with hash 1510539174, now seen corresponding path program 6 times [2024-05-06 18:03:20,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:20,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:20,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:20,281 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:20,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:20,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:20,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:20,374 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:20,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:20,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:20,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:22,745 INFO L85 PathProgramCache]: Analyzing trace with hash -228367626, now seen corresponding path program 7 times [2024-05-06 18:03:22,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:22,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:22,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:22,900 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:22,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:22,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:22,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:22,985 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:23,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:23,123 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:23,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:23,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:25,435 INFO L85 PathProgramCache]: Analyzing trace with hash 1510538681, now seen corresponding path program 8 times [2024-05-06 18:03:25,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:25,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:25,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:25,522 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:25,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:25,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:25,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:25,608 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:25,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:25,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:25,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:25,891 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:28,002 INFO L85 PathProgramCache]: Analyzing trace with hash -69811868, now seen corresponding path program 1 times [2024-05-06 18:03:28,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:28,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:28,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:28,074 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:28,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:28,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:28,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:28,144 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:28,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:28,259 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:28,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:30,617 INFO L85 PathProgramCache]: Analyzing trace with hash -417894029, now seen corresponding path program 1 times [2024-05-06 18:03:30,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:30,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:30,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:30,687 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:30,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:30,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:30,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:30,758 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:30,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:30,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:30,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:31,018 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:33,195 INFO L85 PathProgramCache]: Analyzing trace with hash 1510540166, now seen corresponding path program 1 times [2024-05-06 18:03:33,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:33,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:33,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:33,266 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:33,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:33,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:33,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:33,337 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:33,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:33,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:33,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:35,787 INFO L85 PathProgramCache]: Analyzing trace with hash -228367595, now seen corresponding path program 1 times [2024-05-06 18:03:35,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:35,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:35,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:35,858 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:35,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:35,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:35,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:35,929 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:36,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:36,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:36,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:36,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:38,310 INFO L85 PathProgramCache]: Analyzing trace with hash -561556055, now seen corresponding path program 9 times [2024-05-06 18:03:38,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:38,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:38,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:38,465 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:38,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:38,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:38,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:38,557 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:38,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:38,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:38,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:38,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:40,934 INFO L85 PathProgramCache]: Analyzing trace with hash -1819230041, now seen corresponding path program 10 times [2024-05-06 18:03:40,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:40,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:40,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:40,954 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:03:40,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:41,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:41,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:41,198 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:41,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:43,441 INFO L85 PathProgramCache]: Analyzing trace with hash -1859800168, now seen corresponding path program 11 times [2024-05-06 18:03:43,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:43,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:43,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:43,458 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:03:43,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:43,601 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:43,612 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:43,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:43,754 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:45,916 INFO L85 PathProgramCache]: Analyzing trace with hash -1029824887, now seen corresponding path program 12 times [2024-05-06 18:03:45,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:45,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:45,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:45,933 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:03:45,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:46,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:46,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:46,242 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:48,419 INFO L85 PathProgramCache]: Analyzing trace with hash 2044989818, now seen corresponding path program 13 times [2024-05-06 18:03:48,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:48,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:48,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:48,436 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:03:48,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:48,581 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:48,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:48,851 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:50,941 INFO L85 PathProgramCache]: Analyzing trace with hash -1029824574, now seen corresponding path program 14 times [2024-05-06 18:03:50,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:50,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:50,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:50,960 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:03:50,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:51,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:51,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:51,268 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:53,382 INFO L85 PathProgramCache]: Analyzing trace with hash 1588718352, now seen corresponding path program 1 times [2024-05-06 18:03:53,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:53,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:53,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:53,399 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:03:53,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:53,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:53,552 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:53,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:53,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:55,881 INFO L85 PathProgramCache]: Analyzing trace with hash 1648324005, now seen corresponding path program 2 times [2024-05-06 18:03:55,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:55,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:55,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:55,899 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:03:55,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:03:56,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:56,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:56,142 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:56,191 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:03:58,280 INFO L85 PathProgramCache]: Analyzing trace with hash -316506389, now seen corresponding path program 1 times [2024-05-06 18:03:58,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:58,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:58,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:58,374 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:58,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:58,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:58,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:58,468 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:03:58,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:03:58,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:03:58,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:00,830 INFO L85 PathProgramCache]: Analyzing trace with hash 1929452755, now seen corresponding path program 1 times [2024-05-06 18:04:00,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:00,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:00,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:00,988 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:00,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:00,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:01,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:01,087 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:01,211 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:01,223 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:01,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:03,560 INFO L85 PathProgramCache]: Analyzing trace with hash -1184685587, now seen corresponding path program 1 times [2024-05-06 18:04:03,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:03,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:03,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:03,648 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:03,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:03,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:03,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:03,736 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:03,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:03,906 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:04,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:06,214 INFO L85 PathProgramCache]: Analyzing trace with hash 377426325, now seen corresponding path program 1 times [2024-05-06 18:04:06,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:06,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:06,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:06,303 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:06,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:06,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:06,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:06,475 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:06,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:06,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:06,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:08,863 INFO L85 PathProgramCache]: Analyzing trace with hash 1674743024, now seen corresponding path program 3 times [2024-05-06 18:04:08,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:08,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:08,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:08,955 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:08,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:08,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:08,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:09,056 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:09,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:09,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:09,302 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:09,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:11,552 INFO L85 PathProgramCache]: Analyzing trace with hash 885307923, now seen corresponding path program 4 times [2024-05-06 18:04:11,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:11,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:11,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:11,641 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:11,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:11,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:11,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:11,727 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:11,836 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:11,847 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:11,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:11,976 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:14,146 INFO L85 PathProgramCache]: Analyzing trace with hash 859842277, now seen corresponding path program 5 times [2024-05-06 18:04:14,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:14,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:14,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:14,331 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:14,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:14,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:14,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:14,423 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:14,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:14,544 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:14,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:16,842 INFO L85 PathProgramCache]: Analyzing trace with hash -803547179, now seen corresponding path program 6 times [2024-05-06 18:04:16,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:16,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:16,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:16,937 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:16,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:16,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:16,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:17,026 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:17,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:17,159 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:17,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:19,494 INFO L85 PathProgramCache]: Analyzing trace with hash -441562905, now seen corresponding path program 7 times [2024-05-06 18:04:19,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:19,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:19,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:19,581 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:19,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:19,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:19,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:19,666 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:19,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:19,883 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:20,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:22,134 INFO L85 PathProgramCache]: Analyzing trace with hash -803547672, now seen corresponding path program 8 times [2024-05-06 18:04:22,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:22,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:22,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:22,220 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:22,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:22,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:22,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:22,311 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:22,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:22,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:22,604 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:24,765 INFO L85 PathProgramCache]: Analyzing trace with hash 886262227, now seen corresponding path program 1 times [2024-05-06 18:04:24,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:24,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:24,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:24,837 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:24,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:24,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:24,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:24,908 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:25,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:25,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:25,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:27,338 INFO L85 PathProgramCache]: Analyzing trace with hash 859873060, now seen corresponding path program 1 times [2024-05-06 18:04:27,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:27,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:27,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:27,413 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:27,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:27,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:27,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:27,546 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:27,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:27,661 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:27,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:27,794 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:29,954 INFO L85 PathProgramCache]: Analyzing trace with hash -803546187, now seen corresponding path program 1 times [2024-05-06 18:04:29,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:29,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:29,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:30,028 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:30,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:30,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:30,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:30,100 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:30,206 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:30,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:30,292 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:30,350 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:32,510 INFO L85 PathProgramCache]: Analyzing trace with hash -441562874, now seen corresponding path program 1 times [2024-05-06 18:04:32,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:32,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:32,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:32,583 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:32,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:32,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:32,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:32,665 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:32,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:32,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:32,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:35,061 INFO L85 PathProgramCache]: Analyzing trace with hash 1648323992, now seen corresponding path program 9 times [2024-05-06 18:04:35,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:35,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:35,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:35,207 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:35,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:35,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:35,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:35,295 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:35,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:35,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:35,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:37,704 INFO L85 PathProgramCache]: Analyzing trace with hash -1886490920, now seen corresponding path program 10 times [2024-05-06 18:04:37,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:37,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:37,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:37,730 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:04:37,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:37,853 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:37,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:37,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:40,163 INFO L85 PathProgramCache]: Analyzing trace with hash -1030685881, now seen corresponding path program 11 times [2024-05-06 18:04:40,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:40,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:40,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:40,181 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:04:40,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:40,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:40,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:40,377 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:40,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:42,596 INFO L85 PathProgramCache]: Analyzing trace with hash 2044962042, now seen corresponding path program 12 times [2024-05-06 18:04:42,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:42,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:42,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:42,617 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:04:42,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:42,758 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:42,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:42,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:45,125 INFO L85 PathProgramCache]: Analyzing trace with hash 2005629161, now seen corresponding path program 13 times [2024-05-06 18:04:45,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:45,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:45,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:45,143 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:04:45,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:45,350 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:45,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:45,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:47,604 INFO L85 PathProgramCache]: Analyzing trace with hash 2044962355, now seen corresponding path program 14 times [2024-05-06 18:04:47,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:47,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:47,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:47,631 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:04:47,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:47,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:47,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:47,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:50,143 INFO L85 PathProgramCache]: Analyzing trace with hash 882532929, now seen corresponding path program 2 times [2024-05-06 18:04:50,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:50,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:50,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:50,159 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:04:50,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:50,286 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:50,286 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 3433 treesize of output 2853 [2024-05-06 18:04:50,455 INFO L85 PathProgramCache]: Analyzing trace with hash 1588717518, now seen corresponding path program 3 times [2024-05-06 18:04:50,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:50,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:50,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:50,472 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:04:50,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:50,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:50,630 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:50,709 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:50,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:52,975 INFO L85 PathProgramCache]: Analyzing trace with hash 1638321428, now seen corresponding path program 4 times [2024-05-06 18:04:52,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:52,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:52,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:52,992 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:04:52,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:53,095 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:53,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1733 treesize of output 1441 [2024-05-06 18:04:53,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:53,228 INFO L85 PathProgramCache]: Analyzing trace with hash -751642776, now seen corresponding path program 5 times [2024-05-06 18:04:53,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:53,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:53,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:53,246 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:04:53,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:53,377 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:53,377 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 921 treesize of output 773 [2024-05-06 18:04:53,609 INFO L85 PathProgramCache]: Analyzing trace with hash -1826089066, now seen corresponding path program 6 times [2024-05-06 18:04:53,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:53,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:53,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:53,627 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:04:53,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:53,715 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:53,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1348 treesize of output 1112 [2024-05-06 18:04:53,909 INFO L85 PathProgramCache]: Analyzing trace with hash -774185686, now seen corresponding path program 7 times [2024-05-06 18:04:53,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:53,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:53,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:53,927 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:04:53,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:04:54,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:54,096 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:54,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:56,479 INFO L85 PathProgramCache]: Analyzing trace with hash -895928898, now seen corresponding path program 1 times [2024-05-06 18:04:56,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:56,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:56,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:56,583 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:56,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:56,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:56,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:56,674 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:56,755 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:56,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1841 treesize of output 1549 [2024-05-06 18:04:56,867 INFO L85 PathProgramCache]: Analyzing trace with hash -1102995518, now seen corresponding path program 2 times [2024-05-06 18:04:56,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:56,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:56,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:56,955 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:56,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:56,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:56,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:57,118 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:57,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:04:57,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:04:57,355 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:57,442 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:04:59,583 INFO L85 PathProgramCache]: Analyzing trace with hash 166877802, now seen corresponding path program 3 times [2024-05-06 18:04:59,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:59,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:59,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:59,688 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:59,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:59,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:59,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:59,790 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:04:59,872 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:59,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2555 treesize of output 2151 [2024-05-06 18:05:00,039 INFO L85 PathProgramCache]: Analyzing trace with hash 878245061, now seen corresponding path program 4 times [2024-05-06 18:05:00,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:00,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:00,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:00,143 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:00,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:00,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:00,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:00,300 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:00,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:00,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:00,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:02,779 INFO L85 PathProgramCache]: Analyzing trace with hash -2113253339, now seen corresponding path program 1 times [2024-05-06 18:05:02,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:02,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:02,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:03,063 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:03,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:03,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:03,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:03,152 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:03,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:03,270 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:03,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:05,497 INFO L85 PathProgramCache]: Analyzing trace with hash 1455851143, now seen corresponding path program 1 times [2024-05-06 18:05:05,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:05,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:05,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:05,576 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:05,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:05,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:05,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:05,655 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:05,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:05,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:05,847 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:05,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:08,150 INFO L85 PathProgramCache]: Analyzing trace with hash 878246887, now seen corresponding path program 1 times [2024-05-06 18:05:08,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:08,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:08,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:08,231 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:08,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:08,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:08,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:08,310 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:08,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:08,429 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:08,571 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:10,762 INFO L85 PathProgramCache]: Analyzing trace with hash 166877833, now seen corresponding path program 1 times [2024-05-06 18:05:10,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:10,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:10,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:10,840 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:10,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:10,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:10,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:10,922 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:11,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:11,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:11,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:11,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:13,414 INFO L85 PathProgramCache]: Analyzing trace with hash -1102995542, now seen corresponding path program 5 times [2024-05-06 18:05:13,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:13,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:13,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:13,566 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:13,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:13,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:13,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:13,665 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:13,744 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:13,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1713 treesize of output 1421 [2024-05-06 18:05:13,846 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:13,856 INFO L85 PathProgramCache]: Analyzing trace with hash -866864495, now seen corresponding path program 6 times [2024-05-06 18:05:13,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:13,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:13,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:13,944 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:13,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:13,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:13,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:14,032 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:14,103 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:14,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 897 treesize of output 749 [2024-05-06 18:05:14,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:14,226 INFO L85 PathProgramCache]: Analyzing trace with hash -1690531356, now seen corresponding path program 7 times [2024-05-06 18:05:14,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:14,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:14,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:14,314 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:14,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:14,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:14,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:14,458 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:14,536 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:14,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 921 treesize of output 773 [2024-05-06 18:05:14,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:14,693 INFO L85 PathProgramCache]: Analyzing trace with hash -1994195917, now seen corresponding path program 8 times [2024-05-06 18:05:14,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:14,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:14,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:14,786 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:14,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:14,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:14,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:14,877 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:14,964 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:14,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2709 treesize of output 2257 [2024-05-06 18:05:15,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:15,123 INFO L85 PathProgramCache]: Analyzing trace with hash -2003991546, now seen corresponding path program 9 times [2024-05-06 18:05:15,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:15,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:15,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:15,213 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:15,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:15,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:15,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:15,302 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:15,469 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:15,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:15,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:17,761 INFO L85 PathProgramCache]: Analyzing trace with hash -1994195263, now seen corresponding path program 10 times [2024-05-06 18:05:17,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:17,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:17,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:17,853 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:17,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:17,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:17,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:17,945 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:18,036 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:18,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1733 treesize of output 1441 [2024-05-06 18:05:18,181 INFO L85 PathProgramCache]: Analyzing trace with hash 343691833, now seen corresponding path program 1 times [2024-05-06 18:05:18,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:18,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:18,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:18,277 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:18,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:18,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:18,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:18,372 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:18,455 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:18,455 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1805 treesize of output 1513 [2024-05-06 18:05:18,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:18,637 INFO L85 PathProgramCache]: Analyzing trace with hash -1790028485, now seen corresponding path program 1 times [2024-05-06 18:05:18,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:18,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:18,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:18,734 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:18,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:18,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:18,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:18,831 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:18,922 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:18,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1359 treesize of output 1131 [2024-05-06 18:05:19,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:19,027 INFO L85 PathProgramCache]: Analyzing trace with hash -57742853, now seen corresponding path program 1 times [2024-05-06 18:05:19,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:19,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:19,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:19,123 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:19,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:19,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:19,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:19,218 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:19,310 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:19,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1717 treesize of output 1425 [2024-05-06 18:05:19,475 INFO L85 PathProgramCache]: Analyzing trace with hash -1802977987, now seen corresponding path program 1 times [2024-05-06 18:05:19,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:19,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:19,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:19,633 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:19,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:19,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:19,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:19,792 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:19,910 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:19,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 3473 treesize of output 2893 [2024-05-06 18:05:20,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:20,137 INFO L85 PathProgramCache]: Analyzing trace with hash -196707906, now seen corresponding path program 11 times [2024-05-06 18:05:20,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:20,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:20,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:20,257 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:20,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:20,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:20,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:20,376 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:20,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:20,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:20,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:20,781 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:22,982 INFO L85 PathProgramCache]: Analyzing trace with hash -2100584750, now seen corresponding path program 12 times [2024-05-06 18:05:22,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:22,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:22,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:23,155 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:23,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:23,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:23,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:23,248 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:23,342 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:23,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1407 treesize of output 1179 [2024-05-06 18:05:23,478 INFO L85 PathProgramCache]: Analyzing trace with hash -1538669778, now seen corresponding path program 13 times [2024-05-06 18:05:23,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:23,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:23,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:23,567 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:23,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:23,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:23,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:23,661 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:23,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:23,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:23,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:23,958 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:26,155 INFO L85 PathProgramCache]: Analyzing trace with hash -454122370, now seen corresponding path program 14 times [2024-05-06 18:05:26,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:26,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:26,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:26,326 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:26,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:26,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:26,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:26,458 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:26,562 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:26,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1717 treesize of output 1425 [2024-05-06 18:05:26,706 INFO L85 PathProgramCache]: Analyzing trace with hash -1192891087, now seen corresponding path program 15 times [2024-05-06 18:05:26,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:26,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:26,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:26,837 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:26,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:26,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:26,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:26,974 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:27,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:27,154 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:27,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:27,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:29,515 INFO L85 PathProgramCache]: Analyzing trace with hash 389733777, now seen corresponding path program 2 times [2024-05-06 18:05:29,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:29,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:29,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:29,654 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:29,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:29,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:29,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:29,735 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:29,841 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:29,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:29,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:30,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:32,181 INFO L85 PathProgramCache]: Analyzing trace with hash 1675139995, now seen corresponding path program 2 times [2024-05-06 18:05:32,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:32,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:32,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:32,265 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:32,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:32,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:32,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:32,348 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:32,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:32,469 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:32,541 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:32,601 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:34,779 INFO L85 PathProgramCache]: Analyzing trace with hash -1192889261, now seen corresponding path program 2 times [2024-05-06 18:05:34,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:34,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:34,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:34,859 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:34,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:34,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:34,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:35,064 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:35,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:35,223 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:35,421 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:37,645 INFO L85 PathProgramCache]: Analyzing trace with hash -454122339, now seen corresponding path program 2 times [2024-05-06 18:05:37,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:37,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:37,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:37,731 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:37,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:37,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:37,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:37,813 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:05:37,920 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:37,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:38,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:38,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:40,384 INFO L85 PathProgramCache]: Analyzing trace with hash -1538669802, now seen corresponding path program 16 times [2024-05-06 18:05:40,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:40,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:40,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:40,489 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:40,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:40,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:40,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:40,700 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:40,777 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:40,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 3433 treesize of output 2853 [2024-05-06 18:05:40,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:40,946 INFO L85 PathProgramCache]: Analyzing trace with hash -465276507, now seen corresponding path program 17 times [2024-05-06 18:05:40,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:40,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:40,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:41,045 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:41,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:41,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:41,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:41,139 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:41,240 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:41,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2651 treesize of output 2183 [2024-05-06 18:05:41,405 INFO L85 PathProgramCache]: Analyzing trace with hash -846292912, now seen corresponding path program 18 times [2024-05-06 18:05:41,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:41,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:41,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:41,502 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:41,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:41,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:41,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:41,666 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:41,770 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:41,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1270 treesize of output 1066 [2024-05-06 18:05:41,966 INFO L85 PathProgramCache]: Analyzing trace with hash -27299769, now seen corresponding path program 19 times [2024-05-06 18:05:41,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:41,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:41,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:42,095 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:42,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:42,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:42,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:42,214 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:42,331 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:42,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1371 treesize of output 1143 [2024-05-06 18:05:42,466 INFO L85 PathProgramCache]: Analyzing trace with hash -693617294, now seen corresponding path program 20 times [2024-05-06 18:05:42,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:42,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:42,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:42,578 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:42,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:42,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:42,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:42,740 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:42,836 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:42,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1360 treesize of output 1124 [2024-05-06 18:05:43,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:43,018 INFO L85 PathProgramCache]: Analyzing trace with hash -1863890867, now seen corresponding path program 2 times [2024-05-06 18:05:43,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:43,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:43,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:43,118 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:43,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:43,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:43,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:43,216 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:43,304 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:43,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 688 treesize of output 572 [2024-05-06 18:05:43,428 INFO L85 PathProgramCache]: Analyzing trace with hash -614314841, now seen corresponding path program 2 times [2024-05-06 18:05:43,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:43,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:43,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:43,528 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:43,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:43,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:43,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:43,718 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:43,808 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:43,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2651 treesize of output 2183 [2024-05-06 18:05:43,963 INFO L85 PathProgramCache]: Analyzing trace with hash 1504204047, now seen corresponding path program 2 times [2024-05-06 18:05:43,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:43,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:43,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:44,059 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:44,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:44,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:44,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:44,156 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:44,259 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:44,259 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1376 treesize of output 1140 [2024-05-06 18:05:44,422 INFO L85 PathProgramCache]: Analyzing trace with hash -1614045271, now seen corresponding path program 2 times [2024-05-06 18:05:44,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:44,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:44,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:44,519 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:44,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:44,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:44,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:44,678 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:44,804 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:44,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2709 treesize of output 2257 [2024-05-06 18:05:44,992 INFO L85 PathProgramCache]: Analyzing trace with hash 86481362, now seen corresponding path program 21 times [2024-05-06 18:05:44,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:44,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:45,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:45,142 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:45,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:45,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:45,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:45,268 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:45,379 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:45,379 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1343 treesize of output 1115 [2024-05-06 18:05:45,530 INFO L85 PathProgramCache]: Analyzing trace with hash -1530108800, now seen corresponding path program 22 times [2024-05-06 18:05:45,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:45,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:45,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:45,653 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:45,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:45,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:45,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:45,857 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:45,959 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:45,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 708 treesize of output 592 [2024-05-06 18:05:46,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:46,124 INFO L85 PathProgramCache]: Analyzing trace with hash -1555725821, now seen corresponding path program 23 times [2024-05-06 18:05:46,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:46,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:46,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:46,232 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:46,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:46,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:46,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:46,337 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:46,436 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:46,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 708 treesize of output 592 [2024-05-06 18:05:46,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:46,591 INFO L85 PathProgramCache]: Analyzing trace with hash 1059020307, now seen corresponding path program 24 times [2024-05-06 18:05:46,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:46,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:46,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:46,696 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:46,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:46,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:46,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:46,845 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:46,950 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:46,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 889 treesize of output 741 [2024-05-06 18:05:47,090 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:47,103 INFO L85 PathProgramCache]: Analyzing trace with hash 311256610, now seen corresponding path program 25 times [2024-05-06 18:05:47,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:47,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:47,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:47,197 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:47,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:47,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:47,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:47,300 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:47,402 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:47,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2709 treesize of output 2257 [2024-05-06 18:05:47,547 INFO L85 PathProgramCache]: Analyzing trace with hash -1236885451, now seen corresponding path program 26 times [2024-05-06 18:05:47,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:47,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:47,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:47,687 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:47,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:47,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:47,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:47,799 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:47,899 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:47,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1359 treesize of output 1131 [2024-05-06 18:05:47,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:48,010 INFO L85 PathProgramCache]: Analyzing trace with hash -1841014844, now seen corresponding path program 27 times [2024-05-06 18:05:48,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:48,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:48,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:48,130 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:48,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:48,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:48,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:48,241 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:48,343 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:48,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1717 treesize of output 1425 [2024-05-06 18:05:48,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:48,487 INFO L85 PathProgramCache]: Analyzing trace with hash 1917846331, now seen corresponding path program 3 times [2024-05-06 18:05:48,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:48,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:48,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:48,686 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:48,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:48,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:48,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:48,805 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:48,909 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:48,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1407 treesize of output 1179 [2024-05-06 18:05:49,078 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:49,095 INFO L85 PathProgramCache]: Analyzing trace with hash -1046512647, now seen corresponding path program 3 times [2024-05-06 18:05:49,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:49,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:49,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:49,214 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:49,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:49,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:49,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:49,336 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:49,437 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:49,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 3433 treesize of output 2853 [2024-05-06 18:05:49,685 INFO L85 PathProgramCache]: Analyzing trace with hash 104788861, now seen corresponding path program 3 times [2024-05-06 18:05:49,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:49,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:49,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:49,792 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:49,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:49,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:49,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:49,899 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:50,025 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:50,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1407 treesize of output 1179 [2024-05-06 18:05:50,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:50,286 INFO L85 PathProgramCache]: Analyzing trace with hash 1943042939, now seen corresponding path program 3 times [2024-05-06 18:05:50,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:50,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:50,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:50,397 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:50,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:50,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:50,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:50,571 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:50,691 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:50,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 708 treesize of output 592 [2024-05-06 18:05:50,887 INFO L85 PathProgramCache]: Analyzing trace with hash 1309604800, now seen corresponding path program 28 times [2024-05-06 18:05:50,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:50,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:50,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:51,029 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:51,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:51,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:51,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:51,158 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:51,262 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:51,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 708 treesize of output 592 [2024-05-06 18:05:51,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:51,406 INFO L85 PathProgramCache]: Analyzing trace with hash -1826089577, now seen corresponding path program 8 times [2024-05-06 18:05:51,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:51,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:51,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:51,494 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:51,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:51,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:51,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:51,595 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:51,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:51,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:51,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:54,177 INFO L85 PathProgramCache]: Analyzing trace with hash -1826089577, now seen corresponding path program 9 times [2024-05-06 18:05:54,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:54,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:54,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:54,315 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:54,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:54,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:54,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:54,417 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:54,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:54,531 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:54,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:54,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:56,833 INFO L85 PathProgramCache]: Analyzing trace with hash -774201520, now seen corresponding path program 15 times [2024-05-06 18:05:56,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:56,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:56,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:56,931 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:56,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:56,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:56,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:57,024 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:57,154 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:57,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:05:57,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:57,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:05:59,548 INFO L85 PathProgramCache]: Analyzing trace with hash 1769557177, now seen corresponding path program 15 times [2024-05-06 18:05:59,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:59,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:59,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:59,698 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:59,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:59,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:59,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:59,790 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:05:59,898 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:05:59,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:06:00,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:02,222 INFO L85 PathProgramCache]: Analyzing trace with hash -978301838, now seen corresponding path program 15 times [2024-05-06 18:06:02,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:02,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:02,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:02,315 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:02,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:02,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:02,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:02,408 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:02,523 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:06:02,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:06:02,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:04,795 INFO L85 PathProgramCache]: Analyzing trace with hash -262585381, now seen corresponding path program 29 times [2024-05-06 18:06:04,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:04,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:04,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:04,884 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:04,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:04,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:04,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:05,060 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:05,167 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:05,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 708 treesize of output 592 [2024-05-06 18:06:05,332 INFO L85 PathProgramCache]: Analyzing trace with hash -654878036, now seen corresponding path program 30 times [2024-05-06 18:06:05,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:05,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:05,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:05,467 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:05,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:05,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:05,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:05,583 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:05,746 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:06:05,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:06:05,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:08,214 INFO L85 PathProgramCache]: Analyzing trace with hash 1173617883, now seen corresponding path program 31 times [2024-05-06 18:06:08,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:08,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:08,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:08,312 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:08,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:08,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:08,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:08,415 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:08,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:06:08,560 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:06:08,640 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:08,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:10,948 INFO L85 PathProgramCache]: Analyzing trace with hash 2022416526, now seen corresponding path program 32 times [2024-05-06 18:06:10,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:10,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:10,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:11,050 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:11,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:11,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:11,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:11,146 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:11,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:06:11,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:06:11,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:13,606 INFO L85 PathProgramCache]: Analyzing trace with hash -1729596611, now seen corresponding path program 33 times [2024-05-06 18:06:13,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:13,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:13,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:13,706 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:13,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:13,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:13,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:13,802 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:13,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:06:13,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:06:14,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:16,253 INFO L85 PathProgramCache]: Analyzing trace with hash -2077886864, now seen corresponding path program 34 times [2024-05-06 18:06:16,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:16,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:16,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:16,443 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:16,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:16,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:16,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:16,566 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 18:06:16,678 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:16,678 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1371 treesize of output 1143 [2024-05-06 18:06:16,823 INFO L85 PathProgramCache]: Analyzing trace with hash 310532104, now seen corresponding path program 35 times [2024-05-06 18:06:16,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:16,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:16,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:16,936 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:06:16,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:16,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:16,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:17,050 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:06:17,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:06:17,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:06:17,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:17,350 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:19,565 INFO L85 PathProgramCache]: Analyzing trace with hash 1036561151, now seen corresponding path program 36 times [2024-05-06 18:06:19,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:19,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:19,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:19,666 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:06:19,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:19,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:19,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:19,846 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:06:19,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:06:19,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:06:20,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:20,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:22,275 INFO L85 PathProgramCache]: Analyzing trace with hash 2068625104, now seen corresponding path program 37 times [2024-05-06 18:06:22,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:22,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:22,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:22,379 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:06:22,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:22,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:22,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:22,489 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:06:22,617 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:06:22,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:06:22,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:24,988 INFO L85 PathProgramCache]: Analyzing trace with hash -297130719, now seen corresponding path program 38 times [2024-05-06 18:06:24,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:24,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:25,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:25,093 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:06:25,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:25,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:25,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:25,295 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:06:25,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:06:25,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:06:25,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:27,864 INFO L85 PathProgramCache]: Analyzing trace with hash -621117198, now seen corresponding path program 39 times [2024-05-06 18:06:27,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:27,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:27,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:27,975 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:06:27,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:27,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:27,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:28,084 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:06:28,217 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:06:28,230 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:06:28,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:28,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:30,528 INFO L85 PathProgramCache]: Analyzing trace with hash -2074763453, now seen corresponding path program 40 times [2024-05-06 18:06:30,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:30,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:30,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:30,629 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:06:30,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:30,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:30,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:30,731 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:06:30,811 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:30,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1713 treesize of output 1421 [2024-05-06 18:06:31,007 INFO L85 PathProgramCache]: Analyzing trace with hash -977563273, now seen corresponding path program 4 times [2024-05-06 18:06:31,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:31,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:31,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:31,108 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:06:31,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:31,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:31,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:31,208 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:06:31,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 42 [2024-05-06 18:06:31,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 96 [2024-05-06 18:06:31,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:33,712 INFO L85 PathProgramCache]: Analyzing trace with hash -239689872, now seen corresponding path program 5 times [2024-05-06 18:06:33,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:33,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:33,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:33,824 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:06:33,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:33,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:33,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:33,942 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:06:34,043 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:34,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2709 treesize of output 2257 [2024-05-06 18:06:34,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:34,147 INFO L85 PathProgramCache]: Analyzing trace with hash 1797823006, now seen corresponding path program 6 times [2024-05-06 18:06:34,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:34,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:34,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:34,354 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:34,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:34,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:34,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:34,503 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:34,608 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:34,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1717 treesize of output 1425 [2024-05-06 18:06:34,782 INFO L85 PathProgramCache]: Analyzing trace with hash 528884893, now seen corresponding path program 1 times [2024-05-06 18:06:34,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:34,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:34,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:34,927 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:34,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:34,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:34,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:35,076 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:35,183 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:35,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1805 treesize of output 1513 [2024-05-06 18:06:35,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:35,370 INFO L85 PathProgramCache]: Analyzing trace with hash 709797450, now seen corresponding path program 1 times [2024-05-06 18:06:35,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:35,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:35,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:35,602 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:35,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:35,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:35,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:35,727 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:35,830 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:35,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2709 treesize of output 2257 [2024-05-06 18:06:35,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:35,993 INFO L85 PathProgramCache]: Analyzing trace with hash -1362576641, now seen corresponding path program 1 times [2024-05-06 18:06:35,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:35,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:36,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:36,113 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:36,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:36,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:36,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:36,236 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:36,345 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:36,346 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 3385 treesize of output 2805 [2024-05-06 18:06:36,516 INFO L85 PathProgramCache]: Analyzing trace with hash -1290880084, now seen corresponding path program 1 times [2024-05-06 18:06:36,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:36,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:36,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:36,735 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:36,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:36,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:36,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:36,857 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:36,956 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:36,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2581 treesize of output 2129 [2024-05-06 18:06:37,048 INFO L85 PathProgramCache]: Analyzing trace with hash 1759474018, now seen corresponding path program 7 times [2024-05-06 18:06:37,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:37,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:37,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:37,162 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:37,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:37,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:37,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:37,287 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:37,371 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:37,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1352 treesize of output 1116 [2024-05-06 18:06:37,521 INFO L85 PathProgramCache]: Analyzing trace with hash 1131071937, now seen corresponding path program 8 times [2024-05-06 18:06:37,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:37,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:37,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:37,708 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:37,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:37,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:37,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:37,845 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:37,958 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:37,958 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1717 treesize of output 1425 [2024-05-06 18:06:38,096 INFO L85 PathProgramCache]: Analyzing trace with hash 799749693, now seen corresponding path program 4 times [2024-05-06 18:06:38,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:38,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:38,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:38,225 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:06:38,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:38,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:38,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:38,357 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:06:40,198 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:40,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:06:40,368 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:40,454 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:40,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:42,727 INFO L85 PathProgramCache]: Analyzing trace with hash -1356822337, now seen corresponding path program 1 times [2024-05-06 18:06:42,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:42,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:42,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:42,742 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:06:42,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:42,875 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:42,876 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:06:43,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:45,250 INFO L85 PathProgramCache]: Analyzing trace with hash 973800790, now seen corresponding path program 1 times [2024-05-06 18:06:45,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:45,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:45,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:45,268 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:06:45,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:45,408 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:45,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:06:45,541 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:45,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:45,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:47,804 INFO L85 PathProgramCache]: Analyzing trace with hash -2002054844, now seen corresponding path program 1 times [2024-05-06 18:06:47,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:47,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:47,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:47,822 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:06:47,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:47,964 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:47,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:06:48,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:50,466 INFO L85 PathProgramCache]: Analyzing trace with hash -2004245100, now seen corresponding path program 1 times [2024-05-06 18:06:50,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:50,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:50,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:50,484 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:06:50,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:50,639 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:50,639 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:06:50,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:53,207 INFO L85 PathProgramCache]: Analyzing trace with hash -480295098, now seen corresponding path program 1 times [2024-05-06 18:06:53,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:53,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:53,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:53,249 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:06:53,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:53,508 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:53,508 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:06:53,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:53,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:53,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:55,942 INFO L85 PathProgramCache]: Analyzing trace with hash 123053910, now seen corresponding path program 2 times [2024-05-06 18:06:55,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:55,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:55,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:55,963 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:06:55,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:56,129 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:56,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:06:56,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:56,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:06:58,451 INFO L85 PathProgramCache]: Analyzing trace with hash -480295591, now seen corresponding path program 3 times [2024-05-06 18:06:58,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:58,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:58,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:58,469 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:06:58,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:06:58,663 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:58,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:06:58,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:01,029 INFO L85 PathProgramCache]: Analyzing trace with hash -2001100540, now seen corresponding path program 1 times [2024-05-06 18:07:01,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:01,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:01,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:01,255 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:01,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:01,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:01,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:01,407 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:01,519 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:01,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:01,781 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:03,896 INFO L85 PathProgramCache]: Analyzing trace with hash -2004214317, now seen corresponding path program 1 times [2024-05-06 18:07:03,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:03,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:03,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:03,954 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:03,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:03,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:03,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:04,005 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:04,132 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:04,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:04,409 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:06,539 INFO L85 PathProgramCache]: Analyzing trace with hash -480294106, now seen corresponding path program 1 times [2024-05-06 18:07:06,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:06,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:06,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:06,590 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:06,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:06,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:06,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:06,641 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:06,990 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:06,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:07,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:09,577 INFO L85 PathProgramCache]: Analyzing trace with hash 123053941, now seen corresponding path program 1 times [2024-05-06 18:07:09,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:09,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:09,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:09,626 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:09,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:09,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:09,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:09,675 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:09,802 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:09,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:09,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:10,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:10,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:12,289 INFO L85 PathProgramCache]: Analyzing trace with hash 973800777, now seen corresponding path program 1 times [2024-05-06 18:07:12,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:12,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:12,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:12,307 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:07:12,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:12,470 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:12,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:12,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:12,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:14,741 INFO L85 PathProgramCache]: Analyzing trace with hash -1492607737, now seen corresponding path program 1 times [2024-05-06 18:07:14,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:14,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:14,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:14,758 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:07:14,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:14,976 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:14,976 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:15,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:15,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:17,322 INFO L85 PathProgramCache]: Analyzing trace with hash -1156527304, now seen corresponding path program 1 times [2024-05-06 18:07:17,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:17,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:17,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:17,339 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:07:17,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:17,481 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:17,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:17,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:17,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:19,757 INFO L85 PathProgramCache]: Analyzing trace with hash 1763807977, now seen corresponding path program 1 times [2024-05-06 18:07:19,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:19,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:19,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:19,774 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:07:19,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:19,911 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:19,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:20,028 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:20,089 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:22,240 INFO L85 PathProgramCache]: Analyzing trace with hash 888181018, now seen corresponding path program 1 times [2024-05-06 18:07:22,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:22,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:22,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:22,257 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:07:22,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:22,420 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:22,421 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:22,591 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:22,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:22,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:24,972 INFO L85 PathProgramCache]: Analyzing trace with hash 1763808290, now seen corresponding path program 1 times [2024-05-06 18:07:24,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:24,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:24,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:24,990 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:07:24,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:25,170 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:25,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:25,280 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:25,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:27,491 INFO L85 PathProgramCache]: Analyzing trace with hash -1491653433, now seen corresponding path program 1 times [2024-05-06 18:07:27,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:27,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:27,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:27,602 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:27,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:27,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:27,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:27,648 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:27,765 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:27,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:27,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:27,920 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:30,030 INFO L85 PathProgramCache]: Analyzing trace with hash -1156496521, now seen corresponding path program 1 times [2024-05-06 18:07:30,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:30,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:30,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:30,079 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:30,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:30,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:30,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:30,127 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:30,363 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:30,380 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:30,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:30,552 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:32,653 INFO L85 PathProgramCache]: Analyzing trace with hash 1763808969, now seen corresponding path program 1 times [2024-05-06 18:07:32,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:32,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:32,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:32,701 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:32,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:32,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:32,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:32,762 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:32,901 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:32,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:33,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:33,090 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:35,227 INFO L85 PathProgramCache]: Analyzing trace with hash 888181049, now seen corresponding path program 1 times [2024-05-06 18:07:35,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:35,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:35,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:35,277 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:35,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:35,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:35,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:35,329 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:07:35,460 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:35,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:35,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:35,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:37,784 INFO L85 PathProgramCache]: Analyzing trace with hash -1356822324, now seen corresponding path program 1 times [2024-05-06 18:07:37,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:37,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:37,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:37,870 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:07:37,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:38,416 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:38,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:38,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:38,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:38,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:40,957 INFO L85 PathProgramCache]: Analyzing trace with hash -901649271, now seen corresponding path program 1 times [2024-05-06 18:07:40,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:40,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:40,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:40,975 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:07:40,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:41,545 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:41,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 203 treesize of output 151 [2024-05-06 18:07:41,683 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:41,786 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:41,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:44,030 INFO L85 PathProgramCache]: Analyzing trace with hash -1024590080, now seen corresponding path program 1 times [2024-05-06 18:07:44,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:44,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:44,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:44,047 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:07:44,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:44,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 22 [2024-05-06 18:07:44,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:44,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:44,330 INFO L85 PathProgramCache]: Analyzing trace with hash 574671106, now seen corresponding path program 1 times [2024-05-06 18:07:44,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:44,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:44,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:44,347 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:07:44,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:07:44,540 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:44,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:07:44,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:07:46,863 INFO L85 PathProgramCache]: Analyzing trace with hash 327685670, now seen corresponding path program 4 times [2024-05-06 18:07:46,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:46,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:46,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:47,129 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:07:47,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:47,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:47,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:47,442 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:07:47,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:07:47,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-06 18:07:47,527 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-05-06 18:07:47,728 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable550,SelfDestructingSolverStorable306,SelfDestructingSolverStorable427,SelfDestructingSolverStorable548,SelfDestructingSolverStorable307,SelfDestructingSolverStorable428,SelfDestructingSolverStorable549,SelfDestructingSolverStorable308,SelfDestructingSolverStorable429,SelfDestructingSolverStorable309,SelfDestructingSolverStorable302,SelfDestructingSolverStorable423,SelfDestructingSolverStorable544,SelfDestructingSolverStorable303,SelfDestructingSolverStorable424,SelfDestructingSolverStorable545,SelfDestructingSolverStorable304,SelfDestructingSolverStorable425,SelfDestructingSolverStorable546,SelfDestructingSolverStorable305,SelfDestructingSolverStorable426,SelfDestructingSolverStorable547,SelfDestructingSolverStorable540,SelfDestructingSolverStorable420,SelfDestructingSolverStorable541,SelfDestructingSolverStorable300,SelfDestructingSolverStorable421,SelfDestructingSolverStorable542,SelfDestructingSolverStorable301,SelfDestructingSolverStorable422,SelfDestructingSolverStorable543,SelfDestructingSolverStorable416,SelfDestructingSolverStorable537,SelfDestructingSolverStorable417,SelfDestructingSolverStorable538,SelfDestructingSolverStorable418,SelfDestructingSolverStorable539,SelfDestructingSolverStorable419,SelfDestructingSolverStorable412,SelfDestructingSolverStorable533,SelfDestructingSolverStorable413,SelfDestructingSolverStorable534,SelfDestructingSolverStorable414,SelfDestructingSolverStorable535,SelfDestructingSolverStorable415,SelfDestructingSolverStorable536,SelfDestructingSolverStorable530,SelfDestructingSolverStorable410,SelfDestructingSolverStorable531,SelfDestructingSolverStorable411,SelfDestructingSolverStorable532,SelfDestructingSolverStorable570,SelfDestructingSolverStorable450,SelfDestructingSolverStorable571,SelfDestructingSolverStorable330,SelfDestructingSolverStorable451,SelfDestructingSolverStorable572,SelfDestructingSolverStorable207,SelfDestructingSolverStorable328,SelfDestructingSolverStorable449,SelfDestructingSolverStorable208,SelfDestructingSolverStorable329,SelfDestructingSolverStorable209,SelfDestructingSolverStorable203,SelfDestructingSolverStorable324,SelfDestructingSolverStorable445,SelfDestructingSolverStorable566,SelfDestructingSolverStorable204,SelfDestructingSolverStorable325,SelfDestructingSolverStorable446,SelfDestructingSolverStorable567,SelfDestructingSolverStorable205,SelfDestructingSolverStorable326,SelfDestructingSolverStorable447,SelfDestructingSolverStorable568,SelfDestructingSolverStorable206,SelfDestructingSolverStorable327,SelfDestructingSolverStorable448,SelfDestructingSolverStorable569,SelfDestructingSolverStorable320,SelfDestructingSolverStorable441,SelfDestructingSolverStorable562,SelfDestructingSolverStorable200,SelfDestructingSolverStorable321,SelfDestructingSolverStorable442,SelfDestructingSolverStorable563,SelfDestructingSolverStorable201,SelfDestructingSolverStorable322,SelfDestructingSolverStorable443,SelfDestructingSolverStorable564,SelfDestructingSolverStorable202,SelfDestructingSolverStorable323,SelfDestructingSolverStorable444,SelfDestructingSolverStorable565,SelfDestructingSolverStorable560,SelfDestructingSolverStorable440,SelfDestructingSolverStorable561,SelfDestructingSolverStorable317,SelfDestructingSolverStorable438,SelfDestructingSolverStorable559,SelfDestructingSolverStorable318,SelfDestructingSolverStorable439,SelfDestructingSolverStorable319,SelfDestructingSolverStorable313,SelfDestructingSolverStorable434,SelfDestructingSolverStorable555,SelfDestructingSolverStorable314,SelfDestructingSolverStorable435,SelfDestructingSolverStorable556,SelfDestructingSolverStorable315,SelfDestructingSolverStorable436,SelfDestructingSolverStorable557,SelfDestructingSolverStorable316,SelfDestructingSolverStorable437,SelfDestructingSolverStorable558,SelfDestructingSolverStorable430,SelfDestructingSolverStorable551,SelfDestructingSolverStorable310,SelfDestructingSolverStorable431,SelfDestructingSolverStorable552,SelfDestructingSolverStorable311,SelfDestructingSolverStorable432,SelfDestructingSolverStorable553,SelfDestructingSolverStorable312,SelfDestructingSolverStorable433,SelfDestructingSolverStorable554,SelfDestructingSolverStorable508,SelfDestructingSolverStorable629,SelfDestructingSolverStorable509,SelfDestructingSolverStorable504,SelfDestructingSolverStorable625,SelfDestructingSolverStorable505,SelfDestructingSolverStorable626,SelfDestructingSolverStorable506,SelfDestructingSolverStorable627,SelfDestructingSolverStorable507,SelfDestructingSolverStorable628,SelfDestructingSolverStorable500,SelfDestructingSolverStorable621,SelfDestructingSolverStorable501,SelfDestructingSolverStorable622,SelfDestructingSolverStorable502,SelfDestructingSolverStorable623,SelfDestructingSolverStorable503,SelfDestructingSolverStorable624,SelfDestructingSolverStorable620,SelfDestructingSolverStorable618,SelfDestructingSolverStorable619,SelfDestructingSolverStorable614,SelfDestructingSolverStorable615,SelfDestructingSolverStorable616,SelfDestructingSolverStorable617,SelfDestructingSolverStorable610,SelfDestructingSolverStorable611,SelfDestructingSolverStorable612,SelfDestructingSolverStorable613,SelfDestructingSolverStorable409,SelfDestructingSolverStorable405,SelfDestructingSolverStorable526,SelfDestructingSolverStorable406,SelfDestructingSolverStorable527,SelfDestructingSolverStorable407,SelfDestructingSolverStorable528,SelfDestructingSolverStorable408,SelfDestructingSolverStorable529,SelfDestructingSolverStorable401,SelfDestructingSolverStorable522,SelfDestructingSolverStorable643,SelfDestructingSolverStorable402,SelfDestructingSolverStorable523,SelfDestructingSolverStorable403,SelfDestructingSolverStorable524,SelfDestructingSolverStorable404,SelfDestructingSolverStorable525,SelfDestructingSolverStorable640,SelfDestructingSolverStorable520,SelfDestructingSolverStorable641,SelfDestructingSolverStorable400,SelfDestructingSolverStorable521,SelfDestructingSolverStorable642,SelfDestructingSolverStorable519,SelfDestructingSolverStorable515,SelfDestructingSolverStorable636,SelfDestructingSolverStorable516,SelfDestructingSolverStorable637,SelfDestructingSolverStorable517,SelfDestructingSolverStorable638,SelfDestructingSolverStorable518,SelfDestructingSolverStorable639,SelfDestructingSolverStorable511,SelfDestructingSolverStorable632,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable512,SelfDestructingSolverStorable633,SelfDestructingSolverStorable513,SelfDestructingSolverStorable634,SelfDestructingSolverStorable514,SelfDestructingSolverStorable635,SelfDestructingSolverStorable630,SelfDestructingSolverStorable510,SelfDestructingSolverStorable631,SelfDestructingSolverStorable607,SelfDestructingSolverStorable608,SelfDestructingSolverStorable609,SelfDestructingSolverStorable603,SelfDestructingSolverStorable604,SelfDestructingSolverStorable605,SelfDestructingSolverStorable606,SelfDestructingSolverStorable600,SelfDestructingSolverStorable601,SelfDestructingSolverStorable602,SelfDestructingSolverStorable195,SelfDestructingSolverStorable196,SelfDestructingSolverStorable197,SelfDestructingSolverStorable198,SelfDestructingSolverStorable191,SelfDestructingSolverStorable192,SelfDestructingSolverStorable193,SelfDestructingSolverStorable194,SelfDestructingSolverStorable190,SelfDestructingSolverStorable188,SelfDestructingSolverStorable189,SelfDestructingSolverStorable184,SelfDestructingSolverStorable185,SelfDestructingSolverStorable186,SelfDestructingSolverStorable187,SelfDestructingSolverStorable180,SelfDestructingSolverStorable181,SelfDestructingSolverStorable182,SelfDestructingSolverStorable183,SelfDestructingSolverStorable177,SelfDestructingSolverStorable298,SelfDestructingSolverStorable178,SelfDestructingSolverStorable299,SelfDestructingSolverStorable179,SelfDestructingSolverStorable199,SelfDestructingSolverStorable151,SelfDestructingSolverStorable272,SelfDestructingSolverStorable393,SelfDestructingSolverStorable152,SelfDestructingSolverStorable273,SelfDestructingSolverStorable394,SelfDestructingSolverStorable153,SelfDestructingSolverStorable274,SelfDestructingSolverStorable395,SelfDestructingSolverStorable154,SelfDestructingSolverStorable275,SelfDestructingSolverStorable396,SelfDestructingSolverStorable390,SelfDestructingSolverStorable270,SelfDestructingSolverStorable391,SelfDestructingSolverStorable150,SelfDestructingSolverStorable271,SelfDestructingSolverStorable392,SelfDestructingSolverStorable148,SelfDestructingSolverStorable269,SelfDestructingSolverStorable149,SelfDestructingSolverStorable144,SelfDestructingSolverStorable265,SelfDestructingSolverStorable386,SelfDestructingSolverStorable145,SelfDestructingSolverStorable266,SelfDestructingSolverStorable387,SelfDestructingSolverStorable146,SelfDestructingSolverStorable267,SelfDestructingSolverStorable388,SelfDestructingSolverStorable147,SelfDestructingSolverStorable268,SelfDestructingSolverStorable389,SelfDestructingSolverStorable140,SelfDestructingSolverStorable261,SelfDestructingSolverStorable382,SelfDestructingSolverStorable141,SelfDestructingSolverStorable262,SelfDestructingSolverStorable383,SelfDestructingSolverStorable142,SelfDestructingSolverStorable263,SelfDestructingSolverStorable384,SelfDestructingSolverStorable143,SelfDestructingSolverStorable264,SelfDestructingSolverStorable385,SelfDestructingSolverStorable380,SelfDestructingSolverStorable260,SelfDestructingSolverStorable381,SelfDestructingSolverStorable137,SelfDestructingSolverStorable258,SelfDestructingSolverStorable379,SelfDestructingSolverStorable138,SelfDestructingSolverStorable259,SelfDestructingSolverStorable139,SelfDestructingSolverStorable133,SelfDestructingSolverStorable254,SelfDestructingSolverStorable375,SelfDestructingSolverStorable496,SelfDestructingSolverStorable134,SelfDestructingSolverStorable255,SelfDestructingSolverStorable376,SelfDestructingSolverStorable497,SelfDestructingSolverStorable135,SelfDestructingSolverStorable256,SelfDestructingSolverStorable377,SelfDestructingSolverStorable498,SelfDestructingSolverStorable136,SelfDestructingSolverStorable257,SelfDestructingSolverStorable378,SelfDestructingSolverStorable499,SelfDestructingSolverStorable173,SelfDestructingSolverStorable294,SelfDestructingSolverStorable174,SelfDestructingSolverStorable295,SelfDestructingSolverStorable175,SelfDestructingSolverStorable296,SelfDestructingSolverStorable176,SelfDestructingSolverStorable297,SelfDestructingSolverStorable290,SelfDestructingSolverStorable170,SelfDestructingSolverStorable291,SelfDestructingSolverStorable171,SelfDestructingSolverStorable292,SelfDestructingSolverStorable172,SelfDestructingSolverStorable293,SelfDestructingSolverStorable166,SelfDestructingSolverStorable287,SelfDestructingSolverStorable167,SelfDestructingSolverStorable288,SelfDestructingSolverStorable168,SelfDestructingSolverStorable289,SelfDestructingSolverStorable169,SelfDestructingSolverStorable162,SelfDestructingSolverStorable283,SelfDestructingSolverStorable163,SelfDestructingSolverStorable284,SelfDestructingSolverStorable164,SelfDestructingSolverStorable285,SelfDestructingSolverStorable165,SelfDestructingSolverStorable286,SelfDestructingSolverStorable280,SelfDestructingSolverStorable160,SelfDestructingSolverStorable281,SelfDestructingSolverStorable161,SelfDestructingSolverStorable282,SelfDestructingSolverStorable159,SelfDestructingSolverStorable155,SelfDestructingSolverStorable276,SelfDestructingSolverStorable397,SelfDestructingSolverStorable156,SelfDestructingSolverStorable277,SelfDestructingSolverStorable398,SelfDestructingSolverStorable157,SelfDestructingSolverStorable278,SelfDestructingSolverStorable399,SelfDestructingSolverStorable158,SelfDestructingSolverStorable279,SelfDestructingSolverStorable470,SelfDestructingSolverStorable591,SelfDestructingSolverStorable350,SelfDestructingSolverStorable471,SelfDestructingSolverStorable592,SelfDestructingSolverStorable230,SelfDestructingSolverStorable351,SelfDestructingSolverStorable472,SelfDestructingSolverStorable593,SelfDestructingSolverStorable231,SelfDestructingSolverStorable352,SelfDestructingSolverStorable473,SelfDestructingSolverStorable594,SelfDestructingSolverStorable590,SelfDestructingSolverStorable229,SelfDestructingSolverStorable225,SelfDestructingSolverStorable346,SelfDestructingSolverStorable467,SelfDestructingSolverStorable588,SelfDestructingSolverStorable226,SelfDestructingSolverStorable347,SelfDestructingSolverStorable468,SelfDestructingSolverStorable589,SelfDestructingSolverStorable227,SelfDestructingSolverStorable348,SelfDestructingSolverStorable469,SelfDestructingSolverStorable228,SelfDestructingSolverStorable349,SelfDestructingSolverStorable221,SelfDestructingSolverStorable342,SelfDestructingSolverStorable463,SelfDestructingSolverStorable584,SelfDestructingSolverStorable222,SelfDestructingSolverStorable343,SelfDestructingSolverStorable464,SelfDestructingSolverStorable585,SelfDestructingSolverStorable223,SelfDestructingSolverStorable344,SelfDestructingSolverStorable465,SelfDestructingSolverStorable586,SelfDestructingSolverStorable224,SelfDestructingSolverStorable345,SelfDestructingSolverStorable466,SelfDestructingSolverStorable587,SelfDestructingSolverStorable580,SelfDestructingSolverStorable460,SelfDestructingSolverStorable581,SelfDestructingSolverStorable340,SelfDestructingSolverStorable461,SelfDestructingSolverStorable582,SelfDestructingSolverStorable220,SelfDestructingSolverStorable341,SelfDestructingSolverStorable462,SelfDestructingSolverStorable583,SelfDestructingSolverStorable218,SelfDestructingSolverStorable339,SelfDestructingSolverStorable219,SelfDestructingSolverStorable214,SelfDestructingSolverStorable335,SelfDestructingSolverStorable456,SelfDestructingSolverStorable577,SelfDestructingSolverStorable215,SelfDestructingSolverStorable336,SelfDestructingSolverStorable457,SelfDestructingSolverStorable578,SelfDestructingSolverStorable216,SelfDestructingSolverStorable337,SelfDestructingSolverStorable458,SelfDestructingSolverStorable579,SelfDestructingSolverStorable217,SelfDestructingSolverStorable338,SelfDestructingSolverStorable459,SelfDestructingSolverStorable210,SelfDestructingSolverStorable331,SelfDestructingSolverStorable452,SelfDestructingSolverStorable573,SelfDestructingSolverStorable211,SelfDestructingSolverStorable332,SelfDestructingSolverStorable453,SelfDestructingSolverStorable574,SelfDestructingSolverStorable212,SelfDestructingSolverStorable333,SelfDestructingSolverStorable454,SelfDestructingSolverStorable575,SelfDestructingSolverStorable213,SelfDestructingSolverStorable334,SelfDestructingSolverStorable455,SelfDestructingSolverStorable576,SelfDestructingSolverStorable250,SelfDestructingSolverStorable371,SelfDestructingSolverStorable492,SelfDestructingSolverStorable130,SelfDestructingSolverStorable251,SelfDestructingSolverStorable372,SelfDestructingSolverStorable493,SelfDestructingSolverStorable131,SelfDestructingSolverStorable252,SelfDestructingSolverStorable373,SelfDestructingSolverStorable494,SelfDestructingSolverStorable132,SelfDestructingSolverStorable253,SelfDestructingSolverStorable374,SelfDestructingSolverStorable495,SelfDestructingSolverStorable490,SelfDestructingSolverStorable370,SelfDestructingSolverStorable491,SelfDestructingSolverStorable126,SelfDestructingSolverStorable247,SelfDestructingSolverStorable368,SelfDestructingSolverStorable489,SelfDestructingSolverStorable127,SelfDestructingSolverStorable248,SelfDestructingSolverStorable369,SelfDestructingSolverStorable128,SelfDestructingSolverStorable249,SelfDestructingSolverStorable129,SelfDestructingSolverStorable243,SelfDestructingSolverStorable364,SelfDestructingSolverStorable485,SelfDestructingSolverStorable244,SelfDestructingSolverStorable365,SelfDestructingSolverStorable486,SelfDestructingSolverStorable245,SelfDestructingSolverStorable366,SelfDestructingSolverStorable487,SelfDestructingSolverStorable125,SelfDestructingSolverStorable246,SelfDestructingSolverStorable367,SelfDestructingSolverStorable488,SelfDestructingSolverStorable360,SelfDestructingSolverStorable481,SelfDestructingSolverStorable240,SelfDestructingSolverStorable361,SelfDestructingSolverStorable482,SelfDestructingSolverStorable241,SelfDestructingSolverStorable362,SelfDestructingSolverStorable483,SelfDestructingSolverStorable242,SelfDestructingSolverStorable363,SelfDestructingSolverStorable484,SelfDestructingSolverStorable480,SelfDestructingSolverStorable236,SelfDestructingSolverStorable357,SelfDestructingSolverStorable478,SelfDestructingSolverStorable599,SelfDestructingSolverStorable237,SelfDestructingSolverStorable358,SelfDestructingSolverStorable479,SelfDestructingSolverStorable238,SelfDestructingSolverStorable359,SelfDestructingSolverStorable239,SelfDestructingSolverStorable232,SelfDestructingSolverStorable353,SelfDestructingSolverStorable474,SelfDestructingSolverStorable595,SelfDestructingSolverStorable233,SelfDestructingSolverStorable354,SelfDestructingSolverStorable475,SelfDestructingSolverStorable596,SelfDestructingSolverStorable234,SelfDestructingSolverStorable355,SelfDestructingSolverStorable476,SelfDestructingSolverStorable597,SelfDestructingSolverStorable235,SelfDestructingSolverStorable356,SelfDestructingSolverStorable477,SelfDestructingSolverStorable598 [2024-05-06 18:07:47,728 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:07:47,728 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:07:47,729 INFO L85 PathProgramCache]: Analyzing trace with hash -985301737, now seen corresponding path program 3 times [2024-05-06 18:07:47,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:07:47,729 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859833270] [2024-05-06 18:07:47,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:47,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:47,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:47,969 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 58 proven. 15 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-05-06 18:07:47,970 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:07:47,970 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1859833270] [2024-05-06 18:07:47,970 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1859833270] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:07:47,970 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [426089769] [2024-05-06 18:07:47,970 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-06 18:07:47,970 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:07:47,970 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:07:47,971 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:07:47,973 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-05-06 18:07:48,984 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2024-05-06 18:07:48,984 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:07:48,992 INFO L262 TraceCheckSpWp]: Trace formula consists of 317 conjuncts, 34 conjunts are in the unsatisfiable core [2024-05-06 18:07:48,997 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:07:49,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2024-05-06 18:07:49,045 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 18:07:49,045 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 13 [2024-05-06 18:07:49,091 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 18:07:49,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 18:07:49,323 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:07:49,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2024-05-06 18:07:49,649 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-05-06 18:07:49,700 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:07:49,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-05-06 18:07:49,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-05-06 18:07:49,880 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2024-05-06 18:07:49,880 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 18:07:49,880 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [426089769] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 18:07:49,880 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 18:07:49,880 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [15] total 32 [2024-05-06 18:07:49,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203947797] [2024-05-06 18:07:49,881 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 18:07:49,882 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2024-05-06 18:07:49,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:07:49,882 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-05-06 18:07:49,883 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=915, Unknown=0, NotChecked=0, Total=992 [2024-05-06 18:07:49,883 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:07:49,883 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:07:49,883 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 7.631578947368421) internal successors, (145), 19 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:07:49,883 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:07:49,883 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 23 states. [2024-05-06 18:07:49,883 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:08:01,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 22 [2024-05-06 18:08:01,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:08:01,452 INFO L85 PathProgramCache]: Analyzing trace with hash -1273123721, now seen corresponding path program 1 times [2024-05-06 18:08:01,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:01,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:01,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:08:01,468 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:08:01,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:08:01,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 5 [2024-05-06 18:08:01,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 18:08:01,988 INFO L85 PathProgramCache]: Analyzing trace with hash 593795578, now seen corresponding path program 1 times [2024-05-06 18:08:01,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:01,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:02,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:02,224 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:02,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:02,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:02,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:02,300 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:02,300 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-06 18:08:02,303 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=438, Invalid=15312, Unknown=0, NotChecked=0, Total=15750 [2024-05-06 18:08:13,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 22 [2024-05-06 18:08:13,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:08:13,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:08:13,727 INFO L85 PathProgramCache]: Analyzing trace with hash -1273123721, now seen corresponding path program 2 times [2024-05-06 18:08:13,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:13,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:13,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:08:13,744 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:08:13,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:08:14,179 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:08:14,179 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-06 18:08:14,180 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 18:08:14,188 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-05-06 18:08:14,380 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable647,SelfDestructingSolverStorable648,SelfDestructingSolverStorable644,SelfDestructingSolverStorable645,SelfDestructingSolverStorable646,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:08:14,380 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:08:14,381 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:08:14,381 INFO L85 PathProgramCache]: Analyzing trace with hash -536145224, now seen corresponding path program 4 times [2024-05-06 18:08:14,381 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:08:14,381 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1986182568] [2024-05-06 18:08:14,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:14,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:14,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:14,711 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 46 proven. 17 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:08:14,711 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:08:14,711 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1986182568] [2024-05-06 18:08:14,711 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1986182568] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:08:14,712 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [649803105] [2024-05-06 18:08:14,712 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-05-06 18:08:14,712 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:08:14,712 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:08:14,713 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:08:14,757 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-05-06 18:08:15,709 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-05-06 18:08:15,710 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:08:15,711 INFO L262 TraceCheckSpWp]: Trace formula consists of 343 conjuncts, 14 conjunts are in the unsatisfiable core [2024-05-06 18:08:15,713 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:08:16,090 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 57 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 18:08:16,090 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:08:16,488 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 57 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 18:08:16,488 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [649803105] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:08:16,488 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:08:16,489 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 15, 15] total 36 [2024-05-06 18:08:16,489 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [414211393] [2024-05-06 18:08:16,489 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:08:16,489 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2024-05-06 18:08:16,489 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:08:16,490 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2024-05-06 18:08:16,490 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=1093, Unknown=0, NotChecked=0, Total=1260 [2024-05-06 18:08:16,490 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:08:16,490 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:08:16,491 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 10.13888888888889) internal successors, (365), 36 states have internal predecessors, (365), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:08:16,491 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:08:16,491 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 23 states. [2024-05-06 18:08:16,491 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 18:08:16,491 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:08:34,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 22 [2024-05-06 18:08:34,453 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 18:08:34,552 INFO L85 PathProgramCache]: Analyzing trace with hash -1446018677, now seen corresponding path program 3 times [2024-05-06 18:08:34,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:34,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:34,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:08:34,570 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:08:34,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:08:34,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:08:34,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-06 18:08:34,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-06 18:08:34,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:08:34,718 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-05-06 18:08:34,909 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable649,SelfDestructingSolverStorable650 [2024-05-06 18:08:34,910 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:08:34,911 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:08:34,911 INFO L85 PathProgramCache]: Analyzing trace with hash -1146515239, now seen corresponding path program 5 times [2024-05-06 18:08:34,911 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:08:34,911 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1341127109] [2024-05-06 18:08:34,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:34,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:34,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:35,146 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 29 proven. 72 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 18:08:35,146 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:08:35,146 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1341127109] [2024-05-06 18:08:35,147 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1341127109] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:08:35,147 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [439390491] [2024-05-06 18:08:35,147 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-05-06 18:08:35,147 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:08:35,147 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:08:35,148 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:08:35,150 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-05-06 18:08:35,948 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2024-05-06 18:08:35,949 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:08:35,951 INFO L262 TraceCheckSpWp]: Trace formula consists of 442 conjuncts, 14 conjunts are in the unsatisfiable core [2024-05-06 18:08:35,953 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:08:36,286 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 35 proven. 40 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 18:08:36,286 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:08:36,459 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 20 proven. 18 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-05-06 18:08:36,459 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [439390491] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:08:36,459 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:08:36,459 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 8] total 34 [2024-05-06 18:08:36,459 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1071093949] [2024-05-06 18:08:36,459 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:08:36,460 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2024-05-06 18:08:36,460 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:08:36,460 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2024-05-06 18:08:36,461 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=1005, Unknown=0, NotChecked=0, Total=1122 [2024-05-06 18:08:36,461 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:08:36,461 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:08:36,461 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 10.529411764705882) internal successors, (358), 34 states have internal predecessors, (358), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:08:36,461 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:08:36,461 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 23 states. [2024-05-06 18:08:36,461 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-05-06 18:08:36,461 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:08:36,461 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. Received shutdown request... [2024-05-06 18:09:12,797 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-05-06 18:09:12,813 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 18:09:12,813 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 18:09:12,813 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 18:09:12,991 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable651 [2024-05-06 18:09:12,992 WARN L619 AbstractCegarLoop]: Verification canceled: while executing DepthFirstTraversal. [2024-05-06 18:09:12,994 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (4 of 5 remaining) [2024-05-06 18:09:12,994 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 5 remaining) [2024-05-06 18:09:12,994 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 5 remaining) [2024-05-06 18:09:12,994 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 5 remaining) [2024-05-06 18:09:12,994 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 5 remaining) [2024-05-06 18:09:12,998 INFO L448 BasicCegarLoop]: Path program histogram: [58, 40, 28, 15, 15, 15, 14, 12, 9, 8, 7, 6, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-06 18:09:12,999 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-06 18:09:13,000 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-06 18:09:13,001 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 06.05 06:09:13 BasicIcfg [2024-05-06 18:09:13,001 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-06 18:09:13,001 INFO L158 Benchmark]: Toolchain (without parser) took 794475.17ms. Allocated memory was 291.5MB in the beginning and 5.4GB in the end (delta: 5.1GB). Free memory was 222.8MB in the beginning and 4.7GB in the end (delta: -4.4GB). Peak memory consumption was 653.1MB. Max. memory is 8.0GB. [2024-05-06 18:09:13,001 INFO L158 Benchmark]: CDTParser took 0.11ms. Allocated memory is still 182.5MB. Free memory is still 112.8MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 18:09:13,002 INFO L158 Benchmark]: CACSL2BoogieTranslator took 193.75ms. Allocated memory is still 291.5MB. Free memory was 222.8MB in the beginning and 210.3MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2024-05-06 18:09:13,002 INFO L158 Benchmark]: Boogie Procedure Inliner took 25.65ms. Allocated memory is still 291.5MB. Free memory was 210.3MB in the beginning and 208.6MB in the end (delta: 1.7MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2024-05-06 18:09:13,002 INFO L158 Benchmark]: Boogie Preprocessor took 42.88ms. Allocated memory is still 291.5MB. Free memory was 208.6MB in the beginning and 206.7MB in the end (delta: 1.9MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 18:09:13,002 INFO L158 Benchmark]: RCFGBuilder took 567.09ms. Allocated memory is still 291.5MB. Free memory was 206.7MB in the beginning and 255.5MB in the end (delta: -48.8MB). Peak memory consumption was 28.3MB. Max. memory is 8.0GB. [2024-05-06 18:09:13,002 INFO L158 Benchmark]: TraceAbstraction took 793640.02ms. Allocated memory was 291.5MB in the beginning and 5.4GB in the end (delta: 5.1GB). Free memory was 254.4MB in the beginning and 4.7GB in the end (delta: -4.4GB). Peak memory consumption was 684.8MB. Max. memory is 8.0GB. [2024-05-06 18:09:13,002 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11ms. Allocated memory is still 182.5MB. Free memory is still 112.8MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 193.75ms. Allocated memory is still 291.5MB. Free memory was 222.8MB in the beginning and 210.3MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 25.65ms. Allocated memory is still 291.5MB. Free memory was 210.3MB in the beginning and 208.6MB in the end (delta: 1.7MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * Boogie Preprocessor took 42.88ms. Allocated memory is still 291.5MB. Free memory was 208.6MB in the beginning and 206.7MB in the end (delta: 1.9MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 567.09ms. Allocated memory is still 291.5MB. Free memory was 206.7MB in the beginning and 255.5MB in the end (delta: -48.8MB). Peak memory consumption was 28.3MB. Max. memory is 8.0GB. * TraceAbstraction took 793640.02ms. Allocated memory was 291.5MB in the beginning and 5.4GB in the end (delta: 5.1GB). Free memory was 254.4MB in the beginning and 4.7GB in the end (delta: -4.4GB). Peak memory consumption was 684.8MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 7824095, independent: 7579306, independent conditional: 7564666, independent unconditional: 14640, dependent: 244789, dependent conditional: 244725, dependent unconditional: 64, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 7627472, independent: 7579306, independent conditional: 7564666, independent unconditional: 14640, dependent: 48166, dependent conditional: 48102, dependent unconditional: 64, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 7627472, independent: 7579306, independent conditional: 7564666, independent unconditional: 14640, dependent: 48166, dependent conditional: 48102, dependent unconditional: 64, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 7627472, independent: 7579306, independent conditional: 7564666, independent unconditional: 14640, dependent: 48166, dependent conditional: 48102, dependent unconditional: 64, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 7781420, independent: 7579306, independent conditional: 3622490, independent unconditional: 3956816, dependent: 202114, dependent conditional: 139941, dependent unconditional: 62173, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 7781420, independent: 7579306, independent conditional: 1986690, independent unconditional: 5592616, dependent: 202114, dependent conditional: 114866, dependent unconditional: 87248, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 7781420, independent: 7579306, independent conditional: 1986690, independent unconditional: 5592616, dependent: 202114, dependent conditional: 114866, dependent unconditional: 87248, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 2610, independent: 2088, independent conditional: 160, independent unconditional: 1928, dependent: 522, dependent conditional: 495, dependent unconditional: 27, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 2610, independent: 2046, independent conditional: 0, independent unconditional: 2046, dependent: 564, dependent conditional: 0, dependent unconditional: 564, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 564, independent: 42, independent conditional: 42, independent unconditional: 0, dependent: 522, dependent conditional: 495, dependent unconditional: 27, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 564, independent: 42, independent conditional: 42, independent unconditional: 0, dependent: 522, dependent conditional: 495, dependent unconditional: 27, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 1637, independent: 102, independent conditional: 102, independent unconditional: 0, dependent: 1535, dependent conditional: 1422, dependent unconditional: 113, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 7781420, independent: 7577218, independent conditional: 1986530, independent unconditional: 5590688, dependent: 201592, dependent conditional: 114371, dependent unconditional: 87221, unknown: 2610, unknown conditional: 655, unknown unconditional: 1955] , Statistics on independence cache: Total cache size (in pairs): 2610, Positive cache size: 2088, Positive conditional cache size: 160, Positive unconditional cache size: 1928, Negative cache size: 522, Negative conditional cache size: 495, Negative unconditional cache size: 27, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 1660875, Maximal queried relation: 5, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 7781420, independent: 7579306, independent conditional: 3622490, independent unconditional: 3956816, dependent: 202114, dependent conditional: 139941, dependent unconditional: 62173, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 7781420, independent: 7579306, independent conditional: 1986690, independent unconditional: 5592616, dependent: 202114, dependent conditional: 114866, dependent unconditional: 87248, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 7781420, independent: 7579306, independent conditional: 1986690, independent unconditional: 5592616, dependent: 202114, dependent conditional: 114866, dependent unconditional: 87248, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 2610, independent: 2088, independent conditional: 160, independent unconditional: 1928, dependent: 522, dependent conditional: 495, dependent unconditional: 27, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 2610, independent: 2046, independent conditional: 0, independent unconditional: 2046, dependent: 564, dependent conditional: 0, dependent unconditional: 564, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 564, independent: 42, independent conditional: 42, independent unconditional: 0, dependent: 522, dependent conditional: 495, dependent unconditional: 27, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 564, independent: 42, independent conditional: 42, independent unconditional: 0, dependent: 522, dependent conditional: 495, dependent unconditional: 27, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 1637, independent: 102, independent conditional: 102, independent unconditional: 0, dependent: 1535, dependent conditional: 1422, dependent unconditional: 113, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 7781420, independent: 7577218, independent conditional: 1986530, independent unconditional: 5590688, dependent: 201592, dependent conditional: 114371, dependent unconditional: 87221, unknown: 2610, unknown conditional: 655, unknown unconditional: 1955] , Statistics on independence cache: Total cache size (in pairs): 2610, Positive cache size: 2088, Positive conditional cache size: 160, Positive unconditional cache size: 1928, Negative cache size: 522, Negative conditional cache size: 495, Negative unconditional cache size: 27, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 1660875 ], Independence queries for same thread: 196623 - TimeoutResultAtElement [Line: 120]: Timeout (TraceAbstraction) Unable to prove that a call to reach_error is unreachable Cancelled while executing DepthFirstTraversal. - TimeoutResultAtElement [Line: 111]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while executing DepthFirstTraversal. - TimeoutResultAtElement [Line: 110]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while executing DepthFirstTraversal. - TimeoutResultAtElement [Line: 113]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while executing DepthFirstTraversal. - TimeoutResultAtElement [Line: 112]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while executing DepthFirstTraversal. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 9 procedures, 205 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 793.5s, OverallIterations: 5, TraceHistogramMax: 0, PathProgramHistogramMax: 58, EmptinessCheckTime: 784.6s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 249, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 4.3s InterpolantComputationTime, 1960 NumberOfCodeBlocks, 1781 NumberOfCodeBlocksAsserted, 14 NumberOfCheckSat, 2521 ConstructedInterpolants, 0 QuantifiedInterpolants, 8441 SizeOfPredicates, 72 NumberOfNonLiveVariables, 1858 ConjunctsInSsa, 105 ConjunctsInUnsatCore, 13 InterpolantComputations, 2 PerfectInterpolantSequences, 1386/1587 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 720.7s, ConditionalCommutativityIAIntegrations: 0, ConditionalCommutativityDFSRestarts: 3, ConditionalCommutativityConditionCalculations: 474, ConditionalCommutativityTraceChecks: 356, ConditionalCommutativityImperfectProofs: 288 RESULT: Ultimate could not prove your program: Timeout Completed graceful shutdown