/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 50 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 17:56:57,690 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 17:56:57,740 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 17:56:57,743 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 17:56:57,743 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 17:56:57,780 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 17:56:57,781 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 17:56:57,781 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 17:56:57,782 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 17:56:57,785 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 17:56:57,785 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 17:56:57,785 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 17:56:57,785 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 17:56:57,786 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 17:56:57,787 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 17:56:57,787 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 17:56:57,787 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 17:56:57,787 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 17:56:57,787 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 17:56:57,787 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 17:56:57,787 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 17:56:57,788 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 17:56:57,789 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 17:56:57,789 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 17:56:57,789 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 17:56:57,790 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 17:56:57,790 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 17:56:57,790 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 17:56:57,790 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 17:56:57,790 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 17:56:57,791 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 17:56:57,791 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 17:56:57,791 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 17:56:57,792 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 17:56:57,792 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 17:56:57,792 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 17:56:57,792 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 17:56:57,792 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 17:56:57,792 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 17:56:57,792 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 50 [2024-05-06 17:56:57,979 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 17:56:57,994 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 17:56:57,995 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 17:56:57,996 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 17:56:57,997 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 17:56:57,997 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c [2024-05-06 17:56:59,169 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 17:56:59,322 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 17:56:59,323 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c [2024-05-06 17:56:59,328 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/ba7850559/115f6773e19841a6b3ff1587b49b66f4/FLAG523f6c881 [2024-05-06 17:56:59,339 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/ba7850559/115f6773e19841a6b3ff1587b49b66f4 [2024-05-06 17:56:59,341 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 17:56:59,342 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 17:56:59,343 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 17:56:59,343 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 17:56:59,346 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 17:56:59,347 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,347 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@23dd1215 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59, skipping insertion in model container [2024-05-06 17:56:59,348 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,364 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 17:56:59,524 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c[3271,3284] [2024-05-06 17:56:59,530 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 17:56:59,537 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 17:56:59,555 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c[3271,3284] [2024-05-06 17:56:59,557 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 17:56:59,573 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 17:56:59,574 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 17:56:59,581 INFO L206 MainTranslator]: Completed translation [2024-05-06 17:56:59,581 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59 WrapperNode [2024-05-06 17:56:59,581 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 17:56:59,582 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 17:56:59,582 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 17:56:59,582 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 17:56:59,587 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,594 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,669 INFO L138 Inliner]: procedures = 27, calls = 75, calls flagged for inlining = 9, calls inlined = 9, statements flattened = 178 [2024-05-06 17:56:59,669 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 17:56:59,670 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 17:56:59,670 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 17:56:59,670 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 17:56:59,677 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,677 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,680 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,680 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,686 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,688 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,690 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,691 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,693 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 17:56:59,694 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 17:56:59,694 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 17:56:59,694 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 17:56:59,694 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59" (1/1) ... [2024-05-06 17:56:59,703 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 17:56:59,713 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:56:59,736 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 17:56:59,794 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 17:56:59,817 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 17:56:59,817 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 17:56:59,817 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 17:56:59,817 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 17:56:59,818 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 17:56:59,818 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 17:56:59,818 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 17:56:59,818 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 17:56:59,818 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 17:56:59,818 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 17:56:59,818 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 17:56:59,820 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 17:56:59,820 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 17:56:59,820 INFO L130 BoogieDeclarations]: Found specification of procedure thread5 [2024-05-06 17:56:59,820 INFO L138 BoogieDeclarations]: Found implementation of procedure thread5 [2024-05-06 17:56:59,820 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 17:56:59,820 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 17:56:59,821 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 17:56:59,821 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 17:56:59,821 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 17:56:59,821 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 17:56:59,822 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 17:56:59,941 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 17:56:59,944 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 17:57:00,211 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 17:57:00,306 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 17:57:00,306 INFO L309 CfgBuilder]: Removed 5 assume(true) statements. [2024-05-06 17:57:00,307 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 05:57:00 BoogieIcfgContainer [2024-05-06 17:57:00,307 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 17:57:00,309 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 17:57:00,309 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 17:57:00,312 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 17:57:00,312 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 05:56:59" (1/3) ... [2024-05-06 17:57:00,312 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22d446ed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 05:57:00, skipping insertion in model container [2024-05-06 17:57:00,312 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 05:56:59" (2/3) ... [2024-05-06 17:57:00,312 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22d446ed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 05:57:00, skipping insertion in model container [2024-05-06 17:57:00,313 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 05:57:00" (3/3) ... [2024-05-06 17:57:00,313 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-min-max-inc-dec.wvr.c [2024-05-06 17:57:00,321 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 17:57:00,329 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 17:57:00,329 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 17:57:00,329 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 17:57:00,419 INFO L144 ThreadInstanceAdder]: Constructed 5 joinOtherThreadTransitions. [2024-05-06 17:57:00,461 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 17:57:00,461 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 17:57:00,462 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 17:57:00,463 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 17:57:00,464 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 17:57:00,509 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 17:57:00,525 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 17:57:00,527 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 17:57:00,533 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2b1624aa, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=50, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 17:57:00,534 INFO L358 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2024-05-06 17:57:01,038 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:57:01,050 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:01,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:57:01,085 INFO L85 PathProgramCache]: Analyzing trace with hash 285893693, now seen corresponding path program 1 times [2024-05-06 17:57:01,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:01,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:01,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:01,357 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:57:01,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:01,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:01,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:01,451 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 17:57:01,475 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 17:57:01,476 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 17:57:01,649 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:57:01,657 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:01,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:57:01,679 INFO L85 PathProgramCache]: Analyzing trace with hash 37769194, now seen corresponding path program 1 times [2024-05-06 17:57:01,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:01,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:01,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:02,060 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:57:02,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:02,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:02,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:02,239 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:57:02,240 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 17:57:02,241 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-05-06 17:57:02,494 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:57:02,506 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:02,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:57:02,567 INFO L85 PathProgramCache]: Analyzing trace with hash 1283129111, now seen corresponding path program 1 times [2024-05-06 17:57:02,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:02,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:02,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:02,814 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:57:02,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:02,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:02,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:03,002 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:57:03,047 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:03,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:05,178 INFO L85 PathProgramCache]: Analyzing trace with hash -650050623, now seen corresponding path program 1 times [2024-05-06 17:57:05,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:05,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:05,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:05,427 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:57:05,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:05,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:05,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:05,620 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:57:05,720 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:57:05,726 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:05,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:57:05,743 INFO L85 PathProgramCache]: Analyzing trace with hash -1510575009, now seen corresponding path program 2 times [2024-05-06 17:57:05,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:05,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:05,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:05,989 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:05,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:05,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:06,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:06,171 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:06,207 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:06,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:08,287 INFO L85 PathProgramCache]: Analyzing trace with hash -2094717341, now seen corresponding path program 2 times [2024-05-06 17:57:08,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:08,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:08,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:08,465 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:08,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:08,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:08,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:08,666 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:08,711 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:08,712 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:10,798 INFO L85 PathProgramCache]: Analyzing trace with hash 843536889, now seen corresponding path program 1 times [2024-05-06 17:57:10,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:10,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:10,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:10,946 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:10,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:10,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:10,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:11,097 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:11,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:57:11,182 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:11,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:57:11,204 INFO L85 PathProgramCache]: Analyzing trace with hash 379840377, now seen corresponding path program 2 times [2024-05-06 17:57:11,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:11,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:11,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:11,409 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:11,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:11,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:11,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:11,535 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:11,565 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:11,566 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:13,657 INFO L85 PathProgramCache]: Analyzing trace with hash -1109849604, now seen corresponding path program 3 times [2024-05-06 17:57:13,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:13,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:13,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:13,820 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:13,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:13,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:13,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:14,001 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:14,035 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:14,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:16,100 INFO L85 PathProgramCache]: Analyzing trace with hash 771765853, now seen corresponding path program 4 times [2024-05-06 17:57:16,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:16,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:16,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:16,229 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:16,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:16,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:16,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:16,360 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:16,398 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:16,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:18,462 INFO L85 PathProgramCache]: Analyzing trace with hash 165758182, now seen corresponding path program 5 times [2024-05-06 17:57:18,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:18,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:18,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:18,660 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:18,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:18,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:18,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:18,820 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:18,855 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:18,855 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:20,953 INFO L85 PathProgramCache]: Analyzing trace with hash 420989019, now seen corresponding path program 6 times [2024-05-06 17:57:20,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:20,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:20,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:21,094 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:21,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:21,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:21,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:21,215 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:21,291 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:57:21,295 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:21,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:57:21,316 INFO L85 PathProgramCache]: Analyzing trace with hash -464365891, now seen corresponding path program 7 times [2024-05-06 17:57:21,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:21,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:21,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:21,470 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:21,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:21,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:21,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:21,587 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:21,618 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:21,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:23,667 INFO L85 PathProgramCache]: Analyzing trace with hash -464365891, now seen corresponding path program 8 times [2024-05-06 17:57:23,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:23,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:23,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:23,778 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:23,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:23,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:23,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:23,936 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:23,968 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:23,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:26,048 INFO L85 PathProgramCache]: Analyzing trace with hash 857953915, now seen corresponding path program 1 times [2024-05-06 17:57:26,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:26,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:26,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:26,293 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:26,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:26,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:26,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:26,472 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:26,520 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:26,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:28,614 INFO L85 PathProgramCache]: Analyzing trace with hash 858959909, now seen corresponding path program 1 times [2024-05-06 17:57:28,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:28,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:28,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:28,725 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:28,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:28,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:28,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:28,834 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:28,863 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:28,863 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:30,921 INFO L85 PathProgramCache]: Analyzing trace with hash -665028291, now seen corresponding path program 1 times [2024-05-06 17:57:30,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:30,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:30,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:31,099 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:31,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:31,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:31,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:31,217 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:31,248 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:31,249 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:33,320 INFO L85 PathProgramCache]: Analyzing trace with hash 1086926119, now seen corresponding path program 1 times [2024-05-06 17:57:33,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:33,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:33,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:33,435 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:33,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:33,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:33,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:33,543 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:33,573 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:33,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:35,652 INFO L85 PathProgramCache]: Analyzing trace with hash 727798784, now seen corresponding path program 9 times [2024-05-06 17:57:35,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:35,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:35,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:35,807 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:35,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:35,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:35,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:35,928 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:36,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:57:36,021 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:36,021 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:57:36,037 INFO L85 PathProgramCache]: Analyzing trace with hash 57592259, now seen corresponding path program 1 times [2024-05-06 17:57:36,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:36,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:36,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:36,134 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:36,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:36,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:36,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:36,234 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:36,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 17:57:36,311 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:36,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 17:57:36,327 INFO L85 PathProgramCache]: Analyzing trace with hash 400666163, now seen corresponding path program 2 times [2024-05-06 17:57:36,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:36,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:36,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:36,430 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:36,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:36,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:36,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:36,573 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:36,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:57:36,690 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:36,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:57:36,722 INFO L85 PathProgramCache]: Analyzing trace with hash -1886042796, now seen corresponding path program 1 times [2024-05-06 17:57:36,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:36,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:36,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:36,880 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:36,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:36,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:36,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:36,978 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:37,075 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:57:37,096 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:37,096 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:57:37,110 INFO L85 PathProgramCache]: Analyzing trace with hash -1511097342, now seen corresponding path program 2 times [2024-05-06 17:57:37,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:37,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:37,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:37,196 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:37,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:37,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:37,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:37,292 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:37,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:57:37,369 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:37,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:57:37,386 INFO L85 PathProgramCache]: Analyzing trace with hash -523229611, now seen corresponding path program 1 times [2024-05-06 17:57:37,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:37,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:37,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:37,556 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:37,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:37,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:37,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:37,644 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:37,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 17:57:37,721 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:37,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 17:57:37,737 INFO L85 PathProgramCache]: Analyzing trace with hash -2126954911, now seen corresponding path program 2 times [2024-05-06 17:57:37,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:37,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:37,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:37,824 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:37,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:37,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:37,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:37,914 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:37,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 17:57:37,995 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:37,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 17:57:38,012 INFO L85 PathProgramCache]: Analyzing trace with hash 603002806, now seen corresponding path program 1 times [2024-05-06 17:57:38,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:38,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:38,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:38,098 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:38,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:38,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:38,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:38,240 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:38,321 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:57:38,326 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:38,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:57:38,342 INFO L85 PathProgramCache]: Analyzing trace with hash 208483424, now seen corresponding path program 2 times [2024-05-06 17:57:38,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:38,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:38,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:38,447 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:38,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:38,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:38,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:38,541 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:38,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:57:38,628 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:38,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:57:38,644 INFO L85 PathProgramCache]: Analyzing trace with hash -772248393, now seen corresponding path program 1 times [2024-05-06 17:57:38,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:38,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:38,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:38,738 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:38,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:38,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:38,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:38,867 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:38,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:57:38,951 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:38,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:57:38,965 INFO L85 PathProgramCache]: Analyzing trace with hash 838009535, now seen corresponding path program 2 times [2024-05-06 17:57:38,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:38,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:38,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:39,100 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:39,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:39,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:39,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:39,188 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:39,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:57:39,281 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:39,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:57:39,295 INFO L85 PathProgramCache]: Analyzing trace with hash -1479236263, now seen corresponding path program 1 times [2024-05-06 17:57:39,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:39,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:39,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:39,396 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:39,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:39,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:39,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:39,484 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:39,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:57:39,572 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:39,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:57:39,586 INFO L85 PathProgramCache]: Analyzing trace with hash -111514403, now seen corresponding path program 2 times [2024-05-06 17:57:39,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:39,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:39,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:39,676 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:39,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:39,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:39,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:39,837 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:57:39,948 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:57:39,952 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:39,953 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:57:42,033 INFO L85 PathProgramCache]: Analyzing trace with hash -1182200329, now seen corresponding path program 3 times [2024-05-06 17:57:42,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:42,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:42,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:42,132 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:57:42,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:42,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:42,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:42,217 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:57:42,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 17:57:42,292 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:42,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 17:57:42,308 INFO L85 PathProgramCache]: Analyzing trace with hash -909312713, now seen corresponding path program 4 times [2024-05-06 17:57:42,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:42,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:42,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:42,390 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:57:42,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:42,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:42,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:42,473 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:57:42,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:57:42,548 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:42,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:57:44,662 INFO L85 PathProgramCache]: Analyzing trace with hash 503740205, now seen corresponding path program 5 times [2024-05-06 17:57:44,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:44,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:44,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:44,822 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:57:44,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:44,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:44,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:44,925 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:57:44,956 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:44,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:47,029 INFO L85 PathProgramCache]: Analyzing trace with hash 2084364625, now seen corresponding path program 10 times [2024-05-06 17:57:47,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:47,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:47,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:47,142 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:57:47,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:47,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:47,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:47,253 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:57:47,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:57:47,333 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:47,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:57:49,387 INFO L85 PathProgramCache]: Analyzing trace with hash -1066082532, now seen corresponding path program 6 times [2024-05-06 17:57:49,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:49,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:49,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:49,504 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:57:49,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:49,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:49,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:49,663 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:57:49,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:57:49,750 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:49,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:57:49,960 INFO L85 PathProgramCache]: Analyzing trace with hash -720350508, now seen corresponding path program 7 times [2024-05-06 17:57:49,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:49,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:49,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:50,071 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:57:50,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:50,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:50,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:50,158 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:57:50,191 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:50,191 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:52,260 INFO L85 PathProgramCache]: Analyzing trace with hash -2111727560, now seen corresponding path program 11 times [2024-05-06 17:57:52,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:52,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:52,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:52,356 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:57:52,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:52,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:52,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:52,452 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:57:52,531 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:57:52,537 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:52,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:57:54,610 INFO L85 PathProgramCache]: Analyzing trace with hash -247720171, now seen corresponding path program 8 times [2024-05-06 17:57:54,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:54,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:54,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:54,749 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:57:54,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:54,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:54,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:54,835 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:57:54,910 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:57:54,915 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:54,915 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:57:56,952 INFO L85 PathProgramCache]: Analyzing trace with hash -1998435377, now seen corresponding path program 9 times [2024-05-06 17:57:56,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:56,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:56,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:57,043 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:57:57,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:57,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:57,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:57,140 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:57:57,172 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:57:57,173 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:57:59,255 INFO L85 PathProgramCache]: Analyzing trace with hash -300362893, now seen corresponding path program 12 times [2024-05-06 17:57:59,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:59,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:59,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:59,348 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:57:59,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:57:59,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:57:59,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:57:59,439 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:57:59,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:57:59,519 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:57:59,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:01,790 INFO L85 PathProgramCache]: Analyzing trace with hash 1082862906, now seen corresponding path program 10 times [2024-05-06 17:58:01,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:01,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:01,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:01,927 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:01,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:01,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:01,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:02,014 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:02,090 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:02,098 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:02,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:04,766 INFO L85 PathProgramCache]: Analyzing trace with hash 1876077550, now seen corresponding path program 11 times [2024-05-06 17:58:04,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:04,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:04,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:04,848 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:04,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:04,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:04,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:04,931 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:05,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:58:05,008 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:05,008 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:58:05,026 INFO L85 PathProgramCache]: Analyzing trace with hash -1971137510, now seen corresponding path program 12 times [2024-05-06 17:58:05,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:05,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:05,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:05,108 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:05,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:05,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:05,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:05,200 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:05,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:58:05,278 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:05,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:58:05,298 INFO L85 PathProgramCache]: Analyzing trace with hash -1644469585, now seen corresponding path program 13 times [2024-05-06 17:58:05,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:05,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:05,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:05,453 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:05,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:05,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:05,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:05,547 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:05,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:58:05,623 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:05,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:58:05,642 INFO L85 PathProgramCache]: Analyzing trace with hash 1912757035, now seen corresponding path program 14 times [2024-05-06 17:58:05,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:05,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:05,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:05,728 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:05,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:05,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:05,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:05,815 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:05,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:05,895 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:05,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:07,927 INFO L85 PathProgramCache]: Analyzing trace with hash 1912757035, now seen corresponding path program 15 times [2024-05-06 17:58:07,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:07,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:07,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:08,015 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:08,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:08,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:08,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:08,102 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:08,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 17:58:08,180 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:08,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 17:58:08,199 INFO L85 PathProgramCache]: Analyzing trace with hash -1930189280, now seen corresponding path program 16 times [2024-05-06 17:58:08,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:08,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:08,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:08,342 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:58:08,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:08,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:08,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:08,438 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:58:08,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:58:08,520 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:08,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:58:08,539 INFO L85 PathProgramCache]: Analyzing trace with hash 1148308406, now seen corresponding path program 17 times [2024-05-06 17:58:08,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:08,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:08,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:08,633 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:08,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:08,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:08,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:08,727 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:08,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:58:08,808 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:08,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:58:08,827 INFO L85 PathProgramCache]: Analyzing trace with hash 1808586274, now seen corresponding path program 18 times [2024-05-06 17:58:08,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:08,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:08,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:08,924 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:58:08,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:08,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:08,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:09,067 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:58:09,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:58:09,149 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:09,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:58:09,168 INFO L85 PathProgramCache]: Analyzing trace with hash 1840718452, now seen corresponding path program 19 times [2024-05-06 17:58:09,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:09,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:09,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:09,262 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:09,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:09,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:09,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:09,355 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:09,429 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:58:09,435 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:09,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:58:09,454 INFO L85 PathProgramCache]: Analyzing trace with hash -190303970, now seen corresponding path program 20 times [2024-05-06 17:58:09,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:09,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:09,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:09,550 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:58:09,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:09,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:09,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:09,671 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:58:09,749 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:58:09,754 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:09,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:58:09,769 INFO L85 PathProgramCache]: Analyzing trace with hash 464902648, now seen corresponding path program 21 times [2024-05-06 17:58:09,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:09,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:09,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:09,916 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:09,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:09,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:09,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:10,024 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:10,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:10,118 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:10,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:12,153 INFO L85 PathProgramCache]: Analyzing trace with hash 321175218, now seen corresponding path program 22 times [2024-05-06 17:58:12,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:12,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:12,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:12,253 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:12,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:12,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:12,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:12,350 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:12,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:58:12,420 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:12,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:58:12,434 INFO L85 PathProgramCache]: Analyzing trace with hash 1366497760, now seen corresponding path program 23 times [2024-05-06 17:58:12,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:12,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:12,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:12,535 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:12,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:12,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:12,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:12,686 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:12,769 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:12,778 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:12,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:14,841 INFO L85 PathProgramCache]: Analyzing trace with hash -588241803, now seen corresponding path program 24 times [2024-05-06 17:58:14,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:14,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:14,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:14,968 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:14,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:14,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:14,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:15,068 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:15,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:15,157 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:15,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:17,245 INFO L85 PathProgramCache]: Analyzing trace with hash -404327219, now seen corresponding path program 1 times [2024-05-06 17:58:17,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:17,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:17,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:17,355 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:17,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:17,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:17,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:17,449 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:17,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:17,525 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:17,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:17,604 INFO L85 PathProgramCache]: Analyzing trace with hash -2065830108, now seen corresponding path program 2 times [2024-05-06 17:58:17,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:17,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:17,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:17,757 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:17,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:17,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:17,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:17,857 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:17,891 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:17,891 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:58:19,967 INFO L85 PathProgramCache]: Analyzing trace with hash 2048135304, now seen corresponding path program 2 times [2024-05-06 17:58:19,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:19,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:19,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:20,075 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:20,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:20,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:20,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:20,181 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:20,229 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:20,230 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:58:22,299 INFO L85 PathProgramCache]: Analyzing trace with hash 1693891199, now seen corresponding path program 3 times [2024-05-06 17:58:22,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:22,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:22,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:22,413 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:22,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:22,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:22,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:22,601 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:22,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:22,687 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:22,688 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:24,733 INFO L85 PathProgramCache]: Analyzing trace with hash 1095335827, now seen corresponding path program 1 times [2024-05-06 17:58:24,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:24,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:24,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:24,830 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:24,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:24,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:24,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:24,923 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:24,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:25,002 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:25,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:27,035 INFO L85 PathProgramCache]: Analyzing trace with hash 43466654, now seen corresponding path program 2 times [2024-05-06 17:58:27,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:27,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:27,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:27,134 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:27,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:27,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:27,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:27,233 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:27,266 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:27,266 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:58:29,341 INFO L85 PathProgramCache]: Analyzing trace with hash 1365676162, now seen corresponding path program 2 times [2024-05-06 17:58:29,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:29,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:29,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:29,523 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:29,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:29,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:29,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:29,628 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:29,704 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:29,711 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:29,711 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:30,408 INFO L85 PathProgramCache]: Analyzing trace with hash -241761265, now seen corresponding path program 1 times [2024-05-06 17:58:30,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:30,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:30,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:30,502 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:30,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:30,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:30,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:30,595 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:30,672 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:30,677 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:30,678 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:32,727 INFO L85 PathProgramCache]: Analyzing trace with hash -2017938526, now seen corresponding path program 2 times [2024-05-06 17:58:32,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:32,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:32,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:32,826 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:32,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:32,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:32,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:33,004 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:33,050 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:33,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:58:35,143 INFO L85 PathProgramCache]: Analyzing trace with hash -1780887674, now seen corresponding path program 2 times [2024-05-06 17:58:35,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:35,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:35,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:35,254 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:35,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:35,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:35,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:35,364 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:35,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:35,440 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:35,441 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:37,501 INFO L85 PathProgramCache]: Analyzing trace with hash -7798763, now seen corresponding path program 1 times [2024-05-06 17:58:37,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:37,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:37,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:37,595 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:37,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:37,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:37,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:37,689 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:37,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:37,768 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:37,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:37,830 INFO L85 PathProgramCache]: Analyzing trace with hash -1720030500, now seen corresponding path program 2 times [2024-05-06 17:58:37,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:37,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:37,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:37,980 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:37,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:37,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:37,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:38,078 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:38,124 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:38,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:58:40,194 INFO L85 PathProgramCache]: Analyzing trace with hash 1643333184, now seen corresponding path program 2 times [2024-05-06 17:58:40,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:40,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:40,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:40,303 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:40,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:40,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:40,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:40,410 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:40,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:40,482 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:40,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:42,516 INFO L85 PathProgramCache]: Analyzing trace with hash 553937746, now seen corresponding path program 25 times [2024-05-06 17:58:42,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:42,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:42,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:42,611 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:42,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:42,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:42,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:42,759 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:58:42,851 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:58:42,856 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:42,857 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:58:42,902 INFO L85 PathProgramCache]: Analyzing trace with hash -1440907777, now seen corresponding path program 26 times [2024-05-06 17:58:42,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:42,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:42,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:43,007 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:43,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:43,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:43,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:43,111 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:43,170 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:43,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:58:45,227 INFO L85 PathProgramCache]: Analyzing trace with hash -1755379293, now seen corresponding path program 13 times [2024-05-06 17:58:45,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:45,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:45,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:45,351 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:45,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:45,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:45,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:45,458 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:45,506 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:45,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:58:47,580 INFO L85 PathProgramCache]: Analyzing trace with hash 1144543951, now seen corresponding path program 14 times [2024-05-06 17:58:47,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:47,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:47,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:47,718 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:47,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:47,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:47,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:47,809 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:47,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:58:47,899 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:47,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:58:47,918 INFO L85 PathProgramCache]: Analyzing trace with hash 1121124567, now seen corresponding path program 3 times [2024-05-06 17:58:47,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:47,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:47,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:48,010 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:48,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:48,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:48,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:48,102 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:48,139 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:48,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:58:50,214 INFO L85 PathProgramCache]: Analyzing trace with hash -879727890, now seen corresponding path program 15 times [2024-05-06 17:58:50,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:50,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:50,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:50,296 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:50,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:50,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:50,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:50,378 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:58:50,504 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 17:58:50,510 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:50,511 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 17:58:50,529 INFO L85 PathProgramCache]: Analyzing trace with hash 933709676, now seen corresponding path program 1 times [2024-05-06 17:58:50,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:50,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:50,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:50,617 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:58:50,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:50,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:50,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:50,707 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:58:50,744 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:50,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:58:52,810 INFO L85 PathProgramCache]: Analyzing trace with hash 2141365718, now seen corresponding path program 1 times [2024-05-06 17:58:52,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:52,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:52,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:52,902 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:58:52,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:52,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:52,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:52,996 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 17:58:53,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 17:58:53,112 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:53,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 17:58:53,128 INFO L85 PathProgramCache]: Analyzing trace with hash -864449814, now seen corresponding path program 2 times [2024-05-06 17:58:53,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:53,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:53,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:53,216 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:53,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:53,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:53,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:53,350 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:53,392 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:53,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:58:55,468 INFO L85 PathProgramCache]: Analyzing trace with hash 1850830520, now seen corresponding path program 2 times [2024-05-06 17:58:55,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:55,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:55,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:55,558 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:55,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:55,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:55,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:55,669 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:55,708 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:55,708 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:58:57,789 INFO L85 PathProgramCache]: Analyzing trace with hash -484199538, now seen corresponding path program 1 times [2024-05-06 17:58:57,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:57,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:57,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:57,876 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:57,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:57,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:57,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:57,963 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:58,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 17:58:58,051 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:58:58,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 17:58:58,071 INFO L85 PathProgramCache]: Analyzing trace with hash -2125283196, now seen corresponding path program 2 times [2024-05-06 17:58:58,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:58,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:58,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:58,162 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:58,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:58:58,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:58:58,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:58:58,313 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:58:58,345 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:58:58,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:00,428 INFO L85 PathProgramCache]: Analyzing trace with hash -1459269039, now seen corresponding path program 3 times [2024-05-06 17:59:00,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:00,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:00,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:00,533 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:00,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:00,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:00,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:00,624 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:00,683 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:00,683 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:02,785 INFO L85 PathProgramCache]: Analyzing trace with hash -867378392, now seen corresponding path program 4 times [2024-05-06 17:59:02,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:02,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:02,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:02,874 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:02,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:02,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:02,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:02,964 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:03,003 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:03,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:05,086 INFO L85 PathProgramCache]: Analyzing trace with hash -1678187343, now seen corresponding path program 5 times [2024-05-06 17:59:05,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:05,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:05,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:05,173 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:05,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:05,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:05,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:05,310 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:05,348 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:05,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:07,434 INFO L85 PathProgramCache]: Analyzing trace with hash -1023966416, now seen corresponding path program 6 times [2024-05-06 17:59:07,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:07,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:07,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:07,527 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:07,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:07,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:07,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:07,617 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:07,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:59:07,703 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:07,703 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:59:07,724 INFO L85 PathProgramCache]: Analyzing trace with hash 387760850, now seen corresponding path program 7 times [2024-05-06 17:59:07,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:07,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:07,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:07,810 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:07,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:07,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:07,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:07,894 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:07,928 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:07,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:09,993 INFO L85 PathProgramCache]: Analyzing trace with hash 387760850, now seen corresponding path program 8 times [2024-05-06 17:59:09,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:09,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:10,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:10,083 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:10,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:10,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:10,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:10,212 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:10,249 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:10,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:12,320 INFO L85 PathProgramCache]: Analyzing trace with hash 1893332102, now seen corresponding path program 1 times [2024-05-06 17:59:12,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:12,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:12,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:12,409 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:12,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:12,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:12,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:12,499 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:12,532 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:12,533 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:14,614 INFO L85 PathProgramCache]: Analyzing trace with hash 1585095866, now seen corresponding path program 1 times [2024-05-06 17:59:14,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:14,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:14,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:14,704 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:14,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:14,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:14,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:14,793 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:14,827 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:14,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:16,908 INFO L85 PathProgramCache]: Analyzing trace with hash 1990794760, now seen corresponding path program 1 times [2024-05-06 17:59:16,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:16,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:16,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:17,046 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:17,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:17,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:17,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:17,142 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:17,175 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:17,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:19,237 INFO L85 PathProgramCache]: Analyzing trace with hash -1321254148, now seen corresponding path program 1 times [2024-05-06 17:59:19,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:19,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:19,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:19,327 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:19,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:19,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:19,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:19,416 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:19,450 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:19,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:21,520 INFO L85 PathProgramCache]: Analyzing trace with hash -2120831093, now seen corresponding path program 9 times [2024-05-06 17:59:21,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:21,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:21,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:21,607 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:21,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:21,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:21,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:21,694 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:21,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:59:21,773 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:21,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:59:21,790 INFO L85 PathProgramCache]: Analyzing trace with hash -1270144168, now seen corresponding path program 1 times [2024-05-06 17:59:21,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:21,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:21,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:21,959 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:21,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:21,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:21,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:22,059 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:22,127 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 17:59:22,131 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:22,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 17:59:22,148 INFO L85 PathProgramCache]: Analyzing trace with hash 12512126, now seen corresponding path program 2 times [2024-05-06 17:59:22,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:22,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:22,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:22,249 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:22,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:22,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:22,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:22,333 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:22,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:59:22,421 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:22,421 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:59:22,437 INFO L85 PathProgramCache]: Analyzing trace with hash 564978975, now seen corresponding path program 1 times [2024-05-06 17:59:22,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:22,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:22,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:22,523 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:22,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:22,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:22,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:22,604 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:22,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:59:22,759 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:22,760 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:59:22,800 INFO L85 PathProgramCache]: Analyzing trace with hash 1662970199, now seen corresponding path program 2 times [2024-05-06 17:59:22,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:22,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:22,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:22,898 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:22,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:22,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:22,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:22,987 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:23,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 17:59:23,083 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:23,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 17:59:23,105 INFO L85 PathProgramCache]: Analyzing trace with hash -1968185046, now seen corresponding path program 1 times [2024-05-06 17:59:23,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:23,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:23,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:23,198 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:23,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:23,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:23,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:23,287 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:23,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:59:23,379 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:23,380 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:59:23,401 INFO L85 PathProgramCache]: Analyzing trace with hash 1716212332, now seen corresponding path program 2 times [2024-05-06 17:59:23,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:23,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:23,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:23,491 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:23,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:23,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:23,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:23,579 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:23,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:59:23,751 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:23,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:59:23,769 INFO L85 PathProgramCache]: Analyzing trace with hash 1249128001, now seen corresponding path program 1 times [2024-05-06 17:59:23,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:23,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:23,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:23,860 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:23,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:23,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:23,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:23,953 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:24,045 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:59:24,052 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:24,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:59:24,076 INFO L85 PathProgramCache]: Analyzing trace with hash 471003893, now seen corresponding path program 2 times [2024-05-06 17:59:24,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:24,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:24,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:24,165 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:24,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:24,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:24,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:24,260 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:24,334 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:59:24,339 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:24,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:59:24,354 INFO L85 PathProgramCache]: Analyzing trace with hash 79878348, now seen corresponding path program 1 times [2024-05-06 17:59:24,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:24,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:24,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:24,442 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:24,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:24,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:24,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:24,582 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:24,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:59:24,655 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:24,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:59:24,669 INFO L85 PathProgramCache]: Analyzing trace with hash 1677761930, now seen corresponding path program 2 times [2024-05-06 17:59:24,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:24,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:24,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:24,754 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:24,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:24,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:24,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:24,843 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:24,920 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 17:59:24,925 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:24,925 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 17:59:24,940 INFO L85 PathProgramCache]: Analyzing trace with hash -1867390300, now seen corresponding path program 1 times [2024-05-06 17:59:24,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:24,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:24,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:25,029 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:25,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:25,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:25,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:25,120 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:25,233 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:59:25,238 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:25,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:59:25,266 INFO L85 PathProgramCache]: Analyzing trace with hash 2132331698, now seen corresponding path program 2 times [2024-05-06 17:59:25,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:25,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:25,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:25,356 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:25,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:25,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:25,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:25,501 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:25,598 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:25,603 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:25,603 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:27,646 INFO L85 PathProgramCache]: Analyzing trace with hash 23682306, now seen corresponding path program 3 times [2024-05-06 17:59:27,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:27,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:27,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:27,731 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:27,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:27,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:27,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:27,815 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:27,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 17:59:27,905 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:27,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 17:59:27,924 INFO L85 PathProgramCache]: Analyzing trace with hash 1334533388, now seen corresponding path program 4 times [2024-05-06 17:59:27,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:27,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:27,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:28,013 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:28,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:28,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:28,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:28,106 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:28,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:28,191 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:28,191 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:28,266 INFO L85 PathProgramCache]: Analyzing trace with hash -280887742, now seen corresponding path program 5 times [2024-05-06 17:59:28,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:28,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:28,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:28,356 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:28,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:28,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:28,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:28,500 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:28,536 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:28,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:30,608 INFO L85 PathProgramCache]: Analyzing trace with hash 280908326, now seen corresponding path program 10 times [2024-05-06 17:59:30,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:30,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:30,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:30,706 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:30,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:30,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:30,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:30,804 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:30,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:30,890 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:30,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:32,960 INFO L85 PathProgramCache]: Analyzing trace with hash 1384939239, now seen corresponding path program 6 times [2024-05-06 17:59:32,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:32,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:32,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:33,051 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:33,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:33,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:33,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:33,141 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:33,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:33,232 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:33,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:35,285 INFO L85 PathProgramCache]: Analyzing trace with hash 1332548895, now seen corresponding path program 7 times [2024-05-06 17:59:35,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:35,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:35,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:35,450 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:35,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:35,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:35,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:35,535 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:35,565 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:35,565 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:37,621 INFO L85 PathProgramCache]: Analyzing trace with hash -1477166909, now seen corresponding path program 11 times [2024-05-06 17:59:37,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:37,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:37,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:37,717 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:37,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:37,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:37,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:37,813 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:37,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:37,917 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:37,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:39,967 INFO L85 PathProgramCache]: Analyzing trace with hash -1692675606, now seen corresponding path program 8 times [2024-05-06 17:59:39,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:39,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:39,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:40,079 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:40,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:40,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:40,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:40,163 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:40,321 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:40,326 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:40,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:42,387 INFO L85 PathProgramCache]: Analyzing trace with hash 1947112484, now seen corresponding path program 9 times [2024-05-06 17:59:42,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:42,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:42,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:42,478 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:42,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:42,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:42,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:42,576 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:42,613 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:42,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:44,672 INFO L85 PathProgramCache]: Analyzing trace with hash -1803913848, now seen corresponding path program 12 times [2024-05-06 17:59:44,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:44,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:44,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:44,773 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:44,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:44,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:44,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:44,877 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:44,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:44,968 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:44,969 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:45,031 INFO L85 PathProgramCache]: Analyzing trace with hash 1728988101, now seen corresponding path program 10 times [2024-05-06 17:59:45,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:45,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:45,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:45,125 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:45,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:45,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:45,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:45,271 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:45,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:45,359 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:45,359 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:45,411 INFO L85 PathProgramCache]: Analyzing trace with hash -1579137351, now seen corresponding path program 11 times [2024-05-06 17:59:45,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:45,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:45,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:45,496 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:45,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:45,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:45,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:45,581 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:45,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:59:45,663 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:45,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:59:45,686 INFO L85 PathProgramCache]: Analyzing trace with hash -1708617041, now seen corresponding path program 12 times [2024-05-06 17:59:45,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:45,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:45,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:45,779 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:45,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:45,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:45,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:45,873 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:45,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 17:59:45,965 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:45,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 17:59:45,983 INFO L85 PathProgramCache]: Analyzing trace with hash 1322761284, now seen corresponding path program 13 times [2024-05-06 17:59:45,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:45,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:45,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:46,119 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:46,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:46,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:46,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:46,212 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 17:59:46,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 17:59:46,296 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:46,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 17:59:46,315 INFO L85 PathProgramCache]: Analyzing trace with hash -495423232, now seen corresponding path program 14 times [2024-05-06 17:59:46,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:46,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:46,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:46,411 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:46,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:46,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:46,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:46,509 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:46,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:46,577 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:46,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:48,606 INFO L85 PathProgramCache]: Analyzing trace with hash -495423232, now seen corresponding path program 15 times [2024-05-06 17:59:48,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:48,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:48,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:48,717 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:48,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:48,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:48,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:48,808 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:48,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:48,959 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:48,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:49,041 INFO L85 PathProgramCache]: Analyzing trace with hash 1080130503, now seen corresponding path program 16 times [2024-05-06 17:59:49,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:49,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:49,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:49,135 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:49,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:49,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:49,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:49,233 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:49,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:49,317 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:49,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:51,374 INFO L85 PathProgramCache]: Analyzing trace with hash -1376653238, now seen corresponding path program 17 times [2024-05-06 17:59:51,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:51,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:51,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:51,505 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:51,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:51,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:51,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:51,639 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:51,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:51,745 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:51,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:53,817 INFO L85 PathProgramCache]: Analyzing trace with hash -2042412776, now seen corresponding path program 1 times [2024-05-06 17:59:53,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:53,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:53,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:54,006 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:54,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:54,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:54,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:54,103 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 17:59:54,183 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 17:59:54,189 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 17:59:54,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 17:59:56,229 INFO L85 PathProgramCache]: Analyzing trace with hash 898343801, now seen corresponding path program 2 times [2024-05-06 17:59:56,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:56,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:56,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:56,334 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:56,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:56,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:56,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:56,438 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:56,472 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:56,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 17:59:58,536 INFO L85 PathProgramCache]: Analyzing trace with hash 874520221, now seen corresponding path program 2 times [2024-05-06 17:59:58,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:58,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:58,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:58,648 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:58,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 17:59:58,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 17:59:58,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 17:59:58,884 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 17:59:58,918 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 17:59:58,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:00,961 INFO L85 PathProgramCache]: Analyzing trace with hash -439257014, now seen corresponding path program 3 times [2024-05-06 18:00:00,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:00,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:00,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:01,100 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:01,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:01,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:01,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:01,213 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:01,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:01,301 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:01,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:00:01,905 INFO L85 PathProgramCache]: Analyzing trace with hash -481526296, now seen corresponding path program 1 times [2024-05-06 18:00:01,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:01,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:01,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:02,003 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:00:02,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:02,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:02,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:02,107 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:00:02,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:02,252 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:02,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:00:04,313 INFO L85 PathProgramCache]: Analyzing trace with hash 2078747817, now seen corresponding path program 2 times [2024-05-06 18:00:04,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:04,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:04,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:04,505 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:04,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:04,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:04,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:04,644 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:04,690 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:04,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:06,796 INFO L85 PathProgramCache]: Analyzing trace with hash -750392371, now seen corresponding path program 2 times [2024-05-06 18:00:06,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:06,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:06,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:06,954 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:06,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:06,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:06,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:07,113 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:07,222 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:07,229 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:07,230 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:00:07,304 INFO L85 PathProgramCache]: Analyzing trace with hash -1262459110, now seen corresponding path program 1 times [2024-05-06 18:00:07,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:07,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:07,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:07,438 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:00:07,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:07,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:07,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:07,630 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:00:07,725 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:07,732 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:07,732 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:00:09,806 INFO L85 PathProgramCache]: Analyzing trace with hash 125925687, now seen corresponding path program 2 times [2024-05-06 18:00:09,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:09,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:09,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:09,942 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:09,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:09,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:09,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:10,078 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:10,124 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:10,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:12,195 INFO L85 PathProgramCache]: Analyzing trace with hash -1572053285, now seen corresponding path program 2 times [2024-05-06 18:00:12,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:12,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:12,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:12,339 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:12,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:12,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:12,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:12,483 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:12,585 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:12,592 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:12,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:00:12,672 INFO L85 PathProgramCache]: Analyzing trace with hash 2037485482, now seen corresponding path program 1 times [2024-05-06 18:00:12,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:12,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:12,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:12,798 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:00:12,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:12,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:12,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:13,034 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:00:13,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:13,137 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:13,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:00:15,191 INFO L85 PathProgramCache]: Analyzing trace with hash -681042265, now seen corresponding path program 2 times [2024-05-06 18:00:15,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:15,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:15,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:15,327 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:15,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:15,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:15,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:15,461 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:15,505 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:15,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:17,592 INFO L85 PathProgramCache]: Analyzing trace with hash -705234869, now seen corresponding path program 2 times [2024-05-06 18:00:17,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:17,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:17,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:17,734 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:17,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:17,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:17,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:17,879 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:17,978 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:17,985 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:17,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:00:20,042 INFO L85 PathProgramCache]: Analyzing trace with hash 481367325, now seen corresponding path program 18 times [2024-05-06 18:00:20,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:20,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:20,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:20,243 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:00:20,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:20,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:20,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:20,364 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:00:20,438 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:20,443 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:20,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:00:20,499 INFO L85 PathProgramCache]: Analyzing trace with hash -1961581356, now seen corresponding path program 19 times [2024-05-06 18:00:20,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:20,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:20,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:20,628 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:20,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:20,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:20,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:20,758 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:20,789 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:20,790 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:22,892 INFO L85 PathProgramCache]: Analyzing trace with hash -999855560, now seen corresponding path program 13 times [2024-05-06 18:00:22,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:22,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:22,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:23,040 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:23,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:23,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:23,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:23,186 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:23,225 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:23,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:25,270 INFO L85 PathProgramCache]: Analyzing trace with hash -1263636316, now seen corresponding path program 14 times [2024-05-06 18:00:25,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:25,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:25,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:25,442 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:00:25,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:25,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:25,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:25,552 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:00:25,586 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:25,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:27,635 INFO L85 PathProgramCache]: Analyzing trace with hash 1364118211, now seen corresponding path program 15 times [2024-05-06 18:00:27,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:27,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:27,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:27,720 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:00:27,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:27,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:27,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:27,804 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:00:27,849 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:27,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:29,909 INFO L85 PathProgramCache]: Analyzing trace with hash -1137976413, now seen corresponding path program 1 times [2024-05-06 18:00:29,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:29,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:29,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:30,007 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:00:30,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:30,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:30,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:30,098 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:00:30,144 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:30,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:32,208 INFO L85 PathProgramCache]: Analyzing trace with hash 731910341, now seen corresponding path program 2 times [2024-05-06 18:00:32,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:32,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:32,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:32,355 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:32,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:32,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:32,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:32,443 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:32,473 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:32,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:34,534 INFO L85 PathProgramCache]: Analyzing trace with hash -404917029, now seen corresponding path program 1 times [2024-05-06 18:00:34,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:34,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:34,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:34,622 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:34,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:34,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:34,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:34,717 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:34,769 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:34,769 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:37,149 INFO L85 PathProgramCache]: Analyzing trace with hash 1716778078, now seen corresponding path program 2 times [2024-05-06 18:00:37,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:37,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:37,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:37,267 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:37,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:37,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:37,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:37,388 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:37,418 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:37,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:39,488 INFO L85 PathProgramCache]: Analyzing trace with hash -1224574661, now seen corresponding path program 3 times [2024-05-06 18:00:39,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:39,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:39,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:39,742 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:39,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:39,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:39,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:39,860 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:39,899 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:39,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:41,963 INFO L85 PathProgramCache]: Analyzing trace with hash 1233864132, now seen corresponding path program 4 times [2024-05-06 18:00:41,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:41,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:41,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:42,051 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:42,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:42,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:42,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:42,138 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:42,172 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:42,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:44,234 INFO L85 PathProgramCache]: Analyzing trace with hash -237292611, now seen corresponding path program 5 times [2024-05-06 18:00:44,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:44,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:44,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:44,328 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:44,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:44,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:44,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:44,416 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:44,450 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:44,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:46,506 INFO L85 PathProgramCache]: Analyzing trace with hash -1805831521, now seen corresponding path program 6 times [2024-05-06 18:00:46,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:46,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:46,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:46,723 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:46,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:46,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:46,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:46,809 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:46,879 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:46,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:48,956 INFO L85 PathProgramCache]: Analyzing trace with hash -2069866023, now seen corresponding path program 1 times [2024-05-06 18:00:48,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:48,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:48,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:49,048 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:49,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:49,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:49,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:49,140 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:49,173 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:00:49,173 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:00:51,249 INFO L85 PathProgramCache]: Analyzing trace with hash -898053881, now seen corresponding path program 1 times [2024-05-06 18:00:51,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:51,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:51,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:51,343 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:51,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:51,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:51,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:51,436 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:00:51,604 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:51,610 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:51,610 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:00:53,636 INFO L85 PathProgramCache]: Analyzing trace with hash 1567673173, now seen corresponding path program 1 times [2024-05-06 18:00:53,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:53,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:53,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:53,811 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:00:53,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:53,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:53,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:53,915 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:00:54,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:54,019 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:54,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:00:56,048 INFO L85 PathProgramCache]: Analyzing trace with hash -1821355761, now seen corresponding path program 2 times [2024-05-06 18:00:56,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:56,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:56,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:56,149 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:00:56,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:56,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:56,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:56,237 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:00:56,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:56,318 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:56,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:00:56,466 INFO L85 PathProgramCache]: Analyzing trace with hash 2023418, now seen corresponding path program 3 times [2024-05-06 18:00:56,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:56,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:56,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:56,551 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:00:56,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:56,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:56,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:56,637 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:00:56,712 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:56,718 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:56,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:00:58,763 INFO L85 PathProgramCache]: Analyzing trace with hash 1005761714, now seen corresponding path program 4 times [2024-05-06 18:00:58,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:58,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:58,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:58,848 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:00:58,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:00:58,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:00:58,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:00:59,040 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:00:59,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:00:59,116 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:00:59,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:01:01,183 INFO L85 PathProgramCache]: Analyzing trace with hash -906001801, now seen corresponding path program 5 times [2024-05-06 18:01:01,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:01,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:01,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:01,270 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:01:01,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:01,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:01,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:01,356 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:01:01,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:01:01,431 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:01,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:01:03,463 INFO L85 PathProgramCache]: Analyzing trace with hash 828192305, now seen corresponding path program 6 times [2024-05-06 18:01:03,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:03,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:03,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:03,550 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:01:03,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:03,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:03,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:03,638 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:01:03,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:01:03,722 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:03,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:01:04,053 INFO L85 PathProgramCache]: Analyzing trace with hash -1847865960, now seen corresponding path program 7 times [2024-05-06 18:01:04,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:04,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:04,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:04,139 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:01:04,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:04,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:04,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:04,222 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:01:04,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 18:01:04,293 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:04,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 18:01:06,341 INFO L85 PathProgramCache]: Analyzing trace with hash -1329435956, now seen corresponding path program 8 times [2024-05-06 18:01:06,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:06,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:06,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:06,524 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:01:06,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:06,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:06,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:06,633 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:01:06,735 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:06,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:01:08,798 INFO L85 PathProgramCache]: Analyzing trace with hash -2114697379, now seen corresponding path program 3 times [2024-05-06 18:01:08,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:08,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:08,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:08,910 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:08,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:08,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:08,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:09,022 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:09,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:09,144 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:09,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:09,173 INFO L85 PathProgramCache]: Analyzing trace with hash 1388270714, now seen corresponding path program 1 times [2024-05-06 18:01:09,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:09,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:09,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:09,250 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:01:09,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:09,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:09,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:09,323 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:01:09,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:01:09,426 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:09,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:01:09,919 INFO L85 PathProgramCache]: Analyzing trace with hash -719499116, now seen corresponding path program 2 times [2024-05-06 18:01:09,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:09,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:09,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:10,045 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:01:10,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:10,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:10,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:10,214 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:01:10,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:01:10,285 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:10,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:01:10,394 INFO L85 PathProgramCache]: Analyzing trace with hash 2000167301, now seen corresponding path program 3 times [2024-05-06 18:01:10,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:10,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:10,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:10,563 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:01:10,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:10,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:10,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:10,686 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:01:10,807 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:10,824 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:10,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:10,855 INFO L85 PathProgramCache]: Analyzing trace with hash 1855618507, now seen corresponding path program 1 times [2024-05-06 18:01:10,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:10,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:10,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:10,992 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:10,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:10,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:11,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:11,288 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:11,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:01:11,400 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:11,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:01:13,439 INFO L85 PathProgramCache]: Analyzing trace with hash 1795969507, now seen corresponding path program 2 times [2024-05-06 18:01:13,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:13,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:13,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:13,565 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:13,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:13,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:13,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:13,687 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:13,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:13,795 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:13,795 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:13,820 INFO L85 PathProgramCache]: Analyzing trace with hash 1038577006, now seen corresponding path program 3 times [2024-05-06 18:01:13,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:13,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:13,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:14,016 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:14,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:14,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:14,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:14,121 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:14,156 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:14,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:16,227 INFO L85 PathProgramCache]: Analyzing trace with hash -705447342, now seen corresponding path program 1 times [2024-05-06 18:01:16,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:16,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:16,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:16,368 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:16,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:16,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:16,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:16,475 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:16,571 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:16,577 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:16,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:16,596 INFO L85 PathProgramCache]: Analyzing trace with hash 1676773051, now seen corresponding path program 4 times [2024-05-06 18:01:16,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:16,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:16,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:16,699 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:16,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:16,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:16,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:16,796 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:16,834 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:16,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:18,911 INFO L85 PathProgramCache]: Analyzing trace with hash 1955705872, now seen corresponding path program 2 times [2024-05-06 18:01:18,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:18,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:18,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:19,038 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:19,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:19,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:19,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:19,248 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:19,349 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:19,355 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:19,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:19,378 INFO L85 PathProgramCache]: Analyzing trace with hash -1275710403, now seen corresponding path program 5 times [2024-05-06 18:01:19,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:19,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:19,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:19,509 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:19,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:19,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:19,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:19,640 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:19,686 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:19,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:21,826 INFO L85 PathProgramCache]: Analyzing trace with hash -642807199, now seen corresponding path program 3 times [2024-05-06 18:01:21,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:21,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:21,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:21,962 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:21,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:21,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:21,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:22,098 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:22,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:22,208 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:22,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:22,233 INFO L85 PathProgramCache]: Analyzing trace with hash 155679372, now seen corresponding path program 6 times [2024-05-06 18:01:22,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:22,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:22,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:22,364 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:22,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:22,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:22,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:22,578 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:22,624 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:22,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:24,710 INFO L85 PathProgramCache]: Analyzing trace with hash -358581537, now seen corresponding path program 4 times [2024-05-06 18:01:24,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:24,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:24,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:24,841 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:24,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:24,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:24,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:24,970 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:25,072 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:25,078 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:25,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:25,101 INFO L85 PathProgramCache]: Analyzing trace with hash 1013267728, now seen corresponding path program 7 times [2024-05-06 18:01:25,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:25,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:25,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:25,232 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:25,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:25,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:25,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:25,362 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:25,406 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:25,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:27,469 INFO L85 PathProgramCache]: Analyzing trace with hash -1049368716, now seen corresponding path program 5 times [2024-05-06 18:01:27,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:27,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:27,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:27,603 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:27,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:27,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:27,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:27,738 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:27,943 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:27,948 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:27,948 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:27,964 INFO L85 PathProgramCache]: Analyzing trace with hash 1272248793, now seen corresponding path program 8 times [2024-05-06 18:01:27,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:27,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:27,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:28,097 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:28,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:28,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:28,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:28,234 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:28,268 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:28,268 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:30,317 INFO L85 PathProgramCache]: Analyzing trace with hash 1930396594, now seen corresponding path program 6 times [2024-05-06 18:01:30,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:30,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:30,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:30,448 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:30,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:30,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:30,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:30,576 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:30,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:30,675 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:30,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:30,703 INFO L85 PathProgramCache]: Analyzing trace with hash -159519550, now seen corresponding path program 9 times [2024-05-06 18:01:30,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:30,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:30,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:30,886 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:30,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:30,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:30,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:31,002 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:31,090 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:01:31,095 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:31,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:01:33,179 INFO L85 PathProgramCache]: Analyzing trace with hash -650138170, now seen corresponding path program 10 times [2024-05-06 18:01:33,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:33,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:33,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:33,421 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:33,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:33,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:33,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:33,536 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:33,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:01:33,618 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:33,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:01:35,643 INFO L85 PathProgramCache]: Analyzing trace with hash -524575962, now seen corresponding path program 11 times [2024-05-06 18:01:35,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:35,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:35,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:35,768 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:35,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:35,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:35,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:35,894 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:01:35,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:01:35,993 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:35,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:01:38,064 INFO L85 PathProgramCache]: Analyzing trace with hash -1406953171, now seen corresponding path program 12 times [2024-05-06 18:01:38,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:38,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:38,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:38,198 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:38,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:38,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:38,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:38,333 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:38,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:38,433 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:38,434 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:38,456 INFO L85 PathProgramCache]: Analyzing trace with hash -1406953171, now seen corresponding path program 13 times [2024-05-06 18:01:38,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:38,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:38,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:38,700 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:38,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:38,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:38,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:38,834 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:38,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:01:38,934 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:38,934 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:01:40,422 INFO L85 PathProgramCache]: Analyzing trace with hash -2032111807, now seen corresponding path program 14 times [2024-05-06 18:01:40,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:40,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:40,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:40,587 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:01:40,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:40,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:40,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:40,745 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:01:40,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:01:40,856 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:40,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:01:40,938 INFO L85 PathProgramCache]: Analyzing trace with hash 46290037, now seen corresponding path program 15 times [2024-05-06 18:01:40,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:40,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:40,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:41,087 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:41,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:41,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:41,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:41,295 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:41,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:01:41,398 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:41,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:01:41,465 INFO L85 PathProgramCache]: Analyzing trace with hash 1103443637, now seen corresponding path program 16 times [2024-05-06 18:01:41,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:41,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:41,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:41,608 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:01:41,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:41,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:41,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:41,754 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:01:41,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:01:41,865 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:41,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:01:43,908 INFO L85 PathProgramCache]: Analyzing trace with hash 1815327873, now seen corresponding path program 17 times [2024-05-06 18:01:43,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:43,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:43,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:44,049 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:44,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:44,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:44,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:44,195 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:44,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:01:44,301 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:44,302 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:01:44,365 INFO L85 PathProgramCache]: Analyzing trace with hash -1746189313, now seen corresponding path program 18 times [2024-05-06 18:01:44,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:44,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:44,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:44,582 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:01:44,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:44,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:44,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:44,751 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:01:44,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:01:44,859 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:44,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:01:46,896 INFO L85 PathProgramCache]: Analyzing trace with hash 1859715319, now seen corresponding path program 19 times [2024-05-06 18:01:46,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:46,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:46,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:47,038 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:47,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:47,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:47,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:47,180 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:47,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:47,289 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:47,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:47,314 INFO L85 PathProgramCache]: Analyzing trace with hash 654457215, now seen corresponding path program 20 times [2024-05-06 18:01:47,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:47,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:47,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:47,460 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:47,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:47,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:47,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:47,603 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:47,698 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:01:47,705 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:47,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:01:49,737 INFO L85 PathProgramCache]: Analyzing trace with hash -1186662221, now seen corresponding path program 21 times [2024-05-06 18:01:49,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:49,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:49,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:49,953 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:49,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:49,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:49,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:50,098 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:50,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:50,202 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:50,202 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:50,226 INFO L85 PathProgramCache]: Analyzing trace with hash 1868177410, now seen corresponding path program 22 times [2024-05-06 18:01:50,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:50,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:50,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:50,373 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:50,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:50,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:50,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:50,524 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:50,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:50,629 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:50,630 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:50,654 INFO L85 PathProgramCache]: Analyzing trace with hash 1961728470, now seen corresponding path program 1 times [2024-05-06 18:01:50,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:50,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:50,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:50,803 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:50,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:50,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:50,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:51,029 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:01:51,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:01:51,130 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:01:51,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:01:51,150 INFO L85 PathProgramCache]: Analyzing trace with hash -1654908912, now seen corresponding path program 2 times [2024-05-06 18:01:51,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:51,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:51,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:51,310 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:51,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:51,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:51,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:51,463 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:51,495 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:51,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:53,566 INFO L85 PathProgramCache]: Analyzing trace with hash -1948974476, now seen corresponding path program 1 times [2024-05-06 18:01:53,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:53,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:53,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:53,689 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:53,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:53,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:53,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:53,813 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:53,845 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:53,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:55,904 INFO L85 PathProgramCache]: Analyzing trace with hash 1530558073, now seen corresponding path program 1 times [2024-05-06 18:01:55,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:55,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:55,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:56,176 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:56,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:56,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:56,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:56,296 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:56,326 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:56,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:01:58,401 INFO L85 PathProgramCache]: Analyzing trace with hash 1764716819, now seen corresponding path program 2 times [2024-05-06 18:01:58,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:58,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:58,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:58,535 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:58,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:01:58,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:01:58,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:01:58,666 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:01:58,698 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:01:58,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:00,754 INFO L85 PathProgramCache]: Analyzing trace with hash -737780046, now seen corresponding path program 2 times [2024-05-06 18:02:00,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:00,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:00,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:00,956 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:00,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:00,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:00,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:01,110 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:01,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:02:01,188 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:01,188 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:02:01,204 INFO L85 PathProgramCache]: Analyzing trace with hash -1737833760, now seen corresponding path program 1 times [2024-05-06 18:02:01,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:01,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:01,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:01,487 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:01,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:01,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:01,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:01,596 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:01,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:02:01,680 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:01,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:02:01,699 INFO L85 PathProgramCache]: Analyzing trace with hash -1669695034, now seen corresponding path program 2 times [2024-05-06 18:02:01,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:01,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:01,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:01,813 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:01,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:01,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:01,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:02,006 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:02,040 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:02:02,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:04,119 INFO L85 PathProgramCache]: Analyzing trace with hash 1069889706, now seen corresponding path program 1 times [2024-05-06 18:02:04,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:04,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:04,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:04,236 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:04,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:04,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:04,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:04,353 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:04,390 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:02:04,390 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:06,446 INFO L85 PathProgramCache]: Analyzing trace with hash -752566168, now seen corresponding path program 2 times [2024-05-06 18:02:06,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:06,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:06,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:06,561 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:06,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:06,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:06,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:06,677 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:06,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:02:06,761 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:06,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:02:06,783 INFO L85 PathProgramCache]: Analyzing trace with hash 1467961496, now seen corresponding path program 1 times [2024-05-06 18:02:06,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:06,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:06,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:07,007 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:07,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:07,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:07,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:07,113 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:07,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:02:07,199 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:07,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:02:07,219 INFO L85 PathProgramCache]: Analyzing trace with hash -890125042, now seen corresponding path program 2 times [2024-05-06 18:02:07,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:07,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:07,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:07,337 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:07,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:07,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:07,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:07,449 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:07,485 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:02:07,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:09,543 INFO L85 PathProgramCache]: Analyzing trace with hash -433255950, now seen corresponding path program 1 times [2024-05-06 18:02:09,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:09,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:09,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:09,789 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:09,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:09,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:09,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:09,908 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:09,945 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:02:09,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:11,990 INFO L85 PathProgramCache]: Analyzing trace with hash 27003824, now seen corresponding path program 2 times [2024-05-06 18:02:11,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:11,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:12,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:12,103 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:12,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:12,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:12,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:12,219 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:12,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:02:12,302 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:12,302 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:02:12,322 INFO L85 PathProgramCache]: Analyzing trace with hash -783930398, now seen corresponding path program 1 times [2024-05-06 18:02:12,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:12,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:12,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:12,426 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:12,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:12,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:12,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:12,646 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:12,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:02:12,726 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:12,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:02:12,744 INFO L85 PathProgramCache]: Analyzing trace with hash -916214652, now seen corresponding path program 2 times [2024-05-06 18:02:12,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:12,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:12,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:12,856 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:12,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:12,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:12,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:12,972 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:13,005 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:02:13,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:15,057 INFO L85 PathProgramCache]: Analyzing trace with hash 1242863080, now seen corresponding path program 1 times [2024-05-06 18:02:15,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:15,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:15,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:15,176 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:15,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:15,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:15,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:15,363 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:15,411 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:02:15,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:17,464 INFO L85 PathProgramCache]: Analyzing trace with hash 914214, now seen corresponding path program 2 times [2024-05-06 18:02:17,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:17,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:17,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:17,605 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:17,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:17,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:17,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:17,747 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:17,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:02:17,831 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:17,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:02:17,849 INFO L85 PathProgramCache]: Analyzing trace with hash -856572069, now seen corresponding path program 23 times [2024-05-06 18:02:17,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:17,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:17,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:17,952 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:17,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:17,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:17,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:18,058 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:18,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:02:18,136 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:18,136 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:02:18,153 INFO L85 PathProgramCache]: Analyzing trace with hash 45193195, now seen corresponding path program 24 times [2024-05-06 18:02:18,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:18,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:18,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:18,294 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:18,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:18,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:18,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:18,560 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:18,591 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:02:18,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:20,660 INFO L85 PathProgramCache]: Analyzing trace with hash -549671793, now seen corresponding path program 7 times [2024-05-06 18:02:20,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:20,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:20,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:20,813 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:20,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:20,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:20,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:20,965 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:21,005 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:02:21,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:23,074 INFO L85 PathProgramCache]: Analyzing trace with hash 962322061, now seen corresponding path program 8 times [2024-05-06 18:02:23,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:23,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:23,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:23,231 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:23,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:23,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:23,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:23,383 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:23,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:02:23,475 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:23,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:02:23,530 INFO L85 PathProgramCache]: Analyzing trace with hash -1224232532, now seen corresponding path program 1 times [2024-05-06 18:02:23,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:23,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:23,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:23,808 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:23,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:23,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:23,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:23,945 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:24,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:02:24,018 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:24,018 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:02:26,046 INFO L85 PathProgramCache]: Analyzing trace with hash -1643449772, now seen corresponding path program 2 times [2024-05-06 18:02:26,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:26,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:26,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:26,185 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:26,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:26,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:26,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:26,325 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:26,356 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:02:26,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:28,427 INFO L85 PathProgramCache]: Analyzing trace with hash 1413205694, now seen corresponding path program 3 times [2024-05-06 18:02:28,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:28,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:28,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:28,579 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:28,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:28,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:28,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:28,738 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:28,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:02:28,819 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:28,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:02:29,213 INFO L85 PathProgramCache]: Analyzing trace with hash -178038562, now seen corresponding path program 9 times [2024-05-06 18:02:29,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:29,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:29,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:29,485 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:29,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:29,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:29,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:29,612 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:29,641 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:02:29,642 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:31,709 INFO L85 PathProgramCache]: Analyzing trace with hash -178038562, now seen corresponding path program 10 times [2024-05-06 18:02:31,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:31,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:31,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:31,819 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:31,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:31,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:31,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:31,924 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:31,953 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:02:31,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:33,997 INFO L85 PathProgramCache]: Analyzing trace with hash -1426313360, now seen corresponding path program 11 times [2024-05-06 18:02:33,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:33,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:34,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:34,176 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:34,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:34,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:34,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:34,287 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:34,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:02:34,367 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:34,368 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:02:36,426 INFO L85 PathProgramCache]: Analyzing trace with hash -1266040606, now seen corresponding path program 12 times [2024-05-06 18:02:36,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:36,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:36,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:36,628 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:36,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:36,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:36,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:36,747 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:36,778 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:02:36,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:02:38,865 INFO L85 PathProgramCache]: Analyzing trace with hash -592552525, now seen corresponding path program 13 times [2024-05-06 18:02:38,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:38,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:38,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:38,979 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:38,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:38,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:39,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:39,094 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:39,173 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:02:39,179 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:39,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:02:41,229 INFO L85 PathProgramCache]: Analyzing trace with hash 1379730264, now seen corresponding path program 1 times [2024-05-06 18:02:41,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:41,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:41,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:41,334 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:41,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:41,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:41,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:41,440 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:41,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:02:41,520 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:41,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:02:43,546 INFO L85 PathProgramCache]: Analyzing trace with hash 1198166824, now seen corresponding path program 2 times [2024-05-06 18:02:43,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:43,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:43,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:43,721 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:43,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:43,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:43,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:43,834 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:43,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:02:43,915 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:43,915 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:02:45,941 INFO L85 PathProgramCache]: Analyzing trace with hash 44507385, now seen corresponding path program 1 times [2024-05-06 18:02:45,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:45,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:45,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:46,045 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:46,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:46,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:46,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:46,147 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:46,221 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:02:46,227 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:46,227 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:02:46,291 INFO L85 PathProgramCache]: Analyzing trace with hash -660643993, now seen corresponding path program 2 times [2024-05-06 18:02:46,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:46,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:46,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:46,402 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:46,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:46,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:46,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:46,513 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:46,637 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:02:46,641 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:46,642 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:02:48,670 INFO L85 PathProgramCache]: Analyzing trace with hash 832719722, now seen corresponding path program 1 times [2024-05-06 18:02:48,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:48,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:48,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:48,775 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:48,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:48,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:48,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:48,880 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:48,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:02:48,946 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:48,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:02:51,000 INFO L85 PathProgramCache]: Analyzing trace with hash -200416042, now seen corresponding path program 2 times [2024-05-06 18:02:51,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:51,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:51,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:51,122 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:51,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:51,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:51,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:51,240 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:51,316 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:02:51,322 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:51,322 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:02:51,384 INFO L85 PathProgramCache]: Analyzing trace with hash -665874725, now seen corresponding path program 1 times [2024-05-06 18:02:51,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:51,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:51,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:51,486 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:51,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:51,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:51,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:51,650 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:51,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:02:51,709 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:51,709 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:02:53,755 INFO L85 PathProgramCache]: Analyzing trace with hash 1010118981, now seen corresponding path program 2 times [2024-05-06 18:02:53,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:53,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:53,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:53,863 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:53,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:53,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:53,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:53,973 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:54,038 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:02:54,042 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:54,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:02:56,154 INFO L85 PathProgramCache]: Analyzing trace with hash -1406953140, now seen corresponding path program 1 times [2024-05-06 18:02:56,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:56,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:56,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:56,255 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:56,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:56,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:56,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:56,354 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:02:56,438 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:02:56,443 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:56,444 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:02:58,496 INFO L85 PathProgramCache]: Analyzing trace with hash 166647476, now seen corresponding path program 2 times [2024-05-06 18:02:58,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:58,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:58,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:58,601 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:58,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:02:58,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:02:58,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:02:58,788 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:02:58,853 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:02:58,858 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:02:58,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:03:00,903 INFO L85 PathProgramCache]: Analyzing trace with hash 1062993086, now seen corresponding path program 25 times [2024-05-06 18:03:00,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:00,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:00,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:01,001 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:01,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:01,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:01,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:01,098 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:01,161 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:03:01,165 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:01,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:03:01,650 INFO L85 PathProgramCache]: Analyzing trace with hash 2071519490, now seen corresponding path program 26 times [2024-05-06 18:03:01,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:01,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:01,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:01,753 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:01,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:01,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:01,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:01,857 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:01,900 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:01,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:03:03,962 INFO L85 PathProgramCache]: Analyzing trace with hash 1794383366, now seen corresponding path program 14 times [2024-05-06 18:03:03,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:03,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:03,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:04,113 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:04,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:04,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:04,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:04,214 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:04,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:03:04,301 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:04,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:03:06,675 INFO L85 PathProgramCache]: Analyzing trace with hash -208690048, now seen corresponding path program 3 times [2024-05-06 18:03:06,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:06,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:06,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:06,774 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:06,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:06,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:06,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:06,872 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:06,907 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:06,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:03:09,004 INFO L85 PathProgramCache]: Analyzing trace with hash 1825554330, now seen corresponding path program 15 times [2024-05-06 18:03:09,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:09,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:09,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:09,095 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:09,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:09,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:09,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:09,200 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:09,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:09,290 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:09,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:09,307 INFO L85 PathProgramCache]: Analyzing trace with hash 2001919765, now seen corresponding path program 27 times [2024-05-06 18:03:09,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:09,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:09,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:09,463 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:09,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:09,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:09,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:09,551 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:09,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:03:09,618 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:09,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:03:11,682 INFO L85 PathProgramCache]: Analyzing trace with hash 430911193, now seen corresponding path program 28 times [2024-05-06 18:03:11,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:11,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:11,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:11,774 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:11,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:11,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:11,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:11,865 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:11,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:11,935 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:11,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:11,950 INFO L85 PathProgramCache]: Analyzing trace with hash -1859034140, now seen corresponding path program 29 times [2024-05-06 18:03:11,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:11,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:11,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:12,046 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:12,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:12,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:12,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:12,144 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:12,175 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:12,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:03:14,245 INFO L85 PathProgramCache]: Analyzing trace with hash -953379512, now seen corresponding path program 16 times [2024-05-06 18:03:14,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:14,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:14,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:14,412 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:14,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:14,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:14,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:14,535 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:14,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:14,620 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:14,621 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:14,642 INFO L85 PathProgramCache]: Analyzing trace with hash -413606267, now seen corresponding path program 30 times [2024-05-06 18:03:14,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:14,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:14,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:14,751 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:14,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:14,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:14,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:14,930 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:14,964 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:14,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:03:17,019 INFO L85 PathProgramCache]: Analyzing trace with hash -941905274, now seen corresponding path program 17 times [2024-05-06 18:03:17,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:17,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:17,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:17,118 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:17,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:17,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:17,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:17,215 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:17,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:17,299 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:17,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:17,319 INFO L85 PathProgramCache]: Analyzing trace with hash 16291591, now seen corresponding path program 31 times [2024-05-06 18:03:17,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:17,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:17,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:17,424 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:17,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:17,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:17,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:17,519 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:17,549 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:17,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:03:19,610 INFO L85 PathProgramCache]: Analyzing trace with hash 1427404971, now seen corresponding path program 18 times [2024-05-06 18:03:19,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:19,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:19,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:19,763 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:19,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:19,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:19,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:19,868 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:19,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:19,997 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:19,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:20,017 INFO L85 PathProgramCache]: Analyzing trace with hash 1058079106, now seen corresponding path program 32 times [2024-05-06 18:03:20,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:20,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:20,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:20,115 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:20,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:20,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:20,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:20,211 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:20,247 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:20,248 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:03:22,326 INFO L85 PathProgramCache]: Analyzing trace with hash 933420457, now seen corresponding path program 19 times [2024-05-06 18:03:22,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:22,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:22,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:22,428 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:22,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:22,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:22,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:22,534 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:22,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:22,620 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:22,620 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:22,639 INFO L85 PathProgramCache]: Analyzing trace with hash -746170106, now seen corresponding path program 33 times [2024-05-06 18:03:22,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:22,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:22,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:22,836 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:22,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:22,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:22,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:22,954 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:22,994 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:22,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:03:25,084 INFO L85 PathProgramCache]: Analyzing trace with hash -705493014, now seen corresponding path program 20 times [2024-05-06 18:03:25,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:25,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:25,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:25,189 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:25,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:25,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:25,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:25,296 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:25,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:25,369 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:25,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:25,385 INFO L85 PathProgramCache]: Analyzing trace with hash -1746682845, now seen corresponding path program 34 times [2024-05-06 18:03:25,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:25,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:25,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:25,484 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:25,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:25,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:25,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:25,682 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:25,713 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:25,713 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:03:27,764 INFO L85 PathProgramCache]: Analyzing trace with hash 170958760, now seen corresponding path program 21 times [2024-05-06 18:03:27,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:27,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:27,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:27,863 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:27,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:27,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:27,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:27,962 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:28,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:28,032 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:28,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:28,048 INFO L85 PathProgramCache]: Analyzing trace with hash 473345676, now seen corresponding path program 35 times [2024-05-06 18:03:28,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:28,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:28,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:28,143 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:28,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:28,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:28,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:28,238 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:28,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:03:28,304 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:28,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:03:30,347 INFO L85 PathProgramCache]: Analyzing trace with hash 1788814652, now seen corresponding path program 36 times [2024-05-06 18:03:30,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:30,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:30,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:30,517 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:30,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:30,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:30,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:30,631 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:30,711 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:03:30,718 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:30,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:03:33,174 INFO L85 PathProgramCache]: Analyzing trace with hash -901825380, now seen corresponding path program 37 times [2024-05-06 18:03:33,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:33,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:33,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:33,271 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:33,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:33,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:33,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:33,369 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:03:33,441 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:03:33,447 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:33,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:03:33,960 INFO L85 PathProgramCache]: Analyzing trace with hash 1422510627, now seen corresponding path program 38 times [2024-05-06 18:03:33,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:33,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:33,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:34,059 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:34,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:34,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:34,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:34,219 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:34,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:34,285 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:34,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:34,300 INFO L85 PathProgramCache]: Analyzing trace with hash 1422510627, now seen corresponding path program 39 times [2024-05-06 18:03:34,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:34,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:34,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:34,400 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:34,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:34,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:34,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:34,500 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:34,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:03:34,567 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:34,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:03:36,589 INFO L85 PathProgramCache]: Analyzing trace with hash 638881463, now seen corresponding path program 40 times [2024-05-06 18:03:36,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:36,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:36,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:36,740 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:03:36,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:36,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:36,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:36,903 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:03:37,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:03:37,049 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:37,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:03:39,074 INFO L85 PathProgramCache]: Analyzing trace with hash -1194728641, now seen corresponding path program 41 times [2024-05-06 18:03:39,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:39,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:39,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:39,180 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:39,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:39,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:39,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:39,291 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:39,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:03:39,375 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:39,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:03:39,425 INFO L85 PathProgramCache]: Analyzing trace with hash 2020888703, now seen corresponding path program 42 times [2024-05-06 18:03:39,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:39,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:39,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:39,532 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:03:39,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:39,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:39,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:39,640 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:03:39,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:03:39,721 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:39,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:03:40,603 INFO L85 PathProgramCache]: Analyzing trace with hash 251274359, now seen corresponding path program 43 times [2024-05-06 18:03:40,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:40,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:40,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:40,755 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:40,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:40,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:40,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:40,866 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:40,941 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:03:40,947 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:40,947 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:03:41,205 INFO L85 PathProgramCache]: Analyzing trace with hash -1855141643, now seen corresponding path program 44 times [2024-05-06 18:03:41,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:41,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:41,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:41,312 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:03:41,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:41,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:41,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:41,419 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:03:41,494 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:03:41,499 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:41,500 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:03:43,549 INFO L85 PathProgramCache]: Analyzing trace with hash -1238779327, now seen corresponding path program 45 times [2024-05-06 18:03:43,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:43,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:43,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:43,740 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:43,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:43,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:43,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:43,862 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:43,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:43,948 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:43,948 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:43,968 INFO L85 PathProgramCache]: Analyzing trace with hash 837583861, now seen corresponding path program 46 times [2024-05-06 18:03:43,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:43,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:43,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:44,090 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:44,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:44,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:44,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:44,210 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:44,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:03:44,290 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:44,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:03:46,369 INFO L85 PathProgramCache]: Analyzing trace with hash 195296509, now seen corresponding path program 47 times [2024-05-06 18:03:46,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:46,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:46,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:46,524 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:46,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:46,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:46,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:46,629 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:46,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:46,695 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:46,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:46,711 INFO L85 PathProgramCache]: Analyzing trace with hash 1759225080, now seen corresponding path program 48 times [2024-05-06 18:03:46,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:46,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:46,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:46,816 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:46,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:46,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:46,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:46,921 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:47,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:47,008 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:47,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:47,027 INFO L85 PathProgramCache]: Analyzing trace with hash 720709792, now seen corresponding path program 3 times [2024-05-06 18:03:47,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:47,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:47,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:47,229 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:47,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:47,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:47,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:47,358 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:47,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:47,439 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:47,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:47,459 INFO L85 PathProgramCache]: Analyzing trace with hash 513793030, now seen corresponding path program 4 times [2024-05-06 18:03:47,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:47,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:47,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:47,597 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:47,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:47,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:47,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:47,737 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:47,773 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:47,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:03:49,854 INFO L85 PathProgramCache]: Analyzing trace with hash -582694166, now seen corresponding path program 3 times [2024-05-06 18:03:49,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:49,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:49,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:50,067 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:50,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:50,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:50,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:50,186 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:50,220 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:50,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:03:52,297 INFO L85 PathProgramCache]: Analyzing trace with hash -1678939921, now seen corresponding path program 4 times [2024-05-06 18:03:52,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:52,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:52,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:52,420 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:52,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:52,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:52,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:52,548 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:52,591 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:52,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:03:54,678 INFO L85 PathProgramCache]: Analyzing trace with hash 1216367837, now seen corresponding path program 5 times [2024-05-06 18:03:54,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:54,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:54,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:54,932 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:54,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:54,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:54,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:55,069 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:55,137 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:55,137 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:03:57,201 INFO L85 PathProgramCache]: Analyzing trace with hash 1430921896, now seen corresponding path program 4 times [2024-05-06 18:03:57,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:57,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:57,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:57,319 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:57,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:57,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:57,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:57,529 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:57,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:57,610 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:57,610 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:57,628 INFO L85 PathProgramCache]: Analyzing trace with hash 993080022, now seen corresponding path program 3 times [2024-05-06 18:03:57,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:57,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:57,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:57,732 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:57,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:57,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:57,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:57,837 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:03:57,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:03:57,910 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:03:57,910 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:03:57,925 INFO L85 PathProgramCache]: Analyzing trace with hash 1448304400, now seen corresponding path program 4 times [2024-05-06 18:03:57,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:57,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:57,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:58,047 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:58,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:03:58,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:03:58,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:03:58,273 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:03:58,312 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:03:58,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:00,398 INFO L85 PathProgramCache]: Analyzing trace with hash 698321268, now seen corresponding path program 3 times [2024-05-06 18:04:00,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:00,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:00,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:00,523 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:00,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:00,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:00,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:00,638 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:00,671 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:00,672 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:02,733 INFO L85 PathProgramCache]: Analyzing trace with hash -1929534030, now seen corresponding path program 4 times [2024-05-06 18:04:02,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:02,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:02,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:02,936 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:02,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:02,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:02,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:03,053 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:03,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:04:03,137 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:03,137 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:04:03,157 INFO L85 PathProgramCache]: Analyzing trace with hash -1630533150, now seen corresponding path program 3 times [2024-05-06 18:04:03,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:03,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:03,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:03,264 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:03,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:03,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:03,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:03,369 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:03,434 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:04:03,438 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:03,438 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:04:03,453 INFO L85 PathProgramCache]: Analyzing trace with hash -1759375740, now seen corresponding path program 4 times [2024-05-06 18:04:03,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:03,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:03,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:03,631 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:03,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:03,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:03,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:03,774 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:03,823 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:03,823 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:05,909 INFO L85 PathProgramCache]: Analyzing trace with hash 247494632, now seen corresponding path program 3 times [2024-05-06 18:04:05,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:05,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:05,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:06,026 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:06,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:06,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:06,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:06,211 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:06,263 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:06,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:08,325 INFO L85 PathProgramCache]: Analyzing trace with hash -842246874, now seen corresponding path program 4 times [2024-05-06 18:04:08,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:08,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:08,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:08,438 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:08,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:08,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:08,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:08,551 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:08,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:04:08,630 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:08,630 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:04:08,649 INFO L85 PathProgramCache]: Analyzing trace with hash 1471422808, now seen corresponding path program 3 times [2024-05-06 18:04:08,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:08,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:08,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:08,805 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:08,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:08,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:08,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:08,927 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:09,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:04:09,007 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:09,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:04:09,026 INFO L85 PathProgramCache]: Analyzing trace with hash -1914086322, now seen corresponding path program 4 times [2024-05-06 18:04:09,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:09,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:09,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:09,154 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:09,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:09,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:09,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:09,283 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:09,317 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:09,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:11,394 INFO L85 PathProgramCache]: Analyzing trace with hash -1090481870, now seen corresponding path program 3 times [2024-05-06 18:04:11,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:11,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:11,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:11,556 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:11,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:11,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:11,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:11,670 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:11,703 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:11,703 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:13,754 INFO L85 PathProgramCache]: Analyzing trace with hash -996957456, now seen corresponding path program 4 times [2024-05-06 18:04:13,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:13,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:13,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:13,864 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:13,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:13,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:13,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:14,045 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:14,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:04:14,144 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:14,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:04:14,170 INFO L85 PathProgramCache]: Analyzing trace with hash 47465253, now seen corresponding path program 49 times [2024-05-06 18:04:14,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:14,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:14,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:14,296 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:14,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:14,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:14,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:14,416 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:14,505 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:04:14,510 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:14,510 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:04:14,534 INFO L85 PathProgramCache]: Analyzing trace with hash -1372469535, now seen corresponding path program 50 times [2024-05-06 18:04:14,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:14,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:14,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:14,726 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:14,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:14,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:14,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:14,853 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:14,900 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:14,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:16,952 INFO L85 PathProgramCache]: Analyzing trace with hash 1453268997, now seen corresponding path program 22 times [2024-05-06 18:04:16,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:16,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:16,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:17,071 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:17,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:17,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:17,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:17,241 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:17,278 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:17,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:19,349 INFO L85 PathProgramCache]: Analyzing trace with hash -455340669, now seen corresponding path program 23 times [2024-05-06 18:04:19,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:19,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:19,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:19,459 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:19,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:19,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:19,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:19,569 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:19,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:04:19,640 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:19,640 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:04:21,684 INFO L85 PathProgramCache]: Analyzing trace with hash -880356830, now seen corresponding path program 4 times [2024-05-06 18:04:21,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:21,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:21,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:21,861 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:21,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:21,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:21,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:21,986 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:22,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:04:22,073 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:22,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:04:24,140 INFO L85 PathProgramCache]: Analyzing trace with hash 1352931102, now seen corresponding path program 5 times [2024-05-06 18:04:24,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:24,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:24,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:24,260 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:24,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:24,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:24,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:24,440 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:24,475 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:24,475 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:26,544 INFO L85 PathProgramCache]: Analyzing trace with hash 19726088, now seen corresponding path program 6 times [2024-05-06 18:04:26,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:26,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:26,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:26,662 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:26,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:26,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:26,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:26,781 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:26,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:04:26,895 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:26,895 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:04:26,957 INFO L85 PathProgramCache]: Analyzing trace with hash 1357074856, now seen corresponding path program 24 times [2024-05-06 18:04:26,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:26,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:26,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:27,084 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:27,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:27,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:27,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:27,208 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:27,243 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:27,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:29,322 INFO L85 PathProgramCache]: Analyzing trace with hash 1357074856, now seen corresponding path program 25 times [2024-05-06 18:04:29,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:29,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:29,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:29,484 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:29,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:29,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:29,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:29,593 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:29,624 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:29,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:31,676 INFO L85 PathProgramCache]: Analyzing trace with hash -229900614, now seen corresponding path program 26 times [2024-05-06 18:04:31,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:31,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:31,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:31,795 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:31,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:31,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:31,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:31,962 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:32,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:04:32,047 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:32,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:04:32,110 INFO L85 PathProgramCache]: Analyzing trace with hash 1463016152, now seen corresponding path program 27 times [2024-05-06 18:04:32,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:32,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:32,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:32,248 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:32,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:32,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:32,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:32,429 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:32,465 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:32,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:34,508 INFO L85 PathProgramCache]: Analyzing trace with hash -1891138947, now seen corresponding path program 28 times [2024-05-06 18:04:34,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:34,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:34,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:34,681 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:34,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:34,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:34,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:34,802 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:34,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:04:34,885 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:34,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:04:36,942 INFO L85 PathProgramCache]: Analyzing trace with hash -371865266, now seen corresponding path program 3 times [2024-05-06 18:04:36,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:36,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:36,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:37,044 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:37,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:37,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:37,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:37,191 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:37,254 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:04:37,259 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:37,259 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:04:39,356 INFO L85 PathProgramCache]: Analyzing trace with hash -1900387726, now seen corresponding path program 4 times [2024-05-06 18:04:39,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:39,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:39,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:39,469 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:39,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:39,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:39,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:39,627 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:39,703 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 18:04:39,709 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:39,709 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 18:04:41,733 INFO L85 PathProgramCache]: Analyzing trace with hash -427637693, now seen corresponding path program 3 times [2024-05-06 18:04:41,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:41,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:41,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:41,836 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:41,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:41,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:41,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:41,963 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:42,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 18:04:42,090 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:42,090 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 18:04:42,217 INFO L85 PathProgramCache]: Analyzing trace with hash 2010349277, now seen corresponding path program 4 times [2024-05-06 18:04:42,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:42,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:42,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:42,343 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:42,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:42,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:42,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:42,451 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:42,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:04:42,532 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:42,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:04:44,565 INFO L85 PathProgramCache]: Analyzing trace with hash 1233131232, now seen corresponding path program 3 times [2024-05-06 18:04:44,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:44,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:44,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:44,735 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:44,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:44,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:44,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:44,836 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:44,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 18:04:44,914 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:44,915 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 18:04:46,965 INFO L85 PathProgramCache]: Analyzing trace with hash 717029024, now seen corresponding path program 4 times [2024-05-06 18:04:46,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:46,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:46,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:47,112 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:47,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:47,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:47,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:47,238 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:04:47,288 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:47,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:49,575 INFO L85 PathProgramCache]: Analyzing trace with hash 328879868, now seen corresponding path program 29 times [2024-05-06 18:04:49,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:49,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:49,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:49,678 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:04:49,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:49,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:49,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:49,851 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:04:49,882 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:49,882 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:51,923 INFO L85 PathProgramCache]: Analyzing trace with hash 460496016, now seen corresponding path program 30 times [2024-05-06 18:04:51,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:51,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:51,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:52,018 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:04:52,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:52,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:52,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:52,157 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:04:52,242 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:04:52,247 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:52,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:04:52,261 INFO L85 PathProgramCache]: Analyzing trace with hash -538449847, now seen corresponding path program 51 times [2024-05-06 18:04:52,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:52,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:52,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:52,353 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:04:52,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:52,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:52,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:52,446 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:04:52,523 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:04:52,528 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:52,528 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:04:52,546 INFO L85 PathProgramCache]: Analyzing trace with hash -1411037648, now seen corresponding path program 52 times [2024-05-06 18:04:52,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:52,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:52,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:52,696 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:52,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:52,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:52,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:52,812 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:52,846 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:52,846 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:54,935 INFO L85 PathProgramCache]: Analyzing trace with hash 2010318996, now seen corresponding path program 31 times [2024-05-06 18:04:54,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:54,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:54,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:55,085 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:55,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:55,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:55,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:55,192 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:55,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:04:55,278 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:55,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:04:55,298 INFO L85 PathProgramCache]: Analyzing trace with hash 511425721, now seen corresponding path program 53 times [2024-05-06 18:04:55,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:55,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:55,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:55,429 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:04:55,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:55,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:55,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:55,526 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:04:55,559 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:55,560 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:04:57,622 INFO L85 PathProgramCache]: Analyzing trace with hash -493908782, now seen corresponding path program 32 times [2024-05-06 18:04:57,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:57,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:57,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:57,752 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:04:57,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:57,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:57,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:57,897 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:04:57,976 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:04:57,982 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:04:57,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:04:58,005 INFO L85 PathProgramCache]: Analyzing trace with hash 307837755, now seen corresponding path program 54 times [2024-05-06 18:04:58,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:58,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:58,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:58,150 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:58,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:04:58,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:04:58,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:04:58,425 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:04:58,459 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:04:58,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:05:00,543 INFO L85 PathProgramCache]: Analyzing trace with hash -278107169, now seen corresponding path program 33 times [2024-05-06 18:05:00,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:00,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:00,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:00,653 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:00,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:00,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:00,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:00,827 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:00,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:05:00,913 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:00,914 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:05:00,932 INFO L85 PathProgramCache]: Analyzing trace with hash -574649138, now seen corresponding path program 55 times [2024-05-06 18:05:00,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:00,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:00,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:01,033 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:01,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:01,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:01,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:01,167 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:01,202 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:01,202 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:05:03,280 INFO L85 PathProgramCache]: Analyzing trace with hash 1224966621, now seen corresponding path program 34 times [2024-05-06 18:05:03,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:03,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:03,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:03,382 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:03,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:03,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:03,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:03,526 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:03,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:05:03,621 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:03,621 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:05:03,652 INFO L85 PathProgramCache]: Analyzing trace with hash 371613266, now seen corresponding path program 56 times [2024-05-06 18:05:03,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:03,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:03,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:03,809 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:03,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:03,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:03,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:03,922 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:03,964 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:03,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:05:06,018 INFO L85 PathProgramCache]: Analyzing trace with hash -67772874, now seen corresponding path program 35 times [2024-05-06 18:05:06,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:06,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:06,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:06,186 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:06,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:06,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:06,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:06,290 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:06,373 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 18:05:06,378 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:06,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 18:05:06,398 INFO L85 PathProgramCache]: Analyzing trace with hash -690972841, now seen corresponding path program 57 times [2024-05-06 18:05:06,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:06,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:06,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:06,522 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:06,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:06,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:06,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:06,619 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:06,652 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:06,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:05:08,707 INFO L85 PathProgramCache]: Analyzing trace with hash 1288742132, now seen corresponding path program 36 times [2024-05-06 18:05:08,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:08,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:08,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:08,864 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:08,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:08,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:08,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:09,025 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:09,089 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:09,089 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:05:11,197 INFO L85 PathProgramCache]: Analyzing trace with hash 779841846, now seen corresponding path program 5 times [2024-05-06 18:05:11,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:11,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:11,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:11,323 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:11,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:11,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:11,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:11,496 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:11,531 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:11,552 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:05:13,638 INFO L85 PathProgramCache]: Analyzing trace with hash -1150352581, now seen corresponding path program 7 times [2024-05-06 18:05:13,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:13,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:13,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:13,791 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:13,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:13,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:13,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:13,916 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:13,949 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:13,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:05:15,997 INFO L85 PathProgramCache]: Analyzing trace with hash 790786833, now seen corresponding path program 8 times [2024-05-06 18:05:15,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:15,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:16,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:16,187 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:16,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:16,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:16,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:16,391 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:16,428 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:16,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:05:18,505 INFO L85 PathProgramCache]: Analyzing trace with hash -1432225804, now seen corresponding path program 6 times [2024-05-06 18:05:18,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:18,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:18,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:18,687 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:18,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:18,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:18,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:18,806 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:18,935 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:18,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:05:20,994 INFO L85 PathProgramCache]: Analyzing trace with hash 2037093948, now seen corresponding path program 9 times [2024-05-06 18:05:20,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:20,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:21,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:21,126 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:21,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:21,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:21,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:21,289 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:21,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:21,415 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:21,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:21,523 INFO L85 PathProgramCache]: Analyzing trace with hash -1088879983, now seen corresponding path program 58 times [2024-05-06 18:05:21,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:21,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:21,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:21,676 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:21,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:21,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:21,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:21,849 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:21,889 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:21,895 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:21,895 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:21,970 INFO L85 PathProgramCache]: Analyzing trace with hash 474607001, now seen corresponding path program 59 times [2024-05-06 18:05:21,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:21,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:22,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:22,137 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:22,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:22,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:22,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:22,272 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:22,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:22,326 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:22,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:22,438 INFO L85 PathProgramCache]: Analyzing trace with hash -1887594509, now seen corresponding path program 60 times [2024-05-06 18:05:22,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:22,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:22,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:22,597 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:22,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:22,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:22,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:22,776 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:22,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:22,843 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:22,843 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:22,955 INFO L85 PathProgramCache]: Analyzing trace with hash -639133439, now seen corresponding path program 61 times [2024-05-06 18:05:22,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:22,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:22,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:23,108 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:23,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:23,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:23,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:23,255 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:23,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:23,328 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:23,329 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:23,424 INFO L85 PathProgramCache]: Analyzing trace with hash -594777205, now seen corresponding path program 62 times [2024-05-06 18:05:23,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:23,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:23,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:23,676 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:23,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:23,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:23,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:23,856 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:23,903 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:23,909 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:23,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:23,985 INFO L85 PathProgramCache]: Analyzing trace with hash -1082374629, now seen corresponding path program 63 times [2024-05-06 18:05:23,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:23,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:24,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:24,130 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:24,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:24,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:24,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:24,279 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:24,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:24,352 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:24,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:24,430 INFO L85 PathProgramCache]: Analyzing trace with hash -495815119, now seen corresponding path program 64 times [2024-05-06 18:05:24,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:24,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:24,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:24,586 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:24,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:24,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:24,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:24,703 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:24,746 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:24,755 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:24,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:24,822 INFO L85 PathProgramCache]: Analyzing trace with hash 1322419288, now seen corresponding path program 65 times [2024-05-06 18:05:24,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:24,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:24,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:24,930 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:24,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:24,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:24,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:25,094 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:25,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:25,147 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:25,147 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:25,222 INFO L85 PathProgramCache]: Analyzing trace with hash 1995158398, now seen corresponding path program 66 times [2024-05-06 18:05:25,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:25,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:25,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:25,357 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:25,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:25,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:25,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:25,473 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:25,513 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:25,519 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:25,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:25,590 INFO L85 PathProgramCache]: Analyzing trace with hash -871976910, now seen corresponding path program 67 times [2024-05-06 18:05:25,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:25,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:25,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:25,750 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:25,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:25,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:25,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:25,877 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:25,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:25,922 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:25,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:25,995 INFO L85 PathProgramCache]: Analyzing trace with hash -451169195, now seen corresponding path program 68 times [2024-05-06 18:05:25,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:25,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:26,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:26,119 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:26,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:26,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:26,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:26,338 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:26,459 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:26,465 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:26,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:26,544 INFO L85 PathProgramCache]: Analyzing trace with hash 776885679, now seen corresponding path program 6 times [2024-05-06 18:05:26,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:26,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:26,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:26,720 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:26,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:26,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:26,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:26,907 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:26,948 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:26,953 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:26,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:27,025 INFO L85 PathProgramCache]: Analyzing trace with hash -803714718, now seen corresponding path program 7 times [2024-05-06 18:05:27,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:27,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:27,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:27,276 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:27,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:27,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:27,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:27,426 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:27,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:27,486 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:27,486 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:27,569 INFO L85 PathProgramCache]: Analyzing trace with hash -342539638, now seen corresponding path program 8 times [2024-05-06 18:05:27,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:27,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:27,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:27,718 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:27,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:27,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:27,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:27,864 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:27,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:27,938 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:27,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:28,008 INFO L85 PathProgramCache]: Analyzing trace with hash -344350657, now seen corresponding path program 37 times [2024-05-06 18:05:28,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:28,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:28,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:28,263 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:28,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:28,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:28,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:28,384 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:28,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:28,433 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:28,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:28,541 INFO L85 PathProgramCache]: Analyzing trace with hash -618656520, now seen corresponding path program 38 times [2024-05-06 18:05:28,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:28,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:28,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:28,672 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:28,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:28,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:28,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:28,810 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:28,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:28,858 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:28,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:28,965 INFO L85 PathProgramCache]: Analyzing trace with hash -842391967, now seen corresponding path program 5 times [2024-05-06 18:05:28,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:28,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:28,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:29,086 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:29,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:29,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:29,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:29,293 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:29,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:29,342 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:29,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:29,438 INFO L85 PathProgramCache]: Analyzing trace with hash -815577450, now seen corresponding path program 6 times [2024-05-06 18:05:29,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:29,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:29,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:29,565 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:29,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:29,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:29,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:29,692 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:29,729 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:29,735 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:29,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:29,800 INFO L85 PathProgramCache]: Analyzing trace with hash 2051035994, now seen corresponding path program 5 times [2024-05-06 18:05:29,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:29,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:29,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:29,920 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:29,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:29,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:29,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:30,037 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:30,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:30,080 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:30,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:30,146 INFO L85 PathProgramCache]: Analyzing trace with hash -266379139, now seen corresponding path program 6 times [2024-05-06 18:05:30,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:30,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:30,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:30,383 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:30,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:30,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:30,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:30,539 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:30,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:30,579 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:30,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:30,643 INFO L85 PathProgramCache]: Analyzing trace with hash -903668877, now seen corresponding path program 5 times [2024-05-06 18:05:30,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:30,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:30,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:30,784 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:30,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:30,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:30,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:30,926 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:30,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:30,966 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:30,966 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:31,051 INFO L85 PathProgramCache]: Analyzing trace with hash -1668136124, now seen corresponding path program 6 times [2024-05-06 18:05:31,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:31,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:31,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:31,204 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:31,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:31,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:31,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:31,428 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:31,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:31,472 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:31,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:31,539 INFO L85 PathProgramCache]: Analyzing trace with hash -1691718596, now seen corresponding path program 3 times [2024-05-06 18:05:31,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:31,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:31,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:31,663 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:31,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:31,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:31,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:31,796 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:31,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:31,839 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:31,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:31,910 INFO L85 PathProgramCache]: Analyzing trace with hash 1837639515, now seen corresponding path program 4 times [2024-05-06 18:05:31,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:31,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:31,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:32,037 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:32,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:32,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:32,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:32,161 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:32,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:32,200 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:32,200 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:32,269 INFO L85 PathProgramCache]: Analyzing trace with hash 83975765, now seen corresponding path program 3 times [2024-05-06 18:05:32,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:32,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:32,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:32,387 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:32,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:32,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:32,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:32,535 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:32,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:32,580 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:32,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:32,649 INFO L85 PathProgramCache]: Analyzing trace with hash 1206755362, now seen corresponding path program 4 times [2024-05-06 18:05:32,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:32,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:32,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:32,772 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:32,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:32,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:32,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:32,897 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:32,931 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:32,935 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:32,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:32,992 INFO L85 PathProgramCache]: Analyzing trace with hash -135838433, now seen corresponding path program 69 times [2024-05-06 18:05:32,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:32,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:33,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:33,109 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:33,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:33,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:33,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:33,227 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:33,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:33,267 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:33,267 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:33,323 INFO L85 PathProgramCache]: Analyzing trace with hash -1730671592, now seen corresponding path program 70 times [2024-05-06 18:05:33,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:33,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:33,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:33,452 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:33,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:33,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:33,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:33,580 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:33,620 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:33,625 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:33,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:33,685 INFO L85 PathProgramCache]: Analyzing trace with hash 19944800, now seen corresponding path program 71 times [2024-05-06 18:05:33,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:33,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:33,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:33,801 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:33,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:33,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:33,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:34,008 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:34,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:34,047 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:34,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:34,106 INFO L85 PathProgramCache]: Analyzing trace with hash -10898838, now seen corresponding path program 72 times [2024-05-06 18:05:34,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:34,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:34,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:34,217 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:34,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:34,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:34,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:34,325 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:34,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:34,368 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:34,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:34,429 INFO L85 PathProgramCache]: Analyzing trace with hash -842509182, now seen corresponding path program 73 times [2024-05-06 18:05:34,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:34,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:34,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:34,538 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:34,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:34,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:34,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:34,647 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:34,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:34,690 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:34,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:34,762 INFO L85 PathProgramCache]: Analyzing trace with hash 1146320400, now seen corresponding path program 74 times [2024-05-06 18:05:34,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:34,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:34,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:34,872 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:34,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:34,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:34,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:34,981 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:35,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:35,024 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:35,024 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:35,097 INFO L85 PathProgramCache]: Analyzing trace with hash -1530896100, now seen corresponding path program 75 times [2024-05-06 18:05:35,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:35,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:35,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:35,313 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:35,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:35,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:35,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:35,419 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:35,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:35,466 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:35,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:35,533 INFO L85 PathProgramCache]: Analyzing trace with hash -1163326676, now seen corresponding path program 76 times [2024-05-06 18:05:35,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:35,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:35,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:35,642 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:35,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:35,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:35,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:35,753 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:35,794 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:35,800 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:35,800 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:35,867 INFO L85 PathProgramCache]: Analyzing trace with hash -1911485824, now seen corresponding path program 77 times [2024-05-06 18:05:35,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:35,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:35,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:35,975 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:35,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:35,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:36,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:36,082 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:36,122 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:36,128 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:36,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:36,205 INFO L85 PathProgramCache]: Analyzing trace with hash -389136409, now seen corresponding path program 78 times [2024-05-06 18:05:36,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:36,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:36,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:36,310 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:36,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:36,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:36,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:36,538 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:36,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:36,586 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:36,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:36,661 INFO L85 PathProgramCache]: Analyzing trace with hash -719484913, now seen corresponding path program 79 times [2024-05-06 18:05:36,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:36,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:36,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:36,803 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:36,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:36,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:36,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:36,938 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:36,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:36,985 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:36,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:37,065 INFO L85 PathProgramCache]: Analyzing trace with hash -1715686653, now seen corresponding path program 80 times [2024-05-06 18:05:37,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:37,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:37,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:37,195 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:37,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:37,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:37,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:37,313 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:37,349 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:37,353 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:37,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:37,434 INFO L85 PathProgramCache]: Analyzing trace with hash 492586726, now seen corresponding path program 81 times [2024-05-06 18:05:37,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:37,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:37,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:37,563 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:37,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:37,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:37,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:37,692 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:37,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:37,784 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:37,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:37,850 INFO L85 PathProgramCache]: Analyzing trace with hash -636901632, now seen corresponding path program 9 times [2024-05-06 18:05:37,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:37,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:37,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:38,049 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:38,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:38,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:38,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:38,173 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:38,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:38,218 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:38,218 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:38,286 INFO L85 PathProgramCache]: Analyzing trace with hash -956372621, now seen corresponding path program 10 times [2024-05-06 18:05:38,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:38,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:38,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:38,414 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:38,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:38,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:38,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:38,541 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:38,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:38,581 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:38,581 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:38,645 INFO L85 PathProgramCache]: Analyzing trace with hash 528292825, now seen corresponding path program 11 times [2024-05-06 18:05:38,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:38,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:38,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:38,818 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:38,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:38,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:38,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:38,942 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:39,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:39,009 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:39,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:39,068 INFO L85 PathProgramCache]: Analyzing trace with hash -729548914, now seen corresponding path program 39 times [2024-05-06 18:05:39,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:39,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:39,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:39,186 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:39,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:39,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:39,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:39,304 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:39,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:39,341 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:39,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:39,398 INFO L85 PathProgramCache]: Analyzing trace with hash -1421849143, now seen corresponding path program 40 times [2024-05-06 18:05:39,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:39,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:39,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:39,624 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:39,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:39,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:39,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:39,763 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:39,805 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:39,811 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:39,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:39,884 INFO L85 PathProgramCache]: Analyzing trace with hash -1686101710, now seen corresponding path program 7 times [2024-05-06 18:05:39,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:39,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:39,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:40,013 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:40,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:40,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:40,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:40,211 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:40,251 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:40,255 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:40,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:40,314 INFO L85 PathProgramCache]: Analyzing trace with hash 1790912421, now seen corresponding path program 8 times [2024-05-06 18:05:40,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:40,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:40,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:40,441 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:40,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:40,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:40,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:40,566 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:40,601 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:40,605 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:40,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:40,662 INFO L85 PathProgramCache]: Analyzing trace with hash 222704233, now seen corresponding path program 7 times [2024-05-06 18:05:40,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:40,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:40,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:40,779 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:40,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:40,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:40,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:40,898 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:40,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 18:05:40,952 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:40,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 18:05:41,020 INFO L85 PathProgramCache]: Analyzing trace with hash -1706319474, now seen corresponding path program 8 times [2024-05-06 18:05:41,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:41,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:41,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:41,253 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:41,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:41,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:41,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:41,391 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:05:41,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 18:05:41,456 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 18:05:41,457 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 18:05:41,523 INFO L85 PathProgramCache]: Analyzing trace with hash 7184004, now seen corresponding path program 7 times [2024-05-06 18:05:41,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:41,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:41,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:41,642 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:41,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:41,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:41,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:41,763 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:05:42,182 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:42,183 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:05:44,233 INFO L85 PathProgramCache]: Analyzing trace with hash -113581501, now seen corresponding path program 1 times [2024-05-06 18:05:44,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:44,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:44,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:44,401 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:05:44,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:44,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:44,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:44,565 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:05:44,576 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-05-06 18:05:44,577 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:05:44,577 INFO L85 PathProgramCache]: Analyzing trace with hash -159439195, now seen corresponding path program 1 times [2024-05-06 18:05:44,580 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:05:44,581 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1420380431] [2024-05-06 18:05:44,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:44,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:44,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:44,918 INFO L134 CoverageAnalysis]: Checked inductivity of 694 backedges. 144 proven. 2 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-05-06 18:05:44,918 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:05:44,919 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1420380431] [2024-05-06 18:05:44,919 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1420380431] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:05:44,919 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1305620793] [2024-05-06 18:05:44,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:44,919 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:05:44,920 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:05:44,961 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:05:44,963 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 18:05:46,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:46,537 INFO L262 TraceCheckSpWp]: Trace formula consists of 673 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-06 18:05:46,547 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:05:46,805 INFO L134 CoverageAnalysis]: Checked inductivity of 694 backedges. 145 proven. 1 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-05-06 18:05:46,805 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:05:47,034 INFO L134 CoverageAnalysis]: Checked inductivity of 694 backedges. 145 proven. 1 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-05-06 18:05:47,034 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1305620793] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:05:47,034 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:05:47,035 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 24 [2024-05-06 18:05:47,036 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835526544] [2024-05-06 18:05:47,036 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:05:47,040 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-05-06 18:05:47,040 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:05:47,042 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-05-06 18:05:47,043 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=434, Unknown=0, NotChecked=0, Total=552 [2024-05-06 18:05:47,043 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:05:47,043 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:05:47,044 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 13.083333333333334) internal successors, (314), 24 states have internal predecessors, (314), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:05:47,044 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:05:47,437 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:47,438 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:05:49,512 INFO L85 PathProgramCache]: Analyzing trace with hash 1757487534, now seen corresponding path program 4 times [2024-05-06 18:05:49,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:49,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:49,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:49,820 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:05:49,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:49,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:49,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:49,956 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:05:50,001 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:50,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:05:52,079 INFO L85 PathProgramCache]: Analyzing trace with hash -884451184, now seen corresponding path program 5 times [2024-05-06 18:05:52,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:52,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:52,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:52,215 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:05:52,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:52,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:52,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:52,360 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:05:52,583 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:52,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:05:54,634 INFO L85 PathProgramCache]: Analyzing trace with hash 1835052402, now seen corresponding path program 6 times [2024-05-06 18:05:54,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:54,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:54,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:54,994 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:54,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:54,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:55,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:55,156 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:05:55,240 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:55,240 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:05:57,311 INFO L85 PathProgramCache]: Analyzing trace with hash -136276407, now seen corresponding path program 4 times [2024-05-06 18:05:57,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:57,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:57,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:57,436 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:05:57,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:57,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:57,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:57,601 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:05:57,635 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:05:57,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:05:59,684 INFO L85 PathProgramCache]: Analyzing trace with hash 1058587371, now seen corresponding path program 5 times [2024-05-06 18:05:59,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:59,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:59,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:59,804 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:05:59,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:05:59,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:05:59,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:05:59,924 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:06:00,085 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:00,085 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:06:02,154 INFO L85 PathProgramCache]: Analyzing trace with hash 1504959223, now seen corresponding path program 6 times [2024-05-06 18:06:02,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:02,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:02,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:02,304 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:02,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:02,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:02,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:02,457 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:02,541 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:02,541 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:06:04,653 INFO L85 PathProgramCache]: Analyzing trace with hash -1627090736, now seen corresponding path program 4 times [2024-05-06 18:06:04,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:04,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:04,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:04,907 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:06:04,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:04,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:04,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:05,047 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:06:05,091 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:05,092 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:06:07,184 INFO L85 PathProgramCache]: Analyzing trace with hash 290712114, now seen corresponding path program 5 times [2024-05-06 18:06:07,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:07,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:07,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:07,314 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:06:07,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:07,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:07,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:07,448 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:06:07,623 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:07,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:06:09,703 INFO L85 PathProgramCache]: Analyzing trace with hash 303323920, now seen corresponding path program 6 times [2024-05-06 18:06:09,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:09,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:09,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:09,853 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:09,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:09,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:09,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:10,003 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:10,150 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:10,151 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:06:12,202 INFO L85 PathProgramCache]: Analyzing trace with hash -1570213396, now seen corresponding path program 10 times [2024-05-06 18:06:12,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:12,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:12,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:12,372 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:12,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:12,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:12,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:12,545 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:12,600 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:12,601 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:06:14,686 INFO L85 PathProgramCache]: Analyzing trace with hash 1658378688, now seen corresponding path program 11 times [2024-05-06 18:06:14,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:14,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:14,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:15,020 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:15,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:15,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:15,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:15,174 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:15,261 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:15,261 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:06:17,307 INFO L85 PathProgramCache]: Analyzing trace with hash -1193100373, now seen corresponding path program 12 times [2024-05-06 18:06:17,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:17,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:17,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:17,455 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:17,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:17,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:17,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:17,604 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:17,770 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:17,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:06:19,820 INFO L85 PathProgramCache]: Analyzing trace with hash 1546171164, now seen corresponding path program 13 times [2024-05-06 18:06:19,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:19,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:19,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:19,990 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:19,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:19,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:20,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:20,161 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:20,192 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:20,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:06:22,261 INFO L85 PathProgramCache]: Analyzing trace with hash -1696556400, now seen corresponding path program 14 times [2024-05-06 18:06:22,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:22,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:22,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:22,418 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:22,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:22,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:22,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:22,717 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:22,785 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:22,786 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:06:24,855 INFO L85 PathProgramCache]: Analyzing trace with hash 212746363, now seen corresponding path program 15 times [2024-05-06 18:06:24,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:24,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:24,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:25,010 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:25,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:25,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:25,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:25,175 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:25,307 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:25,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:06:27,366 INFO L85 PathProgramCache]: Analyzing trace with hash 616251246, now seen corresponding path program 16 times [2024-05-06 18:06:27,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:27,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:27,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:27,534 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:27,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:27,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:27,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:27,701 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:27,730 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:27,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:06:29,804 INFO L85 PathProgramCache]: Analyzing trace with hash -411557122, now seen corresponding path program 17 times [2024-05-06 18:06:29,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:29,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:29,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:29,969 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:29,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:29,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:30,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:30,136 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:30,218 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:30,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:06:32,264 INFO L85 PathProgramCache]: Analyzing trace with hash -1697457559, now seen corresponding path program 18 times [2024-05-06 18:06:32,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:32,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:32,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:32,549 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:32,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:32,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:32,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:32,706 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:33,365 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:33,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:06:35,422 INFO L85 PathProgramCache]: Analyzing trace with hash -847352528, now seen corresponding path program 2 times [2024-05-06 18:06:35,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:35,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:35,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:35,624 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 18:06:35,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:35,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:35,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:35,819 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 18:06:35,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:06:35,846 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-05-06 18:06:36,046 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable770,SelfDestructingSolverStorable746,SelfDestructingSolverStorable768,SelfDestructingSolverStorable747,SelfDestructingSolverStorable769,SelfDestructingSolverStorable748,SelfDestructingSolverStorable749,SelfDestructingSolverStorable742,SelfDestructingSolverStorable764,SelfDestructingSolverStorable743,SelfDestructingSolverStorable765,SelfDestructingSolverStorable744,SelfDestructingSolverStorable766,SelfDestructingSolverStorable745,SelfDestructingSolverStorable767,SelfDestructingSolverStorable760,SelfDestructingSolverStorable761,SelfDestructingSolverStorable740,SelfDestructingSolverStorable762,SelfDestructingSolverStorable741,SelfDestructingSolverStorable763,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable739,SelfDestructingSolverStorable757,SelfDestructingSolverStorable758,SelfDestructingSolverStorable759,SelfDestructingSolverStorable738,SelfDestructingSolverStorable753,SelfDestructingSolverStorable775,SelfDestructingSolverStorable754,SelfDestructingSolverStorable776,SelfDestructingSolverStorable755,SelfDestructingSolverStorable756,SelfDestructingSolverStorable771,SelfDestructingSolverStorable750,SelfDestructingSolverStorable772,SelfDestructingSolverStorable751,SelfDestructingSolverStorable773,SelfDestructingSolverStorable752,SelfDestructingSolverStorable774 [2024-05-06 18:06:36,047 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-05-06 18:06:36,047 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:06:36,047 INFO L85 PathProgramCache]: Analyzing trace with hash 1543240338, now seen corresponding path program 2 times [2024-05-06 18:06:36,047 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:06:36,047 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378555151] [2024-05-06 18:06:36,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:36,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:36,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:36,347 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 237 proven. 15 refuted. 0 times theorem prover too weak. 451 trivial. 0 not checked. [2024-05-06 18:06:36,347 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:06:36,347 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [378555151] [2024-05-06 18:06:36,347 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [378555151] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:06:36,347 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2073530374] [2024-05-06 18:06:36,347 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 18:06:36,347 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:06:36,347 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:06:36,348 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:06:36,350 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 18:06:38,092 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-05-06 18:06:38,092 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:06:38,094 INFO L262 TraceCheckSpWp]: Trace formula consists of 359 conjuncts, 18 conjunts are in the unsatisfiable core [2024-05-06 18:06:38,103 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:06:38,327 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:06:38,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-05-06 18:06:38,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-05-06 18:06:38,682 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 703 trivial. 0 not checked. [2024-05-06 18:06:38,682 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 18:06:38,683 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2073530374] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 18:06:38,683 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 18:06:38,683 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [15] total 28 [2024-05-06 18:06:38,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2129230924] [2024-05-06 18:06:38,683 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 18:06:38,684 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-05-06 18:06:38,684 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:06:38,685 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-05-06 18:06:38,685 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=690, Unknown=0, NotChecked=0, Total=756 [2024-05-06 18:06:38,685 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:06:38,686 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:06:38,686 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 11.0) internal successors, (165), 15 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:06:38,686 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:06:38,686 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:06:39,226 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:39,226 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:06:41,589 INFO L85 PathProgramCache]: Analyzing trace with hash 1757487534, now seen corresponding path program 7 times [2024-05-06 18:06:41,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:41,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:41,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:41,720 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:06:41,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:41,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:41,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:41,860 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:06:41,976 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:41,976 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:06:44,295 INFO L85 PathProgramCache]: Analyzing trace with hash -884451184, now seen corresponding path program 8 times [2024-05-06 18:06:44,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:44,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:44,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:44,420 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:06:44,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:44,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:44,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:44,543 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:06:44,810 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:44,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:06:47,111 INFO L85 PathProgramCache]: Analyzing trace with hash 1835052402, now seen corresponding path program 9 times [2024-05-06 18:06:47,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:47,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:47,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:47,260 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:47,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:47,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:47,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:47,404 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:47,545 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:47,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:06:49,831 INFO L85 PathProgramCache]: Analyzing trace with hash -136276407, now seen corresponding path program 7 times [2024-05-06 18:06:49,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:49,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:49,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:50,029 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:06:50,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:50,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:50,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:50,152 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:06:50,232 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:50,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:06:52,516 INFO L85 PathProgramCache]: Analyzing trace with hash 1058587371, now seen corresponding path program 8 times [2024-05-06 18:06:52,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:52,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:52,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:52,641 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:06:52,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:52,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:52,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:52,763 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:06:52,997 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:52,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:06:55,271 INFO L85 PathProgramCache]: Analyzing trace with hash 1504959223, now seen corresponding path program 9 times [2024-05-06 18:06:55,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:55,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:55,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:55,430 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:55,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:55,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:55,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:55,581 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:55,726 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:55,726 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:06:58,069 INFO L85 PathProgramCache]: Analyzing trace with hash -1627090736, now seen corresponding path program 7 times [2024-05-06 18:06:58,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:58,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:58,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:58,200 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:06:58,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:58,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:58,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:58,328 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:06:58,425 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:06:58,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:07:00,674 INFO L85 PathProgramCache]: Analyzing trace with hash 290712114, now seen corresponding path program 8 times [2024-05-06 18:07:00,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:00,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:00,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:00,893 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:07:00,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:00,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:00,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:01,032 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:07:01,281 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:01,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:07:03,576 INFO L85 PathProgramCache]: Analyzing trace with hash 303323920, now seen corresponding path program 9 times [2024-05-06 18:07:03,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:03,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:03,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:03,722 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:03,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:03,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:03,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:03,866 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:04,095 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:04,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:07:06,386 INFO L85 PathProgramCache]: Analyzing trace with hash 1658378688, now seen corresponding path program 19 times [2024-05-06 18:07:06,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:06,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:06,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:06,549 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:06,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:06,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:06,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:06,717 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:06,810 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:06,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:07:09,082 INFO L85 PathProgramCache]: Analyzing trace with hash -173228124, now seen corresponding path program 20 times [2024-05-06 18:07:09,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:09,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:09,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:09,248 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:07:09,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:09,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:09,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:09,407 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:07:09,541 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:09,542 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:07:12,001 INFO L85 PathProgramCache]: Analyzing trace with hash -1193100373, now seen corresponding path program 21 times [2024-05-06 18:07:12,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:12,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:12,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:12,162 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:12,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:12,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:12,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:12,314 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:12,514 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:12,515 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:07:14,807 INFO L85 PathProgramCache]: Analyzing trace with hash -1696556400, now seen corresponding path program 22 times [2024-05-06 18:07:14,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:14,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:14,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:14,961 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:14,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:14,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:14,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:15,125 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:15,225 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:15,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:07:17,525 INFO L85 PathProgramCache]: Analyzing trace with hash 1232618612, now seen corresponding path program 23 times [2024-05-06 18:07:17,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:17,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:17,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:17,674 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:07:17,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:17,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:17,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:17,822 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:07:17,959 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:17,960 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:07:20,268 INFO L85 PathProgramCache]: Analyzing trace with hash 212746363, now seen corresponding path program 24 times [2024-05-06 18:07:20,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:20,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:20,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:20,566 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:20,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:20,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:20,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:20,714 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:20,908 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:20,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:07:23,228 INFO L85 PathProgramCache]: Analyzing trace with hash -411557122, now seen corresponding path program 25 times [2024-05-06 18:07:23,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:23,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:23,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:23,383 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:23,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:23,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:23,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:23,537 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:23,632 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:23,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:07:25,928 INFO L85 PathProgramCache]: Analyzing trace with hash -677585310, now seen corresponding path program 26 times [2024-05-06 18:07:25,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:25,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:25,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:26,085 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:07:26,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:26,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:26,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:26,234 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:07:26,353 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:26,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:07:28,625 INFO L85 PathProgramCache]: Analyzing trace with hash -1697457559, now seen corresponding path program 27 times [2024-05-06 18:07:28,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:28,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:28,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:28,920 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:28,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:28,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:28,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:29,067 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:07:29,873 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:29,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:07:32,144 INFO L85 PathProgramCache]: Analyzing trace with hash -185807855, now seen corresponding path program 3 times [2024-05-06 18:07:32,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:32,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:32,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:32,339 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:07:32,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:32,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:32,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:32,540 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:07:32,796 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:32,797 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:07:35,128 INFO L85 PathProgramCache]: Analyzing trace with hash -1626336589, now seen corresponding path program 4 times [2024-05-06 18:07:35,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:35,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:35,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:35,315 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:07:35,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:35,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:35,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:35,504 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:07:35,618 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:35,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:07:37,877 INFO L85 PathProgramCache]: Analyzing trace with hash -837149283, now seen corresponding path program 5 times [2024-05-06 18:07:37,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:37,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:37,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:38,075 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:07:38,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:38,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:38,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:38,271 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:07:38,404 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:38,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:07:40,691 INFO L85 PathProgramCache]: Analyzing trace with hash -1619982045, now seen corresponding path program 1 times [2024-05-06 18:07:40,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:40,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:40,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:40,884 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:07:40,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:40,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:41,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:41,233 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:07:41,328 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:41,329 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:07:43,640 INFO L85 PathProgramCache]: Analyzing trace with hash 1836588613, now seen corresponding path program 2 times [2024-05-06 18:07:43,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:43,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:43,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:43,838 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:07:43,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:43,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:43,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:44,034 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:07:44,174 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:44,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:07:46,396 INFO L85 PathProgramCache]: Analyzing trace with hash 2023643823, now seen corresponding path program 3 times [2024-05-06 18:07:46,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:46,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:46,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:46,601 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:07:46,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:46,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:46,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:46,807 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:07:46,935 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:46,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:07:49,174 INFO L85 PathProgramCache]: Analyzing trace with hash -1219831469, now seen corresponding path program 1 times [2024-05-06 18:07:49,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:49,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:49,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:49,517 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:07:49,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:49,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:49,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:49,722 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:07:49,817 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:49,818 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:07:52,130 INFO L85 PathProgramCache]: Analyzing trace with hash 438266485, now seen corresponding path program 2 times [2024-05-06 18:07:52,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:52,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:52,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:52,314 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:07:52,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:52,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:52,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:52,508 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:07:52,674 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:52,675 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:07:54,994 INFO L85 PathProgramCache]: Analyzing trace with hash -1871172897, now seen corresponding path program 3 times [2024-05-06 18:07:54,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:54,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:55,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:55,189 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:07:55,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:55,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:55,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:55,383 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:07:55,520 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:55,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:07:57,811 INFO L85 PathProgramCache]: Analyzing trace with hash -1453245787, now seen corresponding path program 1 times [2024-05-06 18:07:57,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:57,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:57,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:58,151 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:07:58,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:58,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:58,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:58,359 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:07:58,467 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:07:58,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:08:00,818 INFO L85 PathProgramCache]: Analyzing trace with hash -1116870073, now seen corresponding path program 2 times [2024-05-06 18:08:00,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:00,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:00,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:01,016 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:01,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:01,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:01,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:01,213 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:01,383 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:01,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:08:03,691 INFO L85 PathProgramCache]: Analyzing trace with hash -2104587215, now seen corresponding path program 3 times [2024-05-06 18:08:03,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:03,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:03,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:03,888 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:03,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:03,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:03,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:04,095 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:04,252 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:04,252 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:08:06,700 INFO L85 PathProgramCache]: Analyzing trace with hash 1148508758, now seen corresponding path program 28 times [2024-05-06 18:08:06,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:06,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:06,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:06,918 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:08:06,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:06,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:06,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:07,136 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:08:07,237 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:07,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:08:09,590 INFO L85 PathProgramCache]: Analyzing trace with hash -2046606536, now seen corresponding path program 29 times [2024-05-06 18:08:09,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:09,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:09,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:09,791 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:09,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:09,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:09,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:09,993 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:10,191 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:10,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:08:12,519 INFO L85 PathProgramCache]: Analyzing trace with hash 497167330, now seen corresponding path program 30 times [2024-05-06 18:08:12,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:12,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:12,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:12,714 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:12,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:12,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:12,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:12,911 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:13,219 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:13,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:15,559 INFO L85 PathProgramCache]: Analyzing trace with hash 903248153, now seen corresponding path program 1 times [2024-05-06 18:08:15,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:15,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:15,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:15,761 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:15,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:15,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:15,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:15,965 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:16,060 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:16,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:18,336 INFO L85 PathProgramCache]: Analyzing trace with hash -1633847795, now seen corresponding path program 1 times [2024-05-06 18:08:18,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:18,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:18,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:18,549 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:18,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:18,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:18,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:18,750 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:18,838 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:18,838 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:21,169 INFO L85 PathProgramCache]: Analyzing trace with hash 1183079935, now seen corresponding path program 2 times [2024-05-06 18:08:21,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:21,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:21,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:21,359 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:21,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:21,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:21,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:21,550 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:21,649 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:21,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:23,888 INFO L85 PathProgramCache]: Analyzing trace with hash 633257579, now seen corresponding path program 2 times [2024-05-06 18:08:23,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:23,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:23,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:24,275 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:24,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:24,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:24,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:24,474 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:24,582 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:24,582 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:26,847 INFO L85 PathProgramCache]: Analyzing trace with hash 1410295193, now seen corresponding path program 3 times [2024-05-06 18:08:26,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:26,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:26,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:27,041 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:27,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:27,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:27,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:27,264 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:27,348 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:27,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:29,625 INFO L85 PathProgramCache]: Analyzing trace with hash 734550161, now seen corresponding path program 3 times [2024-05-06 18:08:29,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:29,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:29,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:29,816 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:29,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:29,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:29,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:30,005 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:30,112 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:30,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:32,393 INFO L85 PathProgramCache]: Analyzing trace with hash 1952157780, now seen corresponding path program 1 times [2024-05-06 18:08:32,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:32,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:32,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:32,756 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:32,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:32,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:32,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:32,972 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:33,109 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:33,110 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:35,380 INFO L85 PathProgramCache]: Analyzing trace with hash 626176856, now seen corresponding path program 2 times [2024-05-06 18:08:35,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:35,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:35,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:35,566 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:35,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:35,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:35,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:35,757 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:35,895 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:35,895 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:38,256 INFO L85 PathProgramCache]: Analyzing trace with hash -2125112160, now seen corresponding path program 3 times [2024-05-06 18:08:38,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:38,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:38,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:38,450 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:38,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:38,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:38,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:38,640 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:38,757 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:38,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:41,049 INFO L85 PathProgramCache]: Analyzing trace with hash 156431407, now seen corresponding path program 1 times [2024-05-06 18:08:41,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:41,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:41,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:41,420 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:41,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:41,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:41,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:41,639 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:41,743 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:41,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:44,091 INFO L85 PathProgramCache]: Analyzing trace with hash 884806301, now seen corresponding path program 2 times [2024-05-06 18:08:44,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:44,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:44,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:44,410 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:44,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:44,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:44,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:44,648 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:44,803 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:44,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:47,122 INFO L85 PathProgramCache]: Analyzing trace with hash 604227131, now seen corresponding path program 3 times [2024-05-06 18:08:47,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:47,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:47,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:47,311 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:47,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:47,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:47,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:47,496 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:47,611 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:47,612 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:49,942 INFO L85 PathProgramCache]: Analyzing trace with hash -1397257226, now seen corresponding path program 1 times [2024-05-06 18:08:49,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:49,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:49,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:50,137 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:50,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:50,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:50,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:50,326 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:50,427 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:50,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:52,727 INFO L85 PathProgramCache]: Analyzing trace with hash 338459254, now seen corresponding path program 2 times [2024-05-06 18:08:52,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:52,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:52,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:53,034 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:53,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:53,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:53,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:53,216 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:53,343 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:53,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:55,679 INFO L85 PathProgramCache]: Analyzing trace with hash 2011634370, now seen corresponding path program 3 times [2024-05-06 18:08:55,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:55,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:55,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:55,940 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:55,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:55,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:55,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:56,131 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:56,256 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:56,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:08:58,564 INFO L85 PathProgramCache]: Analyzing trace with hash -1682082862, now seen corresponding path program 31 times [2024-05-06 18:08:58,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:58,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:58,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:58,760 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:58,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:58,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:58,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:58,953 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:08:59,050 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:08:59,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:09:01,362 INFO L85 PathProgramCache]: Analyzing trace with hash 320084250, now seen corresponding path program 32 times [2024-05-06 18:09:01,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:01,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:01,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:01,675 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:09:01,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:01,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:01,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:01,889 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:09:02,059 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:02,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:09:04,505 INFO L85 PathProgramCache]: Analyzing trace with hash 156755358, now seen corresponding path program 33 times [2024-05-06 18:09:04,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:04,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:04,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:04,772 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:09:04,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:04,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:04,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:04,958 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:09:05,099 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:05,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:09:07,433 INFO L85 PathProgramCache]: Analyzing trace with hash -292661505, now seen corresponding path program 34 times [2024-05-06 18:09:07,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:07,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:07,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:07,658 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:07,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:07,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:07,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:07,873 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:07,965 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:07,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:09:10,241 INFO L85 PathProgramCache]: Analyzing trace with hash 891979789, now seen corresponding path program 4 times [2024-05-06 18:09:10,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:10,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:10,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:10,504 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:10,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:10,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:10,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:10,727 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:10,828 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:10,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:09:13,116 INFO L85 PathProgramCache]: Analyzing trace with hash -482571447, now seen corresponding path program 35 times [2024-05-06 18:09:13,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:13,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:13,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:13,398 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:13,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:13,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:13,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:13,603 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:13,684 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:13,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:09:15,936 INFO L85 PathProgramCache]: Analyzing trace with hash -2074812350, now seen corresponding path program 36 times [2024-05-06 18:09:15,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:15,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:15,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:16,133 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:16,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:16,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:16,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:16,331 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:16,407 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:16,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:09:18,676 INFO L85 PathProgramCache]: Analyzing trace with hash 96679796, now seen corresponding path program 37 times [2024-05-06 18:09:18,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:18,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:18,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:18,898 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:18,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:18,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:18,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:19,110 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:19,185 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:19,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:09:21,467 INFO L85 PathProgramCache]: Analyzing trace with hash -550521872, now seen corresponding path program 38 times [2024-05-06 18:09:21,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:21,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:21,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:21,668 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:09:21,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:21,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:21,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:22,013 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:09:22,142 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:22,142 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:09:24,543 INFO L85 PathProgramCache]: Analyzing trace with hash 113691757, now seen corresponding path program 39 times [2024-05-06 18:09:24,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:24,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:24,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:24,773 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:09:24,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:24,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:24,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:25,044 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:09:25,143 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:25,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:09:27,448 INFO L85 PathProgramCache]: Analyzing trace with hash -770522221, now seen corresponding path program 40 times [2024-05-06 18:09:27,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:27,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:27,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:27,647 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:09:27,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:27,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:27,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:27,851 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:09:27,968 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:27,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:09:30,274 INFO L85 PathProgramCache]: Analyzing trace with hash 265396491, now seen corresponding path program 41 times [2024-05-06 18:09:30,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:30,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:30,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:30,478 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:30,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:30,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:30,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:30,679 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:30,754 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:30,754 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:09:33,016 INFO L85 PathProgramCache]: Analyzing trace with hash 265396491, now seen corresponding path program 42 times [2024-05-06 18:09:33,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:33,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:33,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:33,289 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:33,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:33,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:33,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:33,486 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:33,565 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:33,565 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:09:35,847 INFO L85 PathProgramCache]: Analyzing trace with hash 1084318619, now seen corresponding path program 43 times [2024-05-06 18:09:35,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:35,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:35,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:36,070 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:09:36,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:36,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:36,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:36,271 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:09:36,592 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:36,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:09:38,994 INFO L85 PathProgramCache]: Analyzing trace with hash -747184862, now seen corresponding path program 44 times [2024-05-06 18:09:38,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:38,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:39,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:39,278 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:39,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:39,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:39,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:39,504 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:39,619 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:39,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 18:09:41,983 INFO L85 PathProgramCache]: Analyzing trace with hash -747184862, now seen corresponding path program 45 times [2024-05-06 18:09:41,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:41,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:42,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:42,204 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:42,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:42,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:42,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:42,407 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:42,635 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:42,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 18:09:44,962 INFO L85 PathProgramCache]: Analyzing trace with hash 1956876707, now seen corresponding path program 1 times [2024-05-06 18:09:44,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:44,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:44,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:09:44,999 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 18:09:45,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 18:09:45,274 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 18:09:45,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 Received shutdown request... [2024-05-06 18:09:45,889 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 18:09:45,889 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 18:09:45,898 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 18:09:46,903 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-05-06 18:09:46,906 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2024-05-06 18:09:47,100 WARN L435 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forcibly destroying the process [2024-05-06 18:09:47,147 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable790,SelfDestructingSolverStorable791,SelfDestructingSolverStorable792,SelfDestructingSolverStorable827,SelfDestructingSolverStorable828,SelfDestructingSolverStorable829,SelfDestructingSolverStorable823,SelfDestructingSolverStorable824,SelfDestructingSolverStorable825,SelfDestructingSolverStorable826,SelfDestructingSolverStorable786,SelfDestructingSolverStorable787,SelfDestructingSolverStorable820,SelfDestructingSolverStorable788,SelfDestructingSolverStorable821,SelfDestructingSolverStorable789,SelfDestructingSolverStorable822,SelfDestructingSolverStorable782,SelfDestructingSolverStorable783,SelfDestructingSolverStorable784,SelfDestructingSolverStorable785,SelfDestructingSolverStorable780,SelfDestructingSolverStorable781,SelfDestructingSolverStorable816,SelfDestructingSolverStorable817,SelfDestructingSolverStorable818,SelfDestructingSolverStorable819,SelfDestructingSolverStorable779,SelfDestructingSolverStorable812,SelfDestructingSolverStorable813,SelfDestructingSolverStorable814,SelfDestructingSolverStorable815,SelfDestructingSolverStorable896,SelfDestructingSolverStorable897,SelfDestructingSolverStorable777,SelfDestructingSolverStorable810,SelfDestructingSolverStorable898,SelfDestructingSolverStorable778,SelfDestructingSolverStorable811,SelfDestructingSolverStorable899,SelfDestructingSolverStorable892,SelfDestructingSolverStorable893,SelfDestructingSolverStorable894,SelfDestructingSolverStorable895,SelfDestructingSolverStorable849,SelfDestructingSolverStorable845,SelfDestructingSolverStorable846,SelfDestructingSolverStorable847,SelfDestructingSolverStorable848,SelfDestructingSolverStorable841,SelfDestructingSolverStorable842,SelfDestructingSolverStorable843,SelfDestructingSolverStorable844,SelfDestructingSolverStorable840,SelfDestructingSolverStorable838,SelfDestructingSolverStorable839,SelfDestructingSolverStorable834,SelfDestructingSolverStorable835,SelfDestructingSolverStorable836,SelfDestructingSolverStorable837,SelfDestructingSolverStorable797,SelfDestructingSolverStorable830,SelfDestructingSolverStorable798,SelfDestructingSolverStorable831,SelfDestructingSolverStorable799,SelfDestructingSolverStorable832,SelfDestructingSolverStorable833,SelfDestructingSolverStorable793,SelfDestructingSolverStorable794,SelfDestructingSolverStorable795,SelfDestructingSolverStorable796,SelfDestructingSolverStorable904,SelfDestructingSolverStorable905,SelfDestructingSolverStorable906,SelfDestructingSolverStorable867,SelfDestructingSolverStorable900,SelfDestructingSolverStorable868,SelfDestructingSolverStorable901,SelfDestructingSolverStorable869,SelfDestructingSolverStorable902,SelfDestructingSolverStorable903,SelfDestructingSolverStorable863,SelfDestructingSolverStorable864,SelfDestructingSolverStorable865,SelfDestructingSolverStorable866,SelfDestructingSolverStorable860,SelfDestructingSolverStorable861,SelfDestructingSolverStorable862,SelfDestructingSolverStorable856,SelfDestructingSolverStorable857,SelfDestructingSolverStorable858,SelfDestructingSolverStorable859,SelfDestructingSolverStorable852,SelfDestructingSolverStorable853,SelfDestructingSolverStorable854,SelfDestructingSolverStorable855,SelfDestructingSolverStorable850,SelfDestructingSolverStorable851,SelfDestructingSolverStorable890,SelfDestructingSolverStorable891,SelfDestructingSolverStorable809,SelfDestructingSolverStorable805,SelfDestructingSolverStorable806,SelfDestructingSolverStorable807,SelfDestructingSolverStorable808,SelfDestructingSolverStorable801,SelfDestructingSolverStorable889,SelfDestructingSolverStorable802,SelfDestructingSolverStorable803,SelfDestructingSolverStorable804,SelfDestructingSolverStorable885,SelfDestructingSolverStorable886,SelfDestructingSolverStorable887,SelfDestructingSolverStorable800,SelfDestructingSolverStorable888,SelfDestructingSolverStorable881,SelfDestructingSolverStorable882,SelfDestructingSolverStorable883,SelfDestructingSolverStorable884,SelfDestructingSolverStorable880,SelfDestructingSolverStorable878,SelfDestructingSolverStorable879,SelfDestructingSolverStorable874,SelfDestructingSolverStorable875,SelfDestructingSolverStorable876,SelfDestructingSolverStorable877,SelfDestructingSolverStorable870,SelfDestructingSolverStorable871,SelfDestructingSolverStorable872,SelfDestructingSolverStorable873 [2024-05-06 18:09:47,147 WARN L619 AbstractCegarLoop]: Verification canceled: while executing Executor. [2024-05-06 18:09:47,148 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 137 [2024-05-06 18:09:47,149 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (5 of 6 remaining) [2024-05-06 18:09:47,150 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (4 of 6 remaining) [2024-05-06 18:09:47,150 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 6 remaining) [2024-05-06 18:09:47,150 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 6 remaining) [2024-05-06 18:09:47,150 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 6 remaining) [2024-05-06 18:09:47,150 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr4INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 6 remaining) [2024-05-06 18:09:47,153 INFO L448 BasicCegarLoop]: Path program histogram: [81, 45, 40, 26, 19, 15, 15, 11, 9, 9, 9, 8, 8, 8, 7, 6, 6, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2024-05-06 18:09:47,154 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: clock still running: ConditionalCommutativityCheckTime at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopStatisticsGenerator.getValue(CegarLoopStatisticsGenerator.java:172) at de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData.aggregateBenchmarkData(StatisticsData.java:60) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:225) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2024-05-06 18:09:47,164 INFO L158 Benchmark]: Toolchain (without parser) took 767821.71ms. Allocated memory was 209.7MB in the beginning and 4.1GB in the end (delta: 3.9GB). Free memory was 138.4MB in the beginning and 788.5MB in the end (delta: -650.1MB). Peak memory consumption was 3.2GB. Max. memory is 8.0GB. [2024-05-06 18:09:47,164 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 209.7MB. Free memory is still 141.0MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 18:09:47,164 INFO L158 Benchmark]: CACSL2BoogieTranslator took 238.71ms. Allocated memory is still 209.7MB. Free memory was 138.2MB in the beginning and 125.7MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2024-05-06 18:09:47,164 INFO L158 Benchmark]: Boogie Procedure Inliner took 87.72ms. Allocated memory was 209.7MB in the beginning and 359.7MB in the end (delta: 149.9MB). Free memory was 125.7MB in the beginning and 329.3MB in the end (delta: -203.7MB). Peak memory consumption was 8.4MB. Max. memory is 8.0GB. [2024-05-06 18:09:47,164 INFO L158 Benchmark]: Boogie Preprocessor took 22.83ms. Allocated memory is still 359.7MB. Free memory was 329.3MB in the beginning and 327.2MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 18:09:47,164 INFO L158 Benchmark]: RCFGBuilder took 613.82ms. Allocated memory is still 359.7MB. Free memory was 327.2MB in the beginning and 296.3MB in the end (delta: 31.0MB). Peak memory consumption was 31.5MB. Max. memory is 8.0GB. [2024-05-06 18:09:47,164 INFO L158 Benchmark]: TraceAbstraction took 766853.93ms. Allocated memory was 359.7MB in the beginning and 4.1GB in the end (delta: 3.7GB). Free memory was 295.2MB in the beginning and 788.5MB in the end (delta: -493.3MB). Peak memory consumption was 3.2GB. Max. memory is 8.0GB. [2024-05-06 18:09:47,164 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 209.7MB. Free memory is still 141.0MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 238.71ms. Allocated memory is still 209.7MB. Free memory was 138.2MB in the beginning and 125.7MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 87.72ms. Allocated memory was 209.7MB in the beginning and 359.7MB in the end (delta: 149.9MB). Free memory was 125.7MB in the beginning and 329.3MB in the end (delta: -203.7MB). Peak memory consumption was 8.4MB. Max. memory is 8.0GB. * Boogie Preprocessor took 22.83ms. Allocated memory is still 359.7MB. Free memory was 329.3MB in the beginning and 327.2MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 613.82ms. Allocated memory is still 359.7MB. Free memory was 327.2MB in the beginning and 296.3MB in the end (delta: 31.0MB). Peak memory consumption was 31.5MB. Max. memory is 8.0GB. * TraceAbstraction took 766853.93ms. Allocated memory was 359.7MB in the beginning and 4.1GB in the end (delta: 3.7GB). Free memory was 295.2MB in the beginning and 788.5MB in the end (delta: -493.3MB). Peak memory consumption was 3.2GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 1099964, independent: 1055585, independent conditional: 790398, independent unconditional: 265187, dependent: 44379, dependent conditional: 42631, dependent unconditional: 1748, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1061936, independent: 1055585, independent conditional: 790398, independent unconditional: 265187, dependent: 6351, dependent conditional: 4603, dependent unconditional: 1748, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1061936, independent: 1055585, independent conditional: 790398, independent unconditional: 265187, dependent: 6351, dependent conditional: 4603, dependent unconditional: 1748, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 1061936, independent: 1055585, independent conditional: 790398, independent unconditional: 265187, dependent: 6351, dependent conditional: 4603, dependent unconditional: 1748, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1071976, independent: 1055585, independent conditional: 239413, independent unconditional: 816172, dependent: 16391, dependent conditional: 6095, dependent unconditional: 10296, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 1071976, independent: 1055585, independent conditional: 54979, independent unconditional: 1000606, dependent: 16391, dependent conditional: 4232, dependent unconditional: 12159, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 1071976, independent: 1055585, independent conditional: 54979, independent unconditional: 1000606, dependent: 16391, dependent conditional: 4232, dependent unconditional: 12159, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1999, independent: 1951, independent conditional: 10, independent unconditional: 1941, dependent: 48, dependent conditional: 27, dependent unconditional: 21, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1999, independent: 1945, independent conditional: 0, independent unconditional: 1945, dependent: 54, dependent conditional: 0, dependent unconditional: 54, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 54, independent: 6, independent conditional: 6, independent unconditional: 0, dependent: 48, dependent conditional: 27, dependent unconditional: 21, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 54, independent: 6, independent conditional: 6, independent unconditional: 0, dependent: 48, dependent conditional: 27, dependent unconditional: 21, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 187, independent: 9, independent conditional: 9, independent unconditional: 0, dependent: 178, dependent conditional: 81, dependent unconditional: 98, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 1071976, independent: 1053634, independent conditional: 54969, independent unconditional: 998665, dependent: 16343, dependent conditional: 4205, dependent unconditional: 12138, unknown: 1999, unknown conditional: 37, unknown unconditional: 1962] , Statistics on independence cache: Total cache size (in pairs): 1999, Positive cache size: 1951, Positive conditional cache size: 10, Positive unconditional cache size: 1941, Negative cache size: 48, Negative conditional cache size: 27, Negative unconditional cache size: 21, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 186297, Maximal queried relation: 2, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1071976, independent: 1055585, independent conditional: 239413, independent unconditional: 816172, dependent: 16391, dependent conditional: 6095, dependent unconditional: 10296, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 1071976, independent: 1055585, independent conditional: 54979, independent unconditional: 1000606, dependent: 16391, dependent conditional: 4232, dependent unconditional: 12159, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 1071976, independent: 1055585, independent conditional: 54979, independent unconditional: 1000606, dependent: 16391, dependent conditional: 4232, dependent unconditional: 12159, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1999, independent: 1951, independent conditional: 10, independent unconditional: 1941, dependent: 48, dependent conditional: 27, dependent unconditional: 21, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1999, independent: 1945, independent conditional: 0, independent unconditional: 1945, dependent: 54, dependent conditional: 0, dependent unconditional: 54, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 54, independent: 6, independent conditional: 6, independent unconditional: 0, dependent: 48, dependent conditional: 27, dependent unconditional: 21, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 54, independent: 6, independent conditional: 6, independent unconditional: 0, dependent: 48, dependent conditional: 27, dependent unconditional: 21, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 187, independent: 9, independent conditional: 9, independent unconditional: 0, dependent: 178, dependent conditional: 81, dependent unconditional: 98, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 1071976, independent: 1053634, independent conditional: 54969, independent unconditional: 998665, dependent: 16343, dependent conditional: 4205, dependent unconditional: 12138, unknown: 1999, unknown conditional: 37, unknown unconditional: 1962] , Statistics on independence cache: Total cache size (in pairs): 1999, Positive cache size: 1951, Positive conditional cache size: 10, Positive unconditional cache size: 1941, Negative cache size: 48, Negative conditional cache size: 27, Negative unconditional cache size: 21, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 186297 ], Independence queries for same thread: 38028 - ExceptionOrErrorResult: AssertionError: clock still running: ConditionalCommutativityCheckTime de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: clock still running: ConditionalCommutativityCheckTime: de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopStatisticsGenerator.getValue(CegarLoopStatisticsGenerator.java:172) RESULT: Ultimate could not prove your program: Toolchain returned no result. Completed graceful shutdown