/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 50 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-more-buffer-series2.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 18:06:06,860 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 18:06:06,925 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 18:06:06,933 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 18:06:06,934 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 18:06:06,956 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 18:06:06,956 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 18:06:06,957 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 18:06:06,957 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 18:06:06,961 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 18:06:06,962 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 18:06:06,962 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 18:06:06,962 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 18:06:06,964 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 18:06:06,964 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 18:06:06,964 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 18:06:06,964 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 18:06:06,965 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 18:06:06,965 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 18:06:06,965 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 18:06:06,965 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 18:06:06,965 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 18:06:06,965 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 18:06:06,966 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 18:06:06,966 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 18:06:06,966 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 18:06:06,966 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 18:06:06,966 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 18:06:06,966 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 18:06:06,966 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 18:06:06,967 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 18:06:06,968 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 18:06:06,968 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 18:06:06,968 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 18:06:06,968 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 18:06:06,968 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 18:06:06,968 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 18:06:06,968 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 18:06:06,968 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 18:06:06,969 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 50 [2024-05-06 18:06:07,194 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 18:06:07,218 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 18:06:07,220 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 18:06:07,221 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 18:06:07,221 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 18:06:07,222 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-more-buffer-series2.wvr.c [2024-05-06 18:06:08,234 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 18:06:08,378 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 18:06:08,378 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-buffer-series2.wvr.c [2024-05-06 18:06:08,387 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/a78fa4fa8/bdc5263ded5549c3aa1241279ff60620/FLAGa77a2a34b [2024-05-06 18:06:08,403 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/a78fa4fa8/bdc5263ded5549c3aa1241279ff60620 [2024-05-06 18:06:08,405 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 18:06:08,406 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 18:06:08,407 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 18:06:08,407 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 18:06:08,410 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 18:06:08,410 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,411 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@29a522a2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08, skipping insertion in model container [2024-05-06 18:06:08,411 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,438 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 18:06:08,574 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-buffer-series2.wvr.c[4232,4245] [2024-05-06 18:06:08,581 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 18:06:08,590 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 18:06:08,611 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-buffer-series2.wvr.c[4232,4245] [2024-05-06 18:06:08,614 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 18:06:08,621 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 18:06:08,622 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 18:06:08,627 INFO L206 MainTranslator]: Completed translation [2024-05-06 18:06:08,627 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08 WrapperNode [2024-05-06 18:06:08,627 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 18:06:08,628 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 18:06:08,628 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 18:06:08,628 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 18:06:08,633 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,640 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,669 INFO L138 Inliner]: procedures = 27, calls = 83, calls flagged for inlining = 22, calls inlined = 28, statements flattened = 356 [2024-05-06 18:06:08,669 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 18:06:08,669 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 18:06:08,670 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 18:06:08,670 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 18:06:08,681 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,681 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,685 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,685 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,692 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,701 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,702 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,704 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,707 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 18:06:08,707 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 18:06:08,707 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 18:06:08,707 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 18:06:08,708 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08" (1/1) ... [2024-05-06 18:06:08,712 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 18:06:08,721 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:06:08,733 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 18:06:08,734 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 18:06:08,765 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 18:06:08,765 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 18:06:08,765 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 18:06:08,765 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 18:06:08,766 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 18:06:08,766 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 18:06:08,766 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 18:06:08,766 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 18:06:08,766 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 18:06:08,766 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 18:06:08,766 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 18:06:08,767 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 18:06:08,767 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 18:06:08,768 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 18:06:08,768 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 18:06:08,768 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 18:06:08,768 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 18:06:08,768 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 18:06:08,768 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 18:06:08,769 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 18:06:08,855 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 18:06:08,857 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 18:06:09,286 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 18:06:09,448 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 18:06:09,448 INFO L309 CfgBuilder]: Removed 7 assume(true) statements. [2024-05-06 18:06:09,450 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 06:06:09 BoogieIcfgContainer [2024-05-06 18:06:09,450 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 18:06:09,452 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 18:06:09,452 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 18:06:09,455 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 18:06:09,455 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 06:06:08" (1/3) ... [2024-05-06 18:06:09,455 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@78f8b6b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 06:06:09, skipping insertion in model container [2024-05-06 18:06:09,456 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 06:06:08" (2/3) ... [2024-05-06 18:06:09,456 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@78f8b6b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 06:06:09, skipping insertion in model container [2024-05-06 18:06:09,456 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 06:06:09" (3/3) ... [2024-05-06 18:06:09,457 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-more-buffer-series2.wvr.c [2024-05-06 18:06:09,463 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 18:06:09,471 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 18:06:09,471 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 18:06:09,471 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 18:06:09,536 INFO L144 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2024-05-06 18:06:09,579 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 18:06:09,579 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 18:06:09,580 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:06:09,582 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 18:06:09,583 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 18:06:09,621 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 18:06:09,630 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:06:09,631 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 18:06:09,637 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@101fc777, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=50, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 18:06:09,637 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-06 18:06:10,173 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:10,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:06:10,348 INFO L85 PathProgramCache]: Analyzing trace with hash 673047748, now seen corresponding path program 1 times [2024-05-06 18:06:10,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:10,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:10,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:10,639 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:10,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:10,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:10,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:10,753 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:06:10,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 18:06:10,770 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 18:06:11,105 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:11,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:06:11,201 INFO L85 PathProgramCache]: Analyzing trace with hash 826657852, now seen corresponding path program 1 times [2024-05-06 18:06:11,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:11,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:11,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:11,519 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:11,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:11,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:11,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:11,733 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:11,734 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 18:06:11,734 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-05-06 18:06:12,106 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:12,107 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:06:12,200 INFO L85 PathProgramCache]: Analyzing trace with hash -2014448275, now seen corresponding path program 1 times [2024-05-06 18:06:12,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:12,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:12,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:12,389 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:12,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:12,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:12,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:12,561 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:06:12,562 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 18:06:12,562 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2024-05-06 18:06:12,817 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:12,818 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:06:12,912 INFO L85 PathProgramCache]: Analyzing trace with hash -423135107, now seen corresponding path program 1 times [2024-05-06 18:06:12,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:12,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:12,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:13,191 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:06:13,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:13,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:13,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:13,414 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:06:13,566 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:13,566 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:13,646 INFO L85 PathProgramCache]: Analyzing trace with hash 836134917, now seen corresponding path program 1 times [2024-05-06 18:06:13,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:13,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:13,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:13,914 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:06:13,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:13,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:13,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:14,164 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:06:14,321 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:14,322 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:14,406 INFO L85 PathProgramCache]: Analyzing trace with hash -335412153, now seen corresponding path program 2 times [2024-05-06 18:06:14,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:14,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:14,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:14,669 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:14,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:14,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:14,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:14,947 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:15,188 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:15,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:06:18,142 INFO L85 PathProgramCache]: Analyzing trace with hash 812672372, now seen corresponding path program 3 times [2024-05-06 18:06:18,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:18,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:18,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:18,482 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:06:18,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:18,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:18,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:18,856 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:06:19,114 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:19,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:06:19,670 INFO L85 PathProgramCache]: Analyzing trace with hash 1495358065, now seen corresponding path program 4 times [2024-05-06 18:06:19,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:19,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:19,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:20,008 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:06:20,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:20,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:20,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:20,272 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:06:20,464 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:20,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:20,543 INFO L85 PathProgramCache]: Analyzing trace with hash -842103801, now seen corresponding path program 5 times [2024-05-06 18:06:20,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:20,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:20,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:20,765 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:20,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:20,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:20,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:21,011 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:21,174 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:21,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:21,252 INFO L85 PathProgramCache]: Analyzing trace with hash -546448344, now seen corresponding path program 6 times [2024-05-06 18:06:21,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:21,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:21,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:21,493 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:06:21,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:21,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:21,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:21,838 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:06:22,037 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:22,038 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:22,125 INFO L85 PathProgramCache]: Analyzing trace with hash -996996023, now seen corresponding path program 7 times [2024-05-06 18:06:22,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:22,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:22,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:22,330 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:22,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:22,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:22,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:22,558 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:22,798 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:22,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:06:23,766 INFO L85 PathProgramCache]: Analyzing trace with hash -234189018, now seen corresponding path program 8 times [2024-05-06 18:06:23,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:23,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:23,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:23,979 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:06:23,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:23,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:24,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:24,219 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:06:24,469 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:24,469 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:06:24,990 INFO L85 PathProgramCache]: Analyzing trace with hash -1717314807, now seen corresponding path program 9 times [2024-05-06 18:06:24,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:24,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:25,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:25,275 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:25,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:25,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:25,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:25,484 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:25,613 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:25,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:25,673 INFO L85 PathProgramCache]: Analyzing trace with hash -1381169794, now seen corresponding path program 1 times [2024-05-06 18:06:25,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:25,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:25,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:25,937 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:25,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:25,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:25,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:26,270 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:26,422 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:26,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:26,510 INFO L85 PathProgramCache]: Analyzing trace with hash -1988882287, now seen corresponding path program 2 times [2024-05-06 18:06:26,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:26,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:26,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:26,760 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:06:26,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:26,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:26,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:27,006 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:06:27,146 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:27,147 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:27,279 INFO L85 PathProgramCache]: Analyzing trace with hash 1756561391, now seen corresponding path program 1 times [2024-05-06 18:06:27,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:27,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:27,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:27,498 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:27,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:27,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:27,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:27,707 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:27,840 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:27,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:27,928 INFO L85 PathProgramCache]: Analyzing trace with hash -252558016, now seen corresponding path program 2 times [2024-05-06 18:06:27,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:27,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:27,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:28,159 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:06:28,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:28,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:28,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:28,420 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:06:28,564 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:28,565 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:28,657 INFO L85 PathProgramCache]: Analyzing trace with hash 1857778528, now seen corresponding path program 1 times [2024-05-06 18:06:28,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:28,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:28,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:28,856 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:28,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:28,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:28,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:29,047 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:29,247 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:29,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:29,331 INFO L85 PathProgramCache]: Analyzing trace with hash 103162095, now seen corresponding path program 2 times [2024-05-06 18:06:29,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:29,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:29,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:29,535 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:06:29,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:29,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:29,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:29,748 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:06:29,900 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:29,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:29,983 INFO L85 PathProgramCache]: Analyzing trace with hash -217166382, now seen corresponding path program 10 times [2024-05-06 18:06:29,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:29,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:30,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:30,271 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:30,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:30,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:30,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:30,502 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:30,658 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:30,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:30,751 INFO L85 PathProgramCache]: Analyzing trace with hash -1860376899, now seen corresponding path program 11 times [2024-05-06 18:06:30,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:30,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:30,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:30,957 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:06:30,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:30,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:30,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:31,160 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:06:31,403 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:31,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:06:40,405 INFO L85 PathProgramCache]: Analyzing trace with hash 1813485638, now seen corresponding path program 12 times [2024-05-06 18:06:40,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:40,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:40,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:40,593 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:40,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:40,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:40,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:40,742 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:41,000 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:41,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:06:41,568 INFO L85 PathProgramCache]: Analyzing trace with hash -330704128, now seen corresponding path program 13 times [2024-05-06 18:06:41,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:41,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:41,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:41,715 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:41,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:41,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:41,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:41,869 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:42,001 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:06:42,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:06:42,100 INFO L85 PathProgramCache]: Analyzing trace with hash 20945848, now seen corresponding path program 14 times [2024-05-06 18:06:42,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:42,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:42,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:42,262 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:42,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:42,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:42,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:42,417 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:42,637 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:42,637 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:06:43,211 INFO L85 PathProgramCache]: Analyzing trace with hash 1524404429, now seen corresponding path program 1 times [2024-05-06 18:06:43,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:43,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:43,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:43,378 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:43,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:43,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:43,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:43,537 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:43,749 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:43,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:06:46,554 INFO L85 PathProgramCache]: Analyzing trace with hash -11882200, now seen corresponding path program 2 times [2024-05-06 18:06:46,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:46,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:46,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:46,798 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:06:46,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:46,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:46,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:46,974 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:06:47,199 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:47,200 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:06:51,861 INFO L85 PathProgramCache]: Analyzing trace with hash -1336298819, now seen corresponding path program 1 times [2024-05-06 18:06:51,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:51,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:51,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:52,014 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:52,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:06:52,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:06:52,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:06:52,245 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:06:52,491 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:06:52,491 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:07:09,412 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.base_In_14 Int) (v_~q2~0.offset_In_14 Int)) (= 0 (select (select |c_#memory_int| v_~q2~0.base_In_14) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_14)))) (forall ((v_~q1~0.offset_In_24 Int) (v_~q1_front~0_In_24 Int) (v_~q1~0.base_In_24 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_24) (+ (* v_~q1_front~0_In_24 4) v_~q1~0.offset_In_24)))) (or (< v_~q1_front~0_In_24 0) (= .cse0 0) (< (+ .cse0 4294967295) 0) (< 4294967295 .cse0))))) is different from false [2024-05-06 18:07:09,413 INFO L85 PathProgramCache]: Analyzing trace with hash 48020792, now seen corresponding path program 2 times [2024-05-06 18:07:09,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:09,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:09,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:09,592 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:07:09,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:09,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:09,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:09,767 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:07:09,992 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:09,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:07:30,721 WARN L293 SmtUtils]: Spent 18.13s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 18:07:32,731 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.base_In_15 Int) (v_~q2~0.offset_In_15 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_15) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_15)) 0)) (forall ((v_~q1_front~0_In_25 Int) (v_~q1~0.base_In_25 Int) (v_~q1~0.offset_In_25 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_25) (+ v_~q1~0.offset_In_25 (* v_~q1_front~0_In_25 4))))) (or (< 4294967295 .cse0) (< (+ 4294967295 .cse0) 0) (= .cse0 0) (< v_~q1_front~0_In_25 0))))) is different from false [2024-05-06 18:07:32,733 INFO L85 PathProgramCache]: Analyzing trace with hash 649630455, now seen corresponding path program 1 times [2024-05-06 18:07:32,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:32,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:32,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:32,925 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:07:32,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:32,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:32,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:33,087 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:07:33,320 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:33,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:07:34,105 INFO L85 PathProgramCache]: Analyzing trace with hash 1910341182, now seen corresponding path program 2 times [2024-05-06 18:07:34,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:34,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:34,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:34,275 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:07:34,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:34,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:34,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:34,505 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:07:34,723 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:34,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:07:37,651 INFO L85 PathProgramCache]: Analyzing trace with hash 20955773, now seen corresponding path program 1 times [2024-05-06 18:07:37,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:37,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:37,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:37,800 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:07:37,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:37,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:37,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:37,950 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:07:38,175 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:38,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:07:38,722 INFO L85 PathProgramCache]: Analyzing trace with hash -647207560, now seen corresponding path program 2 times [2024-05-06 18:07:38,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:38,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:38,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:38,953 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:07:38,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:07:38,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:07:38,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:07:39,117 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:07:39,346 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:07:39,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:07:58,094 WARN L293 SmtUtils]: Spent 16.16s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 18:08:00,103 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q1~0.base_In_29 Int) (v_~q1_front~0_In_29 Int) (v_~q1~0.offset_In_29 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_29) (+ v_~q1~0.offset_In_29 (* v_~q1_front~0_In_29 4))))) (or (= .cse0 0) (< (+ .cse0 4294967295) 0) (< v_~q1_front~0_In_29 0) (< 4294967295 .cse0)))) (forall ((v_~q2~0.base_In_19 Int) (v_~q2~0.offset_In_19 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_19) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_19)) 0))) is different from false [2024-05-06 18:08:00,105 INFO L85 PathProgramCache]: Analyzing trace with hash -1661892008, now seen corresponding path program 1 times [2024-05-06 18:08:00,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:00,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:00,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:00,255 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:00,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:00,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:00,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:00,403 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:00,613 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:00,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:02,743 INFO L85 PathProgramCache]: Analyzing trace with hash -425835523, now seen corresponding path program 2 times [2024-05-06 18:08:02,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:02,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:02,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:02,903 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:02,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:02,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:02,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:03,068 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:03,294 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:03,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:04,016 INFO L85 PathProgramCache]: Analyzing trace with hash -330704097, now seen corresponding path program 1 times [2024-05-06 18:08:04,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:04,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:04,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:04,170 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:04,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:04,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:04,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:04,429 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:04,648 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:04,648 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:05,152 INFO L85 PathProgramCache]: Analyzing trace with hash 850846486, now seen corresponding path program 2 times [2024-05-06 18:08:05,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:05,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:05,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:05,324 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:05,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:05,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:05,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:05,495 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:05,713 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:05,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:08,192 INFO L85 PathProgramCache]: Analyzing trace with hash -841951877, now seen corresponding path program 15 times [2024-05-06 18:08:08,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:08,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:08,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:08,416 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:08,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:08,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:08,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:08,569 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:08,789 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:08,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:11,760 INFO L85 PathProgramCache]: Analyzing trace with hash 718131258, now seen corresponding path program 16 times [2024-05-06 18:08:11,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:11,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:11,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:11,926 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:11,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:11,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:11,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:12,092 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:12,259 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:08:12,259 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:08:12,323 INFO L85 PathProgramCache]: Analyzing trace with hash 1713617407, now seen corresponding path program 17 times [2024-05-06 18:08:12,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:12,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:12,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:12,534 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:12,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:12,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:12,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:12,677 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:12,888 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:12,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:13,409 INFO L85 PathProgramCache]: Analyzing trace with hash 395908601, now seen corresponding path program 18 times [2024-05-06 18:08:13,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:13,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:13,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:13,557 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:13,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:13,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:13,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:13,700 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:13,825 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:08:13,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:08:13,913 INFO L85 PathProgramCache]: Analyzing trace with hash -611734235, now seen corresponding path program 19 times [2024-05-06 18:08:13,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:13,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:13,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:14,165 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:14,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:14,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:14,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:14,319 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:14,442 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:08:14,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:08:14,541 INFO L85 PathProgramCache]: Analyzing trace with hash -1783891071, now seen corresponding path program 20 times [2024-05-06 18:08:14,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:14,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:14,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:14,693 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:14,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:14,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:14,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:14,846 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:15,031 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:08:15,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:08:15,128 INFO L85 PathProgramCache]: Analyzing trace with hash 1034729807, now seen corresponding path program 21 times [2024-05-06 18:08:15,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:15,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:15,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:15,256 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:15,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:15,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:15,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:15,386 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:15,625 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:15,626 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:08:15,696 INFO L85 PathProgramCache]: Analyzing trace with hash 2011853975, now seen corresponding path program 22 times [2024-05-06 18:08:15,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:15,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:15,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:15,828 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:15,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:15,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:15,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:15,958 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:16,157 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:08:16,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:08:16,225 INFO L85 PathProgramCache]: Analyzing trace with hash -747645637, now seen corresponding path program 23 times [2024-05-06 18:08:16,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:16,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:16,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:16,380 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:16,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:16,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:16,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:16,541 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:16,698 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:16,698 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:08:16,786 INFO L85 PathProgramCache]: Analyzing trace with hash -1702177237, now seen corresponding path program 24 times [2024-05-06 18:08:16,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:16,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:16,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:17,030 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:17,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:17,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:17,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:17,198 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:17,427 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:17,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:18,024 INFO L85 PathProgramCache]: Analyzing trace with hash -1702177248, now seen corresponding path program 25 times [2024-05-06 18:08:18,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:18,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:18,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:18,185 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:18,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:18,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:18,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:18,344 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:18,500 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:18,500 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:08:18,565 INFO L85 PathProgramCache]: Analyzing trace with hash 590237160, now seen corresponding path program 26 times [2024-05-06 18:08:18,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:18,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:18,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:18,813 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:18,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:18,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:18,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:18,977 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:19,126 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:19,127 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:08:19,196 INFO L85 PathProgramCache]: Analyzing trace with hash 160148355, now seen corresponding path program 27 times [2024-05-06 18:08:19,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:19,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:19,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:19,363 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:19,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:19,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:19,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:19,538 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:19,700 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:19,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:08:19,782 INFO L85 PathProgramCache]: Analyzing trace with hash 1801945129, now seen corresponding path program 28 times [2024-05-06 18:08:19,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:19,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:19,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:19,966 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:19,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:19,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:19,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:20,225 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:20,449 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:20,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:21,005 INFO L85 PathProgramCache]: Analyzing trace with hash -751615171, now seen corresponding path program 29 times [2024-05-06 18:08:21,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:21,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:21,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:21,161 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:21,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:21,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:21,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:21,319 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:21,479 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:21,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:08:21,553 INFO L85 PathProgramCache]: Analyzing trace with hash -1825232791, now seen corresponding path program 30 times [2024-05-06 18:08:21,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:21,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:21,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:21,796 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:21,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:21,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:21,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:21,954 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:22,111 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:22,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:08:22,182 INFO L85 PathProgramCache]: Analyzing trace with hash -747640651, now seen corresponding path program 31 times [2024-05-06 18:08:22,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:22,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:22,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:22,347 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:22,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:22,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:22,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:22,511 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:22,736 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:22,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:28,165 INFO L85 PathProgramCache]: Analyzing trace with hash 739068002, now seen corresponding path program 32 times [2024-05-06 18:08:28,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:28,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:28,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:28,399 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:28,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:28,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:28,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:28,561 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:28,776 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:28,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:29,426 INFO L85 PathProgramCache]: Analyzing trace with hash 1197715345, now seen corresponding path program 1 times [2024-05-06 18:08:29,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:29,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:29,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:29,598 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:29,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:29,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:29,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:29,767 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:29,982 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:29,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:31,890 INFO L85 PathProgramCache]: Analyzing trace with hash -568332572, now seen corresponding path program 2 times [2024-05-06 18:08:31,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:31,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:31,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:32,083 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:32,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:32,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:32,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:32,277 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:32,497 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:32,497 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:35,241 INFO L85 PathProgramCache]: Analyzing trace with hash 315730620, now seen corresponding path program 1 times [2024-05-06 18:08:35,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:35,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:35,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:35,487 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:35,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:35,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:35,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:35,676 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:35,893 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:35,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:36,432 INFO L85 PathProgramCache]: Analyzing trace with hash -1483582439, now seen corresponding path program 2 times [2024-05-06 18:08:36,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:36,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:36,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:36,615 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:36,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:36,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:36,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:36,806 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:37,027 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:37,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:41,702 INFO L85 PathProgramCache]: Analyzing trace with hash 1534205491, now seen corresponding path program 1 times [2024-05-06 18:08:41,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:41,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:41,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:41,896 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:41,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:41,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:41,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:42,084 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:42,302 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:42,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:43,755 INFO L85 PathProgramCache]: Analyzing trace with hash -1629038974, now seen corresponding path program 2 times [2024-05-06 18:08:43,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:43,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:43,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:44,027 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:44,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:44,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:44,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:44,219 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:44,439 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:44,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:46,978 INFO L85 PathProgramCache]: Analyzing trace with hash 1573511135, now seen corresponding path program 33 times [2024-05-06 18:08:46,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:46,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:47,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:47,145 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:47,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:47,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:47,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:47,313 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:08:47,527 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:47,527 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:08:50,405 INFO L85 PathProgramCache]: Analyzing trace with hash -837798314, now seen corresponding path program 34 times [2024-05-06 18:08:50,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:50,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:50,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:50,587 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:50,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:50,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:50,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:50,767 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:08:50,928 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:50,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:08:51,001 INFO L85 PathProgramCache]: Analyzing trace with hash 1574779023, now seen corresponding path program 35 times [2024-05-06 18:08:51,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:51,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:51,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:51,175 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:51,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:08:51,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:08:51,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:08:51,355 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:08:51,645 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:08:51,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:09:20,985 INFO L85 PathProgramCache]: Analyzing trace with hash 1574778437, now seen corresponding path program 36 times [2024-05-06 18:09:20,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:20,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:21,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:21,242 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:21,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:21,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:21,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:21,405 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:21,565 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:21,565 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:21,646 INFO L85 PathProgramCache]: Analyzing trace with hash -956125557, now seen corresponding path program 37 times [2024-05-06 18:09:21,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:21,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:21,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:21,821 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:21,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:21,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:21,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:22,003 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:22,165 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:22,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:22,250 INFO L85 PathProgramCache]: Analyzing trace with hash -956094774, now seen corresponding path program 1 times [2024-05-06 18:09:22,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:22,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:22,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:22,434 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:22,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:22,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:22,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:22,690 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:22,844 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:22,844 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:22,912 INFO L85 PathProgramCache]: Analyzing trace with hash 616210637, now seen corresponding path program 2 times [2024-05-06 18:09:22,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:22,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:22,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:23,177 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:09:23,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:23,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:23,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:23,393 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:09:23,569 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:23,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:23,648 INFO L85 PathProgramCache]: Analyzing trace with hash 523347515, now seen corresponding path program 1 times [2024-05-06 18:09:23,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:23,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:23,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:23,839 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:23,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:23,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:23,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:24,083 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:24,242 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:24,242 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:24,318 INFO L85 PathProgramCache]: Analyzing trace with hash 1674965116, now seen corresponding path program 2 times [2024-05-06 18:09:24,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:24,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:24,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:24,515 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:09:24,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:24,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:24,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:24,716 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:09:24,900 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:24,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:24,975 INFO L85 PathProgramCache]: Analyzing trace with hash -1368591188, now seen corresponding path program 1 times [2024-05-06 18:09:24,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:24,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:25,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:25,153 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:25,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:25,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:25,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:25,400 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:25,555 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:25,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:25,641 INFO L85 PathProgramCache]: Analyzing trace with hash -69381845, now seen corresponding path program 2 times [2024-05-06 18:09:25,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:25,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:25,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:25,833 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:09:25,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:25,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:25,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:26,049 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:09:26,214 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:26,214 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:26,278 INFO L85 PathProgramCache]: Analyzing trace with hash -1706716130, now seen corresponding path program 38 times [2024-05-06 18:09:26,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:26,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:26,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:26,456 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:26,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:26,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:26,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:26,723 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:26,902 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:09:26,902 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:09:26,964 INFO L85 PathProgramCache]: Analyzing trace with hash 732235693, now seen corresponding path program 39 times [2024-05-06 18:09:26,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:26,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:26,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:27,153 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:09:27,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:27,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:27,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:27,339 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:09:27,498 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:27,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:27,569 INFO L85 PathProgramCache]: Analyzing trace with hash 1224471033, now seen corresponding path program 40 times [2024-05-06 18:09:27,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:27,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:27,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:27,760 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:09:27,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:27,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:27,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:27,951 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:09:28,201 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:09:28,202 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:09:28,264 INFO L85 PathProgramCache]: Analyzing trace with hash 50195672, now seen corresponding path program 41 times [2024-05-06 18:09:28,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:28,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:28,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:28,447 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:09:28,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:28,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:28,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:28,634 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:09:28,816 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:09:28,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:09:28,888 INFO L85 PathProgramCache]: Analyzing trace with hash -33671529, now seen corresponding path program 42 times [2024-05-06 18:09:28,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:28,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:28,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:29,039 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:09:29,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:29,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:29,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:29,192 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:09:29,407 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:29,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:09:30,091 INFO L85 PathProgramCache]: Analyzing trace with hash 1914833794, now seen corresponding path program 43 times [2024-05-06 18:09:30,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:30,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:30,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:30,256 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:09:30,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:30,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:30,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:30,407 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 18:09:30,551 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:09:30,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:09:30,623 INFO L85 PathProgramCache]: Analyzing trace with hash 19666015, now seen corresponding path program 44 times [2024-05-06 18:09:30,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:30,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:30,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:30,763 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:30,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:30,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:30,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:30,902 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:31,059 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:31,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:31,131 INFO L85 PathProgramCache]: Analyzing trace with hash -1407330097, now seen corresponding path program 45 times [2024-05-06 18:09:31,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:31,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:31,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:31,351 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:31,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:31,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:31,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:31,501 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:31,635 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:09:31,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:09:31,692 INFO L85 PathProgramCache]: Analyzing trace with hash 1186148084, now seen corresponding path program 46 times [2024-05-06 18:09:31,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:31,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:31,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:31,845 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:31,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:31,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:31,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:32,002 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:32,152 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:32,153 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:32,217 INFO L85 PathProgramCache]: Analyzing trace with hash -1884114049, now seen corresponding path program 47 times [2024-05-06 18:09:32,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:32,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:32,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:32,371 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:32,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:32,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:32,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:32,607 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:32,758 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:32,758 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:32,839 INFO L85 PathProgramCache]: Analyzing trace with hash -1833594952, now seen corresponding path program 48 times [2024-05-06 18:09:32,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:32,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:32,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:33,008 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:33,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:33,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:33,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:33,180 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:09:33,336 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:33,337 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:09:33,416 INFO L85 PathProgramCache]: Analyzing trace with hash 1186148073, now seen corresponding path program 49 times [2024-05-06 18:09:33,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:33,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:33,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:33,571 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:33,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:09:33,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:09:33,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:09:33,724 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:09:33,939 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:09:33,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:05,688 WARN L293 SmtUtils]: Spent 20.26s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 18:10:07,693 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.base_In_65 Int) (v_~q2~0.offset_In_65 Int)) (= 0 (select (select |c_#memory_int| v_~q2~0.base_In_65) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_65)))) (forall ((v_~q1_front~0_In_54 Int) (v_~q1~0.offset_In_54 Int) (v_~q1~0.base_In_54 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_54) (+ (* v_~q1_front~0_In_54 4) v_~q1~0.offset_In_54)))) (or (< (+ .cse0 4294967295) 0) (< 4294967295 .cse0) (< v_~q1_front~0_In_54 0) (= .cse0 0))))) is different from false [2024-05-06 18:10:07,695 INFO L85 PathProgramCache]: Analyzing trace with hash 1276912582, now seen corresponding path program 50 times [2024-05-06 18:10:07,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:07,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:07,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:07,854 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:10:07,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:07,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:07,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:08,015 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:10:08,142 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:08,143 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:08,301 INFO L85 PathProgramCache]: Analyzing trace with hash -1247622402, now seen corresponding path program 51 times [2024-05-06 18:10:08,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:08,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:08,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:08,477 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:10:08,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:08,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:08,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:08,639 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:10:08,850 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:08,851 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:11,669 INFO L85 PathProgramCache]: Analyzing trace with hash -669210760, now seen corresponding path program 52 times [2024-05-06 18:10:11,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:11,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:11,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:11,836 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:11,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:11,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:11,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:12,011 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:12,251 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:12,251 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:10:12,322 INFO L85 PathProgramCache]: Analyzing trace with hash 729303950, now seen corresponding path program 53 times [2024-05-06 18:10:12,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:12,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:12,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:12,495 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:12,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:12,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:12,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:12,671 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:12,799 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:12,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:12,876 INFO L85 PathProgramCache]: Analyzing trace with hash 1133586992, now seen corresponding path program 54 times [2024-05-06 18:10:12,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:12,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:12,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:13,048 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:13,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:13,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:13,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:13,221 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:13,381 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:13,381 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:10:13,454 INFO L85 PathProgramCache]: Analyzing trace with hash 1133586992, now seen corresponding path program 55 times [2024-05-06 18:10:13,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:13,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:13,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:13,705 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:13,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:13,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:13,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:13,886 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:14,041 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:14,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:10:14,112 INFO L85 PathProgramCache]: Analyzing trace with hash 781459408, now seen corresponding path program 56 times [2024-05-06 18:10:14,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:14,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:14,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:14,293 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:14,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:14,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:14,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:14,478 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:14,605 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:14,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:14,676 INFO L85 PathProgramCache]: Analyzing trace with hash -1576813949, now seen corresponding path program 57 times [2024-05-06 18:10:14,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:14,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:14,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:14,956 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:14,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:14,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:14,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:15,158 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:15,299 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:15,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:15,383 INFO L85 PathProgramCache]: Analyzing trace with hash 1347503638, now seen corresponding path program 58 times [2024-05-06 18:10:15,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:15,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:15,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:15,579 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:15,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:15,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:15,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:15,763 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:16,005 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:16,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:16,615 INFO L85 PathProgramCache]: Analyzing trace with hash 1133604853, now seen corresponding path program 3 times [2024-05-06 18:10:16,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:16,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:16,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:16,787 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:16,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:16,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:16,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:16,959 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:17,092 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:17,092 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:17,173 INFO L85 PathProgramCache]: Analyzing trace with hash -1527396499, now seen corresponding path program 4 times [2024-05-06 18:10:17,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:17,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:17,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:17,344 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:17,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:17,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:17,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:17,529 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 18:10:17,772 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:17,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:22,540 INFO L85 PathProgramCache]: Analyzing trace with hash 1469462794, now seen corresponding path program 1 times [2024-05-06 18:10:22,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:22,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:22,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:22,763 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:10:22,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:22,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:22,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:22,979 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:10:22,987 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:10:22,988 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:10:22,988 INFO L85 PathProgramCache]: Analyzing trace with hash -6519584, now seen corresponding path program 1 times [2024-05-06 18:10:22,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:10:22,991 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1529100311] [2024-05-06 18:10:22,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:22,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:23,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:23,261 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 55 proven. 52 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 18:10:23,262 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:10:23,262 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1529100311] [2024-05-06 18:10:23,262 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1529100311] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:10:23,262 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [570546026] [2024-05-06 18:10:23,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:23,263 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:10:23,263 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:10:23,309 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:10:23,310 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 18:10:23,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:23,668 INFO L262 TraceCheckSpWp]: Trace formula consists of 759 conjuncts, 9 conjunts are in the unsatisfiable core [2024-05-06 18:10:23,677 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:10:23,873 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 55 proven. 1 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-05-06 18:10:23,874 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:10:24,115 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 53 proven. 3 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-05-06 18:10:24,116 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [570546026] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:10:24,116 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:10:24,116 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 19 [2024-05-06 18:10:24,117 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1729321358] [2024-05-06 18:10:24,118 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:10:24,120 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2024-05-06 18:10:24,120 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:10:24,123 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-05-06 18:10:24,123 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=265, Unknown=0, NotChecked=0, Total=342 [2024-05-06 18:10:24,124 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:10:24,124 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:10:24,125 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 16.57894736842105) internal successors, (315), 19 states have internal predecessors, (315), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:10:24,125 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:10:24,703 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:24,703 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:10:24,790 INFO L85 PathProgramCache]: Analyzing trace with hash -1837031506, now seen corresponding path program 2 times [2024-05-06 18:10:24,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:24,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:24,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:25,254 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 18:10:25,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:25,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:25,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:25,657 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 18:10:25,810 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:25,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:25,918 INFO L85 PathProgramCache]: Analyzing trace with hash -1081596298, now seen corresponding path program 59 times [2024-05-06 18:10:25,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:25,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:25,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:26,070 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 18:10:26,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:26,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:26,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:26,209 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 18:10:26,345 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:26,346 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:26,443 INFO L85 PathProgramCache]: Analyzing trace with hash 1621677558, now seen corresponding path program 60 times [2024-05-06 18:10:26,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:26,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:26,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:26,864 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:26,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:26,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:26,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:27,067 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:27,337 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:27,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:28,116 INFO L85 PathProgramCache]: Analyzing trace with hash 765075685, now seen corresponding path program 61 times [2024-05-06 18:10:28,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:28,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:28,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:28,283 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:10:28,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:28,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:28,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:28,450 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:10:28,676 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:28,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:29,259 INFO L85 PathProgramCache]: Analyzing trace with hash -1785086816, now seen corresponding path program 62 times [2024-05-06 18:10:29,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:29,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:29,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:29,427 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 18:10:29,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:29,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:29,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:29,599 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 18:10:29,738 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:29,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:29,824 INFO L85 PathProgramCache]: Analyzing trace with hash -2025897864, now seen corresponding path program 63 times [2024-05-06 18:10:29,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:29,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:29,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:30,012 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:30,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:30,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:30,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:30,210 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:30,369 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:30,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:30,555 INFO L85 PathProgramCache]: Analyzing trace with hash -2021945641, now seen corresponding path program 64 times [2024-05-06 18:10:30,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:30,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:30,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:30,726 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:10:30,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:30,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:30,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:30,899 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:10:31,038 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:31,038 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:31,111 INFO L85 PathProgramCache]: Analyzing trace with hash -758088264, now seen corresponding path program 65 times [2024-05-06 18:10:31,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:31,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:31,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:31,287 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:31,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:31,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:31,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:31,463 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:31,676 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:31,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:32,494 INFO L85 PathProgramCache]: Analyzing trace with hash -666652395, now seen corresponding path program 66 times [2024-05-06 18:10:32,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:32,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:32,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:32,648 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 18:10:32,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:32,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:32,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:32,807 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 18:10:33,037 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:33,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:33,724 INFO L85 PathProgramCache]: Analyzing trace with hash -702792392, now seen corresponding path program 67 times [2024-05-06 18:10:33,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:33,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:33,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:33,917 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:33,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:33,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:33,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:34,178 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:34,306 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:34,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:34,387 INFO L85 PathProgramCache]: Analyzing trace with hash 1563674797, now seen corresponding path program 3 times [2024-05-06 18:10:34,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:34,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:34,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:34,584 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:34,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:34,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:34,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:34,785 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:34,916 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:34,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:35,015 INFO L85 PathProgramCache]: Analyzing trace with hash -1152093630, now seen corresponding path program 4 times [2024-05-06 18:10:35,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:35,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:35,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:35,248 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:10:35,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:35,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:35,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:35,536 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:10:35,676 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:35,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:35,751 INFO L85 PathProgramCache]: Analyzing trace with hash -88106272, now seen corresponding path program 3 times [2024-05-06 18:10:35,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:35,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:35,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:35,952 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:35,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:35,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:35,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:36,164 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:36,312 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:36,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:36,380 INFO L85 PathProgramCache]: Analyzing trace with hash 328624495, now seen corresponding path program 4 times [2024-05-06 18:10:36,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:36,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:36,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:36,562 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:10:36,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:36,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:36,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:36,816 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:10:36,957 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:36,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:37,029 INFO L85 PathProgramCache]: Analyzing trace with hash 1244083791, now seen corresponding path program 3 times [2024-05-06 18:10:37,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:37,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:37,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:37,226 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:37,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:37,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:37,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:37,431 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:37,588 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:37,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:37,659 INFO L85 PathProgramCache]: Analyzing trace with hash -1956300064, now seen corresponding path program 4 times [2024-05-06 18:10:37,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:37,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:37,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:37,844 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:10:37,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:37,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:37,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:38,123 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:10:38,275 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:38,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:38,365 INFO L85 PathProgramCache]: Analyzing trace with hash 1287057667, now seen corresponding path program 68 times [2024-05-06 18:10:38,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:38,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:38,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:38,600 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:38,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:38,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:38,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:38,799 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:38,940 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:38,940 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:39,009 INFO L85 PathProgramCache]: Analyzing trace with hash 428493484, now seen corresponding path program 69 times [2024-05-06 18:10:39,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:39,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:39,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:39,189 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:10:39,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:39,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:39,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:39,369 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 18:10:39,593 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:39,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:40,613 INFO L85 PathProgramCache]: Analyzing trace with hash -1265591947, now seen corresponding path program 70 times [2024-05-06 18:10:40,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:40,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:40,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:40,793 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:40,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:40,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:40,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:40,975 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:41,216 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:41,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:46,127 INFO L85 PathProgramCache]: Analyzing trace with hash 1626385583, now seen corresponding path program 71 times [2024-05-06 18:10:46,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:46,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:46,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:46,311 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:46,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:46,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:46,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:46,582 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:46,717 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:10:46,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:10:46,799 INFO L85 PathProgramCache]: Analyzing trace with hash -411517529, now seen corresponding path program 72 times [2024-05-06 18:10:46,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:46,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:46,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:46,989 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:46,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:46,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:47,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:47,174 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:47,393 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:47,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:49,994 INFO L85 PathProgramCache]: Analyzing trace with hash -1385139074, now seen corresponding path program 3 times [2024-05-06 18:10:49,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:49,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:50,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:50,188 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:50,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:50,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:50,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:50,450 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:50,671 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:50,672 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:53,651 INFO L85 PathProgramCache]: Analyzing trace with hash -399678313, now seen corresponding path program 4 times [2024-05-06 18:10:53,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:53,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:53,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:53,870 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:53,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:53,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:53,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:54,082 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:54,306 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:54,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:54,916 INFO L85 PathProgramCache]: Analyzing trace with hash -321776404, now seen corresponding path program 3 times [2024-05-06 18:10:54,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:54,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:54,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:55,105 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:55,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:55,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:55,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:55,298 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:55,553 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:55,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:56,081 INFO L85 PathProgramCache]: Analyzing trace with hash 1143889897, now seen corresponding path program 4 times [2024-05-06 18:10:56,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:56,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:56,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:56,302 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:56,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:56,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:56,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:56,516 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:10:56,835 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:56,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:10:57,395 INFO L85 PathProgramCache]: Analyzing trace with hash 128167656, now seen corresponding path program 3 times [2024-05-06 18:10:57,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:57,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:57,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:57,587 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:57,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:10:57,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:10:57,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:10:57,792 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:10:58,024 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:10:58,024 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 18:11:03,431 INFO L85 PathProgramCache]: Analyzing trace with hash 560218477, now seen corresponding path program 4 times [2024-05-06 18:11:03,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:03,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:03,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:03,738 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:11:03,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:03,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:03,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:03,950 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:11:04,112 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:11:04,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:11:04,223 INFO L85 PathProgramCache]: Analyzing trace with hash 1308179182, now seen corresponding path program 73 times [2024-05-06 18:11:04,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:04,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:04,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:04,732 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:11:04,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:04,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:04,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:04,917 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:11:05,050 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:11:05,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:11:05,138 INFO L85 PathProgramCache]: Analyzing trace with hash -372826476, now seen corresponding path program 74 times [2024-05-06 18:11:05,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:05,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:05,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:05,330 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:11:05,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:05,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:05,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:05,611 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:11:05,755 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:11:05,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:11:05,815 INFO L85 PathProgramCache]: Analyzing trace with hash 1327282162, now seen corresponding path program 75 times [2024-05-06 18:11:05,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:05,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:05,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:06,018 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:11:06,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:06,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:06,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:06,213 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 18:11:06,401 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:06,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:06,476 INFO L85 PathProgramCache]: Analyzing trace with hash -1875551874, now seen corresponding path program 76 times [2024-05-06 18:11:06,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:06,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:06,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:06,644 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:06,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:06,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:06,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:06,817 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:06,979 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:06,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:07,045 INFO L85 PathProgramCache]: Analyzing trace with hash 1987435080, now seen corresponding path program 77 times [2024-05-06 18:11:07,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:07,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:07,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:07,304 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:07,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:07,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:07,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:07,476 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:07,673 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:07,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:07,747 INFO L85 PathProgramCache]: Analyzing trace with hash 637778156, now seen corresponding path program 78 times [2024-05-06 18:11:07,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:07,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:07,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:07,942 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:07,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:07,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:07,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:08,130 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:08,289 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:08,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:08,363 INFO L85 PathProgramCache]: Analyzing trace with hash -1703712614, now seen corresponding path program 79 times [2024-05-06 18:11:08,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:08,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:08,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:08,558 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:08,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:08,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:08,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:08,837 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:08,991 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:08,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:09,074 INFO L85 PathProgramCache]: Analyzing trace with hash -885260137, now seen corresponding path program 80 times [2024-05-06 18:11:09,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:09,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:09,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:09,272 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:09,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:09,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:09,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:09,476 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:09,643 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:09,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:09,716 INFO L85 PathProgramCache]: Analyzing trace with hash -1684519308, now seen corresponding path program 81 times [2024-05-06 18:11:09,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:09,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:09,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:09,924 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:09,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:09,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:09,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:10,224 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:10,382 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:10,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:10,459 INFO L85 PathProgramCache]: Analyzing trace with hash -1864998310, now seen corresponding path program 82 times [2024-05-06 18:11:10,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:10,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:10,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:10,692 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:10,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:10,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:10,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:10,916 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:11,096 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:11,096 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:11,171 INFO L85 PathProgramCache]: Analyzing trace with hash -810710376, now seen corresponding path program 83 times [2024-05-06 18:11:11,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:11,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:11,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:11,364 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:11,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:11,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:11,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:11,556 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:11,797 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:11,797 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:11,892 INFO L85 PathProgramCache]: Analyzing trace with hash 637783142, now seen corresponding path program 84 times [2024-05-06 18:11:11,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:11,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:11,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:12,095 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:12,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:12,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:12,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:12,300 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:12,502 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:12,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:12,579 INFO L85 PathProgramCache]: Analyzing trace with hash 961084286, now seen corresponding path program 85 times [2024-05-06 18:11:12,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:12,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:12,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:12,783 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:12,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:12,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:12,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:12,986 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:13,146 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:13,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:13,233 INFO L85 PathProgramCache]: Analyzing trace with hash 1332744826, now seen corresponding path program 86 times [2024-05-06 18:11:13,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:13,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:13,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:13,534 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 18:11:13,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:13,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:13,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:13,749 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 18:11:13,902 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:13,903 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:13,990 INFO L85 PathProgramCache]: Analyzing trace with hash 1332775609, now seen corresponding path program 3 times [2024-05-06 18:11:13,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:13,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:14,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:14,204 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:14,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:14,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:14,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:14,417 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:14,580 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:14,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:14,652 INFO L85 PathProgramCache]: Analyzing trace with hash 1044199870, now seen corresponding path program 4 times [2024-05-06 18:11:14,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:14,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:14,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:14,946 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 18:11:14,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:14,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:14,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:15,149 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 18:11:15,306 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:15,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:15,382 INFO L85 PathProgramCache]: Analyzing trace with hash 1151371372, now seen corresponding path program 3 times [2024-05-06 18:11:15,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:15,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:15,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:15,595 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:15,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:15,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:15,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:15,812 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:15,969 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:15,969 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:16,038 INFO L85 PathProgramCache]: Analyzing trace with hash 303297899, now seen corresponding path program 4 times [2024-05-06 18:11:16,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:16,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:16,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:16,337 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 18:11:16,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:16,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:16,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:16,535 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 18:11:16,695 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:16,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:16,771 INFO L85 PathProgramCache]: Analyzing trace with hash -378501029, now seen corresponding path program 3 times [2024-05-06 18:11:16,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:16,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:16,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:16,985 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:16,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:16,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:17,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:17,199 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:17,350 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:17,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:17,426 INFO L85 PathProgramCache]: Analyzing trace with hash -1637649828, now seen corresponding path program 4 times [2024-05-06 18:11:17,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:17,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:17,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:17,629 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 18:11:17,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:17,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:17,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:17,919 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 18:11:18,074 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:18,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:18,151 INFO L85 PathProgramCache]: Analyzing trace with hash -843493745, now seen corresponding path program 87 times [2024-05-06 18:11:18,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:18,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:18,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:18,364 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:18,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:18,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:18,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:18,571 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 18:11:18,752 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:18,752 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:18,828 INFO L85 PathProgramCache]: Analyzing trace with hash 1727250718, now seen corresponding path program 88 times [2024-05-06 18:11:18,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:18,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:18,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:19,022 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 18:11:19,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:19,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:19,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:19,300 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 18:11:19,457 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:19,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:19,528 INFO L85 PathProgramCache]: Analyzing trace with hash 2005165736, now seen corresponding path program 89 times [2024-05-06 18:11:19,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:19,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:19,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:19,724 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 18:11:19,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:19,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:19,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:19,925 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 18:11:20,120 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:20,121 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:20,196 INFO L85 PathProgramCache]: Analyzing trace with hash 631378183, now seen corresponding path program 90 times [2024-05-06 18:11:20,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:20,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:20,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:20,384 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 18:11:20,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:20,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:20,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:20,585 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 18:11:20,778 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:20,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:20,845 INFO L85 PathProgramCache]: Analyzing trace with hash -1217465592, now seen corresponding path program 91 times [2024-05-06 18:11:20,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:20,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:20,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:21,166 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:11:21,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:21,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:21,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:21,392 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:11:21,546 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:11:21,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:11:21,613 INFO L85 PathProgramCache]: Analyzing trace with hash 335982928, now seen corresponding path program 92 times [2024-05-06 18:11:21,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:21,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:21,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:21,799 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:21,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:21,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:21,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:21,993 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:22,171 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:22,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:22,271 INFO L85 PathProgramCache]: Analyzing trace with hash 1703843136, now seen corresponding path program 93 times [2024-05-06 18:11:22,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:22,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:22,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:22,465 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:22,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:22,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:22,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:22,658 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:22,870 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:11:22,871 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:11:22,947 INFO L85 PathProgramCache]: Analyzing trace with hash 664685285, now seen corresponding path program 94 times [2024-05-06 18:11:22,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:22,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:22,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:23,147 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:23,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:23,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:23,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:23,350 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:23,507 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:23,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:23,589 INFO L85 PathProgramCache]: Analyzing trace with hash -869591634, now seen corresponding path program 95 times [2024-05-06 18:11:23,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:23,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:23,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:23,793 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:23,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:23,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:23,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:24,002 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:24,157 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:24,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:24,246 INFO L85 PathProgramCache]: Analyzing trace with hash -737725847, now seen corresponding path program 96 times [2024-05-06 18:11:24,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:24,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:24,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:24,474 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:11:24,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:24,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:24,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:24,780 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:11:24,944 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 18:11:24,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 18:11:25,021 INFO L85 PathProgramCache]: Analyzing trace with hash 664685274, now seen corresponding path program 97 times [2024-05-06 18:11:25,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:25,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:25,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:25,226 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:25,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:25,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:25,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:25,434 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:25,574 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:11:25,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:11:25,651 INFO L85 PathProgramCache]: Analyzing trace with hash 256601647, now seen corresponding path program 98 times [2024-05-06 18:11:25,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:25,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:25,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:25,874 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:25,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:25,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:25,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:26,096 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 18:11:26,323 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:11:26,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:11:26,402 INFO L85 PathProgramCache]: Analyzing trace with hash -2065511199, now seen corresponding path program 99 times [2024-05-06 18:11:26,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:26,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:26,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:26,622 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:11:26,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:26,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:26,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:26,861 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:11:26,989 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:11:26,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:11:27,068 INFO L85 PathProgramCache]: Analyzing trace with hash -1406169358, now seen corresponding path program 100 times [2024-05-06 18:11:27,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:27,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:27,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:27,297 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:11:27,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:27,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:27,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:27,526 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 18:11:27,663 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:11:27,663 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:11:27,751 INFO L85 PathProgramCache]: Analyzing trace with hash -711958521, now seen corresponding path program 101 times [2024-05-06 18:11:27,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:27,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:27,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:28,100 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:11:28,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:28,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:28,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:28,379 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 18:11:28,508 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:11:28,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:11:28,585 INFO L85 PathProgramCache]: Analyzing trace with hash -664174114, now seen corresponding path program 5 times [2024-05-06 18:11:28,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:28,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:28,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:28,807 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:11:28,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:28,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:28,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:29,033 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 18:11:29,049 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:11:29,056 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-05-06 18:11:29,250 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable272,SelfDestructingSolverStorable273,SelfDestructingSolverStorable274,SelfDestructingSolverStorable275,SelfDestructingSolverStorable270,SelfDestructingSolverStorable271,SelfDestructingSolverStorable306,SelfDestructingSolverStorable307,SelfDestructingSolverStorable308,SelfDestructingSolverStorable309,SelfDestructingSolverStorable269,SelfDestructingSolverStorable302,SelfDestructingSolverStorable303,SelfDestructingSolverStorable304,SelfDestructingSolverStorable305,SelfDestructingSolverStorable265,SelfDestructingSolverStorable266,SelfDestructingSolverStorable267,SelfDestructingSolverStorable300,SelfDestructingSolverStorable268,SelfDestructingSolverStorable301,SelfDestructingSolverStorable261,SelfDestructingSolverStorable262,SelfDestructingSolverStorable263,SelfDestructingSolverStorable264,SelfDestructingSolverStorable260,SelfDestructingSolverStorable258,SelfDestructingSolverStorable259,SelfDestructingSolverStorable254,SelfDestructingSolverStorable255,SelfDestructingSolverStorable256,SelfDestructingSolverStorable257,SelfDestructingSolverStorable294,SelfDestructingSolverStorable295,SelfDestructingSolverStorable296,SelfDestructingSolverStorable297,SelfDestructingSolverStorable290,SelfDestructingSolverStorable291,SelfDestructingSolverStorable292,SelfDestructingSolverStorable293,SelfDestructingSolverStorable207,SelfDestructingSolverStorable208,SelfDestructingSolverStorable209,SelfDestructingSolverStorable203,SelfDestructingSolverStorable204,SelfDestructingSolverStorable205,SelfDestructingSolverStorable206,SelfDestructingSolverStorable287,SelfDestructingSolverStorable200,SelfDestructingSolverStorable288,SelfDestructingSolverStorable201,SelfDestructingSolverStorable289,SelfDestructingSolverStorable202,SelfDestructingSolverStorable283,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable284,SelfDestructingSolverStorable285,SelfDestructingSolverStorable286,SelfDestructingSolverStorable280,SelfDestructingSolverStorable281,SelfDestructingSolverStorable282,SelfDestructingSolverStorable313,SelfDestructingSolverStorable314,SelfDestructingSolverStorable315,SelfDestructingSolverStorable316,SelfDestructingSolverStorable276,SelfDestructingSolverStorable277,SelfDestructingSolverStorable310,SelfDestructingSolverStorable278,SelfDestructingSolverStorable311,SelfDestructingSolverStorable279,SelfDestructingSolverStorable312,SelfDestructingSolverStorable195,SelfDestructingSolverStorable196,SelfDestructingSolverStorable197,SelfDestructingSolverStorable230,SelfDestructingSolverStorable198,SelfDestructingSolverStorable231,SelfDestructingSolverStorable191,SelfDestructingSolverStorable192,SelfDestructingSolverStorable193,SelfDestructingSolverStorable194,SelfDestructingSolverStorable190,SelfDestructingSolverStorable229,SelfDestructingSolverStorable225,SelfDestructingSolverStorable226,SelfDestructingSolverStorable227,SelfDestructingSolverStorable228,SelfDestructingSolverStorable221,SelfDestructingSolverStorable222,SelfDestructingSolverStorable223,SelfDestructingSolverStorable224,SelfDestructingSolverStorable220,SelfDestructingSolverStorable218,SelfDestructingSolverStorable219,SelfDestructingSolverStorable214,SelfDestructingSolverStorable215,SelfDestructingSolverStorable216,SelfDestructingSolverStorable217,SelfDestructingSolverStorable210,SelfDestructingSolverStorable298,SelfDestructingSolverStorable211,SelfDestructingSolverStorable299,SelfDestructingSolverStorable212,SelfDestructingSolverStorable213,SelfDestructingSolverStorable250,SelfDestructingSolverStorable251,SelfDestructingSolverStorable252,SelfDestructingSolverStorable253,SelfDestructingSolverStorable247,SelfDestructingSolverStorable248,SelfDestructingSolverStorable249,SelfDestructingSolverStorable243,SelfDestructingSolverStorable244,SelfDestructingSolverStorable245,SelfDestructingSolverStorable246,SelfDestructingSolverStorable240,SelfDestructingSolverStorable241,SelfDestructingSolverStorable242,SelfDestructingSolverStorable236,SelfDestructingSolverStorable237,SelfDestructingSolverStorable238,SelfDestructingSolverStorable239,SelfDestructingSolverStorable199,SelfDestructingSolverStorable232,SelfDestructingSolverStorable233,SelfDestructingSolverStorable234,SelfDestructingSolverStorable235 [2024-05-06 18:11:29,250 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:11:29,251 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:11:29,251 INFO L85 PathProgramCache]: Analyzing trace with hash -167691695, now seen corresponding path program 2 times [2024-05-06 18:11:29,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:11:29,251 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1899974777] [2024-05-06 18:11:29,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:29,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:29,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:29,575 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 61 proven. 59 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2024-05-06 18:11:29,575 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:11:29,575 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1899974777] [2024-05-06 18:11:29,575 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1899974777] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:11:29,576 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1414118518] [2024-05-06 18:11:29,576 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 18:11:29,576 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:11:29,576 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:11:29,577 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:11:29,577 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 18:11:30,068 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 18:11:30,068 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:11:30,072 INFO L262 TraceCheckSpWp]: Trace formula consists of 773 conjuncts, 12 conjunts are in the unsatisfiable core [2024-05-06 18:11:30,076 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:11:30,355 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 84 proven. 10 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 18:11:30,355 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:11:30,665 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 72 proven. 22 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 18:11:30,666 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1414118518] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:11:30,666 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:11:30,666 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 28 [2024-05-06 18:11:30,666 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [576891208] [2024-05-06 18:11:30,666 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:11:30,667 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2024-05-06 18:11:30,667 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:11:30,667 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2024-05-06 18:11:30,668 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=145, Invalid=611, Unknown=0, NotChecked=0, Total=756 [2024-05-06 18:11:30,668 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:11:30,668 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:11:30,668 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 12.821428571428571) internal successors, (359), 28 states have internal predecessors, (359), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:11:30,668 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:11:30,668 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:11:31,177 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:11:31,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:11:31,247 INFO L85 PathProgramCache]: Analyzing trace with hash 1221649383, now seen corresponding path program 102 times [2024-05-06 18:11:31,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:31,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:31,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:31,399 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 18:11:31,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:31,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:31,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:31,525 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 18:11:31,657 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 18:11:31,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 18:11:31,747 INFO L85 PathProgramCache]: Analyzing trace with hash 146180261, now seen corresponding path program 103 times [2024-05-06 18:11:31,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:31,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:31,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:32,109 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 2 proven. 31 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:11:32,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:32,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:32,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:32,334 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 2 proven. 31 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:11:32,587 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:32,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:32,661 INFO L85 PathProgramCache]: Analyzing trace with hash -659662163, now seen corresponding path program 104 times [2024-05-06 18:11:32,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:32,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:32,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:32,796 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 18:11:32,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:32,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:32,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:32,931 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 18:11:33,116 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:33,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:33,185 INFO L85 PathProgramCache]: Analyzing trace with hash 1733647261, now seen corresponding path program 105 times [2024-05-06 18:11:33,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:33,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:33,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:33,355 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 18:11:33,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:33,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:33,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:33,571 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 18:11:33,784 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:33,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:33,854 INFO L85 PathProgramCache]: Analyzing trace with hash 1521383823, now seen corresponding path program 106 times [2024-05-06 18:11:33,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:33,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:33,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:34,066 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 18:11:34,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:34,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:34,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:34,277 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 18:11:34,463 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:34,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:34,535 INFO L85 PathProgramCache]: Analyzing trace with hash 1014142518, now seen corresponding path program 107 times [2024-05-06 18:11:34,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:34,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:34,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:34,731 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-05-06 18:11:34,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:34,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:34,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:34,927 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-05-06 18:11:35,115 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:35,115 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:35,189 INFO L85 PathProgramCache]: Analyzing trace with hash -1265062279, now seen corresponding path program 108 times [2024-05-06 18:11:35,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:35,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:35,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:35,412 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:11:35,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:35,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:35,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:35,678 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 18:11:35,721 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:11:35,721 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:11:35,729 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-05-06 18:11:35,928 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable330,SelfDestructingSolverStorable317,SelfDestructingSolverStorable328,SelfDestructingSolverStorable318,SelfDestructingSolverStorable329,SelfDestructingSolverStorable319,SelfDestructingSolverStorable324,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable325,SelfDestructingSolverStorable326,SelfDestructingSolverStorable327,SelfDestructingSolverStorable320,SelfDestructingSolverStorable331,SelfDestructingSolverStorable321,SelfDestructingSolverStorable322,SelfDestructingSolverStorable323 [2024-05-06 18:11:35,929 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:11:35,929 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:11:35,929 INFO L85 PathProgramCache]: Analyzing trace with hash 487976642, now seen corresponding path program 3 times [2024-05-06 18:11:35,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:11:35,929 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75349575] [2024-05-06 18:11:35,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:35,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:35,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:36,335 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 91 proven. 54 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-05-06 18:11:36,336 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:11:36,336 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [75349575] [2024-05-06 18:11:36,336 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [75349575] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:11:36,336 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [323612897] [2024-05-06 18:11:36,336 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-06 18:11:36,336 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:11:36,336 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:11:36,337 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:11:36,338 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-05-06 18:11:36,828 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2024-05-06 18:11:36,828 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:11:36,830 INFO L262 TraceCheckSpWp]: Trace formula consists of 541 conjuncts, 17 conjunts are in the unsatisfiable core [2024-05-06 18:11:36,835 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:11:37,121 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 183 trivial. 0 not checked. [2024-05-06 18:11:37,121 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 18:11:37,121 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [323612897] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 18:11:37,121 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 18:11:37,121 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [17] total 23 [2024-05-06 18:11:37,122 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1331955625] [2024-05-06 18:11:37,122 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 18:11:37,122 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-05-06 18:11:37,122 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:11:37,123 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-05-06 18:11:37,123 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=443, Unknown=0, NotChecked=0, Total=506 [2024-05-06 18:11:37,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:11:37,123 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:11:37,123 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 28.125) internal successors, (225), 8 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:11:37,123 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:11:37,123 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:11:37,123 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:11:37,701 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:37,702 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:37,786 INFO L85 PathProgramCache]: Analyzing trace with hash 1635717710, now seen corresponding path program 1 times [2024-05-06 18:11:37,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:37,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:37,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:37,925 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 18:11:37,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:37,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:37,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:38,061 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 18:11:38,283 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:38,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:38,368 INFO L85 PathProgramCache]: Analyzing trace with hash -2132231652, now seen corresponding path program 2 times [2024-05-06 18:11:38,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:38,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:38,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:38,534 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 18:11:38,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:38,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:38,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:38,737 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 18:11:39,007 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:39,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:39,090 INFO L85 PathProgramCache]: Analyzing trace with hash -320022962, now seen corresponding path program 3 times [2024-05-06 18:11:39,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:39,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:39,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:39,296 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-05-06 18:11:39,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:39,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:39,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:39,510 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-05-06 18:11:39,734 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:39,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:39,826 INFO L85 PathProgramCache]: Analyzing trace with hash -514553385, now seen corresponding path program 4 times [2024-05-06 18:11:39,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:39,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:39,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:40,025 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 18:11:40,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:40,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:40,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:40,222 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 18:11:40,454 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:40,454 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:40,547 INFO L85 PathProgramCache]: Analyzing trace with hash 1572378680, now seen corresponding path program 5 times [2024-05-06 18:11:40,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:40,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:40,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:40,773 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:11:40,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:40,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:40,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:41,063 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 18:11:41,098 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:11:41,099 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:11:41,099 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:11:41,106 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-05-06 18:11:41,306 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable340,SelfDestructingSolverStorable341,SelfDestructingSolverStorable339,SelfDestructingSolverStorable335,SelfDestructingSolverStorable336,SelfDestructingSolverStorable337,SelfDestructingSolverStorable338,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable342,SelfDestructingSolverStorable332,SelfDestructingSolverStorable333,SelfDestructingSolverStorable334 [2024-05-06 18:11:41,306 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:11:41,306 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:11:41,307 INFO L85 PathProgramCache]: Analyzing trace with hash -1562800255, now seen corresponding path program 1 times [2024-05-06 18:11:41,307 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:11:41,307 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [654436088] [2024-05-06 18:11:41,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:41,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:41,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:41,712 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 91 proven. 54 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-05-06 18:11:41,712 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:11:41,712 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [654436088] [2024-05-06 18:11:41,712 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [654436088] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:11:41,712 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [209642540] [2024-05-06 18:11:41,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:41,713 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:11:41,713 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:11:41,714 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:11:41,715 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-05-06 18:11:42,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:42,215 INFO L262 TraceCheckSpWp]: Trace formula consists of 801 conjuncts, 9 conjunts are in the unsatisfiable core [2024-05-06 18:11:42,218 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:11:42,449 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 64 proven. 1 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2024-05-06 18:11:42,450 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:11:42,706 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 59 proven. 6 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2024-05-06 18:11:42,707 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [209642540] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:11:42,707 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:11:42,707 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 9, 9] total 30 [2024-05-06 18:11:42,707 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531478766] [2024-05-06 18:11:42,707 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:11:42,707 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2024-05-06 18:11:42,707 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:11:42,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2024-05-06 18:11:42,708 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=98, Invalid=772, Unknown=0, NotChecked=0, Total=870 [2024-05-06 18:11:42,708 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:11:42,709 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:11:42,709 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 16.366666666666667) internal successors, (491), 30 states have internal predecessors, (491), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:11:42,709 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:11:42,709 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:11:42,709 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:11:42,709 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:11:43,969 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:43,970 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:44,093 INFO L85 PathProgramCache]: Analyzing trace with hash 277744493, now seen corresponding path program 6 times [2024-05-06 18:11:44,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:44,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:44,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:44,839 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-05-06 18:11:44,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:44,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:44,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:45,384 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-05-06 18:11:45,662 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:45,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:45,787 INFO L85 PathProgramCache]: Analyzing trace with hash -1036696867, now seen corresponding path program 7 times [2024-05-06 18:11:45,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:45,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:45,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:46,254 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-05-06 18:11:46,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:46,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:46,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:46,478 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-05-06 18:11:46,782 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:46,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:46,899 INFO L85 PathProgramCache]: Analyzing trace with hash -2070212401, now seen corresponding path program 8 times [2024-05-06 18:11:46,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:46,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:46,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:47,242 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-05-06 18:11:47,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:47,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:47,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:47,505 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2024-05-06 18:11:47,738 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:47,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:47,862 INFO L85 PathProgramCache]: Analyzing trace with hash -346077450, now seen corresponding path program 9 times [2024-05-06 18:11:47,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:47,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:47,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:48,163 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-05-06 18:11:48,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:48,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:48,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:48,422 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-05-06 18:11:48,666 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:48,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:48,786 INFO L85 PathProgramCache]: Analyzing trace with hash 306644409, now seen corresponding path program 10 times [2024-05-06 18:11:48,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:48,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:48,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:49,483 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 5 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-06 18:11:49,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:49,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:49,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:49,707 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 5 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-05-06 18:11:49,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:11:49,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:11:49,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:11:49,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:11:49,765 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-05-06 18:11:49,963 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable350,6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable351,SelfDestructingSolverStorable352,SelfDestructingSolverStorable346,SelfDestructingSolverStorable347,SelfDestructingSolverStorable348,SelfDestructingSolverStorable349,SelfDestructingSolverStorable353,SelfDestructingSolverStorable343,SelfDestructingSolverStorable344,SelfDestructingSolverStorable345 [2024-05-06 18:11:49,964 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:11:49,964 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:11:49,964 INFO L85 PathProgramCache]: Analyzing trace with hash 1289061890, now seen corresponding path program 2 times [2024-05-06 18:11:49,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:11:49,964 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1228467421] [2024-05-06 18:11:49,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:49,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:50,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:50,294 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 28 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-05-06 18:11:50,294 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:11:50,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1228467421] [2024-05-06 18:11:50,294 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1228467421] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:11:50,295 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1439484804] [2024-05-06 18:11:50,295 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 18:11:50,295 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:11:50,295 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:11:50,296 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:11:50,296 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-05-06 18:11:50,824 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 18:11:50,824 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:11:50,828 INFO L262 TraceCheckSpWp]: Trace formula consists of 829 conjuncts, 15 conjunts are in the unsatisfiable core [2024-05-06 18:11:50,831 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:11:51,182 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 117 proven. 10 refuted. 0 times theorem prover too weak. 95 trivial. 0 not checked. [2024-05-06 18:11:51,183 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:11:51,590 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 38 proven. 89 refuted. 0 times theorem prover too weak. 95 trivial. 0 not checked. [2024-05-06 18:11:51,590 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1439484804] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:11:51,590 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:11:51,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 14, 14] total 33 [2024-05-06 18:11:51,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1499315924] [2024-05-06 18:11:51,591 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:11:51,591 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2024-05-06 18:11:51,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:11:51,592 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2024-05-06 18:11:51,592 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=201, Invalid=855, Unknown=0, NotChecked=0, Total=1056 [2024-05-06 18:11:51,592 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:11:51,592 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:11:51,593 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 13.606060606060606) internal successors, (449), 33 states have internal predecessors, (449), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:11:51,593 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:11:51,593 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:11:51,593 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:11:51,593 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:11:51,593 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:11:52,681 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:52,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:52,804 INFO L85 PathProgramCache]: Analyzing trace with hash 1019585371, now seen corresponding path program 11 times [2024-05-06 18:11:52,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:52,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:52,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:53,082 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2024-05-06 18:11:53,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:53,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:53,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:53,336 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2024-05-06 18:11:53,602 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:53,603 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:53,720 INFO L85 PathProgramCache]: Analyzing trace with hash 1994310831, now seen corresponding path program 12 times [2024-05-06 18:11:53,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:53,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:53,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:53,972 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 115 trivial. 0 not checked. [2024-05-06 18:11:53,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:53,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:54,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:54,124 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 115 trivial. 0 not checked. [2024-05-06 18:11:54,421 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:54,421 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:54,541 INFO L85 PathProgramCache]: Analyzing trace with hash 1376420385, now seen corresponding path program 13 times [2024-05-06 18:11:54,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:54,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:54,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:54,726 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2024-05-06 18:11:54,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:54,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:54,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:54,971 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2024-05-06 18:11:55,219 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:55,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:55,336 INFO L85 PathProgramCache]: Analyzing trace with hash -1173641500, now seen corresponding path program 14 times [2024-05-06 18:11:55,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:55,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:55,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:55,516 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 115 trivial. 0 not checked. [2024-05-06 18:11:55,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:55,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:55,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:55,697 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 115 trivial. 0 not checked. [2024-05-06 18:11:55,961 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:55,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:56,080 INFO L85 PathProgramCache]: Analyzing trace with hash -580727541, now seen corresponding path program 15 times [2024-05-06 18:11:56,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:56,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:56,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:56,287 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2024-05-06 18:11:56,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:56,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:56,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:56,390 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2024-05-06 18:11:56,762 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:56,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:56,868 INFO L85 PathProgramCache]: Analyzing trace with hash 35006963, now seen corresponding path program 1 times [2024-05-06 18:11:56,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:56,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:56,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:57,012 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 115 trivial. 0 not checked. [2024-05-06 18:11:57,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:57,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:57,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:57,155 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 115 trivial. 0 not checked. [2024-05-06 18:11:57,402 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:57,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:57,521 INFO L85 PathProgramCache]: Analyzing trace with hash -571776942, now seen corresponding path program 2 times [2024-05-06 18:11:57,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:57,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:57,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:57,660 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-05-06 18:11:57,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:57,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:57,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:57,876 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-05-06 18:11:58,140 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:58,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:58,259 INFO L85 PathProgramCache]: Analyzing trace with hash -748936430, now seen corresponding path program 16 times [2024-05-06 18:11:58,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:58,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:58,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:58,848 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 18:11:58,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:58,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:58,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:59,165 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 18:11:59,445 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:11:59,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:11:59,566 INFO L85 PathProgramCache]: Analyzing trace with hash -1728770337, now seen corresponding path program 17 times [2024-05-06 18:11:59,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:59,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:59,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:59,702 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 10 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2024-05-06 18:11:59,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:11:59,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:11:59,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:11:59,837 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 10 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2024-05-06 18:11:59,854 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:11:59,854 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:11:59,854 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:11:59,854 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:11:59,854 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:11:59,864 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-05-06 18:12:00,054 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable360,SelfDestructingSolverStorable371,SelfDestructingSolverStorable361,SelfDestructingSolverStorable372,SelfDestructingSolverStorable362,SelfDestructingSolverStorable363,SelfDestructingSolverStorable370,7 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable357,SelfDestructingSolverStorable368,SelfDestructingSolverStorable358,SelfDestructingSolverStorable369,SelfDestructingSolverStorable359,SelfDestructingSolverStorable364,SelfDestructingSolverStorable354,SelfDestructingSolverStorable365,SelfDestructingSolverStorable355,SelfDestructingSolverStorable366,SelfDestructingSolverStorable356,SelfDestructingSolverStorable367 [2024-05-06 18:12:00,055 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:12:00,055 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:12:00,055 INFO L85 PathProgramCache]: Analyzing trace with hash 1401487857, now seen corresponding path program 3 times [2024-05-06 18:12:00,055 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:12:00,055 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [634231714] [2024-05-06 18:12:00,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:00,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:00,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:00,640 INFO L134 CoverageAnalysis]: Checked inductivity of 494 backedges. 146 proven. 197 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2024-05-06 18:12:00,640 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:12:00,641 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [634231714] [2024-05-06 18:12:00,641 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [634231714] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:12:00,641 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1106122619] [2024-05-06 18:12:00,641 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-06 18:12:00,641 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:00,641 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:12:00,642 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:12:00,643 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-05-06 18:12:01,357 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2024-05-06 18:12:01,357 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:12:01,361 INFO L262 TraceCheckSpWp]: Trace formula consists of 756 conjuncts, 18 conjunts are in the unsatisfiable core [2024-05-06 18:12:01,365 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:12:01,978 INFO L134 CoverageAnalysis]: Checked inductivity of 494 backedges. 213 proven. 52 refuted. 0 times theorem prover too weak. 229 trivial. 0 not checked. [2024-05-06 18:12:01,978 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:12:02,676 INFO L134 CoverageAnalysis]: Checked inductivity of 494 backedges. 69 proven. 196 refuted. 0 times theorem prover too weak. 229 trivial. 0 not checked. [2024-05-06 18:12:02,676 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1106122619] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:12:02,676 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:12:02,676 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18] total 49 [2024-05-06 18:12:02,677 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [794599736] [2024-05-06 18:12:02,677 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:12:02,677 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 49 states [2024-05-06 18:12:02,677 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:12:02,678 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2024-05-06 18:12:02,679 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=274, Invalid=2078, Unknown=0, NotChecked=0, Total=2352 [2024-05-06 18:12:02,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:02,679 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:12:02,679 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 49 states, 49 states have (on average 12.142857142857142) internal successors, (595), 49 states have internal predecessors, (595), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:12:02,679 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:02,679 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:02,679 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:02,680 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:02,680 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:02,680 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:04,857 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:04,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:04,977 INFO L85 PathProgramCache]: Analyzing trace with hash -903383878, now seen corresponding path program 18 times [2024-05-06 18:12:04,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:04,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:05,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:05,222 INFO L134 CoverageAnalysis]: Checked inductivity of 189 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2024-05-06 18:12:05,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:05,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:05,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:05,484 INFO L134 CoverageAnalysis]: Checked inductivity of 189 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2024-05-06 18:12:05,729 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:05,729 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:05,858 INFO L85 PathProgramCache]: Analyzing trace with hash 1130102064, now seen corresponding path program 19 times [2024-05-06 18:12:05,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:05,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:05,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:06,007 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2024-05-06 18:12:06,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:06,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:06,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:06,167 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2024-05-06 18:12:06,447 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:06,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:06,566 INFO L85 PathProgramCache]: Analyzing trace with hash -1048249246, now seen corresponding path program 20 times [2024-05-06 18:12:06,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:06,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:06,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:06,744 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2024-05-06 18:12:06,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:06,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:06,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:06,926 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2024-05-06 18:12:07,159 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:07,159 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:07,279 INFO L85 PathProgramCache]: Analyzing trace with hash 1459108931, now seen corresponding path program 21 times [2024-05-06 18:12:07,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:07,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:07,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:07,450 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2024-05-06 18:12:07,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:07,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:07,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:07,632 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2024-05-06 18:12:07,869 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:07,869 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:07,997 INFO L85 PathProgramCache]: Analyzing trace with hash -1135560116, now seen corresponding path program 22 times [2024-05-06 18:12:07,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:07,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:08,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:08,169 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2024-05-06 18:12:08,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:08,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:08,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:08,286 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2024-05-06 18:12:08,656 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:08,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:08,765 INFO L85 PathProgramCache]: Analyzing trace with hash 372433810, now seen corresponding path program 3 times [2024-05-06 18:12:08,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:08,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:08,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:08,921 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2024-05-06 18:12:08,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:08,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:08,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:09,072 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2024-05-06 18:12:09,309 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:09,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:09,430 INFO L85 PathProgramCache]: Analyzing trace with hash -763944173, now seen corresponding path program 4 times [2024-05-06 18:12:09,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:09,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:09,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:09,578 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2024-05-06 18:12:09,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:09,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:09,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:09,725 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2024-05-06 18:12:09,986 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:09,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:10,109 INFO L85 PathProgramCache]: Analyzing trace with hash 1883814001, now seen corresponding path program 23 times [2024-05-06 18:12:10,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:10,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:10,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:10,761 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2024-05-06 18:12:10,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:10,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:10,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:11,137 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2024-05-06 18:12:11,420 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:11,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:11,544 INFO L85 PathProgramCache]: Analyzing trace with hash 1539946878, now seen corresponding path program 24 times [2024-05-06 18:12:11,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:11,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:11,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:11,682 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 10 proven. 4 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2024-05-06 18:12:11,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:11,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:11,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:11,819 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 10 proven. 4 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2024-05-06 18:12:11,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:11,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:11,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:11,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:11,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:11,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:11,846 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-05-06 18:12:12,038 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable382,SelfDestructingSolverStorable383,SelfDestructingSolverStorable373,SelfDestructingSolverStorable384,SelfDestructingSolverStorable374,SelfDestructingSolverStorable385,SelfDestructingSolverStorable390,SelfDestructingSolverStorable380,SelfDestructingSolverStorable391,SelfDestructingSolverStorable381,8 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable379,SelfDestructingSolverStorable375,SelfDestructingSolverStorable386,SelfDestructingSolverStorable376,SelfDestructingSolverStorable387,SelfDestructingSolverStorable377,SelfDestructingSolverStorable388,SelfDestructingSolverStorable378,SelfDestructingSolverStorable389 [2024-05-06 18:12:12,038 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:12:12,038 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:12:12,039 INFO L85 PathProgramCache]: Analyzing trace with hash -436652912, now seen corresponding path program 4 times [2024-05-06 18:12:12,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:12:12,039 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1964985949] [2024-05-06 18:12:12,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:12,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:12,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:12,736 INFO L134 CoverageAnalysis]: Checked inductivity of 560 backedges. 145 proven. 270 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2024-05-06 18:12:12,736 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:12:12,736 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1964985949] [2024-05-06 18:12:12,737 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1964985949] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:12:12,737 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [201847252] [2024-05-06 18:12:12,737 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-05-06 18:12:12,737 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:12,737 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:12:12,738 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:12:12,738 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-05-06 18:12:13,470 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-05-06 18:12:13,471 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:12:13,475 INFO L262 TraceCheckSpWp]: Trace formula consists of 1015 conjuncts, 4 conjunts are in the unsatisfiable core [2024-05-06 18:12:13,479 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:12:13,699 INFO L134 CoverageAnalysis]: Checked inductivity of 560 backedges. 147 proven. 0 refuted. 0 times theorem prover too weak. 413 trivial. 0 not checked. [2024-05-06 18:12:13,700 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 18:12:13,700 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [201847252] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 18:12:13,700 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 18:12:13,700 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [21] total 23 [2024-05-06 18:12:13,700 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1786188169] [2024-05-06 18:12:13,700 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 18:12:13,701 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-05-06 18:12:13,701 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:12:13,701 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-06 18:12:13,701 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=429, Unknown=0, NotChecked=0, Total=506 [2024-05-06 18:12:13,701 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:13,701 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:12:13,702 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 62.25) internal successors, (249), 4 states have internal predecessors, (249), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:12:13,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:13,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:13,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:13,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:13,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:13,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:13,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:13,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:13,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:13,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:13,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:13,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:13,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:13,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:13,808 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-05-06 18:12:14,000 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable392,9 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:14,001 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:12:14,001 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:12:14,001 INFO L85 PathProgramCache]: Analyzing trace with hash -1733718033, now seen corresponding path program 5 times [2024-05-06 18:12:14,001 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:12:14,001 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989290715] [2024-05-06 18:12:14,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:14,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:14,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:14,390 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 13 proven. 6 refuted. 0 times theorem prover too weak. 171 trivial. 0 not checked. [2024-05-06 18:12:14,391 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:12:14,391 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1989290715] [2024-05-06 18:12:14,391 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1989290715] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:12:14,391 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1223107301] [2024-05-06 18:12:14,391 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-05-06 18:12:14,391 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:14,391 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:12:14,392 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:12:14,397 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-05-06 18:12:14,965 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2024-05-06 18:12:14,965 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:12:14,966 INFO L262 TraceCheckSpWp]: Trace formula consists of 260 conjuncts, 12 conjunts are in the unsatisfiable core [2024-05-06 18:12:14,969 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:12:15,188 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 14 proven. 5 refuted. 0 times theorem prover too weak. 171 trivial. 0 not checked. [2024-05-06 18:12:15,188 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:12:15,314 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 15 proven. 1 refuted. 0 times theorem prover too weak. 174 trivial. 0 not checked. [2024-05-06 18:12:15,314 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1223107301] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:12:15,314 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:12:15,314 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 9, 6] total 25 [2024-05-06 18:12:15,314 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2121714759] [2024-05-06 18:12:15,314 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:12:15,315 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2024-05-06 18:12:15,315 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:12:15,316 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-05-06 18:12:15,316 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=512, Unknown=0, NotChecked=0, Total=600 [2024-05-06 18:12:15,316 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:15,316 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:12:15,316 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 18.8) internal successors, (470), 25 states have internal predecessors, (470), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:12:15,316 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:15,316 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:15,316 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:15,316 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:15,316 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:15,317 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:15,317 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:15,317 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:16,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:16,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:16,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:16,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:16,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:16,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:16,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:16,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:12:16,647 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-05-06 18:12:16,835 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable393,10 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:16,836 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:12:16,836 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:12:16,836 INFO L85 PathProgramCache]: Analyzing trace with hash 1345265163, now seen corresponding path program 6 times [2024-05-06 18:12:16,836 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:12:16,836 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054215025] [2024-05-06 18:12:16,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:16,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:16,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:17,093 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 43 proven. 4 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2024-05-06 18:12:17,093 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:12:17,093 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054215025] [2024-05-06 18:12:17,093 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1054215025] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:12:17,094 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [480911655] [2024-05-06 18:12:17,094 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-05-06 18:12:17,094 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:17,094 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:12:17,095 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:12:17,096 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-05-06 18:12:17,736 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2024-05-06 18:12:17,736 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:12:17,739 INFO L262 TraceCheckSpWp]: Trace formula consists of 724 conjuncts, 9 conjunts are in the unsatisfiable core [2024-05-06 18:12:17,742 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:12:17,817 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 17 proven. 25 refuted. 0 times theorem prover too weak. 195 trivial. 0 not checked. [2024-05-06 18:12:17,818 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:12:17,899 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 215 trivial. 0 not checked. [2024-05-06 18:12:17,899 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [480911655] provided 1 perfect and 1 imperfect interpolant sequences [2024-05-06 18:12:17,900 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-05-06 18:12:17,900 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [7, 6] total 12 [2024-05-06 18:12:17,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1356442984] [2024-05-06 18:12:17,900 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 18:12:17,900 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-05-06 18:12:17,900 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:12:17,901 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-06 18:12:17,901 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2024-05-06 18:12:17,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:17,901 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:12:17,901 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:12:17,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:17,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:17,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:17,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:17,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:17,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:17,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:17,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:12:17,902 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:18,453 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:18,454 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:18,824 INFO L85 PathProgramCache]: Analyzing trace with hash -1970104611, now seen corresponding path program 25 times [2024-05-06 18:12:18,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:18,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:18,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:19,824 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 11 proven. 127 refuted. 0 times theorem prover too weak. 127 trivial. 0 not checked. [2024-05-06 18:12:19,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:19,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:19,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:20,239 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 11 proven. 127 refuted. 0 times theorem prover too weak. 127 trivial. 0 not checked. [2024-05-06 18:12:20,623 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:20,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:21,006 INFO L85 PathProgramCache]: Analyzing trace with hash -593613912, now seen corresponding path program 26 times [2024-05-06 18:12:21,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:21,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:21,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:21,428 INFO L134 CoverageAnalysis]: Checked inductivity of 261 backedges. 8 proven. 127 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2024-05-06 18:12:21,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:21,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:21,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:21,824 INFO L134 CoverageAnalysis]: Checked inductivity of 261 backedges. 8 proven. 127 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2024-05-06 18:12:22,220 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:22,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:22,703 INFO L85 PathProgramCache]: Analyzing trace with hash 1194277533, now seen corresponding path program 27 times [2024-05-06 18:12:22,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:22,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:22,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:23,317 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 55 proven. 17 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-05-06 18:12:23,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:23,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:23,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:24,541 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 31 proven. 51 refuted. 0 times theorem prover too weak. 174 trivial. 0 not checked. [2024-05-06 18:12:24,881 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:24,881 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:25,228 INFO L85 PathProgramCache]: Analyzing trace with hash -1636876097, now seen corresponding path program 28 times [2024-05-06 18:12:25,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:25,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:25,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:25,621 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 11 proven. 127 refuted. 0 times theorem prover too weak. 127 trivial. 0 not checked. [2024-05-06 18:12:25,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:25,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:25,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:26,078 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 11 proven. 127 refuted. 0 times theorem prover too weak. 127 trivial. 0 not checked. [2024-05-06 18:12:26,432 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:26,432 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:26,780 INFO L85 PathProgramCache]: Analyzing trace with hash -53830394, now seen corresponding path program 29 times [2024-05-06 18:12:26,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:26,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:26,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:27,171 INFO L134 CoverageAnalysis]: Checked inductivity of 261 backedges. 8 proven. 127 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2024-05-06 18:12:27,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:27,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:27,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:27,553 INFO L134 CoverageAnalysis]: Checked inductivity of 261 backedges. 8 proven. 127 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2024-05-06 18:12:27,896 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:27,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:28,264 INFO L85 PathProgramCache]: Analyzing trace with hash 1013065599, now seen corresponding path program 30 times [2024-05-06 18:12:28,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:28,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:28,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:29,577 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 41 proven. 34 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2024-05-06 18:12:29,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:29,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:29,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:29,949 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 41 proven. 34 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2024-05-06 18:12:30,331 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 18:12:30,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 18:12:30,686 INFO L85 PathProgramCache]: Analyzing trace with hash 483318461, now seen corresponding path program 5 times [2024-05-06 18:12:30,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:30,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:30,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:31,101 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 11 proven. 127 refuted. 0 times theorem prover too weak. 127 trivial. 0 not checked. [2024-05-06 18:12:31,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:31,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:31,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:31,558 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 11 proven. 127 refuted. 0 times theorem prover too weak. 127 trivial. 0 not checked. [2024-05-06 18:12:31,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:31,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:31,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:31,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:31,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:31,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:31,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:31,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:12:31,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:12:31,961 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2024-05-06 18:12:32,154 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable394,SelfDestructingSolverStorable395,SelfDestructingSolverStorable396,SelfDestructingSolverStorable405,SelfDestructingSolverStorable406,SelfDestructingSolverStorable407,SelfDestructingSolverStorable408,SelfDestructingSolverStorable401,SelfDestructingSolverStorable402,SelfDestructingSolverStorable403,SelfDestructingSolverStorable404,SelfDestructingSolverStorable397,SelfDestructingSolverStorable398,SelfDestructingSolverStorable399,SelfDestructingSolverStorable400 [2024-05-06 18:12:32,154 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:12:32,154 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:12:32,154 INFO L85 PathProgramCache]: Analyzing trace with hash 818554080, now seen corresponding path program 7 times [2024-05-06 18:12:32,155 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:12:32,155 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466351112] [2024-05-06 18:12:32,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:32,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:32,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:32,632 INFO L134 CoverageAnalysis]: Checked inductivity of 261 backedges. 60 proven. 13 refuted. 0 times theorem prover too weak. 188 trivial. 0 not checked. [2024-05-06 18:12:32,632 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:12:32,632 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [466351112] [2024-05-06 18:12:32,632 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [466351112] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:12:32,632 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2011493317] [2024-05-06 18:12:32,632 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-05-06 18:12:32,632 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:32,632 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:12:32,633 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:12:32,635 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-05-06 18:12:33,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:33,267 INFO L262 TraceCheckSpWp]: Trace formula consists of 817 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-06 18:12:33,271 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:12:33,450 INFO L134 CoverageAnalysis]: Checked inductivity of 261 backedges. 37 proven. 5 refuted. 0 times theorem prover too weak. 219 trivial. 0 not checked. [2024-05-06 18:12:33,450 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:12:33,594 INFO L134 CoverageAnalysis]: Checked inductivity of 261 backedges. 38 proven. 4 refuted. 0 times theorem prover too weak. 219 trivial. 0 not checked. [2024-05-06 18:12:33,594 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2011493317] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:12:33,594 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:12:33,594 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 8, 8] total 25 [2024-05-06 18:12:33,594 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54437496] [2024-05-06 18:12:33,594 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:12:33,595 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2024-05-06 18:12:33,595 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:12:33,595 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-05-06 18:12:33,596 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=507, Unknown=0, NotChecked=0, Total=600 [2024-05-06 18:12:33,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:33,596 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:12:33,596 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 19.48) internal successors, (487), 25 states have internal predecessors, (487), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:12:33,596 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:33,596 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:33,596 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:33,596 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:33,596 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:33,596 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:33,596 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:33,596 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:12:33,596 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:12:33,596 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:35,292 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:35,292 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:35,292 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:35,292 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:35,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:35,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:35,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:35,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:12:35,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:12:35,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:12:35,303 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-05-06 18:12:35,493 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable409,12 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:35,493 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:12:35,494 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:12:35,494 INFO L85 PathProgramCache]: Analyzing trace with hash 1269375635, now seen corresponding path program 8 times [2024-05-06 18:12:35,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:12:35,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [639480701] [2024-05-06 18:12:35,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:35,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:35,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:35,770 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 44 proven. 6 refuted. 0 times theorem prover too weak. 205 trivial. 0 not checked. [2024-05-06 18:12:35,770 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:12:35,770 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [639480701] [2024-05-06 18:12:35,771 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [639480701] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:12:35,771 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1135155688] [2024-05-06 18:12:35,771 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 18:12:35,771 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:35,771 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:12:35,772 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:12:35,772 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-05-06 18:12:36,389 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 18:12:36,389 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:12:36,392 INFO L262 TraceCheckSpWp]: Trace formula consists of 807 conjuncts, 23 conjunts are in the unsatisfiable core [2024-05-06 18:12:36,396 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:12:37,313 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 29 proven. 45 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2024-05-06 18:12:37,313 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:12:37,924 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 64 proven. 10 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2024-05-06 18:12:37,925 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1135155688] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:12:37,925 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:12:37,925 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 18, 16] total 34 [2024-05-06 18:12:37,925 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1864729956] [2024-05-06 18:12:37,925 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:12:37,925 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2024-05-06 18:12:37,926 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:12:37,926 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2024-05-06 18:12:37,927 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=305, Invalid=817, Unknown=0, NotChecked=0, Total=1122 [2024-05-06 18:12:37,927 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:37,927 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:12:37,927 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 20.0) internal successors, (680), 34 states have internal predecessors, (680), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:12:37,927 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:37,927 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:37,927 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:37,927 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:37,927 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:37,927 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:37,927 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:37,927 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:12:37,928 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:12:37,928 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:12:37,928 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:39,409 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:39,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:39,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:39,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:39,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:39,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:39,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:39,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:12:39,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:12:39,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:12:39,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:12:39,418 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2024-05-06 18:12:39,610 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable410 [2024-05-06 18:12:39,611 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:12:39,611 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:12:39,611 INFO L85 PathProgramCache]: Analyzing trace with hash 1465991578, now seen corresponding path program 9 times [2024-05-06 18:12:39,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:12:39,611 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1742226811] [2024-05-06 18:12:39,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:39,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:39,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:40,171 INFO L134 CoverageAnalysis]: Checked inductivity of 343 backedges. 72 proven. 155 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2024-05-06 18:12:40,171 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:12:40,171 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1742226811] [2024-05-06 18:12:40,171 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1742226811] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:12:40,171 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [493688350] [2024-05-06 18:12:40,171 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-06 18:12:40,171 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:40,171 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:12:40,172 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:12:40,173 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-05-06 18:12:41,631 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2024-05-06 18:12:41,631 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:12:41,637 INFO L262 TraceCheckSpWp]: Trace formula consists of 894 conjuncts, 22 conjunts are in the unsatisfiable core [2024-05-06 18:12:41,641 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:12:42,678 INFO L134 CoverageAnalysis]: Checked inductivity of 343 backedges. 127 proven. 95 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-05-06 18:12:42,678 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:12:44,309 INFO L134 CoverageAnalysis]: Checked inductivity of 343 backedges. 113 proven. 109 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-05-06 18:12:44,310 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [493688350] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:12:44,310 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:12:44,310 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 23, 23] total 63 [2024-05-06 18:12:44,310 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1424990217] [2024-05-06 18:12:44,310 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:12:44,311 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 63 states [2024-05-06 18:12:44,311 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:12:44,312 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2024-05-06 18:12:44,312 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=618, Invalid=3288, Unknown=0, NotChecked=0, Total=3906 [2024-05-06 18:12:44,312 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:44,313 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:12:44,313 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 63 states, 63 states have (on average 12.428571428571429) internal successors, (783), 63 states have internal predecessors, (783), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:12:44,313 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:44,313 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:44,313 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:44,313 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:44,313 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:44,313 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:44,313 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:44,313 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:12:44,313 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:12:44,313 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:12:44,313 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:12:44,313 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:45,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:45,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:45,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:45,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:45,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:45,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:45,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:45,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:12:45,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:12:45,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:12:45,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:12:45,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:12:45,987 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2024-05-06 18:12:46,180 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable411 [2024-05-06 18:12:46,180 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:12:46,180 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:12:46,180 INFO L85 PathProgramCache]: Analyzing trace with hash -406448951, now seen corresponding path program 10 times [2024-05-06 18:12:46,180 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:12:46,180 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695057616] [2024-05-06 18:12:46,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:46,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:46,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:46,777 INFO L134 CoverageAnalysis]: Checked inductivity of 384 backedges. 126 proven. 42 refuted. 0 times theorem prover too weak. 216 trivial. 0 not checked. [2024-05-06 18:12:46,777 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:12:46,778 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1695057616] [2024-05-06 18:12:46,778 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1695057616] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:12:46,778 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2021308114] [2024-05-06 18:12:46,778 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-05-06 18:12:46,778 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:46,778 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:12:46,779 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:12:46,781 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-05-06 18:12:47,631 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-05-06 18:12:47,631 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:12:47,635 INFO L262 TraceCheckSpWp]: Trace formula consists of 908 conjuncts, 34 conjunts are in the unsatisfiable core [2024-05-06 18:12:47,639 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:12:48,862 INFO L134 CoverageAnalysis]: Checked inductivity of 384 backedges. 73 proven. 100 refuted. 0 times theorem prover too weak. 211 trivial. 0 not checked. [2024-05-06 18:12:48,862 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:12:50,230 INFO L134 CoverageAnalysis]: Checked inductivity of 384 backedges. 57 proven. 116 refuted. 0 times theorem prover too weak. 211 trivial. 0 not checked. [2024-05-06 18:12:50,231 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2021308114] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:12:50,231 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:12:50,231 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 27, 28] total 70 [2024-05-06 18:12:50,231 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [79126839] [2024-05-06 18:12:50,231 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:12:50,232 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 70 states [2024-05-06 18:12:50,232 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:12:50,233 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2024-05-06 18:12:50,234 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=590, Invalid=4240, Unknown=0, NotChecked=0, Total=4830 [2024-05-06 18:12:50,234 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:50,234 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:12:50,234 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 70 states, 70 states have (on average 11.571428571428571) internal successors, (810), 70 states have internal predecessors, (810), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:12:50,234 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:50,235 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:50,235 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:50,235 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:50,235 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:50,235 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:50,235 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:50,235 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:12:50,235 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:12:50,235 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:12:50,235 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:12:50,235 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:12:50,235 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:52,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:52,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:52,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:52,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:52,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:52,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:52,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:52,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:12:52,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:12:52,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:12:52,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:12:52,603 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:12:52,603 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:12:52,614 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2024-05-06 18:12:52,803 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable412,15 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:52,803 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:12:52,804 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:12:52,804 INFO L85 PathProgramCache]: Analyzing trace with hash -131235668, now seen corresponding path program 11 times [2024-05-06 18:12:52,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:12:52,804 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [685589848] [2024-05-06 18:12:52,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:12:52,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:12:52,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:12:53,547 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 104 proven. 162 refuted. 0 times theorem prover too weak. 217 trivial. 0 not checked. [2024-05-06 18:12:53,547 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:12:53,547 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [685589848] [2024-05-06 18:12:53,548 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [685589848] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:12:53,548 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1181424251] [2024-05-06 18:12:53,548 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-05-06 18:12:53,548 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:12:53,548 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:12:53,549 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:12:53,550 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-05-06 18:12:55,748 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2024-05-06 18:12:55,748 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:12:55,755 INFO L262 TraceCheckSpWp]: Trace formula consists of 950 conjuncts, 31 conjunts are in the unsatisfiable core [2024-05-06 18:12:55,759 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:12:57,095 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 133 proven. 133 refuted. 0 times theorem prover too weak. 217 trivial. 0 not checked. [2024-05-06 18:12:57,095 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:12:57,962 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 174 proven. 92 refuted. 0 times theorem prover too weak. 217 trivial. 0 not checked. [2024-05-06 18:12:57,962 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1181424251] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:12:57,962 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:12:57,962 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 26, 24] total 65 [2024-05-06 18:12:57,962 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2033398041] [2024-05-06 18:12:57,962 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:12:57,963 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 65 states [2024-05-06 18:12:57,963 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:12:57,964 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2024-05-06 18:12:57,965 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=583, Invalid=3577, Unknown=0, NotChecked=0, Total=4160 [2024-05-06 18:12:57,965 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:12:57,965 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:12:57,966 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 65 states, 65 states have (on average 12.938461538461539) internal successors, (841), 65 states have internal predecessors, (841), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:12:57,966 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:13:00,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:13:00,882 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2024-05-06 18:13:01,070 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable413,16 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:13:01,070 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:13:01,070 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:13:01,070 INFO L85 PathProgramCache]: Analyzing trace with hash -1023267397, now seen corresponding path program 12 times [2024-05-06 18:13:01,071 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:13:01,071 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [345402703] [2024-05-06 18:13:01,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:13:01,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:13:01,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:13:02,535 INFO L134 CoverageAnalysis]: Checked inductivity of 2565 backedges. 802 proven. 963 refuted. 0 times theorem prover too weak. 800 trivial. 0 not checked. [2024-05-06 18:13:02,536 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:13:02,536 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [345402703] [2024-05-06 18:13:02,536 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [345402703] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:13:02,536 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1852748049] [2024-05-06 18:13:02,536 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-05-06 18:13:02,536 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:13:02,536 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:13:02,537 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:13:02,538 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-05-06 18:13:03,988 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2024-05-06 18:13:03,989 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:13:03,997 INFO L262 TraceCheckSpWp]: Trace formula consists of 1136 conjuncts, 21 conjunts are in the unsatisfiable core [2024-05-06 18:13:04,003 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:13:04,749 INFO L134 CoverageAnalysis]: Checked inductivity of 2565 backedges. 1054 proven. 85 refuted. 0 times theorem prover too weak. 1426 trivial. 0 not checked. [2024-05-06 18:13:04,750 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:13:05,492 INFO L134 CoverageAnalysis]: Checked inductivity of 2565 backedges. 981 proven. 158 refuted. 0 times theorem prover too weak. 1426 trivial. 0 not checked. [2024-05-06 18:13:05,492 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1852748049] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:13:05,493 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:13:05,493 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 21, 21] total 61 [2024-05-06 18:13:05,493 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1294607891] [2024-05-06 18:13:05,493 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:13:05,494 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 61 states [2024-05-06 18:13:05,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:13:05,494 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2024-05-06 18:13:05,495 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=388, Invalid=3272, Unknown=0, NotChecked=0, Total=3660 [2024-05-06 18:13:05,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:13:05,495 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:13:05,496 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 61 states, 61 states have (on average 11.62295081967213) internal successors, (709), 61 states have internal predecessors, (709), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:13:05,496 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:13:07,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:13:07,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:13:07,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:13:07,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:13:07,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:13:07,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:13:07,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:13:07,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:13:07,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:13:07,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:13:07,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:13:07,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:13:07,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:13:07,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:13:07,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:13:08,007 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2024-05-06 18:13:08,197 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable414 [2024-05-06 18:13:08,198 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:13:08,198 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:13:08,198 INFO L85 PathProgramCache]: Analyzing trace with hash 627187772, now seen corresponding path program 13 times [2024-05-06 18:13:08,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:13:08,198 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1022565617] [2024-05-06 18:13:08,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:13:08,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:13:08,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:13:09,650 INFO L134 CoverageAnalysis]: Checked inductivity of 2655 backedges. 1205 proven. 502 refuted. 0 times theorem prover too weak. 948 trivial. 0 not checked. [2024-05-06 18:13:09,650 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:13:09,650 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1022565617] [2024-05-06 18:13:09,650 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1022565617] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:13:09,650 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [993527486] [2024-05-06 18:13:09,650 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-05-06 18:13:09,651 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:13:09,651 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:13:09,651 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:13:09,652 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-05-06 18:13:10,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:13:10,422 INFO L262 TraceCheckSpWp]: Trace formula consists of 1691 conjuncts, 24 conjunts are in the unsatisfiable core [2024-05-06 18:13:10,427 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:13:11,144 INFO L134 CoverageAnalysis]: Checked inductivity of 2655 backedges. 1212 proven. 126 refuted. 0 times theorem prover too weak. 1317 trivial. 0 not checked. [2024-05-06 18:13:11,145 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:13:11,982 INFO L134 CoverageAnalysis]: Checked inductivity of 2655 backedges. 1122 proven. 216 refuted. 0 times theorem prover too weak. 1317 trivial. 0 not checked. [2024-05-06 18:13:11,983 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [993527486] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:13:11,983 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:13:11,983 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 64 [2024-05-06 18:13:11,983 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2004046601] [2024-05-06 18:13:11,983 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:13:11,984 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 64 states [2024-05-06 18:13:11,984 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:13:11,985 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2024-05-06 18:13:11,985 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=607, Invalid=3425, Unknown=0, NotChecked=0, Total=4032 [2024-05-06 18:13:11,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:13:11,986 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:13:11,986 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 64 states, 64 states have (on average 9.578125) internal successors, (613), 64 states have internal predecessors, (613), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:13:11,986 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:13:11,986 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:13:11,986 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:13:11,986 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:13:11,986 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:13:11,986 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:13:11,986 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:13:11,986 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:13:11,986 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:13:11,986 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:13:11,986 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:13:11,986 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:13:11,987 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:13:11,987 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:13:11,987 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:13:11,987 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:13:13,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:13:13,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:13:13,789 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2024-05-06 18:13:13,980 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable415 [2024-05-06 18:13:13,980 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:13:13,980 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:13:13,980 INFO L85 PathProgramCache]: Analyzing trace with hash -1558351540, now seen corresponding path program 14 times [2024-05-06 18:13:13,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:13:13,981 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1033851445] [2024-05-06 18:13:13,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:13:13,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:13:14,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:13:15,570 INFO L134 CoverageAnalysis]: Checked inductivity of 2704 backedges. 1241 proven. 550 refuted. 0 times theorem prover too weak. 913 trivial. 0 not checked. [2024-05-06 18:13:15,570 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:13:15,570 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1033851445] [2024-05-06 18:13:15,570 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1033851445] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:13:15,570 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1809711712] [2024-05-06 18:13:15,570 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 18:13:15,570 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:13:15,570 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:13:15,571 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:13:15,572 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-05-06 18:13:16,381 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 18:13:16,381 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:13:16,390 INFO L262 TraceCheckSpWp]: Trace formula consists of 1705 conjuncts, 27 conjunts are in the unsatisfiable core [2024-05-06 18:13:16,395 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:13:17,390 INFO L134 CoverageAnalysis]: Checked inductivity of 2704 backedges. 1317 proven. 175 refuted. 0 times theorem prover too weak. 1212 trivial. 0 not checked. [2024-05-06 18:13:17,391 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:13:18,553 INFO L134 CoverageAnalysis]: Checked inductivity of 2704 backedges. 1237 proven. 255 refuted. 0 times theorem prover too weak. 1212 trivial. 0 not checked. [2024-05-06 18:13:18,553 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1809711712] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:13:18,553 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:13:18,553 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27] total 76 [2024-05-06 18:13:18,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1425490556] [2024-05-06 18:13:18,554 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:13:18,554 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 76 states [2024-05-06 18:13:18,554 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:13:18,555 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2024-05-06 18:13:18,556 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=610, Invalid=5090, Unknown=0, NotChecked=0, Total=5700 [2024-05-06 18:13:18,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:13:18,557 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:13:18,557 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 76 states, 76 states have (on average 10.592105263157896) internal successors, (805), 76 states have internal predecessors, (805), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:13:18,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:13:18,558 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:13:18,558 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:13:18,558 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:13:18,558 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:13:21,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:13:21,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:13:21,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:13:21,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:13:21,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:13:21,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:13:21,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:13:21,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:13:21,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:13:21,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:13:21,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:13:21,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:13:21,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:13:21,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:13:21,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:13:21,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:13:21,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2024-05-06 18:13:21,747 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2024-05-06 18:13:21,948 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable416 [2024-05-06 18:13:21,948 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:13:21,949 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:13:21,949 INFO L85 PathProgramCache]: Analyzing trace with hash 1492074445, now seen corresponding path program 15 times [2024-05-06 18:13:21,949 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:13:21,949 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1444362780] [2024-05-06 18:13:21,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:13:21,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:13:22,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:13:23,795 INFO L134 CoverageAnalysis]: Checked inductivity of 2818 backedges. 1289 proven. 582 refuted. 0 times theorem prover too weak. 947 trivial. 0 not checked. [2024-05-06 18:13:23,795 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:13:23,795 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1444362780] [2024-05-06 18:13:23,795 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1444362780] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:13:23,795 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [514534631] [2024-05-06 18:13:23,795 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-05-06 18:13:23,795 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:13:23,795 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:13:23,796 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:13:23,799 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2024-05-06 18:13:27,450 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2024-05-06 18:13:27,450 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:13:27,461 INFO L262 TraceCheckSpWp]: Trace formula consists of 1194 conjuncts, 30 conjunts are in the unsatisfiable core [2024-05-06 18:13:27,466 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:13:28,715 INFO L134 CoverageAnalysis]: Checked inductivity of 2818 backedges. 1324 proven. 232 refuted. 0 times theorem prover too weak. 1262 trivial. 0 not checked. [2024-05-06 18:13:28,715 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:13:30,043 INFO L134 CoverageAnalysis]: Checked inductivity of 2818 backedges. 282 proven. 1274 refuted. 0 times theorem prover too weak. 1262 trivial. 0 not checked. [2024-05-06 18:13:30,043 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [514534631] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:13:30,043 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:13:30,044 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30] total 85 [2024-05-06 18:13:30,044 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739023683] [2024-05-06 18:13:30,044 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:13:30,045 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 85 states [2024-05-06 18:13:30,045 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:13:30,046 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 85 interpolants. [2024-05-06 18:13:30,047 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=755, Invalid=6385, Unknown=0, NotChecked=0, Total=7140 [2024-05-06 18:13:30,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:13:30,048 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:13:30,048 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 85 states, 85 states have (on average 9.717647058823529) internal successors, (826), 85 states have internal predecessors, (826), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:13:30,048 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:13:30,049 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:13:30,049 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:13:30,049 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 80 states. [2024-05-06 18:13:30,049 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:13:33,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:13:33,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:13:33,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:13:33,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:13:33,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:13:33,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:13:33,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:13:33,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:13:33,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:13:33,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:13:33,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:13:33,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:13:33,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:13:33,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:13:33,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:13:33,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:13:33,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2024-05-06 18:13:33,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2024-05-06 18:13:33,534 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2024-05-06 18:13:33,732 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable417,20 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:13:33,732 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:13:33,732 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:13:33,732 INFO L85 PathProgramCache]: Analyzing trace with hash 1070594894, now seen corresponding path program 16 times [2024-05-06 18:13:33,733 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:13:33,733 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1698040149] [2024-05-06 18:13:33,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:13:33,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:13:33,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:13:35,633 INFO L134 CoverageAnalysis]: Checked inductivity of 2948 backedges. 1349 proven. 598 refuted. 0 times theorem prover too weak. 1001 trivial. 0 not checked. [2024-05-06 18:13:35,634 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:13:35,634 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1698040149] [2024-05-06 18:13:35,634 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1698040149] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:13:35,634 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1196816269] [2024-05-06 18:13:35,634 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-05-06 18:13:35,634 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:13:35,634 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:13:35,635 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:13:35,636 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2024-05-06 18:13:36,788 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-05-06 18:13:36,788 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:13:36,797 INFO L262 TraceCheckSpWp]: Trace formula consists of 1761 conjuncts, 35 conjunts are in the unsatisfiable core [2024-05-06 18:13:36,802 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:13:37,982 INFO L134 CoverageAnalysis]: Checked inductivity of 2948 backedges. 1296 proven. 297 refuted. 0 times theorem prover too weak. 1355 trivial. 0 not checked. [2024-05-06 18:13:37,982 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:13:39,446 INFO L134 CoverageAnalysis]: Checked inductivity of 2948 backedges. 306 proven. 1287 refuted. 0 times theorem prover too weak. 1355 trivial. 0 not checked. [2024-05-06 18:13:39,446 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1196816269] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:13:39,446 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:13:39,447 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 34, 34] total 93 [2024-05-06 18:13:39,447 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1922607950] [2024-05-06 18:13:39,447 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:13:39,448 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 93 states [2024-05-06 18:13:39,448 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:13:39,449 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 93 interpolants. [2024-05-06 18:13:39,451 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1231, Invalid=7325, Unknown=0, NotChecked=0, Total=8556 [2024-05-06 18:13:39,451 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:13:39,451 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:13:39,451 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 93 states, 93 states have (on average 7.645161290322581) internal successors, (711), 93 states have internal predecessors, (711), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:13:39,451 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:13:39,451 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:13:39,451 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:13:39,451 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:13:39,451 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:13:39,451 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:13:39,451 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:13:39,451 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:13:39,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:13:39,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:13:39,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:13:39,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:13:39,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:13:39,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:13:39,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:13:39,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:13:39,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 80 states. [2024-05-06 18:13:39,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 89 states. [2024-05-06 18:13:39,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:13:42,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:13:42,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:13:42,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:13:42,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:13:42,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:13:42,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:13:42,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:13:42,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:13:42,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:13:42,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:13:42,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:13:42,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:13:42,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:13:42,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:13:42,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:13:42,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:13:42,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2024-05-06 18:13:42,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2024-05-06 18:13:42,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:13:42,332 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2024-05-06 18:13:42,519 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable418 [2024-05-06 18:13:42,520 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:13:42,520 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:13:42,520 INFO L85 PathProgramCache]: Analyzing trace with hash -128968098, now seen corresponding path program 17 times [2024-05-06 18:13:42,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:13:42,520 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274397393] [2024-05-06 18:13:42,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:13:42,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:13:42,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:13:44,878 INFO L134 CoverageAnalysis]: Checked inductivity of 3021 backedges. 1517 proven. 930 refuted. 0 times theorem prover too weak. 574 trivial. 0 not checked. [2024-05-06 18:13:44,878 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:13:44,878 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [274397393] [2024-05-06 18:13:44,878 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [274397393] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:13:44,878 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1866678487] [2024-05-06 18:13:44,878 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-05-06 18:13:44,879 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:13:44,879 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:13:44,880 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:13:44,880 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2024-05-06 18:14:08,956 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 21 check-sat command(s) [2024-05-06 18:14:08,956 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:14:08,992 INFO L262 TraceCheckSpWp]: Trace formula consists of 1775 conjuncts, 22 conjunts are in the unsatisfiable core [2024-05-06 18:14:08,997 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:14:09,439 INFO L134 CoverageAnalysis]: Checked inductivity of 3021 backedges. 1178 proven. 0 refuted. 0 times theorem prover too weak. 1843 trivial. 0 not checked. [2024-05-06 18:14:09,439 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 18:14:09,440 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1866678487] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 18:14:09,440 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 18:14:09,440 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [40] total 42 [2024-05-06 18:14:09,440 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [208060287] [2024-05-06 18:14:09,440 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 18:14:09,440 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-05-06 18:14:09,440 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:14:09,441 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-06 18:14:09,441 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=242, Invalid=1480, Unknown=0, NotChecked=0, Total=1722 [2024-05-06 18:14:09,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:14:09,441 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:14:09,441 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 62.0) internal successors, (248), 4 states have internal predecessors, (248), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 80 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 89 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:14:09,442 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:14:09,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:14:09,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:14:09,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:14:09,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:14:09,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:14:09,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:14:09,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:14:09,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:14:09,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:14:09,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:14:09,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:14:09,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:14:09,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:14:09,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:14:09,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:14:09,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:14:09,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2024-05-06 18:14:09,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2024-05-06 18:14:09,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:14:09,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:14:09,681 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2024-05-06 18:14:09,881 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable419,22 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:14:09,881 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:14:09,882 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:14:09,882 INFO L85 PathProgramCache]: Analyzing trace with hash 1963951413, now seen corresponding path program 18 times [2024-05-06 18:14:09,882 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:14:09,882 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [426482340] [2024-05-06 18:14:09,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:14:09,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:14:09,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:14:11,346 INFO L134 CoverageAnalysis]: Checked inductivity of 1373 backedges. 507 proven. 363 refuted. 0 times theorem prover too weak. 503 trivial. 0 not checked. [2024-05-06 18:14:11,346 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:14:11,346 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [426482340] [2024-05-06 18:14:11,346 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [426482340] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:14:11,346 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [492179770] [2024-05-06 18:14:11,346 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-05-06 18:14:11,346 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:14:11,346 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:14:11,347 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:14:11,348 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2024-05-06 18:14:16,835 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2024-05-06 18:14:16,835 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:14:16,848 INFO L262 TraceCheckSpWp]: Trace formula consists of 1308 conjuncts, 35 conjunts are in the unsatisfiable core [2024-05-06 18:14:16,853 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:14:18,236 INFO L134 CoverageAnalysis]: Checked inductivity of 1373 backedges. 575 proven. 297 refuted. 0 times theorem prover too weak. 501 trivial. 0 not checked. [2024-05-06 18:14:18,236 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:14:19,780 INFO L134 CoverageAnalysis]: Checked inductivity of 1373 backedges. 428 proven. 444 refuted. 0 times theorem prover too weak. 501 trivial. 0 not checked. [2024-05-06 18:14:19,780 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [492179770] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:14:19,780 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:14:19,781 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 34, 34] total 98 [2024-05-06 18:14:19,781 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1763586531] [2024-05-06 18:14:19,781 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:14:19,781 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 98 states [2024-05-06 18:14:19,782 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:14:19,783 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2024-05-06 18:14:19,785 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=986, Invalid=8520, Unknown=0, NotChecked=0, Total=9506 [2024-05-06 18:14:19,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:14:19,785 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:14:19,785 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 98 states, 98 states have (on average 9.408163265306122) internal successors, (922), 98 states have internal predecessors, (922), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:14:19,785 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 80 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 89 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:14:19,786 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:14:22,806 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:14:22,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-05-06 18:14:22,822 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2024-05-06 18:14:23,008 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable420 [2024-05-06 18:14:23,008 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:14:23,008 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:14:23,008 INFO L85 PathProgramCache]: Analyzing trace with hash 1268440036, now seen corresponding path program 19 times [2024-05-06 18:14:23,009 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:14:23,009 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [299136830] [2024-05-06 18:14:23,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:14:23,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:14:23,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:14:24,295 INFO L134 CoverageAnalysis]: Checked inductivity of 1446 backedges. 513 proven. 187 refuted. 0 times theorem prover too weak. 746 trivial. 0 not checked. [2024-05-06 18:14:24,295 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:14:24,295 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [299136830] [2024-05-06 18:14:24,295 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [299136830] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:14:24,295 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1437155346] [2024-05-06 18:14:24,295 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-05-06 18:14:24,295 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:14:24,296 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:14:24,296 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:14:24,297 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2024-05-06 18:14:25,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:14:25,048 INFO L262 TraceCheckSpWp]: Trace formula consists of 1322 conjuncts, 36 conjunts are in the unsatisfiable core [2024-05-06 18:14:25,052 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:14:26,239 INFO L134 CoverageAnalysis]: Checked inductivity of 1446 backedges. 538 proven. 162 refuted. 0 times theorem prover too weak. 746 trivial. 0 not checked. [2024-05-06 18:14:26,239 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 18:14:27,277 INFO L134 CoverageAnalysis]: Checked inductivity of 1446 backedges. 435 proven. 270 refuted. 0 times theorem prover too weak. 741 trivial. 0 not checked. [2024-05-06 18:14:27,278 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1437155346] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 18:14:27,278 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 18:14:27,278 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 30, 33] total 82 [2024-05-06 18:14:27,278 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1060085322] [2024-05-06 18:14:27,278 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 18:14:27,279 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 82 states [2024-05-06 18:14:27,279 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 18:14:27,280 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 82 interpolants. [2024-05-06 18:14:27,281 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1222, Invalid=5420, Unknown=0, NotChecked=0, Total=6642 [2024-05-06 18:14:27,281 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:14:27,281 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 18:14:27,281 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 82 states, 82 states have (on average 12.024390243902438) internal successors, (986), 82 states have internal predecessors, (986), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 18:14:27,281 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:14:27,281 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 80 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 89 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 48 states. [2024-05-06 18:14:27,282 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:14:29,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2024-05-06 18:14:29,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2024-05-06 18:14:29,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2024-05-06 18:14:29,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2024-05-06 18:14:29,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-05-06 18:14:29,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 18:14:29,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-05-06 18:14:29,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2024-05-06 18:14:29,538 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2024-05-06 18:14:29,729 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 24 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable421 [2024-05-06 18:14:29,730 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 18:14:29,730 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 18:14:29,730 INFO L85 PathProgramCache]: Analyzing trace with hash -1803060632, now seen corresponding path program 20 times [2024-05-06 18:14:29,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 18:14:29,730 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1700853544] [2024-05-06 18:14:29,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 18:14:29,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 18:14:30,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 18:15:18,151 INFO L134 CoverageAnalysis]: Checked inductivity of 1690 backedges. 152 proven. 1168 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-05-06 18:15:18,151 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 18:15:18,151 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1700853544] [2024-05-06 18:15:18,151 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1700853544] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 18:15:18,151 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1409465664] [2024-05-06 18:15:18,152 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 18:15:18,152 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 18:15:18,152 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 18:15:18,153 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 18:15:18,153 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2024-05-06 18:15:19,230 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 18:15:19,231 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 18:15:19,249 INFO L262 TraceCheckSpWp]: Trace formula consists of 1378 conjuncts, 401 conjunts are in the unsatisfiable core [2024-05-06 18:15:19,265 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 18:15:19,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2024-05-06 18:15:19,478 INFO L349 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2024-05-06 18:15:19,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2024-05-06 18:15:19,603 INFO L349 Elim1Store]: treesize reduction 24, result has 44.2 percent of original size [2024-05-06 18:15:19,603 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 25 [2024-05-06 18:15:21,192 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:15:21,204 INFO L349 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2024-05-06 18:15:21,204 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 30 treesize of output 37 [2024-05-06 18:15:28,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 1 [2024-05-06 18:15:30,734 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:15:30,735 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:15:30,755 INFO L349 Elim1Store]: treesize reduction 36, result has 34.5 percent of original size [2024-05-06 18:15:30,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 4 case distinctions, treesize of input 35 treesize of output 49 [2024-05-06 18:15:31,822 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:32,881 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:33,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:34,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:35,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:36,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:37,984 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:39,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:40,115 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:41,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-05-06 18:15:44,399 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:15:44,400 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:15:44,419 INFO L349 Elim1Store]: treesize reduction 8, result has 75.8 percent of original size [2024-05-06 18:15:44,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 4 case distinctions, treesize of input 34 treesize of output 48 [2024-05-06 18:15:45,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:45,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:46,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:47,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:47,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:48,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:48,941 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:49,610 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:50,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:50,860 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:52,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:52,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:53,335 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:15:53,637 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 18:16:23,231 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,232 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,233 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,233 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,234 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,236 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,237 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 18:16:23,237 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,238 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,239 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,239 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,240 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,241 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,242 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,242 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,243 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,244 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,244 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,245 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,246 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,246 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,247 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 18:16:23,248 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,249 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 18:16:23,249 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,250 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,251 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,252 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,252 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,253 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,254 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,254 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,255 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,256 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,256 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 18:16:23,257 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,258 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,258 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,259 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,260 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,262 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,262 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,263 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,264 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,265 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,265 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,266 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,266 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 18:16:23,267 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,268 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,269 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 18:16:23,271 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,271 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 18:16:23,272 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,273 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,273 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,274 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,275 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,275 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 18:16:23,276 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,277 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,277 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,278 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,279 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,280 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,280 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,281 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 18:16:23,282 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,282 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,283 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 18:16:23,284 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,284 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 18:16:23,285 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 18:16:23,285 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-06 18:16:27,460 INFO L349 Elim1Store]: treesize reduction 1515, result has 50.3 percent of original size [2024-05-06 18:16:27,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 37 select indices, 37 select index equivalence classes, 60 disjoint index pairs (out of 666 index pairs), introduced 35 new quantified variables, introduced 420 case distinctions, treesize of input 510 treesize of output 1639 [2024-05-06 18:16:27,695 INFO L134 CoverageAnalysis]: Checked inductivity of 1690 backedges. 0 proven. 1366 refuted. 0 times theorem prover too weak. 324 trivial. 0 not checked. [2024-05-06 18:16:27,695 INFO L327 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2024-05-06 18:19:31,719 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 18:19:31,720 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 18:19:31,724 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 18:19:32,737 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Ended with exit code 0 [2024-05-06 18:19:32,738 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2024-05-06 18:19:32,920 WARN L435 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forcibly destroying the process [2024-05-06 18:19:33,020 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (4 of 5 remaining) [2024-05-06 18:19:33,021 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable422 [2024-05-06 18:19:33,021 WARN L619 AbstractCegarLoop]: Verification canceled: while PartialOrderCegarLoop was analyzing trace of length 557 with TraceHistMax 10,while TraceCheckSpWp was constructing backward predicates,while executing Executor. [2024-05-06 18:19:33,022 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 5 remaining) [2024-05-06 18:19:33,022 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 5 remaining) [2024-05-06 18:19:33,022 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 5 remaining) [2024-05-06 18:19:33,022 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 5 remaining) [2024-05-06 18:19:33,025 INFO L448 BasicCegarLoop]: Path program histogram: [108, 30, 20, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1] [2024-05-06 18:19:33,027 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-06 18:19:33,027 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-06 18:19:33,028 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 06.05 06:19:33 BasicIcfg [2024-05-06 18:19:33,029 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-06 18:19:33,029 INFO L158 Benchmark]: Toolchain (without parser) took 804622.91ms. Allocated memory was 158.3MB in the beginning and 3.2GB in the end (delta: 3.0GB). Free memory was 85.0MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 1.6GB. Max. memory is 8.0GB. [2024-05-06 18:19:33,029 INFO L158 Benchmark]: CDTParser took 0.10ms. Allocated memory is still 158.3MB. Free memory was 90.0MB in the beginning and 89.9MB in the end (delta: 157.0kB). There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 18:19:33,029 INFO L158 Benchmark]: CACSL2BoogieTranslator took 220.79ms. Allocated memory is still 158.3MB. Free memory was 84.7MB in the beginning and 71.7MB in the end (delta: 13.1MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2024-05-06 18:19:33,029 INFO L158 Benchmark]: Boogie Procedure Inliner took 40.97ms. Allocated memory is still 158.3MB. Free memory was 71.7MB in the beginning and 68.7MB in the end (delta: 3.0MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. [2024-05-06 18:19:33,029 INFO L158 Benchmark]: Boogie Preprocessor took 37.16ms. Allocated memory is still 158.3MB. Free memory was 68.7MB in the beginning and 66.3MB in the end (delta: 2.4MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 18:19:33,029 INFO L158 Benchmark]: RCFGBuilder took 742.94ms. Allocated memory was 158.3MB in the beginning and 247.5MB in the end (delta: 89.1MB). Free memory was 66.3MB in the beginning and 166.9MB in the end (delta: -100.6MB). Peak memory consumption was 25.2MB. Max. memory is 8.0GB. [2024-05-06 18:19:33,030 INFO L158 Benchmark]: TraceAbstraction took 803576.75ms. Allocated memory was 247.5MB in the beginning and 3.2GB in the end (delta: 2.9GB). Free memory was 165.4MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 1.6GB. Max. memory is 8.0GB. [2024-05-06 18:19:33,030 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks [2024-05-06 18:19:33,042 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 137 Benchmark results are: * CDTParser took 0.10ms. Allocated memory is still 158.3MB. Free memory was 90.0MB in the beginning and 89.9MB in the end (delta: 157.0kB). There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 220.79ms. Allocated memory is still 158.3MB. Free memory was 84.7MB in the beginning and 71.7MB in the end (delta: 13.1MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 40.97ms. Allocated memory is still 158.3MB. Free memory was 71.7MB in the beginning and 68.7MB in the end (delta: 3.0MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 37.16ms. Allocated memory is still 158.3MB. Free memory was 68.7MB in the beginning and 66.3MB in the end (delta: 2.4MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 742.94ms. Allocated memory was 158.3MB in the beginning and 247.5MB in the end (delta: 89.1MB). Free memory was 66.3MB in the beginning and 166.9MB in the end (delta: -100.6MB). Peak memory consumption was 25.2MB. Max. memory is 8.0GB. * TraceAbstraction took 803576.75ms. Allocated memory was 247.5MB in the beginning and 3.2GB in the end (delta: 2.9GB). Free memory was 165.4MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 1.6GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 1185300, independent: 1134719, independent conditional: 1099764, independent unconditional: 34955, dependent: 50581, dependent conditional: 50302, dependent unconditional: 279, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1143663, independent: 1134719, independent conditional: 1099764, independent unconditional: 34955, dependent: 8944, dependent conditional: 8665, dependent unconditional: 279, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1143663, independent: 1134719, independent conditional: 1099764, independent unconditional: 34955, dependent: 8944, dependent conditional: 8665, dependent unconditional: 279, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 1143663, independent: 1134719, independent conditional: 1099764, independent unconditional: 34955, dependent: 8944, dependent conditional: 8665, dependent unconditional: 279, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1187658, independent: 1134719, independent conditional: 453165, independent unconditional: 681554, dependent: 52939, dependent conditional: 41912, dependent unconditional: 11027, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 1187658, independent: 1134719, independent conditional: 371262, independent unconditional: 763457, dependent: 52939, dependent conditional: 26294, dependent unconditional: 26645, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 1187658, independent: 1134719, independent conditional: 371262, independent unconditional: 763457, dependent: 52939, dependent conditional: 26294, dependent unconditional: 26645, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1176, independent: 1055, independent conditional: 26, independent unconditional: 1029, dependent: 121, dependent conditional: 113, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1176, independent: 1039, independent conditional: 0, independent unconditional: 1039, dependent: 137, dependent conditional: 0, dependent unconditional: 137, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 137, independent: 16, independent conditional: 14, independent unconditional: 2, dependent: 121, dependent conditional: 113, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 137, independent: 16, independent conditional: 14, independent unconditional: 2, dependent: 121, dependent conditional: 113, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 427, independent: 42, independent conditional: 36, independent unconditional: 6, dependent: 385, dependent conditional: 308, dependent unconditional: 77, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 1187658, independent: 1133664, independent conditional: 371236, independent unconditional: 762428, dependent: 52818, dependent conditional: 26181, dependent unconditional: 26637, unknown: 1176, unknown conditional: 139, unknown unconditional: 1037] , Statistics on independence cache: Total cache size (in pairs): 1176, Positive cache size: 1055, Positive conditional cache size: 26, Positive unconditional cache size: 1029, Negative cache size: 121, Negative conditional cache size: 113, Negative unconditional cache size: 8, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 97521, Maximal queried relation: 13, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1187658, independent: 1134719, independent conditional: 453165, independent unconditional: 681554, dependent: 52939, dependent conditional: 41912, dependent unconditional: 11027, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 1187658, independent: 1134719, independent conditional: 371262, independent unconditional: 763457, dependent: 52939, dependent conditional: 26294, dependent unconditional: 26645, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 1187658, independent: 1134719, independent conditional: 371262, independent unconditional: 763457, dependent: 52939, dependent conditional: 26294, dependent unconditional: 26645, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1176, independent: 1055, independent conditional: 26, independent unconditional: 1029, dependent: 121, dependent conditional: 113, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1176, independent: 1039, independent conditional: 0, independent unconditional: 1039, dependent: 137, dependent conditional: 0, dependent unconditional: 137, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 137, independent: 16, independent conditional: 14, independent unconditional: 2, dependent: 121, dependent conditional: 113, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 137, independent: 16, independent conditional: 14, independent unconditional: 2, dependent: 121, dependent conditional: 113, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 427, independent: 42, independent conditional: 36, independent unconditional: 6, dependent: 385, dependent conditional: 308, dependent unconditional: 77, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 1187658, independent: 1133664, independent conditional: 371236, independent unconditional: 762428, dependent: 52818, dependent conditional: 26181, dependent unconditional: 26637, unknown: 1176, unknown conditional: 139, unknown unconditional: 1037] , Statistics on independence cache: Total cache size (in pairs): 1176, Positive cache size: 1055, Positive conditional cache size: 26, Positive unconditional cache size: 1029, Negative cache size: 121, Negative conditional cache size: 113, Negative unconditional cache size: 8, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 97521 ], Independence queries for same thread: 41637 - TimeoutResultAtElement [Line: 151]: Timeout (TraceAbstraction) Unable to prove that a call to reach_error is unreachable Cancelled while PartialOrderCegarLoop was analyzing trace of length 557 with TraceHistMax 10,while TraceCheckSpWp was constructing backward predicates,while executing Executor. - TimeoutResultAtElement [Line: 143]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while PartialOrderCegarLoop was analyzing trace of length 557 with TraceHistMax 10,while TraceCheckSpWp was constructing backward predicates,while executing Executor. - TimeoutResultAtElement [Line: 141]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while PartialOrderCegarLoop was analyzing trace of length 557 with TraceHistMax 10,while TraceCheckSpWp was constructing backward predicates,while executing Executor. - TimeoutResultAtElement [Line: 142]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while PartialOrderCegarLoop was analyzing trace of length 557 with TraceHistMax 10,while TraceCheckSpWp was constructing backward predicates,while executing Executor. - TimeoutResultAtElement [Line: 144]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message) Cancelled while PartialOrderCegarLoop was analyzing trace of length 557 with TraceHistMax 10,while TraceCheckSpWp was constructing backward predicates,while executing Executor. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 9 procedures, 283 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 803.4s, OverallIterations: 23, TraceHistogramMax: 0, PathProgramHistogramMax: 108, EmptinessCheckTime: 396.6s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 816, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 1.2s SsaConstructionTime, 38.3s SatisfiabilityAnalysisTime, 48.2s InterpolantComputationTime, 18508 NumberOfCodeBlocks, 17897 NumberOfCodeBlocksAsserted, 124 NumberOfCheckSat, 26401 ConstructedInterpolants, 0 QuantifiedInterpolants, 101118 SizeOfPredicates, 291 NumberOfNonLiveVariables, 22726 ConjunctsInSsa, 455 ConjunctsInUnsatCore, 63 InterpolantComputations, 4 PerfectInterpolantSequences, 55042/67227 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 359.6s, ConditionalCommutativityIAIntegrations: 0, ConditionalCommutativityDFSRestarts: 3, ConditionalCommutativityConditionCalculations: 200, ConditionalCommutativityTraceChecks: 200, ConditionalCommutativityImperfectProofs: 197 RESULT: Ultimate could not prove your program: Timeout Completed graceful shutdown