/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 50 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/pthread-wmm/thin002_power.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 16:04:33,110 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 16:04:33,160 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 16:04:33,163 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 16:04:33,167 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 16:04:33,196 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 16:04:33,197 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 16:04:33,197 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 16:04:33,198 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 16:04:33,201 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 16:04:33,201 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 16:04:33,201 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 16:04:33,201 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 16:04:33,202 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 16:04:33,202 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 16:04:33,203 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 16:04:33,203 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 16:04:33,203 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 16:04:33,203 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 16:04:33,203 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 16:04:33,203 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 16:04:33,204 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 16:04:33,204 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 16:04:33,204 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 16:04:33,204 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 16:04:33,204 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 16:04:33,204 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 16:04:33,205 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 16:04:33,205 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 16:04:33,206 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 16:04:33,207 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 16:04:33,207 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 16:04:33,207 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 16:04:33,207 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 16:04:33,207 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 16:04:33,207 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 16:04:33,207 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 16:04:33,207 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 16:04:33,208 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 16:04:33,208 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 50 [2024-05-06 16:04:33,462 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 16:04:33,487 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 16:04:33,489 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 16:04:33,490 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 16:04:33,492 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 16:04:33,493 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-wmm/thin002_power.opt.i [2024-05-06 16:04:34,591 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 16:04:34,793 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 16:04:34,794 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/thin002_power.opt.i [2024-05-06 16:04:34,807 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/471e0ff53/7c3fccf92eab4df3b951651c2db31b4e/FLAGf0268da2a [2024-05-06 16:04:34,817 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/471e0ff53/7c3fccf92eab4df3b951651c2db31b4e [2024-05-06 16:04:34,819 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 16:04:34,820 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 16:04:34,821 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 16:04:34,821 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 16:04:34,832 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 16:04:34,832 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 04:04:34" (1/1) ... [2024-05-06 16:04:34,833 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4334114c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:34, skipping insertion in model container [2024-05-06 16:04:34,833 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 04:04:34" (1/1) ... [2024-05-06 16:04:34,890 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 16:04:35,044 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/thin002_power.opt.i[951,964] [2024-05-06 16:04:35,238 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 16:04:35,256 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 16:04:35,266 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/thin002_power.opt.i[951,964] [2024-05-06 16:04:35,331 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 16:04:35,357 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 16:04:35,357 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 16:04:35,362 INFO L206 MainTranslator]: Completed translation [2024-05-06 16:04:35,363 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35 WrapperNode [2024-05-06 16:04:35,363 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 16:04:35,364 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 16:04:35,364 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 16:04:35,364 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 16:04:35,370 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35" (1/1) ... [2024-05-06 16:04:35,398 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35" (1/1) ... [2024-05-06 16:04:35,428 INFO L138 Inliner]: procedures = 177, calls = 84, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 199 [2024-05-06 16:04:35,429 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 16:04:35,430 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 16:04:35,430 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 16:04:35,430 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 16:04:35,443 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35" (1/1) ... [2024-05-06 16:04:35,444 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35" (1/1) ... [2024-05-06 16:04:35,455 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35" (1/1) ... [2024-05-06 16:04:35,456 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35" (1/1) ... [2024-05-06 16:04:35,462 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35" (1/1) ... [2024-05-06 16:04:35,463 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35" (1/1) ... [2024-05-06 16:04:35,465 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35" (1/1) ... [2024-05-06 16:04:35,467 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35" (1/1) ... [2024-05-06 16:04:35,469 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 16:04:35,470 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 16:04:35,470 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 16:04:35,470 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 16:04:35,471 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35" (1/1) ... [2024-05-06 16:04:35,484 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 16:04:35,494 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 16:04:35,510 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 16:04:35,525 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 16:04:35,555 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 16:04:35,555 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 16:04:35,556 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 16:04:35,556 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 16:04:35,556 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 16:04:35,556 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 16:04:35,556 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2024-05-06 16:04:35,556 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2024-05-06 16:04:35,556 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2024-05-06 16:04:35,556 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2024-05-06 16:04:35,556 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2024-05-06 16:04:35,556 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2024-05-06 16:04:35,556 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2024-05-06 16:04:35,556 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2024-05-06 16:04:35,557 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 16:04:35,557 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 16:04:35,557 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 16:04:35,557 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 16:04:35,558 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 16:04:35,725 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 16:04:35,727 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 16:04:36,127 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 16:04:36,324 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 16:04:36,324 INFO L309 CfgBuilder]: Removed 0 assume(true) statements. [2024-05-06 16:04:36,325 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 04:04:36 BoogieIcfgContainer [2024-05-06 16:04:36,326 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 16:04:36,327 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 16:04:36,327 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 16:04:36,330 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 16:04:36,331 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 04:04:34" (1/3) ... [2024-05-06 16:04:36,331 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@26985a38 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 04:04:36, skipping insertion in model container [2024-05-06 16:04:36,331 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:04:35" (2/3) ... [2024-05-06 16:04:36,332 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@26985a38 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 04:04:36, skipping insertion in model container [2024-05-06 16:04:36,332 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 04:04:36" (3/3) ... [2024-05-06 16:04:36,333 INFO L112 eAbstractionObserver]: Analyzing ICFG thin002_power.opt.i [2024-05-06 16:04:36,339 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 16:04:36,347 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 16:04:36,347 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 2 error locations. [2024-05-06 16:04:36,347 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 16:04:36,404 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-05-06 16:04:36,442 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 16:04:36,442 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 16:04:36,442 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 16:04:36,445 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 16:04:36,460 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 16:04:36,473 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 16:04:36,483 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:04:36,484 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 16:04:36,489 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@79222ee5, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=50, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 16:04:36,490 INFO L358 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2024-05-06 16:04:36,535 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting P2Err0ASSERT_VIOLATIONERROR_FUNCTION === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:04:36,539 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:04:36,539 INFO L85 PathProgramCache]: Analyzing trace with hash 1270985995, now seen corresponding path program 1 times [2024-05-06 16:04:36,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:04:36,546 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114127363] [2024-05-06 16:04:36,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:36,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:36,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:04:37,176 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:04:37,177 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 16:04:37,177 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114127363] [2024-05-06 16:04:37,178 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2114127363] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 16:04:37,178 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 16:04:37,178 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-05-06 16:04:37,179 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1312684019] [2024-05-06 16:04:37,180 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 16:04:37,185 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-05-06 16:04:37,186 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 16:04:37,209 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-05-06 16:04:37,209 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 16:04:37,210 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:04:37,212 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 16:04:37,213 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 44.5) internal successors, (89), 3 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 16:04:37,213 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:04:37,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-06 16:04:37,322 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-05-06 16:04:37,323 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:04:37,323 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:04:37,323 INFO L85 PathProgramCache]: Analyzing trace with hash -1342233404, now seen corresponding path program 1 times [2024-05-06 16:04:37,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:04:37,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1327197595] [2024-05-06 16:04:37,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:37,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:37,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:04:37,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:04:37,899 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 16:04:37,899 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1327197595] [2024-05-06 16:04:37,899 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1327197595] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 16:04:37,899 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 16:04:37,900 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-05-06 16:04:37,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [31195577] [2024-05-06 16:04:37,900 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 16:04:37,901 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-05-06 16:04:37,902 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 16:04:37,902 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 16:04:37,903 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-05-06 16:04:37,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:04:37,903 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 16:04:37,903 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 17.571428571428573) internal successors, (123), 7 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 16:04:37,903 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-06 16:04:37,903 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:04:38,307 INFO L85 PathProgramCache]: Analyzing trace with hash -344079543, now seen corresponding path program 1 times [2024-05-06 16:04:38,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:38,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:38,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:38,379 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:38,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:38,596 INFO L85 PathProgramCache]: Analyzing trace with hash 1315014995, now seen corresponding path program 1 times [2024-05-06 16:04:38,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:38,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:38,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:38,659 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:38,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:38,845 INFO L85 PathProgramCache]: Analyzing trace with hash 704426664, now seen corresponding path program 1 times [2024-05-06 16:04:38,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:38,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:38,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:38,899 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:38,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:39,051 INFO L85 PathProgramCache]: Analyzing trace with hash 973888336, now seen corresponding path program 1 times [2024-05-06 16:04:39,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:39,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:39,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:04:39,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:04:39,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:39,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:39,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:04:39,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:04:39,279 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 16:04:39,279 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2024-05-06 16:04:39,385 INFO L85 PathProgramCache]: Analyzing trace with hash -344079543, now seen corresponding path program 2 times [2024-05-06 16:04:39,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:39,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:39,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:39,438 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:39,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:39,542 INFO L85 PathProgramCache]: Analyzing trace with hash 1315014995, now seen corresponding path program 2 times [2024-05-06 16:04:39,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:39,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:39,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:39,569 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:39,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:39,673 INFO L85 PathProgramCache]: Analyzing trace with hash 704426664, now seen corresponding path program 2 times [2024-05-06 16:04:39,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:39,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:39,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:39,711 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:39,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:43,858 INFO L85 PathProgramCache]: Analyzing trace with hash -265919670, now seen corresponding path program 1 times [2024-05-06 16:04:43,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:43,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:43,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:04:44,365 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:04:44,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:44,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:44,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:04:44,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:04:44,846 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-05-06 16:04:44,847 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2024-05-06 16:04:44,968 INFO L85 PathProgramCache]: Analyzing trace with hash -344079543, now seen corresponding path program 3 times [2024-05-06 16:04:44,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:44,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:45,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:45,000 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:45,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:45,124 INFO L85 PathProgramCache]: Analyzing trace with hash 1315014995, now seen corresponding path program 3 times [2024-05-06 16:04:45,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:45,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:45,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:45,162 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:45,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:45,257 INFO L85 PathProgramCache]: Analyzing trace with hash 704426664, now seen corresponding path program 3 times [2024-05-06 16:04:45,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:45,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:45,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:45,285 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:45,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:48,864 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-06 16:04:48,991 INFO L85 PathProgramCache]: Analyzing trace with hash 346425496, now seen corresponding path program 1 times [2024-05-06 16:04:48,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:48,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:49,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:04:49,184 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:04:49,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:49,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:49,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:04:49,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:04:49,354 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-06 16:04:49,354 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=246, Unknown=0, NotChecked=0, Total=306 [2024-05-06 16:04:49,506 INFO L85 PathProgramCache]: Analyzing trace with hash -344079543, now seen corresponding path program 4 times [2024-05-06 16:04:49,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:49,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:49,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:49,538 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:49,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:49,674 INFO L85 PathProgramCache]: Analyzing trace with hash 1315014995, now seen corresponding path program 4 times [2024-05-06 16:04:49,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:49,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:49,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:49,702 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:49,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:49,833 INFO L85 PathProgramCache]: Analyzing trace with hash 704426664, now seen corresponding path program 4 times [2024-05-06 16:04:49,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:49,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:49,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:49,871 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:49,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:53,368 INFO L85 PathProgramCache]: Analyzing trace with hash 691006127, now seen corresponding path program 1 times [2024-05-06 16:04:53,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:53,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:53,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:53,415 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:53,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:53,598 INFO L85 PathProgramCache]: Analyzing trace with hash -965296514, now seen corresponding path program 1 times [2024-05-06 16:04:53,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:53,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:53,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:04:53,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:04:53,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:53,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:53,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:04:53,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:04:53,950 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-05-06 16:04:53,950 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=394, Unknown=0, NotChecked=0, Total=462 [2024-05-06 16:04:54,104 INFO L85 PathProgramCache]: Analyzing trace with hash -344079543, now seen corresponding path program 5 times [2024-05-06 16:04:54,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:54,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:54,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:54,130 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:54,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:54,332 INFO L85 PathProgramCache]: Analyzing trace with hash 1315014995, now seen corresponding path program 5 times [2024-05-06 16:04:54,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:54,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:54,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:54,376 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:54,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:54,501 INFO L85 PathProgramCache]: Analyzing trace with hash 704426664, now seen corresponding path program 5 times [2024-05-06 16:04:54,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:54,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:54,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:54,525 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:54,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:54,834 INFO L85 PathProgramCache]: Analyzing trace with hash 691006127, now seen corresponding path program 2 times [2024-05-06 16:04:54,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:54,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:54,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:54,856 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:54,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:54,978 INFO L85 PathProgramCache]: Analyzing trace with hash -1086088079, now seen corresponding path program 1 times [2024-05-06 16:04:54,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:54,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:54,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:54,997 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:55,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:55,107 INFO L85 PathProgramCache]: Analyzing trace with hash 519154278, now seen corresponding path program 1 times [2024-05-06 16:04:55,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:55,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:55,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:55,127 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:55,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:55,235 INFO L85 PathProgramCache]: Analyzing trace with hash 16746891, now seen corresponding path program 1 times [2024-05-06 16:04:55,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:55,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:55,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:55,256 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:55,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:55,343 INFO L85 PathProgramCache]: Analyzing trace with hash 970371610, now seen corresponding path program 1 times [2024-05-06 16:04:55,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:55,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:55,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:55,361 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:55,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:55,447 INFO L85 PathProgramCache]: Analyzing trace with hash -1908360255, now seen corresponding path program 1 times [2024-05-06 16:04:55,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:55,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:55,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:55,466 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:55,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:55,730 INFO L85 PathProgramCache]: Analyzing trace with hash 1462460723, now seen corresponding path program 1 times [2024-05-06 16:04:55,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:55,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:55,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:55,756 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:55,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:55,862 INFO L85 PathProgramCache]: Analyzing trace with hash -1199749769, now seen corresponding path program 1 times [2024-05-06 16:04:55,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:55,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:55,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:55,894 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:55,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:56,164 INFO L85 PathProgramCache]: Analyzing trace with hash 1436582738, now seen corresponding path program 1 times [2024-05-06 16:04:56,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:56,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:56,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:56,193 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:56,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:56,328 INFO L85 PathProgramCache]: Analyzing trace with hash 1649550378, now seen corresponding path program 1 times [2024-05-06 16:04:56,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:56,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:56,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:56,353 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:56,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:56,484 INFO L85 PathProgramCache]: Analyzing trace with hash 1823596785, now seen corresponding path program 1 times [2024-05-06 16:04:56,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:56,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:56,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:56,510 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:56,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:56,779 INFO L85 PathProgramCache]: Analyzing trace with hash 1835487046, now seen corresponding path program 1 times [2024-05-06 16:04:56,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:56,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:56,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:56,800 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:56,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:56,925 INFO L85 PathProgramCache]: Analyzing trace with hash 751945978, now seen corresponding path program 1 times [2024-05-06 16:04:56,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:56,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:56,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:56,945 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:56,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:57,060 INFO L85 PathProgramCache]: Analyzing trace with hash -1776858947, now seen corresponding path program 1 times [2024-05-06 16:04:57,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:57,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:57,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:57,081 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:57,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:57,191 INFO L85 PathProgramCache]: Analyzing trace with hash -334412716, now seen corresponding path program 1 times [2024-05-06 16:04:57,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:57,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:57,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:57,219 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:57,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:57,308 INFO L85 PathProgramCache]: Analyzing trace with hash 1236138545, now seen corresponding path program 1 times [2024-05-06 16:04:57,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:57,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:57,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:57,328 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:57,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:57,415 INFO L85 PathProgramCache]: Analyzing trace with hash 316970186, now seen corresponding path program 1 times [2024-05-06 16:04:57,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:57,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:57,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:57,435 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:57,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:57,717 INFO L85 PathProgramCache]: Analyzing trace with hash -543964406, now seen corresponding path program 1 times [2024-05-06 16:04:57,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:57,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:57,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:57,736 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:57,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:57,826 INFO L85 PathProgramCache]: Analyzing trace with hash -987378496, now seen corresponding path program 1 times [2024-05-06 16:04:57,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:57,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:57,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:57,845 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:57,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:58,065 INFO L85 PathProgramCache]: Analyzing trace with hash 1362293896, now seen corresponding path program 1 times [2024-05-06 16:04:58,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:58,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:58,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:58,087 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:58,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:58,212 INFO L85 PathProgramCache]: Analyzing trace with hash 1924248628, now seen corresponding path program 1 times [2024-05-06 16:04:58,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:58,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:58,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:58,234 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:58,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:58,370 INFO L85 PathProgramCache]: Analyzing trace with hash 1971005351, now seen corresponding path program 1 times [2024-05-06 16:04:58,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:58,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:58,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:58,398 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:58,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:58,669 INFO L85 PathProgramCache]: Analyzing trace with hash 731863504, now seen corresponding path program 1 times [2024-05-06 16:04:58,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:58,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:58,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:58,693 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:58,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:58,812 INFO L85 PathProgramCache]: Analyzing trace with hash -2054601424, now seen corresponding path program 1 times [2024-05-06 16:04:58,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:58,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:58,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:58,830 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:58,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:58,932 INFO L85 PathProgramCache]: Analyzing trace with hash -620466745, now seen corresponding path program 1 times [2024-05-06 16:04:58,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:58,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:58,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:58,955 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:58,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:59,092 INFO L85 PathProgramCache]: Analyzing trace with hash -574204406, now seen corresponding path program 1 times [2024-05-06 16:04:59,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:59,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:59,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:59,113 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:59,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:59,221 INFO L85 PathProgramCache]: Analyzing trace with hash -1126901317, now seen corresponding path program 1 times [2024-05-06 16:04:59,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:59,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:59,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:59,240 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:59,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:59,336 INFO L85 PathProgramCache]: Analyzing trace with hash -1560372224, now seen corresponding path program 1 times [2024-05-06 16:04:59,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:59,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:59,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:59,461 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:59,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:59,648 INFO L85 PathProgramCache]: Analyzing trace with hash -2128544492, now seen corresponding path program 1 times [2024-05-06 16:04:59,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:59,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:59,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:59,666 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:59,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:59,759 INFO L85 PathProgramCache]: Analyzing trace with hash -345757322, now seen corresponding path program 1 times [2024-05-06 16:04:59,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:04:59,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:04:59,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:04:59,777 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:04:59,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:00,718 INFO L85 PathProgramCache]: Analyzing trace with hash -721374201, now seen corresponding path program 1 times [2024-05-06 16:05:00,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:00,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:00,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:00,737 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:00,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:00,857 INFO L85 PathProgramCache]: Analyzing trace with hash -1408743399, now seen corresponding path program 1 times [2024-05-06 16:05:00,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:00,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:00,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:00,875 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:00,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:00,973 INFO L85 PathProgramCache]: Analyzing trace with hash 647293374, now seen corresponding path program 1 times [2024-05-06 16:05:00,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:00,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:00,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:00,991 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:01,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:01,087 INFO L85 PathProgramCache]: Analyzing trace with hash 852164403, now seen corresponding path program 1 times [2024-05-06 16:05:01,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:01,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:01,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:01,105 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:01,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:01,190 INFO L85 PathProgramCache]: Analyzing trace with hash 997320562, now seen corresponding path program 1 times [2024-05-06 16:05:01,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:01,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:01,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:01,208 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:01,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:01,297 INFO L85 PathProgramCache]: Analyzing trace with hash 1279097705, now seen corresponding path program 1 times [2024-05-06 16:05:01,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:01,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:01,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:01,316 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:01,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:01,634 INFO L85 PathProgramCache]: Analyzing trace with hash 1011092619, now seen corresponding path program 1 times [2024-05-06 16:05:01,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:01,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:01,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:01,652 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:01,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:01,740 INFO L85 PathProgramCache]: Analyzing trace with hash 309710623, now seen corresponding path program 1 times [2024-05-06 16:05:01,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:01,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:01,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:01,759 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:01,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:02,449 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:05:02,449 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:05:02,778 INFO L85 PathProgramCache]: Analyzing trace with hash -168490301, now seen corresponding path program 1 times [2024-05-06 16:05:02,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:02,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:02,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:02,788 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:02,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:16,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:05:20,590 INFO L85 PathProgramCache]: Analyzing trace with hash 1322754988, now seen corresponding path program 1 times [2024-05-06 16:05:20,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:20,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:20,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:20,601 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:20,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:23,235 INFO L85 PathProgramCache]: Analyzing trace with hash 1277793521, now seen corresponding path program 1 times [2024-05-06 16:05:23,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:23,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:23,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:23,258 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:23,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:25,968 INFO L85 PathProgramCache]: Analyzing trace with hash -651517457, now seen corresponding path program 1 times [2024-05-06 16:05:25,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:25,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:25,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:25,985 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:25,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:28,249 INFO L85 PathProgramCache]: Analyzing trace with hash -713753304, now seen corresponding path program 1 times [2024-05-06 16:05:28,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:28,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:28,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:28,264 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:28,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:30,696 INFO L85 PathProgramCache]: Analyzing trace with hash -1824139639, now seen corresponding path program 1 times [2024-05-06 16:05:30,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:30,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:30,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:30,711 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:30,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:33,261 INFO L85 PathProgramCache]: Analyzing trace with hash -751579812, now seen corresponding path program 1 times [2024-05-06 16:05:33,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:33,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:33,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:33,295 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:33,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:35,652 INFO L85 PathProgramCache]: Analyzing trace with hash 252850239, now seen corresponding path program 1 times [2024-05-06 16:05:35,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:35,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:35,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:35,666 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:35,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:38,075 INFO L85 PathProgramCache]: Analyzing trace with hash -130390795, now seen corresponding path program 1 times [2024-05-06 16:05:38,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:38,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:38,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:38,090 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:38,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:40,423 INFO L85 PathProgramCache]: Analyzing trace with hash -142753419, now seen corresponding path program 1 times [2024-05-06 16:05:40,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:40,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:40,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:40,439 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:40,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:47,820 INFO L85 PathProgramCache]: Analyzing trace with hash -999609883, now seen corresponding path program 2 times [2024-05-06 16:05:47,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:47,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:47,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:47,835 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:47,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:50,225 INFO L85 PathProgramCache]: Analyzing trace with hash 1353227899, now seen corresponding path program 2 times [2024-05-06 16:05:50,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:50,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:50,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:50,241 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:50,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:52,625 INFO L85 PathProgramCache]: Analyzing trace with hash -1757462756, now seen corresponding path program 2 times [2024-05-06 16:05:52,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:52,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:52,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:52,642 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:52,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:55,001 INFO L85 PathProgramCache]: Analyzing trace with hash 1190233621, now seen corresponding path program 2 times [2024-05-06 16:05:55,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:55,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:55,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:55,019 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:55,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:57,489 INFO L85 PathProgramCache]: Analyzing trace with hash 315489360, now seen corresponding path program 2 times [2024-05-06 16:05:57,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:57,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:57,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:57,504 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:57,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:59,749 INFO L85 PathProgramCache]: Analyzing trace with hash -2068032821, now seen corresponding path program 2 times [2024-05-06 16:05:59,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:05:59,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:05:59,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:05:59,765 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:05:59,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:06:01,993 INFO L85 PathProgramCache]: Analyzing trace with hash -759447319, now seen corresponding path program 2 times [2024-05-06 16:06:01,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:06:01,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:06:02,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:06:02,009 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:06:02,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:06:04,278 INFO L85 PathProgramCache]: Analyzing trace with hash 1915164417, now seen corresponding path program 2 times [2024-05-06 16:06:04,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:06:04,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:06:04,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:06:04,297 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:06:04,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:06:12,823 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:06:12,824 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:06:13,161 INFO L85 PathProgramCache]: Analyzing trace with hash 52335632, now seen corresponding path program 1 times [2024-05-06 16:06:13,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:06:13,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:06:13,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:06:13,171 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:06:13,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:06:22,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:06:27,178 INFO L85 PathProgramCache]: Analyzing trace with hash 58227519, now seen corresponding path program 1 times [2024-05-06 16:06:27,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:06:27,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:06:27,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:06:27,188 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:06:27,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:07:14,651 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:07:14,652 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:07:15,008 INFO L85 PathProgramCache]: Analyzing trace with hash -788293788, now seen corresponding path program 1 times [2024-05-06 16:07:15,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:07:15,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:07:15,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:07:15,022 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:07:15,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:07:27,889 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:07:32,082 INFO L85 PathProgramCache]: Analyzing trace with hash 821479275, now seen corresponding path program 1 times [2024-05-06 16:07:32,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:07:32,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:07:32,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:07:32,092 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:07:32,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:08:14,618 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:08:14,619 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:08:14,957 INFO L85 PathProgramCache]: Analyzing trace with hash -1386069039, now seen corresponding path program 1 times [2024-05-06 16:08:14,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:08:14,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:08:14,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:08:14,966 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:08:14,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:08:28,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:08:32,238 INFO L85 PathProgramCache]: Analyzing trace with hash -566614050, now seen corresponding path program 1 times [2024-05-06 16:08:32,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:08:32,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:08:32,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:08:32,248 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:08:32,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:08:41,093 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:08:41,094 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:08:41,435 INFO L85 PathProgramCache]: Analyzing trace with hash -313442299, now seen corresponding path program 1 times [2024-05-06 16:08:41,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:08:41,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:08:41,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:08:41,444 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:08:41,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:08:55,659 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:08:59,846 INFO L85 PathProgramCache]: Analyzing trace with hash -500084950, now seen corresponding path program 1 times [2024-05-06 16:08:59,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:08:59,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:08:59,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:08:59,856 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:08:59,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:09:06,464 INFO L85 PathProgramCache]: Analyzing trace with hash 1993903547, now seen corresponding path program 1 times [2024-05-06 16:09:06,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:09:06,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:09:06,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:09:06,471 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:09:06,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:09:07,401 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:09:07,401 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:09:07,740 INFO L85 PathProgramCache]: Analyzing trace with hash -1542236270, now seen corresponding path program 1 times [2024-05-06 16:09:07,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:09:07,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:09:07,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:09:07,750 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:09:07,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:09:20,943 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:09:25,126 INFO L85 PathProgramCache]: Analyzing trace with hash -1495011203, now seen corresponding path program 1 times [2024-05-06 16:09:25,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:09:25,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:09:25,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:09:25,135 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:09:25,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:09:30,314 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-06 16:09:30,315 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-06 16:09:30,315 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable72,SelfDestructingSolverStorable73,SelfDestructingSolverStorable30,SelfDestructingSolverStorable74,SelfDestructingSolverStorable31,SelfDestructingSolverStorable75,SelfDestructingSolverStorable4,SelfDestructingSolverStorable3,SelfDestructingSolverStorable2,SelfDestructingSolverStorable1,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable32,SelfDestructingSolverStorable76,SelfDestructingSolverStorable33,SelfDestructingSolverStorable77,SelfDestructingSolverStorable34,SelfDestructingSolverStorable78,SelfDestructingSolverStorable9,SelfDestructingSolverStorable35,SelfDestructingSolverStorable79,SelfDestructingSolverStorable36,SelfDestructingSolverStorable37,SelfDestructingSolverStorable38,SelfDestructingSolverStorable39,SelfDestructingSolverStorable80,SelfDestructingSolverStorable81,SelfDestructingSolverStorable82,SelfDestructingSolverStorable83,SelfDestructingSolverStorable40,SelfDestructingSolverStorable84,SelfDestructingSolverStorable41,SelfDestructingSolverStorable85,SelfDestructingSolverStorable42,SelfDestructingSolverStorable86,SelfDestructingSolverStorable43,SelfDestructingSolverStorable87,SelfDestructingSolverStorable44,SelfDestructingSolverStorable88,SelfDestructingSolverStorable45,SelfDestructingSolverStorable89,SelfDestructingSolverStorable46,SelfDestructingSolverStorable47,SelfDestructingSolverStorable48,SelfDestructingSolverStorable49,SelfDestructingSolverStorable90,SelfDestructingSolverStorable91,SelfDestructingSolverStorable92,SelfDestructingSolverStorable50,SelfDestructingSolverStorable51,SelfDestructingSolverStorable52,SelfDestructingSolverStorable53,SelfDestructingSolverStorable18,SelfDestructingSolverStorable19,SelfDestructingSolverStorable10,SelfDestructingSolverStorable54,SelfDestructingSolverStorable11,SelfDestructingSolverStorable55,SelfDestructingSolverStorable12,SelfDestructingSolverStorable56,SelfDestructingSolverStorable13,SelfDestructingSolverStorable57,SelfDestructingSolverStorable14,SelfDestructingSolverStorable58,SelfDestructingSolverStorable15,SelfDestructingSolverStorable59,SelfDestructingSolverStorable16,SelfDestructingSolverStorable17,SelfDestructingSolverStorable60,SelfDestructingSolverStorable61,SelfDestructingSolverStorable62,SelfDestructingSolverStorable63,SelfDestructingSolverStorable20,SelfDestructingSolverStorable64,SelfDestructingSolverStorable29,SelfDestructingSolverStorable21,SelfDestructingSolverStorable65,SelfDestructingSolverStorable22,SelfDestructingSolverStorable66,SelfDestructingSolverStorable23,SelfDestructingSolverStorable67,SelfDestructingSolverStorable24,SelfDestructingSolverStorable68,SelfDestructingSolverStorable25,SelfDestructingSolverStorable69,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28 [2024-05-06 16:09:30,315 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:09:30,316 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:09:30,316 INFO L85 PathProgramCache]: Analyzing trace with hash -2023426578, now seen corresponding path program 1 times [2024-05-06 16:09:30,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:09:30,316 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958653153] [2024-05-06 16:09:30,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:09:30,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:09:30,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 16:09:30,585 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 16:09:30,585 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 16:09:30,585 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958653153] [2024-05-06 16:09:30,585 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1958653153] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 16:09:30,586 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 16:09:30,586 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-05-06 16:09:30,586 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [737286204] [2024-05-06 16:09:30,586 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 16:09:30,587 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-05-06 16:09:30,587 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 16:09:30,588 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-05-06 16:09:30,588 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-05-06 16:09:30,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:09:30,588 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 16:09:30,589 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 14.222222222222221) internal successors, (128), 9 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 16:09:30,589 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-06 16:09:30,589 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-06 16:09:30,589 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 16:09:31,368 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:09:31,369 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:09:31,734 INFO L85 PathProgramCache]: Analyzing trace with hash -168490301, now seen corresponding path program 2 times [2024-05-06 16:09:31,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:09:31,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:09:31,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:09:31,746 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:09:31,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:09:46,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:09:50,285 INFO L85 PathProgramCache]: Analyzing trace with hash 1322754988, now seen corresponding path program 2 times [2024-05-06 16:09:50,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:09:50,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:09:50,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:09:50,296 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:09:50,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:09:53,517 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:09:53,517 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:09:53,861 INFO L85 PathProgramCache]: Analyzing trace with hash 52335632, now seen corresponding path program 2 times [2024-05-06 16:09:53,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:09:53,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:09:53,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:09:53,871 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:09:53,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:10:08,761 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:10:12,994 INFO L85 PathProgramCache]: Analyzing trace with hash 58227519, now seen corresponding path program 2 times [2024-05-06 16:10:12,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:10:12,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:10:13,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:10:13,004 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:10:13,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:10:16,316 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:10:16,317 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:10:16,686 INFO L85 PathProgramCache]: Analyzing trace with hash -788293788, now seen corresponding path program 2 times [2024-05-06 16:10:16,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:10:16,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:10:16,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:10:16,696 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:10:16,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:10:28,769 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:10:32,955 INFO L85 PathProgramCache]: Analyzing trace with hash 821479275, now seen corresponding path program 2 times [2024-05-06 16:10:32,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:10:32,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:10:32,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:10:32,966 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:10:32,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:10:36,276 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:10:36,277 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:10:36,612 INFO L85 PathProgramCache]: Analyzing trace with hash -1386069039, now seen corresponding path program 2 times [2024-05-06 16:10:36,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:10:36,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:10:36,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:10:36,621 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:10:36,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:10:49,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:10:53,260 INFO L85 PathProgramCache]: Analyzing trace with hash -566614050, now seen corresponding path program 2 times [2024-05-06 16:10:53,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:10:53,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:10:53,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:10:53,270 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:10:53,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:10:56,651 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:10:56,651 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:10:56,992 INFO L85 PathProgramCache]: Analyzing trace with hash -313442299, now seen corresponding path program 2 times [2024-05-06 16:10:56,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:10:56,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:10:57,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:10:57,001 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:10:57,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:11:11,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:11:15,247 INFO L85 PathProgramCache]: Analyzing trace with hash -500084950, now seen corresponding path program 2 times [2024-05-06 16:11:15,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:11:15,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:11:15,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:11:15,257 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:11:15,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:11:18,462 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:11:18,463 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:11:18,867 INFO L85 PathProgramCache]: Analyzing trace with hash 2053053381, now seen corresponding path program 3 times [2024-05-06 16:11:18,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:11:18,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:11:18,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:11:18,877 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:11:18,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:11:34,153 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:11:38,361 INFO L85 PathProgramCache]: Analyzing trace with hash -2115445910, now seen corresponding path program 3 times [2024-05-06 16:11:38,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:11:38,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:11:38,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:11:38,372 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:11:38,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:11:41,479 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:11:41,480 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:11:41,886 INFO L85 PathProgramCache]: Analyzing trace with hash 594490964, now seen corresponding path program 3 times [2024-05-06 16:11:41,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:11:41,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:11:41,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:11:41,896 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:11:41,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:11:56,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:12:00,385 INFO L85 PathProgramCache]: Analyzing trace with hash -1964277125, now seen corresponding path program 3 times [2024-05-06 16:12:00,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:12:00,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:12:00,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:00,395 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:12:00,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:03,664 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:12:03,664 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:12:04,071 INFO L85 PathProgramCache]: Analyzing trace with hash -2056329596, now seen corresponding path program 3 times [2024-05-06 16:12:04,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:12:04,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:12:04,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:04,081 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:12:04,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:16,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:12:20,612 INFO L85 PathProgramCache]: Analyzing trace with hash -995908533, now seen corresponding path program 3 times [2024-05-06 16:12:20,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:12:20,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:12:20,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:20,622 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:12:20,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:23,806 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:12:23,807 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:12:24,193 INFO L85 PathProgramCache]: Analyzing trace with hash -1420474125, now seen corresponding path program 3 times [2024-05-06 16:12:24,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:12:24,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:12:24,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:24,209 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:12:24,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:34,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:12:39,112 INFO L85 PathProgramCache]: Analyzing trace with hash 968652668, now seen corresponding path program 3 times [2024-05-06 16:12:39,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:12:39,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:12:39,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:39,123 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:12:39,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:42,111 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:12:42,112 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:12:42,507 INFO L85 PathProgramCache]: Analyzing trace with hash 983971139, now seen corresponding path program 3 times [2024-05-06 16:12:42,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:12:42,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:12:42,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:42,516 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:12:42,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:53,166 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:12:57,380 INFO L85 PathProgramCache]: Analyzing trace with hash 332949804, now seen corresponding path program 3 times [2024-05-06 16:12:57,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:12:57,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:12:57,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:12:57,389 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:12:57,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:13:00,381 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:13:00,382 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:13:00,914 INFO L85 PathProgramCache]: Analyzing trace with hash -1542236270, now seen corresponding path program 2 times [2024-05-06 16:13:00,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:13:00,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:13:00,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:13:00,924 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:13:00,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:13:15,741 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:13:20,041 INFO L85 PathProgramCache]: Analyzing trace with hash -1495011203, now seen corresponding path program 2 times [2024-05-06 16:13:20,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:13:20,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:13:20,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:13:20,051 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:13:20,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:13:26,328 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:13:26,329 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 16:13:26,858 INFO L85 PathProgramCache]: Analyzing trace with hash -2013985626, now seen corresponding path program 1 times [2024-05-06 16:13:26,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:13:26,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:13:26,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:13:26,867 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:13:26,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:13:40,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-06 16:13:44,980 INFO L85 PathProgramCache]: Analyzing trace with hash 2047884009, now seen corresponding path program 1 times [2024-05-06 16:13:44,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:13:44,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:13:44,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:13:44,990 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:13:44,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:13:48,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-06 16:13:48,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-06 16:13:48,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 16:13:48,395 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable93,SelfDestructingSolverStorable110,SelfDestructingSolverStorable94,SelfDestructingSolverStorable95,SelfDestructingSolverStorable96,SelfDestructingSolverStorable97,SelfDestructingSolverStorable108,SelfDestructingSolverStorable109,SelfDestructingSolverStorable98,SelfDestructingSolverStorable104,SelfDestructingSolverStorable99,SelfDestructingSolverStorable105,SelfDestructingSolverStorable106,SelfDestructingSolverStorable107,SelfDestructingSolverStorable100,SelfDestructingSolverStorable101,SelfDestructingSolverStorable102,SelfDestructingSolverStorable103,SelfDestructingSolverStorable115,SelfDestructingSolverStorable116,SelfDestructingSolverStorable117,SelfDestructingSolverStorable111,SelfDestructingSolverStorable112,SelfDestructingSolverStorable113,SelfDestructingSolverStorable114 [2024-05-06 16:13:48,395 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-06 16:13:48,395 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 16:13:48,396 INFO L85 PathProgramCache]: Analyzing trace with hash -1474438154, now seen corresponding path program 2 times [2024-05-06 16:13:48,396 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 16:13:48,396 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112097776] [2024-05-06 16:13:48,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 16:13:48,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 16:13:48,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:13:48,426 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 16:13:48,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 16:13:48,462 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-05-06 16:13:48,462 INFO L363 BasicCegarLoop]: Counterexample is feasible [2024-05-06 16:13:48,463 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (6 of 7 remaining) [2024-05-06 16:13:48,464 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P2Err0ASSERT_VIOLATIONERROR_FUNCTION (5 of 7 remaining) [2024-05-06 16:13:48,465 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (4 of 7 remaining) [2024-05-06 16:13:48,465 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 7 remaining) [2024-05-06 16:13:48,465 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 7 remaining) [2024-05-06 16:13:48,465 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 7 remaining) [2024-05-06 16:13:48,465 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P2Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 7 remaining) [2024-05-06 16:13:48,465 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable118 [2024-05-06 16:13:48,468 INFO L448 BasicCegarLoop]: Path program histogram: [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-06 16:13:48,473 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-06 16:13:48,473 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-06 16:13:48,563 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre25 could not be translated [2024-05-06 16:13:48,564 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre27 could not be translated [2024-05-06 16:13:48,565 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre29 could not be translated [2024-05-06 16:13:48,566 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre31 could not be translated [2024-05-06 16:13:48,596 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 06.05 04:13:48 BasicIcfg [2024-05-06 16:13:48,597 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-06 16:13:48,597 INFO L158 Benchmark]: Toolchain (without parser) took 553776.76ms. Allocated memory was 290.5MB in the beginning and 1.8GB in the end (delta: 1.5GB). Free memory was 219.0MB in the beginning and 1.1GB in the end (delta: -910.6MB). Peak memory consumption was 587.5MB. Max. memory is 8.0GB. [2024-05-06 16:13:48,597 INFO L158 Benchmark]: CDTParser took 0.10ms. Allocated memory is still 175.1MB. Free memory was 145.4MB in the beginning and 145.4MB in the end (delta: 65.0kB). There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 16:13:48,597 INFO L158 Benchmark]: CACSL2BoogieTranslator took 541.91ms. Allocated memory is still 290.5MB. Free memory was 218.8MB in the beginning and 193.9MB in the end (delta: 24.9MB). Peak memory consumption was 25.2MB. Max. memory is 8.0GB. [2024-05-06 16:13:48,597 INFO L158 Benchmark]: Boogie Procedure Inliner took 65.36ms. Allocated memory is still 290.5MB. Free memory was 193.9MB in the beginning and 191.2MB in the end (delta: 2.6MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. [2024-05-06 16:13:48,597 INFO L158 Benchmark]: Boogie Preprocessor took 39.80ms. Allocated memory is still 290.5MB. Free memory was 191.0MB in the beginning and 188.6MB in the end (delta: 2.3MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 16:13:48,597 INFO L158 Benchmark]: RCFGBuilder took 855.62ms. Allocated memory is still 290.5MB. Free memory was 188.6MB in the beginning and 234.7MB in the end (delta: -46.1MB). Peak memory consumption was 63.7MB. Max. memory is 8.0GB. [2024-05-06 16:13:48,598 INFO L158 Benchmark]: TraceAbstraction took 552269.19ms. Allocated memory was 290.5MB in the beginning and 1.8GB in the end (delta: 1.5GB). Free memory was 233.7MB in the beginning and 1.1GB in the end (delta: -896.0MB). Peak memory consumption was 601.4MB. Max. memory is 8.0GB. [2024-05-06 16:13:48,598 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10ms. Allocated memory is still 175.1MB. Free memory was 145.4MB in the beginning and 145.4MB in the end (delta: 65.0kB). There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 541.91ms. Allocated memory is still 290.5MB. Free memory was 218.8MB in the beginning and 193.9MB in the end (delta: 24.9MB). Peak memory consumption was 25.2MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 65.36ms. Allocated memory is still 290.5MB. Free memory was 193.9MB in the beginning and 191.2MB in the end (delta: 2.6MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 39.80ms. Allocated memory is still 290.5MB. Free memory was 191.0MB in the beginning and 188.6MB in the end (delta: 2.3MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 855.62ms. Allocated memory is still 290.5MB. Free memory was 188.6MB in the beginning and 234.7MB in the end (delta: -46.1MB). Peak memory consumption was 63.7MB. Max. memory is 8.0GB. * TraceAbstraction took 552269.19ms. Allocated memory was 290.5MB in the beginning and 1.8GB in the end (delta: 1.5GB). Free memory was 233.7MB in the beginning and 1.1GB in the end (delta: -896.0MB). Peak memory consumption was 601.4MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre25 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre27 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre29 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre31 could not be translated - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 811678, independent: 804172, independent conditional: 804068, independent unconditional: 104, dependent: 7506, dependent conditional: 7506, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 811220, independent: 804172, independent conditional: 804068, independent unconditional: 104, dependent: 7048, dependent conditional: 7048, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 811220, independent: 804172, independent conditional: 804068, independent unconditional: 104, dependent: 7048, dependent conditional: 7048, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 811220, independent: 804172, independent conditional: 804068, independent unconditional: 104, dependent: 7048, dependent conditional: 7048, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 836657, independent: 804172, independent conditional: 384455, independent unconditional: 419717, dependent: 32485, dependent conditional: 25164, dependent unconditional: 7321, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 836657, independent: 804172, independent conditional: 190179, independent unconditional: 613993, dependent: 32485, dependent conditional: 8721, dependent unconditional: 23764, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 836657, independent: 804172, independent conditional: 190179, independent unconditional: 613993, dependent: 32485, dependent conditional: 8721, dependent unconditional: 23764, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1629, independent: 1576, independent conditional: 331, independent unconditional: 1245, dependent: 53, dependent conditional: 32, dependent unconditional: 21, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1629, independent: 1531, independent conditional: 0, independent unconditional: 1531, dependent: 98, dependent conditional: 0, dependent unconditional: 98, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 98, independent: 45, independent conditional: 37, independent unconditional: 8, dependent: 53, dependent conditional: 32, dependent unconditional: 21, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 98, independent: 45, independent conditional: 37, independent unconditional: 8, dependent: 53, dependent conditional: 32, dependent unconditional: 21, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 594, independent: 137, independent conditional: 132, independent unconditional: 5, dependent: 457, dependent conditional: 313, dependent unconditional: 144, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 836657, independent: 802596, independent conditional: 189848, independent unconditional: 612748, dependent: 32432, dependent conditional: 8689, dependent unconditional: 23743, unknown: 1629, unknown conditional: 363, unknown unconditional: 1266] , Statistics on independence cache: Total cache size (in pairs): 1629, Positive cache size: 1576, Positive conditional cache size: 331, Positive unconditional cache size: 1245, Negative cache size: 53, Negative conditional cache size: 32, Negative unconditional cache size: 21, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 210719, Maximal queried relation: 7, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 836657, independent: 804172, independent conditional: 384455, independent unconditional: 419717, dependent: 32485, dependent conditional: 25164, dependent unconditional: 7321, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 836657, independent: 804172, independent conditional: 190179, independent unconditional: 613993, dependent: 32485, dependent conditional: 8721, dependent unconditional: 23764, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 836657, independent: 804172, independent conditional: 190179, independent unconditional: 613993, dependent: 32485, dependent conditional: 8721, dependent unconditional: 23764, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1629, independent: 1576, independent conditional: 331, independent unconditional: 1245, dependent: 53, dependent conditional: 32, dependent unconditional: 21, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1629, independent: 1531, independent conditional: 0, independent unconditional: 1531, dependent: 98, dependent conditional: 0, dependent unconditional: 98, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 98, independent: 45, independent conditional: 37, independent unconditional: 8, dependent: 53, dependent conditional: 32, dependent unconditional: 21, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 98, independent: 45, independent conditional: 37, independent unconditional: 8, dependent: 53, dependent conditional: 32, dependent unconditional: 21, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 594, independent: 137, independent conditional: 132, independent unconditional: 5, dependent: 457, dependent conditional: 313, dependent unconditional: 144, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 836657, independent: 802596, independent conditional: 189848, independent unconditional: 612748, dependent: 32432, dependent conditional: 8689, dependent unconditional: 23743, unknown: 1629, unknown conditional: 363, unknown unconditional: 1266] , Statistics on independence cache: Total cache size (in pairs): 1629, Positive cache size: 1576, Positive conditional cache size: 331, Positive unconditional cache size: 1245, Negative cache size: 53, Negative conditional cache size: 32, Negative unconditional cache size: 21, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 210719 ], Independence queries for same thread: 458 - CounterExampleResult [Line: 18]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L710] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L712] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L714] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L716] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L718] 0 int __unbuffered_p3_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0] [L719] 0 _Bool __unbuffered_p3_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX=0] [L720] 0 int __unbuffered_p3_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX=0] [L721] 0 _Bool __unbuffered_p3_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX=0] [L722] 0 _Bool __unbuffered_p3_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX=0] [L723] 0 _Bool __unbuffered_p3_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX=0] [L724] 0 _Bool __unbuffered_p3_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX=0] [L725] 0 _Bool __unbuffered_p3_EAX$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX=0] [L726] 0 _Bool __unbuffered_p3_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX=0] [L727] 0 _Bool __unbuffered_p3_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX=0] [L728] 0 _Bool __unbuffered_p3_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX=0] [L729] 0 _Bool __unbuffered_p3_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX=0] [L730] 0 _Bool __unbuffered_p3_EAX$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX=0] [L731] 0 _Bool __unbuffered_p3_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX=0] [L732] 0 int *__unbuffered_p3_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX=0] [L733] 0 int __unbuffered_p3_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX=0] [L734] 0 _Bool __unbuffered_p3_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX=0] [L735] 0 int __unbuffered_p3_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX=0] [L736] 0 _Bool __unbuffered_p3_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0] [L738] 0 int a = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0] [L739] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0] [L740] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0] [L742] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L744] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L746] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={3:0}] [L747] 0 _Bool z$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z={3:0}] [L748] 0 int z$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z={3:0}] [L749] 0 _Bool z$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z={3:0}] [L750] 0 _Bool z$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z={3:0}] [L751] 0 _Bool z$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z={3:0}] [L752] 0 _Bool z$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z={3:0}] [L753] 0 _Bool z$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z={3:0}] [L754] 0 _Bool z$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z={3:0}] [L755] 0 _Bool z$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z={3:0}] [L756] 0 _Bool z$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z={3:0}] [L757] 0 _Bool z$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z={3:0}] [L758] 0 _Bool z$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z={3:0}] [L759] 0 _Bool z$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z={3:0}] [L760] 0 int *z$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z={3:0}] [L761] 0 int z$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z={3:0}] [L762] 0 _Bool z$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z={3:0}] [L763] 0 int z$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z={3:0}] [L764] 0 _Bool z$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L765] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L766] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L767] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L875] 0 pthread_t t2709; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, t2709={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L876] FCALL, FORK 0 pthread_create(&t2709, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2709={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L877] 0 pthread_t t2710; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2709={7:0}, t2710={8:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L878] FCALL, FORK 0 pthread_create(&t2710, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2709={7:0}, t2710={8:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L879] 0 pthread_t t2711; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2709={7:0}, t2710={8:0}, t2711={5:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L880] FCALL, FORK 0 pthread_create(&t2711, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2709={7:0}, t2710={8:0}, t2711={5:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L881] 0 pthread_t t2712; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2709={7:0}, t2710={8:0}, t2711={5:0}, t2712={6:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L882] FCALL, FORK 0 pthread_create(&t2712, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=0, __unbuffered_p3_EAX$read_delayed_var={0:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2709={7:0}, t2710={8:0}, t2711={5:0}, t2712={6:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L831] 4 weak$$choice0 = __VERIFIER_nondet_bool() [L832] 4 weak$$choice2 = __VERIFIER_nondet_bool() [L833] 4 z$flush_delayed = weak$$choice2 [L834] EXPR 4 \read(z) [L834] 4 z$mem_tmp = z [L835] 4 weak$$choice1 = __VERIFIER_nondet_bool() [L836] EXPR 4 !z$w_buff0_used ? z : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff0_used && !z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? (weak$$choice0 ? z : (weak$$choice1 ? z$w_buff0 : z$w_buff1)) : (z$w_buff0_used && z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? (weak$$choice0 ? z$w_buff1 : z$w_buff0) : (weak$$choice0 ? z$w_buff0 : z)))) [L836] EXPR 4 \read(z) [L836] EXPR 4 !z$w_buff0_used ? z : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff0_used && !z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? (weak$$choice0 ? z : (weak$$choice1 ? z$w_buff0 : z$w_buff1)) : (z$w_buff0_used && z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? (weak$$choice0 ? z$w_buff1 : z$w_buff0) : (weak$$choice0 ? z$w_buff0 : z)))) [L836] 4 z = !z$w_buff0_used ? z : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff0_used && !z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? (weak$$choice0 ? z : (weak$$choice1 ? z$w_buff0 : z$w_buff1)) : (z$w_buff0_used && z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? (weak$$choice0 ? z$w_buff1 : z$w_buff0) : (weak$$choice0 ? z$w_buff0 : z)))) [L837] 4 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff0_used && !z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff0_used && z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? z$w_buff0 : z$w_buff0)))) [L838] 4 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff1 : (z$w_buff0_used && !z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? z$w_buff1 : (z$w_buff0_used && z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? z$w_buff1 : z$w_buff1)))) [L839] 4 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? weak$$choice0 || !weak$$choice1 : (z$w_buff0_used && z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? weak$$choice0 : weak$$choice0)))) [L840] 4 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? weak$$choice0 : (z$w_buff0_used && z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)))) [L841] 4 z$r_buff0_thd4 = weak$$choice2 ? z$r_buff0_thd4 : (!z$w_buff0_used ? z$r_buff0_thd4 : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? z$r_buff0_thd4 : (z$w_buff0_used && z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)))) [L842] 4 z$r_buff1_thd4 = weak$$choice2 ? z$r_buff1_thd4 : (!z$w_buff0_used ? z$r_buff1_thd4 : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (z$w_buff0_used && !z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? (weak$$choice0 ? z$r_buff1_thd4 : (_Bool)0) : (z$w_buff0_used && z$r_buff1_thd4 && z$w_buff1_used && !z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)))) [L843] 4 __unbuffered_p3_EAX$read_delayed = (_Bool)1 [L844] 4 __unbuffered_p3_EAX$read_delayed_var = &z [L845] EXPR 4 \read(z) [L845] 4 __unbuffered_p3_EAX = z [L846] EXPR 4 z$flush_delayed ? z$mem_tmp : z [L846] EXPR 4 \read(z) [L846] EXPR 4 z$flush_delayed ? z$mem_tmp : z [L846] 4 z = z$flush_delayed ? z$mem_tmp : z [L847] 4 z$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L850] 4 a = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L853] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L853] EXPR 4 z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z [L853] EXPR 4 \read(z) [L853] EXPR 4 z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z [L853] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L853] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L854] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L855] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L856] 4 z$r_buff0_thd4 = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$r_buff0_thd4 [L857] 4 z$r_buff1_thd4 = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$r_buff1_thd4 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L860] 4 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L862] 4 return 0; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L771] 1 __unbuffered_p0_EAX = a VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L774] 1 x = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L786] 2 __unbuffered_p1_EAX = x VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L789] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L794] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L796] 2 return 0; VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L801] 3 __unbuffered_p2_EAX = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L804] 3 z$w_buff1 = z$w_buff0 [L805] 3 z$w_buff0 = 1 [L806] 3 z$w_buff1_used = z$w_buff0_used [L807] 3 z$w_buff0_used = (_Bool)1 [L808] CALL 3 __VERIFIER_assert(!(z$w_buff1_used && z$w_buff0_used)) [L18] COND FALSE 3 !(!expression) [L808] RET 3 __VERIFIER_assert(!(z$w_buff1_used && z$w_buff0_used)) [L809] 3 z$r_buff1_thd0 = z$r_buff0_thd0 [L810] 3 z$r_buff1_thd1 = z$r_buff0_thd1 [L811] 3 z$r_buff1_thd2 = z$r_buff0_thd2 [L812] 3 z$r_buff1_thd3 = z$r_buff0_thd3 [L813] 3 z$r_buff1_thd4 = z$r_buff0_thd4 [L814] 3 z$r_buff0_thd3 = (_Bool)1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=1, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L817] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L817] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L818] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L819] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L820] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L821] 3 z$r_buff1_thd3 = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=1, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L824] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=1, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L826] 3 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=1, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L779] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=1, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L884] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2709={7:0}, t2710={8:0}, t2711={5:0}, t2712={6:0}, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=1, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L886] CALL 0 assume_abort_if_not(main$tmp_guard0) [L3] COND FALSE 0 !(!cond) VAL [\old(cond)=1, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, cond=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=1, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L886] RET 0 assume_abort_if_not(main$tmp_guard0) [L888] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L888] EXPR 0 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z [L888] EXPR 0 \read(z) [L888] EXPR 0 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z [L888] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L888] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L889] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L890] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L891] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L892] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2709={7:0}, t2710={8:0}, t2711={5:0}, t2712={6:0}, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=1, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L895] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L896] EXPR 0 __unbuffered_p3_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p3_EAX$read_delayed_var : __unbuffered_p3_EAX) : __unbuffered_p3_EAX [L896] EXPR 0 weak$$choice1 ? *__unbuffered_p3_EAX$read_delayed_var : __unbuffered_p3_EAX [L896] EXPR 0 \read(*__unbuffered_p3_EAX$read_delayed_var) [L896] EXPR 0 weak$$choice1 ? *__unbuffered_p3_EAX$read_delayed_var : __unbuffered_p3_EAX [L896] EXPR 0 __unbuffered_p3_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p3_EAX$read_delayed_var : __unbuffered_p3_EAX) : __unbuffered_p3_EAX [L896] 0 __unbuffered_p3_EAX = __unbuffered_p3_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p3_EAX$read_delayed_var : __unbuffered_p3_EAX) : __unbuffered_p3_EAX [L897] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1 && __unbuffered_p3_EAX == 1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=1, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2709={7:0}, t2710={8:0}, t2711={5:0}, t2712={6:0}, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=1, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L899] CALL 0 __VERIFIER_assert(main$tmp_guard1) [L18] COND TRUE 0 !expression VAL [\old(expression)=0, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=1, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=1, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] [L18] 0 reach_error() VAL [\old(expression)=0, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX$flush_delayed=0, __unbuffered_p3_EAX$mem_tmp=0, __unbuffered_p3_EAX$r_buff0_thd0=0, __unbuffered_p3_EAX$r_buff0_thd1=0, __unbuffered_p3_EAX$r_buff0_thd2=0, __unbuffered_p3_EAX$r_buff0_thd3=0, __unbuffered_p3_EAX$r_buff0_thd4=0, __unbuffered_p3_EAX$r_buff1_thd0=0, __unbuffered_p3_EAX$r_buff1_thd1=0, __unbuffered_p3_EAX$r_buff1_thd2=0, __unbuffered_p3_EAX$r_buff1_thd3=0, __unbuffered_p3_EAX$r_buff1_thd4=0, __unbuffered_p3_EAX$read_delayed=1, __unbuffered_p3_EAX$read_delayed_var={3:0}, __unbuffered_p3_EAX$w_buff0=0, __unbuffered_p3_EAX$w_buff0_used=0, __unbuffered_p3_EAX$w_buff1=0, __unbuffered_p3_EAX$w_buff1_used=0, __unbuffered_p3_EAX=1, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=0, x=1, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=1, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z={3:0}] - UnprovableResult [Line: 18]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 882]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 880]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 878]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 876]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 9 procedures, 190 locations, 7 error locations. Started 1 CEGAR loops. OverallTime: 552.0s, OverallIterations: 4, TraceHistogramMax: 0, PathProgramHistogramMax: 5, EmptinessCheckTime: 550.4s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 21, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 468 NumberOfCodeBlocks, 468 NumberOfCodeBlocksAsserted, 4 NumberOfCheckSat, 337 ConstructedInterpolants, 0 QuantifiedInterpolants, 1032 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 3 InterpolantComputations, 3 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 541.6s, ConditionalCommutativityIAIntegrations: 0, ConditionalCommutativityDFSRestarts: 4, ConditionalCommutativityConditionCalculations: 467, ConditionalCommutativityTraceChecks: 111, ConditionalCommutativityImperfectProofs: 0 RESULT: Ultimate proved your program to be incorrect! [2024-05-06 16:13:48,620 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2024-05-06 16:13:48,881 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request...