/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/parallel-parallel-sum-1-dsl.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 03:31:43,155 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 03:31:43,193 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 03:31:43,197 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 03:31:43,197 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 03:31:43,211 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 03:31:43,211 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 03:31:43,211 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 03:31:43,212 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 03:31:43,212 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 03:31:43,212 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 03:31:43,213 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 03:31:43,213 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 03:31:43,213 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 03:31:43,213 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 03:31:43,214 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 03:31:43,214 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 03:31:43,214 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 03:31:43,214 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 03:31:43,215 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 03:31:43,215 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 03:31:43,215 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 03:31:43,216 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 03:31:43,216 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 03:31:43,216 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 03:31:43,216 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 03:31:43,216 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 03:31:43,217 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 03:31:43,217 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 03:31:43,217 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 03:31:43,217 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 03:31:43,217 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 03:31:43,218 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 03:31:43,218 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 03:31:43,218 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 03:31:43,218 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 03:31:43,218 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 03:31:43,219 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 03:31:43,219 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 03:31:43,219 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT [2024-05-06 03:31:43,420 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 03:31:43,441 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 03:31:43,443 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 03:31:43,444 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 03:31:43,445 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 03:31:43,445 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/parallel-parallel-sum-1-dsl.wvr.c [2024-05-06 03:31:44,578 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 03:31:44,754 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 03:31:44,754 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/parallel-parallel-sum-1-dsl.wvr.c [2024-05-06 03:31:44,762 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/c323bbd0d/20c0265b5f7c40389e527cbd7664e2f1/FLAGc4bd96f93 [2024-05-06 03:31:44,777 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/c323bbd0d/20c0265b5f7c40389e527cbd7664e2f1 [2024-05-06 03:31:44,779 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 03:31:44,781 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 03:31:44,782 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 03:31:44,782 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 03:31:44,785 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 03:31:44,786 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 03:31:44" (1/1) ... [2024-05-06 03:31:44,786 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@667b2915 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:44, skipping insertion in model container [2024-05-06 03:31:44,786 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 03:31:44" (1/1) ... [2024-05-06 03:31:44,815 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 03:31:44,951 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/parallel-parallel-sum-1-dsl.wvr.c[4372,4385] [2024-05-06 03:31:44,959 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 03:31:44,966 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 03:31:44,993 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/parallel-parallel-sum-1-dsl.wvr.c[4372,4385] [2024-05-06 03:31:44,996 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 03:31:45,002 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 03:31:45,002 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 03:31:45,008 INFO L206 MainTranslator]: Completed translation [2024-05-06 03:31:45,014 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45 WrapperNode [2024-05-06 03:31:45,014 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 03:31:45,015 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 03:31:45,016 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 03:31:45,016 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 03:31:45,023 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45" (1/1) ... [2024-05-06 03:31:45,044 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45" (1/1) ... [2024-05-06 03:31:45,081 INFO L138 Inliner]: procedures = 29, calls = 95, calls flagged for inlining = 21, calls inlined = 27, statements flattened = 303 [2024-05-06 03:31:45,081 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 03:31:45,082 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 03:31:45,082 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 03:31:45,082 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 03:31:45,118 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45" (1/1) ... [2024-05-06 03:31:45,118 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45" (1/1) ... [2024-05-06 03:31:45,121 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45" (1/1) ... [2024-05-06 03:31:45,121 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45" (1/1) ... [2024-05-06 03:31:45,138 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45" (1/1) ... [2024-05-06 03:31:45,142 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45" (1/1) ... [2024-05-06 03:31:45,144 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45" (1/1) ... [2024-05-06 03:31:45,146 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45" (1/1) ... [2024-05-06 03:31:45,170 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 03:31:45,171 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 03:31:45,171 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 03:31:45,171 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 03:31:45,172 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45" (1/1) ... [2024-05-06 03:31:45,176 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 03:31:45,189 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:31:45,226 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 03:31:45,266 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 03:31:45,308 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 03:31:45,308 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 03:31:45,308 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 03:31:45,308 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 03:31:45,309 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 03:31:45,309 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 03:31:45,309 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 03:31:45,309 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 03:31:45,309 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 03:31:45,309 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 03:31:45,309 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 03:31:45,311 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 03:31:45,311 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 03:31:45,311 INFO L130 BoogieDeclarations]: Found specification of procedure thread5 [2024-05-06 03:31:45,311 INFO L138 BoogieDeclarations]: Found implementation of procedure thread5 [2024-05-06 03:31:45,311 INFO L130 BoogieDeclarations]: Found specification of procedure thread6 [2024-05-06 03:31:45,311 INFO L138 BoogieDeclarations]: Found implementation of procedure thread6 [2024-05-06 03:31:45,311 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 03:31:45,312 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 03:31:45,312 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 03:31:45,312 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 03:31:45,312 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 03:31:45,312 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 03:31:45,313 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 03:31:45,416 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 03:31:45,418 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 03:31:45,818 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 03:31:45,989 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 03:31:45,989 INFO L309 CfgBuilder]: Removed 5 assume(true) statements. [2024-05-06 03:31:45,990 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 03:31:45 BoogieIcfgContainer [2024-05-06 03:31:45,991 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 03:31:45,995 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 03:31:45,996 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 03:31:45,999 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 03:31:45,999 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 03:31:44" (1/3) ... [2024-05-06 03:31:46,000 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2818d685 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 03:31:46, skipping insertion in model container [2024-05-06 03:31:46,000 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:31:45" (2/3) ... [2024-05-06 03:31:46,000 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2818d685 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 03:31:46, skipping insertion in model container [2024-05-06 03:31:46,000 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 03:31:45" (3/3) ... [2024-05-06 03:31:46,001 INFO L112 eAbstractionObserver]: Analyzing ICFG parallel-parallel-sum-1-dsl.wvr.c [2024-05-06 03:31:46,008 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 03:31:46,014 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 03:31:46,015 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 03:31:46,015 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 03:31:46,115 INFO L144 ThreadInstanceAdder]: Constructed 18 joinOtherThreadTransitions. [2024-05-06 03:31:46,161 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 03:31:46,161 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 03:31:46,161 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:31:46,163 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 03:31:46,185 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 03:31:46,217 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 03:31:46,230 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:31:46,231 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 03:31:46,237 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3f055277, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=false, mConComCheckerCriterionLimit=1, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 03:31:46,237 INFO L358 AbstractCegarLoop]: Starting to check reachability of 11 error locations. [2024-05-06 03:31:46,340 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [thread1Err3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thread1Err4INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2024-05-06 03:31:46,341 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:31:46,341 INFO L85 PathProgramCache]: Analyzing trace with hash -1966618470, now seen corresponding path program 1 times [2024-05-06 03:31:46,348 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:31:46,349 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564197828] [2024-05-06 03:31:46,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:46,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:46,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:46,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:46,737 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:31:46,737 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564197828] [2024-05-06 03:31:46,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564197828] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 03:31:46,738 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 03:31:46,738 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-05-06 03:31:46,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1105416468] [2024-05-06 03:31:46,740 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 03:31:46,746 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-05-06 03:31:46,747 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:31:46,763 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 03:31:46,764 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-05-06 03:31:46,764 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:46,766 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:31:46,766 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 98.5) internal successors, (197), 2 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:31:46,767 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:46,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:46,846 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-05-06 03:31:46,846 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [thread1Err3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thread1Err4INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2024-05-06 03:31:46,847 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:31:46,847 INFO L85 PathProgramCache]: Analyzing trace with hash -702387771, now seen corresponding path program 1 times [2024-05-06 03:31:46,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:31:46,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661096550] [2024-05-06 03:31:46,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:46,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:46,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:47,275 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:47,276 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:31:47,276 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661096550] [2024-05-06 03:31:47,276 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [661096550] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 03:31:47,276 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 03:31:47,276 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-05-06 03:31:47,276 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828158133] [2024-05-06 03:31:47,276 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 03:31:47,277 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-06 03:31:47,277 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:31:47,278 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 03:31:47,278 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-05-06 03:31:47,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:47,279 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:31:47,279 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 32.166666666666664) internal successors, (193), 6 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:31:47,279 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:47,279 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:47,464 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:47,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:31:47,465 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-05-06 03:31:47,466 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [thread1Err3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thread1Err4INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2024-05-06 03:31:47,466 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:31:47,466 INFO L85 PathProgramCache]: Analyzing trace with hash -301157671, now seen corresponding path program 1 times [2024-05-06 03:31:47,466 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:31:47,467 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599542574] [2024-05-06 03:31:47,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:47,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:47,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:47,580 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:47,580 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:31:47,581 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [599542574] [2024-05-06 03:31:47,581 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [599542574] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 03:31:47,581 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 03:31:47,581 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-05-06 03:31:47,581 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [679395622] [2024-05-06 03:31:47,581 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 03:31:47,583 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-05-06 03:31:47,583 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:31:47,585 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-05-06 03:31:47,585 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 03:31:47,585 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:47,585 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:31:47,586 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 66.0) internal successors, (198), 3 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:31:47,586 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:47,586 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:31:47,586 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:47,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:47,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:31:47,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-06 03:31:47,770 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-05-06 03:31:47,770 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [thread1Err3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thread1Err4INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2024-05-06 03:31:47,770 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:31:47,771 INFO L85 PathProgramCache]: Analyzing trace with hash -1013683047, now seen corresponding path program 2 times [2024-05-06 03:31:47,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:31:47,774 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [960801256] [2024-05-06 03:31:47,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:47,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:47,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:47,985 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:47,986 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:31:47,986 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [960801256] [2024-05-06 03:31:47,986 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [960801256] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 03:31:47,986 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 03:31:47,986 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-05-06 03:31:47,988 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1795148604] [2024-05-06 03:31:47,988 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 03:31:47,990 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-05-06 03:31:47,992 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:31:47,993 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 03:31:47,993 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-05-06 03:31:47,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:47,998 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:31:47,998 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 28.285714285714285) internal successors, (198), 7 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:31:47,998 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:47,998 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:31:47,998 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-06 03:31:47,998 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:48,175 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:48,175 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:31:48,175 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-06 03:31:48,175 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 03:31:48,176 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-05-06 03:31:48,176 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [thread1Err3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thread1Err4INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2024-05-06 03:31:48,176 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:31:48,176 INFO L85 PathProgramCache]: Analyzing trace with hash 1057280405, now seen corresponding path program 1 times [2024-05-06 03:31:48,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:31:48,176 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1398590954] [2024-05-06 03:31:48,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:48,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:48,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:48,459 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:48,459 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:31:48,459 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1398590954] [2024-05-06 03:31:48,459 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1398590954] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 03:31:48,460 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1884837617] [2024-05-06 03:31:48,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:48,460 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 03:31:48,460 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:31:48,528 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 03:31:48,529 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 03:31:48,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:48,674 INFO L262 TraceCheckSpWp]: Trace formula consists of 532 conjuncts, 8 conjunts are in the unsatisfiable core [2024-05-06 03:31:48,680 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 03:31:48,972 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:48,972 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 03:31:49,198 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:49,199 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1884837617] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 03:31:49,199 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 03:31:49,199 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 19 [2024-05-06 03:31:49,199 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1940057181] [2024-05-06 03:31:49,199 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 03:31:49,200 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2024-05-06 03:31:49,200 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:31:49,200 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-05-06 03:31:49,200 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=259, Unknown=0, NotChecked=0, Total=342 [2024-05-06 03:31:49,201 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:49,201 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:31:49,201 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 19.105263157894736) internal successors, (363), 19 states have internal predecessors, (363), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:31:49,201 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:49,201 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:31:49,201 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-06 03:31:49,201 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 03:31:49,201 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:49,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:49,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:31:49,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-06 03:31:49,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 03:31:49,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-06 03:31:49,584 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-05-06 03:31:49,768 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 03:31:49,769 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [thread1Err3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thread1Err4INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2024-05-06 03:31:49,769 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:31:49,769 INFO L85 PathProgramCache]: Analyzing trace with hash -114394479, now seen corresponding path program 2 times [2024-05-06 03:31:49,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:31:49,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [898309704] [2024-05-06 03:31:49,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:49,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:49,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:50,001 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:31:50,001 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:31:50,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [898309704] [2024-05-06 03:31:50,002 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [898309704] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 03:31:50,002 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1655959325] [2024-05-06 03:31:50,002 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 03:31:50,002 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 03:31:50,002 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:31:50,003 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 03:31:50,024 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 03:31:50,167 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 03:31:50,167 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 03:31:50,169 INFO L262 TraceCheckSpWp]: Trace formula consists of 546 conjuncts, 8 conjunts are in the unsatisfiable core [2024-05-06 03:31:50,174 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 03:31:50,355 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 9 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:31:50,355 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 03:31:50,529 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:31:50,529 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1655959325] provided 1 perfect and 1 imperfect interpolant sequences [2024-05-06 03:31:50,530 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-05-06 03:31:50,530 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [9, 9] total 19 [2024-05-06 03:31:50,530 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1659673563] [2024-05-06 03:31:50,530 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 03:31:50,530 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-05-06 03:31:50,530 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:31:50,531 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-05-06 03:31:50,531 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=262, Unknown=0, NotChecked=0, Total=342 [2024-05-06 03:31:50,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:50,531 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:31:50,531 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 23.666666666666668) internal successors, (213), 9 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:31:50,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:50,531 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:31:50,532 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-06 03:31:50,532 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 03:31:50,532 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-06 03:31:50,532 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:31:51,123 INFO L85 PathProgramCache]: Analyzing trace with hash -2039049466, now seen corresponding path program 1 times [2024-05-06 03:31:51,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:51,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:51,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:51,478 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:51,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:51,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:51,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:51,684 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:51,773 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:31:51,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:31:53,877 INFO L85 PathProgramCache]: Analyzing trace with hash 1074974919, now seen corresponding path program 2 times [2024-05-06 03:31:53,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:53,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:53,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:54,058 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:54,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:54,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:54,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:54,279 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:54,522 INFO L85 PathProgramCache]: Analyzing trace with hash -2036186596, now seen corresponding path program 3 times [2024-05-06 03:31:54,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:54,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:54,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:54,689 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:54,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:54,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:54,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:54,894 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:55,141 INFO L85 PathProgramCache]: Analyzing trace with hash -1372075420, now seen corresponding path program 1 times [2024-05-06 03:31:55,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:55,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:55,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:55,363 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:55,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:55,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:55,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:31:55,523 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:31:55,628 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:31:55,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:31:59,744 INFO L85 PathProgramCache]: Analyzing trace with hash -72954257, now seen corresponding path program 1 times [2024-05-06 03:31:59,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:31:59,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:31:59,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:31:59,768 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:31:59,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:00,036 INFO L85 PathProgramCache]: Analyzing trace with hash -1389529990, now seen corresponding path program 2 times [2024-05-06 03:32:00,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:00,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:00,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:00,278 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:00,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:00,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:00,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:00,426 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:00,630 INFO L85 PathProgramCache]: Analyzing trace with hash -2115519717, now seen corresponding path program 1 times [2024-05-06 03:32:00,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:00,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:00,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:00,750 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:00,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:00,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:00,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:00,916 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:01,000 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:32:01,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:32:05,117 INFO L85 PathProgramCache]: Analyzing trace with hash -127337956, now seen corresponding path program 1 times [2024-05-06 03:32:05,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:05,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:05,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:05,143 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:32:05,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:05,355 INFO L85 PathProgramCache]: Analyzing trace with hash -2112656847, now seen corresponding path program 2 times [2024-05-06 03:32:05,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:05,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:05,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:05,465 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:05,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:05,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:05,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:05,582 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:05,888 INFO L85 PathProgramCache]: Analyzing trace with hash -82178914, now seen corresponding path program 1 times [2024-05-06 03:32:05,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:05,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:05,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:06,040 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:06,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:06,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:06,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:06,172 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:06,237 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:32:06,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:32:18,393 INFO L85 PathProgramCache]: Analyzing trace with hash -1711812513, now seen corresponding path program 2 times [2024-05-06 03:32:18,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:18,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:18,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:18,577 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:18,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:18,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:18,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:18,726 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:18,900 INFO L85 PathProgramCache]: Analyzing trace with hash -79316044, now seen corresponding path program 3 times [2024-05-06 03:32:18,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:18,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:18,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:19,033 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:19,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:19,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:19,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:19,162 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:19,415 INFO L85 PathProgramCache]: Analyzing trace with hash -1710968372, now seen corresponding path program 1 times [2024-05-06 03:32:19,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:19,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:19,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:19,529 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:19,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:19,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:19,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:19,645 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:19,749 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:32:19,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:32:21,830 INFO L85 PathProgramCache]: Analyzing trace with hash 1960210391, now seen corresponding path program 1 times [2024-05-06 03:32:21,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:21,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:21,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:21,852 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:32:21,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:22,098 INFO L85 PathProgramCache]: Analyzing trace with hash -1728422942, now seen corresponding path program 2 times [2024-05-06 03:32:22,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:22,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:22,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:22,251 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:22,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:22,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:22,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:22,441 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:22,723 INFO L85 PathProgramCache]: Analyzing trace with hash -1758342477, now seen corresponding path program 1 times [2024-05-06 03:32:22,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:22,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:22,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:22,828 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:22,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:22,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:22,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:22,938 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:23,039 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:32:23,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:32:25,150 INFO L85 PathProgramCache]: Analyzing trace with hash -2012997708, now seen corresponding path program 1 times [2024-05-06 03:32:25,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:25,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:25,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:25,197 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:32:25,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:25,512 INFO L85 PathProgramCache]: Analyzing trace with hash -1755479607, now seen corresponding path program 2 times [2024-05-06 03:32:25,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:25,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:25,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:25,647 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:25,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:25,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:25,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:25,755 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:26,049 INFO L85 PathProgramCache]: Analyzing trace with hash -1570315739, now seen corresponding path program 1 times [2024-05-06 03:32:26,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:26,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:26,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:26,184 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:26,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:26,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:26,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:26,349 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:26,410 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:32:26,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:32:34,560 INFO L85 PathProgramCache]: Analyzing trace with hash -1480959066, now seen corresponding path program 2 times [2024-05-06 03:32:34,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:34,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:34,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:34,693 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:34,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:34,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:34,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:34,813 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:34,999 INFO L85 PathProgramCache]: Analyzing trace with hash -1567452869, now seen corresponding path program 3 times [2024-05-06 03:32:34,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:34,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:35,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:35,201 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:35,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:35,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:35,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:35,327 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:35,521 INFO L85 PathProgramCache]: Analyzing trace with hash 894190565, now seen corresponding path program 1 times [2024-05-06 03:32:35,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:35,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:35,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:35,640 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:35,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:35,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:35,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:35,757 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:35,860 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:32:35,860 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:32:41,978 INFO L85 PathProgramCache]: Analyzing trace with hash -186797008, now seen corresponding path program 1 times [2024-05-06 03:32:41,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:41,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:42,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:42,003 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:32:42,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:42,287 INFO L85 PathProgramCache]: Analyzing trace with hash 876735995, now seen corresponding path program 2 times [2024-05-06 03:32:42,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:42,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:42,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:42,432 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:42,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:42,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:42,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:42,540 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:42,744 INFO L85 PathProgramCache]: Analyzing trace with hash 1658557690, now seen corresponding path program 1 times [2024-05-06 03:32:42,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:42,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:42,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:42,853 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:42,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:42,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:42,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:42,955 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:43,032 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:32:43,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:32:45,127 INFO L85 PathProgramCache]: Analyzing trace with hash 33013691, now seen corresponding path program 1 times [2024-05-06 03:32:45,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:45,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:45,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:45,228 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:32:45,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:45,476 INFO L85 PathProgramCache]: Analyzing trace with hash 1661420560, now seen corresponding path program 2 times [2024-05-06 03:32:45,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:45,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:45,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:45,668 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:45,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:45,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:45,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:45,802 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:46,095 INFO L85 PathProgramCache]: Analyzing trace with hash 294101469, now seen corresponding path program 1 times [2024-05-06 03:32:46,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:46,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:46,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:46,262 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:46,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:46,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:46,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:46,482 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:46,545 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:32:46,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:32:50,626 INFO L85 PathProgramCache]: Analyzing trace with hash 1895278942, now seen corresponding path program 2 times [2024-05-06 03:32:50,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:50,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:50,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:50,739 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:50,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:50,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:50,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:50,848 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:51,029 INFO L85 PathProgramCache]: Analyzing trace with hash 296964339, now seen corresponding path program 3 times [2024-05-06 03:32:51,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:51,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:51,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:51,155 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:51,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:51,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:51,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:51,280 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:51,546 INFO L85 PathProgramCache]: Analyzing trace with hash -1531932371, now seen corresponding path program 1 times [2024-05-06 03:32:51,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:51,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:51,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:51,665 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:51,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:51,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:51,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:51,794 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:51,932 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:32:51,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:32:54,024 INFO L85 PathProgramCache]: Analyzing trace with hash 302297976, now seen corresponding path program 1 times [2024-05-06 03:32:54,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:54,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:54,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:54,048 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:32:54,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:32:54,269 INFO L85 PathProgramCache]: Analyzing trace with hash -1549386941, now seen corresponding path program 2 times [2024-05-06 03:32:54,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:54,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:54,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:54,394 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:54,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:54,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:54,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:54,545 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:54,785 INFO L85 PathProgramCache]: Analyzing trace with hash -1891755342, now seen corresponding path program 1 times [2024-05-06 03:32:54,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:54,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:54,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:54,879 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:54,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:32:54,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:32:54,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:32:54,971 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:32:55,040 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:32:55,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:33:01,294 INFO L85 PathProgramCache]: Analyzing trace with hash 1513116531, now seen corresponding path program 1 times [2024-05-06 03:33:01,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:01,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:01,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:01,311 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:33:01,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:01,574 INFO L85 PathProgramCache]: Analyzing trace with hash -1888892472, now seen corresponding path program 2 times [2024-05-06 03:33:01,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:01,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:01,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:01,671 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:01,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:01,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:01,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:01,826 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:02,114 INFO L85 PathProgramCache]: Analyzing trace with hash -1614774959, now seen corresponding path program 1 times [2024-05-06 03:33:02,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:02,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:02,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:02,232 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:02,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:02,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:02,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:02,347 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:02,415 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:33:02,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:33:04,514 INFO L85 PathProgramCache]: Analyzing trace with hash -220671534, now seen corresponding path program 2 times [2024-05-06 03:33:04,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:04,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:04,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:04,630 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:04,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:04,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:04,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:04,808 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:04,985 INFO L85 PathProgramCache]: Analyzing trace with hash -1611912089, now seen corresponding path program 3 times [2024-05-06 03:33:04,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:04,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:05,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:05,104 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:05,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:05,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:05,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:05,216 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:05,407 INFO L85 PathProgramCache]: Analyzing trace with hash -1819189959, now seen corresponding path program 1 times [2024-05-06 03:33:05,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:05,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:05,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:05,513 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:05,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:05,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:05,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:05,688 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:05,803 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:33:05,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:33:07,884 INFO L85 PathProgramCache]: Analyzing trace with hash 780210820, now seen corresponding path program 1 times [2024-05-06 03:33:07,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:07,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:07,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:07,910 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:33:07,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:08,112 INFO L85 PathProgramCache]: Analyzing trace with hash -1836644529, now seen corresponding path program 2 times [2024-05-06 03:33:08,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:08,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:08,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:08,211 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:08,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:08,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:08,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:08,308 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:08,514 INFO L85 PathProgramCache]: Analyzing trace with hash 750319398, now seen corresponding path program 1 times [2024-05-06 03:33:08,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:08,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:08,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:08,603 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:08,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:08,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:08,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:08,798 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:08,872 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:33:08,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:33:12,967 INFO L85 PathProgramCache]: Analyzing trace with hash 635419879, now seen corresponding path program 1 times [2024-05-06 03:33:12,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:12,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:12,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:12,986 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:33:12,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:13,217 INFO L85 PathProgramCache]: Analyzing trace with hash 753182268, now seen corresponding path program 2 times [2024-05-06 03:33:13,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:13,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:13,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:13,304 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:13,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:13,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:13,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:13,393 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:13,693 INFO L85 PathProgramCache]: Analyzing trace with hash -1592513293, now seen corresponding path program 1 times [2024-05-06 03:33:13,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:13,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:13,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:13,889 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:13,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:13,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:13,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:14,030 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:14,100 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:33:14,100 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:33:16,172 INFO L85 PathProgramCache]: Analyzing trace with hash -1892154892, now seen corresponding path program 2 times [2024-05-06 03:33:16,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:16,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:16,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:16,302 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:16,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:16,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:16,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:16,425 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:16,608 INFO L85 PathProgramCache]: Analyzing trace with hash -1589650423, now seen corresponding path program 3 times [2024-05-06 03:33:16,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:16,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:16,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:16,717 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:16,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:16,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:16,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:16,825 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:17,067 INFO L85 PathProgramCache]: Analyzing trace with hash -1032654761, now seen corresponding path program 1 times [2024-05-06 03:33:17,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:17,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:17,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:17,167 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:17,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:17,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:17,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:17,268 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:17,373 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:33:17,373 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:33:25,618 INFO L85 PathProgramCache]: Analyzing trace with hash -1337404126, now seen corresponding path program 1 times [2024-05-06 03:33:25,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:25,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:25,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:25,635 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:33:25,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:25,850 INFO L85 PathProgramCache]: Analyzing trace with hash -1050109331, now seen corresponding path program 2 times [2024-05-06 03:33:25,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:25,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:25,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:26,005 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:26,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:26,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:26,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:26,129 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:26,319 INFO L85 PathProgramCache]: Analyzing trace with hash 412313928, now seen corresponding path program 1 times [2024-05-06 03:33:26,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:26,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:26,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:26,453 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:26,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:26,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:26,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:26,590 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:26,649 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:33:26,649 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:33:36,778 INFO L85 PathProgramCache]: Analyzing trace with hash -325824631, now seen corresponding path program 1 times [2024-05-06 03:33:36,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:36,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:36,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:36,824 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:33:36,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:37,111 INFO L85 PathProgramCache]: Analyzing trace with hash 415176798, now seen corresponding path program 2 times [2024-05-06 03:33:37,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:37,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:37,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:37,215 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:37,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:37,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:37,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:37,308 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:37,631 INFO L85 PathProgramCache]: Analyzing trace with hash 1429005104, now seen corresponding path program 1 times [2024-05-06 03:33:37,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:37,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:37,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:37,769 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:37,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:37,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:37,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:37,968 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:38,037 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:33:38,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:33:42,196 INFO L85 PathProgramCache]: Analyzing trace with hash 1838359409, now seen corresponding path program 2 times [2024-05-06 03:33:42,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:42,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:42,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:42,291 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:42,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:42,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:42,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:42,387 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:42,588 INFO L85 PathProgramCache]: Analyzing trace with hash 1431867974, now seen corresponding path program 3 times [2024-05-06 03:33:42,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:42,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:42,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:42,694 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:42,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:42,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:42,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:42,800 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:42,997 INFO L85 PathProgramCache]: Analyzing trace with hash 1747355642, now seen corresponding path program 1 times [2024-05-06 03:33:42,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:42,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:43,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:43,187 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:43,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:43,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:43,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:43,282 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:43,391 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:33:43,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:33:45,471 INFO L85 PathProgramCache]: Analyzing trace with hash -1540097659, now seen corresponding path program 1 times [2024-05-06 03:33:45,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:45,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:45,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:45,490 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:33:45,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:45,690 INFO L85 PathProgramCache]: Analyzing trace with hash 1729901072, now seen corresponding path program 2 times [2024-05-06 03:33:45,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:45,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:45,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:45,788 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:45,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:45,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:45,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:45,887 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:46,116 INFO L85 PathProgramCache]: Analyzing trace with hash -1873651771, now seen corresponding path program 1 times [2024-05-06 03:33:46,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:46,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:46,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:46,208 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:46,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:46,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:46,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:46,385 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:46,443 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:33:46,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:33:54,625 INFO L85 PathProgramCache]: Analyzing trace with hash 1195817286, now seen corresponding path program 1 times [2024-05-06 03:33:54,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:54,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:54,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:54,643 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:33:54,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:33:54,925 INFO L85 PathProgramCache]: Analyzing trace with hash -1870788901, now seen corresponding path program 2 times [2024-05-06 03:33:54,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:54,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:54,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:55,042 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:55,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:55,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:55,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:55,157 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:55,501 INFO L85 PathProgramCache]: Analyzing trace with hash 113759090, now seen corresponding path program 1 times [2024-05-06 03:33:55,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:55,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:55,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:55,644 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:55,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:33:55,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:33:55,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:33:55,815 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:33:55,870 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:33:55,871 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:34:01,996 INFO L85 PathProgramCache]: Analyzing trace with hash 1448164403, now seen corresponding path program 2 times [2024-05-06 03:34:01,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:01,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:02,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:02,100 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:02,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:02,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:02,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:02,197 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:02,376 INFO L85 PathProgramCache]: Analyzing trace with hash 116621960, now seen corresponding path program 3 times [2024-05-06 03:34:02,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:02,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:02,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:02,484 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:02,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:02,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:02,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:02,593 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:02,784 INFO L85 PathProgramCache]: Analyzing trace with hash -534579592, now seen corresponding path program 1 times [2024-05-06 03:34:02,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:02,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:02,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:02,970 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:02,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:02,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:02,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:03,072 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:03,179 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:34:03,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:34:09,853 INFO L85 PathProgramCache]: Analyzing trace with hash -1126830205, now seen corresponding path program 1 times [2024-05-06 03:34:09,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:09,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:09,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:34:09,870 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:34:09,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:34:10,076 INFO L85 PathProgramCache]: Analyzing trace with hash -552034162, now seen corresponding path program 2 times [2024-05-06 03:34:10,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:10,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:10,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:10,172 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:10,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:10,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:10,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:10,270 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:10,436 INFO L85 PathProgramCache]: Analyzing trace with hash -204582265, now seen corresponding path program 1 times [2024-05-06 03:34:10,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:10,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:10,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:10,519 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:10,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:10,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:10,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:10,700 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:10,776 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:34:10,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:34:14,902 INFO L85 PathProgramCache]: Analyzing trace with hash 1134984328, now seen corresponding path program 1 times [2024-05-06 03:34:14,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:14,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:14,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:34:14,922 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:34:14,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:34:15,171 INFO L85 PathProgramCache]: Analyzing trace with hash -201719395, now seen corresponding path program 2 times [2024-05-06 03:34:15,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:15,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:15,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:15,267 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:15,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:15,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:15,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:15,354 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:15,473 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:34:15,473 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:34:15,473 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-06 03:34:15,474 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 03:34:15,474 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-06 03:34:15,474 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-06 03:34:15,482 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-05-06 03:34:15,680 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,SelfDestructingSolverStorable31,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable32,SelfDestructingSolverStorable33,SelfDestructingSolverStorable34,SelfDestructingSolverStorable9,SelfDestructingSolverStorable35,SelfDestructingSolverStorable36,SelfDestructingSolverStorable37,SelfDestructingSolverStorable38,SelfDestructingSolverStorable39,SelfDestructingSolverStorable40,SelfDestructingSolverStorable41,SelfDestructingSolverStorable42,SelfDestructingSolverStorable43,SelfDestructingSolverStorable44,SelfDestructingSolverStorable45,SelfDestructingSolverStorable46,SelfDestructingSolverStorable47,SelfDestructingSolverStorable133,SelfDestructingSolverStorable48,SelfDestructingSolverStorable49,SelfDestructingSolverStorable90,SelfDestructingSolverStorable91,SelfDestructingSolverStorable92,SelfDestructingSolverStorable93,SelfDestructingSolverStorable94,SelfDestructingSolverStorable95,SelfDestructingSolverStorable96,SelfDestructingSolverStorable97,SelfDestructingSolverStorable18,SelfDestructingSolverStorable19,SelfDestructingSolverStorable10,SelfDestructingSolverStorable98,SelfDestructingSolverStorable11,SelfDestructingSolverStorable99,SelfDestructingSolverStorable12,SelfDestructingSolverStorable13,SelfDestructingSolverStorable14,SelfDestructingSolverStorable15,SelfDestructingSolverStorable16,SelfDestructingSolverStorable17,SelfDestructingSolverStorable20,SelfDestructingSolverStorable29,SelfDestructingSolverStorable21,SelfDestructingSolverStorable22,SelfDestructingSolverStorable23,SelfDestructingSolverStorable24,SelfDestructingSolverStorable25,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28,SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable110,SelfDestructingSolverStorable72,SelfDestructingSolverStorable73,SelfDestructingSolverStorable74,SelfDestructingSolverStorable75,SelfDestructingSolverStorable108,SelfDestructingSolverStorable109,SelfDestructingSolverStorable76,SelfDestructingSolverStorable104,SelfDestructingSolverStorable77,SelfDestructingSolverStorable105,SelfDestructingSolverStorable78,SelfDestructingSolverStorable106,SelfDestructingSolverStorable79,SelfDestructingSolverStorable107,SelfDestructingSolverStorable100,SelfDestructingSolverStorable101,SelfDestructingSolverStorable102,SelfDestructingSolverStorable103,SelfDestructingSolverStorable80,SelfDestructingSolverStorable81,SelfDestructingSolverStorable82,SelfDestructingSolverStorable83,SelfDestructingSolverStorable84,SelfDestructingSolverStorable85,SelfDestructingSolverStorable86,SelfDestructingSolverStorable87,SelfDestructingSolverStorable88,SelfDestructingSolverStorable89,SelfDestructingSolverStorable130,SelfDestructingSolverStorable131,SelfDestructingSolverStorable132,SelfDestructingSolverStorable50,SelfDestructingSolverStorable51,SelfDestructingSolverStorable52,SelfDestructingSolverStorable53,SelfDestructingSolverStorable54,SelfDestructingSolverStorable126,SelfDestructingSolverStorable55,SelfDestructingSolverStorable127,SelfDestructingSolverStorable56,SelfDestructingSolverStorable128,SelfDestructingSolverStorable57,SelfDestructingSolverStorable129,SelfDestructingSolverStorable58,SelfDestructingSolverStorable122,SelfDestructingSolverStorable59,SelfDestructingSolverStorable123,SelfDestructingSolverStorable124,SelfDestructingSolverStorable125,SelfDestructingSolverStorable120,SelfDestructingSolverStorable60,SelfDestructingSolverStorable121,SelfDestructingSolverStorable61,SelfDestructingSolverStorable62,SelfDestructingSolverStorable63,SelfDestructingSolverStorable64,SelfDestructingSolverStorable119,SelfDestructingSolverStorable65,SelfDestructingSolverStorable115,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable66,SelfDestructingSolverStorable116,SelfDestructingSolverStorable67,SelfDestructingSolverStorable117,SelfDestructingSolverStorable68,SelfDestructingSolverStorable118,SelfDestructingSolverStorable69,SelfDestructingSolverStorable111,SelfDestructingSolverStorable112,SelfDestructingSolverStorable113,SelfDestructingSolverStorable114 [2024-05-06 03:34:15,681 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [thread1Err3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thread1Err4INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2024-05-06 03:34:15,681 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:34:15,681 INFO L85 PathProgramCache]: Analyzing trace with hash -1759160020, now seen corresponding path program 1 times [2024-05-06 03:34:15,681 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:34:15,681 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [766597904] [2024-05-06 03:34:15,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:15,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:15,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:15,819 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:15,819 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:34:15,819 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [766597904] [2024-05-06 03:34:15,819 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [766597904] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 03:34:15,819 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1070263611] [2024-05-06 03:34:15,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:15,819 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 03:34:15,819 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:34:15,820 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 03:34:15,840 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-05-06 03:34:16,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:16,148 INFO L262 TraceCheckSpWp]: Trace formula consists of 546 conjuncts, 8 conjunts are in the unsatisfiable core [2024-05-06 03:34:16,150 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 03:34:16,347 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:16,347 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 03:34:16,554 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:16,554 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1070263611] provided 1 perfect and 1 imperfect interpolant sequences [2024-05-06 03:34:16,554 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-05-06 03:34:16,554 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [9, 9] total 19 [2024-05-06 03:34:16,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293381965] [2024-05-06 03:34:16,554 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 03:34:16,555 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-05-06 03:34:16,555 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:34:16,555 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-05-06 03:34:16,555 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=262, Unknown=0, NotChecked=0, Total=342 [2024-05-06 03:34:16,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:34:16,556 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:34:16,556 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 23.77777777777778) internal successors, (214), 9 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:34:16,556 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:34:16,556 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:34:16,556 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-06 03:34:16,556 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 03:34:16,556 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-06 03:34:16,556 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-06 03:34:16,556 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:34:16,996 INFO L85 PathProgramCache]: Analyzing trace with hash -2039049466, now seen corresponding path program 4 times [2024-05-06 03:34:16,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:16,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:17,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:17,117 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:17,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:17,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:17,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:17,225 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:17,301 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:34:17,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:34:25,412 INFO L85 PathProgramCache]: Analyzing trace with hash 1074974919, now seen corresponding path program 5 times [2024-05-06 03:34:25,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:25,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:25,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:25,509 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:25,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:25,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:25,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:25,609 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:25,779 INFO L85 PathProgramCache]: Analyzing trace with hash -2036186596, now seen corresponding path program 6 times [2024-05-06 03:34:25,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:25,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:25,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:25,889 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:25,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:25,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:25,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:26,062 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:26,231 INFO L85 PathProgramCache]: Analyzing trace with hash -1372075420, now seen corresponding path program 3 times [2024-05-06 03:34:26,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:26,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:26,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:26,328 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:26,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:26,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:26,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:26,426 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:26,532 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:34:26,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:34:28,620 INFO L85 PathProgramCache]: Analyzing trace with hash -72954257, now seen corresponding path program 2 times [2024-05-06 03:34:28,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:28,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:28,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:34:28,638 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:34:28,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:34:28,829 INFO L85 PathProgramCache]: Analyzing trace with hash -1389529990, now seen corresponding path program 4 times [2024-05-06 03:34:28,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:28,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:28,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:28,924 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:28,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:28,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:28,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:29,072 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:29,275 INFO L85 PathProgramCache]: Analyzing trace with hash -2115519717, now seen corresponding path program 3 times [2024-05-06 03:34:29,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:29,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:29,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:29,369 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:29,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:29,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:29,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:29,459 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:29,519 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:34:29,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:34:31,593 INFO L85 PathProgramCache]: Analyzing trace with hash -127337956, now seen corresponding path program 2 times [2024-05-06 03:34:31,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:31,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:31,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:34:31,609 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:34:31,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:34:31,852 INFO L85 PathProgramCache]: Analyzing trace with hash -2112656847, now seen corresponding path program 4 times [2024-05-06 03:34:31,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:31,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:31,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:31,939 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:31,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:31,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:31,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:32,025 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:32,290 INFO L85 PathProgramCache]: Analyzing trace with hash -82178914, now seen corresponding path program 4 times [2024-05-06 03:34:32,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:32,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:32,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:32,396 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:32,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:32,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:32,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:32,501 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:32,559 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:34:32,560 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:34:38,796 INFO L85 PathProgramCache]: Analyzing trace with hash -1711812513, now seen corresponding path program 5 times [2024-05-06 03:34:38,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:38,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:38,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:38,891 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:38,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:38,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:38,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:38,989 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:39,181 INFO L85 PathProgramCache]: Analyzing trace with hash -79316044, now seen corresponding path program 6 times [2024-05-06 03:34:39,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:39,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:39,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:39,301 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:39,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:39,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:39,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:39,473 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:39,654 INFO L85 PathProgramCache]: Analyzing trace with hash -1710968372, now seen corresponding path program 3 times [2024-05-06 03:34:39,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:39,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:39,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:39,749 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:39,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:39,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:39,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:39,853 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:39,959 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:34:39,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:34:42,033 INFO L85 PathProgramCache]: Analyzing trace with hash 1960210391, now seen corresponding path program 2 times [2024-05-06 03:34:42,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:42,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:42,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:34:42,050 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:34:42,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:34:42,245 INFO L85 PathProgramCache]: Analyzing trace with hash -1728422942, now seen corresponding path program 4 times [2024-05-06 03:34:42,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:42,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:42,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:42,339 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:42,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:42,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:42,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:42,496 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:42,678 INFO L85 PathProgramCache]: Analyzing trace with hash -1758342477, now seen corresponding path program 3 times [2024-05-06 03:34:42,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:42,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:42,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:42,761 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:42,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:42,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:42,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:42,844 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:42,891 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:34:42,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:34:49,024 INFO L85 PathProgramCache]: Analyzing trace with hash -2012997708, now seen corresponding path program 2 times [2024-05-06 03:34:49,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:49,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:49,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:34:49,040 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:34:49,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:34:49,259 INFO L85 PathProgramCache]: Analyzing trace with hash -1755479607, now seen corresponding path program 4 times [2024-05-06 03:34:49,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:49,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:49,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:49,347 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:49,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:49,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:49,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:49,434 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:49,731 INFO L85 PathProgramCache]: Analyzing trace with hash -1570315739, now seen corresponding path program 4 times [2024-05-06 03:34:49,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:49,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:49,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:49,836 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:49,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:49,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:49,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:49,942 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:50,020 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:34:50,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:34:52,108 INFO L85 PathProgramCache]: Analyzing trace with hash -1480959066, now seen corresponding path program 5 times [2024-05-06 03:34:52,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:52,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:52,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:52,202 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:52,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:52,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:52,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:52,294 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:52,465 INFO L85 PathProgramCache]: Analyzing trace with hash -1567452869, now seen corresponding path program 6 times [2024-05-06 03:34:52,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:52,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:52,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:52,590 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:52,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:52,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:52,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:52,769 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:52,958 INFO L85 PathProgramCache]: Analyzing trace with hash 894190565, now seen corresponding path program 3 times [2024-05-06 03:34:52,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:52,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:52,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:53,057 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:53,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:34:53,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:34:53,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:34:53,156 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:34:53,261 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:34:53,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:35:00,565 INFO L85 PathProgramCache]: Analyzing trace with hash -186797008, now seen corresponding path program 2 times [2024-05-06 03:35:00,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:00,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:00,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:00,582 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:35:00,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:00,788 INFO L85 PathProgramCache]: Analyzing trace with hash 876735995, now seen corresponding path program 4 times [2024-05-06 03:35:00,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:00,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:00,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:00,882 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:00,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:00,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:00,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:01,078 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:01,283 INFO L85 PathProgramCache]: Analyzing trace with hash 1658557690, now seen corresponding path program 3 times [2024-05-06 03:35:01,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:01,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:01,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:01,371 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:01,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:01,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:01,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:01,456 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:01,528 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:35:01,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:35:07,661 INFO L85 PathProgramCache]: Analyzing trace with hash 33013691, now seen corresponding path program 2 times [2024-05-06 03:35:07,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:07,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:07,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:07,678 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:35:07,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:07,935 INFO L85 PathProgramCache]: Analyzing trace with hash 1661420560, now seen corresponding path program 4 times [2024-05-06 03:35:07,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:07,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:07,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:08,024 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:08,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:08,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:08,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:08,117 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:08,349 INFO L85 PathProgramCache]: Analyzing trace with hash 294101469, now seen corresponding path program 4 times [2024-05-06 03:35:08,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:08,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:08,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:08,545 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:08,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:08,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:08,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:08,651 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:08,715 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:35:08,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:35:12,795 INFO L85 PathProgramCache]: Analyzing trace with hash 1895278942, now seen corresponding path program 5 times [2024-05-06 03:35:12,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:12,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:12,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:12,888 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:12,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:12,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:12,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:12,983 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:13,139 INFO L85 PathProgramCache]: Analyzing trace with hash 296964339, now seen corresponding path program 6 times [2024-05-06 03:35:13,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:13,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:13,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:13,247 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:13,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:13,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:13,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:13,447 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:13,660 INFO L85 PathProgramCache]: Analyzing trace with hash -1531932371, now seen corresponding path program 3 times [2024-05-06 03:35:13,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:13,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:13,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:13,776 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:13,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:13,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:13,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:13,874 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:13,986 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:35:13,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:35:20,096 INFO L85 PathProgramCache]: Analyzing trace with hash 302297976, now seen corresponding path program 2 times [2024-05-06 03:35:20,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:20,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:20,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:20,117 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:35:20,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:20,315 INFO L85 PathProgramCache]: Analyzing trace with hash -1549386941, now seen corresponding path program 4 times [2024-05-06 03:35:20,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:20,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:20,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:20,415 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:20,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:20,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:20,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:20,618 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:20,834 INFO L85 PathProgramCache]: Analyzing trace with hash -1891755342, now seen corresponding path program 3 times [2024-05-06 03:35:20,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:20,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:20,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:20,922 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:20,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:20,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:20,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:21,011 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:21,083 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:35:21,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:35:25,244 INFO L85 PathProgramCache]: Analyzing trace with hash 1513116531, now seen corresponding path program 2 times [2024-05-06 03:35:25,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:25,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:25,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:25,260 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:35:25,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:25,514 INFO L85 PathProgramCache]: Analyzing trace with hash -1888892472, now seen corresponding path program 4 times [2024-05-06 03:35:25,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:25,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:25,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:25,606 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:25,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:25,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:25,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:25,693 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:25,971 INFO L85 PathProgramCache]: Analyzing trace with hash -1614774959, now seen corresponding path program 4 times [2024-05-06 03:35:25,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:25,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:25,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:26,083 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:26,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:26,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:26,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:26,197 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:26,264 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:35:26,265 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:35:28,358 INFO L85 PathProgramCache]: Analyzing trace with hash -220671534, now seen corresponding path program 5 times [2024-05-06 03:35:28,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:28,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:28,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:28,456 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:28,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:28,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:28,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:28,565 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:28,761 INFO L85 PathProgramCache]: Analyzing trace with hash -1611912089, now seen corresponding path program 6 times [2024-05-06 03:35:28,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:28,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:28,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:28,874 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:28,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:28,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:28,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:29,057 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:29,229 INFO L85 PathProgramCache]: Analyzing trace with hash -1819189959, now seen corresponding path program 3 times [2024-05-06 03:35:29,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:29,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:29,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:29,325 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:29,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:29,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:29,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:29,422 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:29,531 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:35:29,531 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:35:35,622 INFO L85 PathProgramCache]: Analyzing trace with hash 780210820, now seen corresponding path program 2 times [2024-05-06 03:35:35,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:35,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:35,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:35,640 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:35:35,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:35,845 INFO L85 PathProgramCache]: Analyzing trace with hash -1836644529, now seen corresponding path program 4 times [2024-05-06 03:35:35,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:35,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:35,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:35,948 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:35,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:35,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:35,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:36,105 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:36,301 INFO L85 PathProgramCache]: Analyzing trace with hash 750319398, now seen corresponding path program 3 times [2024-05-06 03:35:36,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:36,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:36,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:36,391 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:36,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:36,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:36,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:36,479 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:36,557 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:35:36,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:35:44,735 INFO L85 PathProgramCache]: Analyzing trace with hash 635419879, now seen corresponding path program 2 times [2024-05-06 03:35:44,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:44,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:44,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:44,754 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:35:44,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:45,014 INFO L85 PathProgramCache]: Analyzing trace with hash 753182268, now seen corresponding path program 4 times [2024-05-06 03:35:45,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:45,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:45,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:45,102 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:45,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:45,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:45,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:45,191 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:45,476 INFO L85 PathProgramCache]: Analyzing trace with hash -1592513293, now seen corresponding path program 4 times [2024-05-06 03:35:45,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:45,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:45,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:45,583 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:45,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:45,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:45,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:45,690 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:45,754 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:35:45,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:35:53,048 INFO L85 PathProgramCache]: Analyzing trace with hash -1892154892, now seen corresponding path program 5 times [2024-05-06 03:35:53,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:53,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:53,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:53,147 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:53,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:53,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:53,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:53,244 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:53,431 INFO L85 PathProgramCache]: Analyzing trace with hash -1589650423, now seen corresponding path program 6 times [2024-05-06 03:35:53,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:53,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:53,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:53,609 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:53,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:53,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:53,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:53,716 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:53,905 INFO L85 PathProgramCache]: Analyzing trace with hash -1032654761, now seen corresponding path program 3 times [2024-05-06 03:35:53,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:53,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:53,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:54,004 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:54,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:54,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:54,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:54,104 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:54,231 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:35:54,231 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:35:56,309 INFO L85 PathProgramCache]: Analyzing trace with hash -1337404126, now seen corresponding path program 2 times [2024-05-06 03:35:56,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:56,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:56,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:56,328 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:35:56,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:35:56,541 INFO L85 PathProgramCache]: Analyzing trace with hash -1050109331, now seen corresponding path program 4 times [2024-05-06 03:35:56,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:56,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:56,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:56,639 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:56,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:56,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:56,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:56,817 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:57,031 INFO L85 PathProgramCache]: Analyzing trace with hash 412313928, now seen corresponding path program 3 times [2024-05-06 03:35:57,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:57,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:57,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:57,121 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:57,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:35:57,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:35:57,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:35:57,209 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:35:57,282 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:35:57,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:36:03,415 INFO L85 PathProgramCache]: Analyzing trace with hash -325824631, now seen corresponding path program 2 times [2024-05-06 03:36:03,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:03,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:03,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:36:03,432 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:36:03,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:36:03,682 INFO L85 PathProgramCache]: Analyzing trace with hash 415176798, now seen corresponding path program 4 times [2024-05-06 03:36:03,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:03,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:03,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:03,769 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:03,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:03,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:03,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:03,856 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:04,184 INFO L85 PathProgramCache]: Analyzing trace with hash 1429005104, now seen corresponding path program 4 times [2024-05-06 03:36:04,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:04,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:04,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:04,291 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:04,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:04,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:04,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:04,398 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:04,465 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:36:04,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:36:06,540 INFO L85 PathProgramCache]: Analyzing trace with hash 1838359409, now seen corresponding path program 5 times [2024-05-06 03:36:06,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:06,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:06,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:06,654 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:06,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:06,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:06,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:06,765 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:06,993 INFO L85 PathProgramCache]: Analyzing trace with hash 1431867974, now seen corresponding path program 6 times [2024-05-06 03:36:06,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:06,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:07,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:07,192 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:07,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:07,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:07,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:07,337 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:07,552 INFO L85 PathProgramCache]: Analyzing trace with hash 1747355642, now seen corresponding path program 3 times [2024-05-06 03:36:07,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:07,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:07,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:07,651 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:07,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:07,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:07,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:07,747 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:07,858 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:36:07,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:36:11,976 INFO L85 PathProgramCache]: Analyzing trace with hash -1540097659, now seen corresponding path program 2 times [2024-05-06 03:36:11,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:11,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:11,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:36:11,999 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:36:12,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:36:12,205 INFO L85 PathProgramCache]: Analyzing trace with hash 1729901072, now seen corresponding path program 4 times [2024-05-06 03:36:12,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:12,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:12,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:12,349 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:12,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:12,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:12,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:12,452 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:12,655 INFO L85 PathProgramCache]: Analyzing trace with hash -1873651771, now seen corresponding path program 3 times [2024-05-06 03:36:12,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:12,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:12,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:12,741 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:12,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:12,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:12,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:12,828 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:12,902 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:36:12,903 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:36:15,000 INFO L85 PathProgramCache]: Analyzing trace with hash 1195817286, now seen corresponding path program 2 times [2024-05-06 03:36:15,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:15,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:15,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:36:15,019 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:36:15,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:36:15,241 INFO L85 PathProgramCache]: Analyzing trace with hash -1870788901, now seen corresponding path program 4 times [2024-05-06 03:36:15,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:15,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:15,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:15,330 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:15,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:15,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:15,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:15,467 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:15,700 INFO L85 PathProgramCache]: Analyzing trace with hash 113759090, now seen corresponding path program 4 times [2024-05-06 03:36:15,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:15,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:15,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:15,808 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:15,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:15,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:15,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:15,915 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:15,982 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:36:15,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:36:24,192 INFO L85 PathProgramCache]: Analyzing trace with hash 1448164403, now seen corresponding path program 5 times [2024-05-06 03:36:24,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:24,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:24,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:24,335 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:24,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:24,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:24,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:24,442 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:24,617 INFO L85 PathProgramCache]: Analyzing trace with hash 116621960, now seen corresponding path program 6 times [2024-05-06 03:36:24,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:24,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:24,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:24,798 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:24,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:24,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:24,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:24,912 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:25,124 INFO L85 PathProgramCache]: Analyzing trace with hash -534579592, now seen corresponding path program 3 times [2024-05-06 03:36:25,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:25,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:25,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:25,222 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:25,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:25,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:25,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:25,319 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:25,438 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:36:25,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:36:37,591 INFO L85 PathProgramCache]: Analyzing trace with hash -1126830205, now seen corresponding path program 2 times [2024-05-06 03:36:37,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:37,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:37,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:36:37,609 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:36:37,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:36:37,824 INFO L85 PathProgramCache]: Analyzing trace with hash -552034162, now seen corresponding path program 4 times [2024-05-06 03:36:37,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:37,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:37,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:37,973 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:37,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:37,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:37,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:38,083 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:38,288 INFO L85 PathProgramCache]: Analyzing trace with hash -204582265, now seen corresponding path program 3 times [2024-05-06 03:36:38,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:38,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:38,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:38,377 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:38,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:38,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:38,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:38,468 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:38,545 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 03:36:38,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 3 [2024-05-06 03:36:46,979 INFO L85 PathProgramCache]: Analyzing trace with hash 1134984328, now seen corresponding path program 2 times [2024-05-06 03:36:46,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:46,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:46,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:36:46,995 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:36:47,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:36:47,230 INFO L85 PathProgramCache]: Analyzing trace with hash -201719395, now seen corresponding path program 4 times [2024-05-06 03:36:47,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:47,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:47,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:47,316 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:47,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:47,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:47,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:47,489 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:47,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:36:47,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:36:47,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-06 03:36:47,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 03:36:47,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-06 03:36:47,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-06 03:36:47,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-06 03:36:47,543 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-05-06 03:36:47,745 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable151,SelfDestructingSolverStorable152,SelfDestructingSolverStorable153,SelfDestructingSolverStorable154,SelfDestructingSolverStorable150,SelfDestructingSolverStorable148,SelfDestructingSolverStorable149,SelfDestructingSolverStorable144,SelfDestructingSolverStorable145,SelfDestructingSolverStorable146,SelfDestructingSolverStorable147,SelfDestructingSolverStorable140,SelfDestructingSolverStorable261,SelfDestructingSolverStorable141,SelfDestructingSolverStorable262,SelfDestructingSolverStorable142,SelfDestructingSolverStorable143,SelfDestructingSolverStorable260,SelfDestructingSolverStorable137,SelfDestructingSolverStorable258,SelfDestructingSolverStorable138,SelfDestructingSolverStorable259,SelfDestructingSolverStorable139,SelfDestructingSolverStorable254,SelfDestructingSolverStorable134,SelfDestructingSolverStorable255,SelfDestructingSolverStorable135,SelfDestructingSolverStorable256,SelfDestructingSolverStorable136,SelfDestructingSolverStorable257,SelfDestructingSolverStorable173,SelfDestructingSolverStorable174,SelfDestructingSolverStorable175,SelfDestructingSolverStorable176,SelfDestructingSolverStorable170,SelfDestructingSolverStorable171,SelfDestructingSolverStorable172,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable207,SelfDestructingSolverStorable208,SelfDestructingSolverStorable209,SelfDestructingSolverStorable203,SelfDestructingSolverStorable204,SelfDestructingSolverStorable205,SelfDestructingSolverStorable206,SelfDestructingSolverStorable166,SelfDestructingSolverStorable167,SelfDestructingSolverStorable200,SelfDestructingSolverStorable168,SelfDestructingSolverStorable201,SelfDestructingSolverStorable169,SelfDestructingSolverStorable202,SelfDestructingSolverStorable162,SelfDestructingSolverStorable163,SelfDestructingSolverStorable164,SelfDestructingSolverStorable165,SelfDestructingSolverStorable160,SelfDestructingSolverStorable161,SelfDestructingSolverStorable159,SelfDestructingSolverStorable155,SelfDestructingSolverStorable156,SelfDestructingSolverStorable157,SelfDestructingSolverStorable158,SelfDestructingSolverStorable195,SelfDestructingSolverStorable196,SelfDestructingSolverStorable197,SelfDestructingSolverStorable230,SelfDestructingSolverStorable198,SelfDestructingSolverStorable231,SelfDestructingSolverStorable191,SelfDestructingSolverStorable192,SelfDestructingSolverStorable193,SelfDestructingSolverStorable194,SelfDestructingSolverStorable190,SelfDestructingSolverStorable229,SelfDestructingSolverStorable225,SelfDestructingSolverStorable226,SelfDestructingSolverStorable227,SelfDestructingSolverStorable228,SelfDestructingSolverStorable188,SelfDestructingSolverStorable221,SelfDestructingSolverStorable189,SelfDestructingSolverStorable222,SelfDestructingSolverStorable223,SelfDestructingSolverStorable224,SelfDestructingSolverStorable184,SelfDestructingSolverStorable185,SelfDestructingSolverStorable186,SelfDestructingSolverStorable187,SelfDestructingSolverStorable220,SelfDestructingSolverStorable180,SelfDestructingSolverStorable181,SelfDestructingSolverStorable182,SelfDestructingSolverStorable183,SelfDestructingSolverStorable218,SelfDestructingSolverStorable219,SelfDestructingSolverStorable214,SelfDestructingSolverStorable215,SelfDestructingSolverStorable216,SelfDestructingSolverStorable217,SelfDestructingSolverStorable177,SelfDestructingSolverStorable210,SelfDestructingSolverStorable178,SelfDestructingSolverStorable211,SelfDestructingSolverStorable179,SelfDestructingSolverStorable212,SelfDestructingSolverStorable213,SelfDestructingSolverStorable250,SelfDestructingSolverStorable251,SelfDestructingSolverStorable252,SelfDestructingSolverStorable253,SelfDestructingSolverStorable247,SelfDestructingSolverStorable248,SelfDestructingSolverStorable249,SelfDestructingSolverStorable243,SelfDestructingSolverStorable244,SelfDestructingSolverStorable245,SelfDestructingSolverStorable246,SelfDestructingSolverStorable240,SelfDestructingSolverStorable241,SelfDestructingSolverStorable242,SelfDestructingSolverStorable236,SelfDestructingSolverStorable237,SelfDestructingSolverStorable238,SelfDestructingSolverStorable239,SelfDestructingSolverStorable199,SelfDestructingSolverStorable232,SelfDestructingSolverStorable233,SelfDestructingSolverStorable234,SelfDestructingSolverStorable235 [2024-05-06 03:36:47,745 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [thread1Err3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thread1Err4INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2024-05-06 03:36:47,745 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:36:47,745 INFO L85 PathProgramCache]: Analyzing trace with hash -1960805410, now seen corresponding path program 1 times [2024-05-06 03:36:47,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:36:47,745 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910868946] [2024-05-06 03:36:47,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:47,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:36:47,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:48,327 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:36:48,328 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:36:48,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910868946] [2024-05-06 03:36:48,328 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [910868946] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 03:36:48,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2011888421] [2024-05-06 03:36:48,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:36:48,328 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 03:36:48,328 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:36:48,329 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 03:36:48,379 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-05-06 03:36:48,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:36:48,871 INFO L262 TraceCheckSpWp]: Trace formula consists of 562 conjuncts, 64 conjunts are in the unsatisfiable core [2024-05-06 03:36:48,876 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 03:36:49,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-05-06 03:36:49,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 03:36:49,578 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 03:36:49,649 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 03:36:49,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 03:36:49,984 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 03:36:50,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-05-06 03:36:50,265 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2024-05-06 03:36:50,316 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:36:50,316 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 03:37:47,349 WARN L854 $PredicateComparison]: unable to prove that (forall ((|v_thread4Thread1of1ForFork4_~#t5~0.base_23| Int)) (let ((.cse0 (+ |c_#StackHeapBarrier| 1))) (or (< |v_thread4Thread1of1ForFork4_~#t5~0.base_23| .cse0) (forall ((|v_thread4Thread1of1ForFork4_~#t6~0.base_23| Int)) (or (forall ((v_ArrVal_8074 (Array Int Int)) (v_ArrVal_8075 (Array Int Int)) (v_ArrVal_8076 (Array Int Int))) (let ((.cse1 (select (store (store (store |c_#memory_int| |v_thread4Thread1of1ForFork4_~#t5~0.base_23| v_ArrVal_8074) |c_thread1Thread1of1ForFork1_~#t3~0.base| v_ArrVal_8075) |v_thread4Thread1of1ForFork4_~#t6~0.base_23| v_ArrVal_8076) c_~X_0~0.base))) (= (+ (select .cse1 (+ c_~X_0~0.offset 4 (* 4 c_~i_3~0))) c_~s_2~0) (select .cse1 (+ c_~X_0~0.offset 4))))) (< |v_thread4Thread1of1ForFork4_~#t6~0.base_23| .cse0)))))) is different from false [2024-05-06 03:37:49,382 WARN L854 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_8073 (Array Int Int)) (v_ArrVal_8074 (Array Int Int)) (|v_thread4Thread1of1ForFork4_~#t5~0.base_23| Int) (v_ArrVal_8075 (Array Int Int)) (|v_thread4Thread1of1ForFork4_~#t6~0.base_23| Int) (v_ArrVal_8076 (Array Int Int))) (let ((.cse0 (+ |c_#StackHeapBarrier| 1))) (or (< |v_thread4Thread1of1ForFork4_~#t5~0.base_23| .cse0) (let ((.cse1 (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#t4~0#1.base| v_ArrVal_8073) |v_thread4Thread1of1ForFork4_~#t5~0.base_23| v_ArrVal_8074) |c_thread1Thread1of1ForFork1_~#t3~0.base| v_ArrVal_8075) |v_thread4Thread1of1ForFork4_~#t6~0.base_23| v_ArrVal_8076) c_~X_0~0.base))) (= (+ (select .cse1 (+ c_~X_0~0.offset 4 (* 4 c_~i_3~0))) c_~s_2~0) (select .cse1 (+ c_~X_0~0.offset 4)))) (< |v_thread4Thread1of1ForFork4_~#t6~0.base_23| .cse0)))) is different from false [2024-05-06 03:37:51,471 WARN L854 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_8073 (Array Int Int)) (v_ArrVal_8074 (Array Int Int)) (v_ArrVal_8072 (Array Int Int)) (|v_thread4Thread1of1ForFork4_~#t5~0.base_23| Int) (v_ArrVal_8075 (Array Int Int)) (|v_thread4Thread1of1ForFork4_~#t6~0.base_23| Int) (v_ArrVal_8076 (Array Int Int))) (let ((.cse0 (+ |c_#StackHeapBarrier| 1))) (or (< |v_thread4Thread1of1ForFork4_~#t5~0.base_23| .cse0) (let ((.cse1 (select (store (store (store (store (store |c_#memory_int| |c_thread1Thread1of1ForFork1_~#t2~0.base| v_ArrVal_8072) |c_ULTIMATE.start_main_~#t4~0#1.base| v_ArrVal_8073) |v_thread4Thread1of1ForFork4_~#t5~0.base_23| v_ArrVal_8074) |c_thread1Thread1of1ForFork1_~#t3~0.base| v_ArrVal_8075) |v_thread4Thread1of1ForFork4_~#t6~0.base_23| v_ArrVal_8076) c_~X_0~0.base))) (= (select .cse1 (+ c_~X_0~0.offset 4)) (+ (select .cse1 (+ c_~X_0~0.offset 4 (* 4 c_~i_3~0))) c_~s_2~0))) (< |v_thread4Thread1of1ForFork4_~#t6~0.base_23| .cse0)))) is different from false [2024-05-06 03:37:51,497 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:37:51,497 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2011888421] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 03:37:51,497 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 03:37:51,497 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 30, 17] total 51 [2024-05-06 03:37:51,497 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1069776784] [2024-05-06 03:37:51,497 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 03:37:51,498 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 51 states [2024-05-06 03:37:51,498 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:37:51,499 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2024-05-06 03:37:51,500 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=200, Invalid=2018, Unknown=50, NotChecked=282, Total=2550 [2024-05-06 03:37:51,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:37:51,500 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:37:51,500 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 51 states, 51 states have (on average 8.980392156862745) internal successors, (458), 51 states have internal predecessors, (458), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:37:51,500 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:37:51,500 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:37:51,500 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-06 03:37:51,500 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 03:37:51,500 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-06 03:37:51,500 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-06 03:37:51,500 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-06 03:37:51,500 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:38:24,245 INFO L85 PathProgramCache]: Analyzing trace with hash -2039049466, now seen corresponding path program 7 times [2024-05-06 03:38:24,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:24,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:24,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:24,407 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:24,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:24,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:24,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:24,533 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:24,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:38:29,180 INFO L85 PathProgramCache]: Analyzing trace with hash 1074974919, now seen corresponding path program 8 times [2024-05-06 03:38:29,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:29,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:29,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:29,289 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:29,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:29,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:29,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:29,438 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:30,290 INFO L85 PathProgramCache]: Analyzing trace with hash -2036186596, now seen corresponding path program 9 times [2024-05-06 03:38:30,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:30,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:30,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:30,400 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:30,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:30,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:30,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:30,510 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:31,290 INFO L85 PathProgramCache]: Analyzing trace with hash -1372075420, now seen corresponding path program 5 times [2024-05-06 03:38:31,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:31,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:31,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:31,448 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:31,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:31,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:31,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:31,547 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:31,876 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:38:36,216 INFO L85 PathProgramCache]: Analyzing trace with hash -72954257, now seen corresponding path program 3 times [2024-05-06 03:38:36,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:36,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:36,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:38:36,233 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:38:36,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:38:37,042 INFO L85 PathProgramCache]: Analyzing trace with hash -1389529990, now seen corresponding path program 6 times [2024-05-06 03:38:37,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:37,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:37,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:37,180 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:37,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:37,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:37,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:37,313 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:38,356 INFO L85 PathProgramCache]: Analyzing trace with hash -2115519717, now seen corresponding path program 5 times [2024-05-06 03:38:38,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:38,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:38,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:38,486 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:38,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:38,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:38,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:38,580 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:39,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2024-05-06 03:38:43,141 INFO L85 PathProgramCache]: Analyzing trace with hash -127337956, now seen corresponding path program 3 times [2024-05-06 03:38:43,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:43,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:43,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:38:43,162 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:38:43,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:38:44,344 INFO L85 PathProgramCache]: Analyzing trace with hash -2112656847, now seen corresponding path program 6 times [2024-05-06 03:38:44,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:44,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:44,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:44,439 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:44,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:44,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:44,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:44,554 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:45,484 INFO L85 PathProgramCache]: Analyzing trace with hash -82178914, now seen corresponding path program 7 times [2024-05-06 03:38:45,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:45,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:45,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:45,592 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:45,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:45,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:45,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:45,748 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:45,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:38:50,442 INFO L85 PathProgramCache]: Analyzing trace with hash -1711812513, now seen corresponding path program 8 times [2024-05-06 03:38:50,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:50,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:50,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:50,538 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:50,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:50,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:50,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:50,629 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:51,429 INFO L85 PathProgramCache]: Analyzing trace with hash -79316044, now seen corresponding path program 9 times [2024-05-06 03:38:51,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:51,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:51,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:51,541 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:51,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:51,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:51,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:51,655 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:52,482 INFO L85 PathProgramCache]: Analyzing trace with hash -1710968372, now seen corresponding path program 5 times [2024-05-06 03:38:52,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:52,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:52,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:52,640 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:52,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:52,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:52,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:52,738 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:53,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:38:57,408 INFO L85 PathProgramCache]: Analyzing trace with hash 1960210391, now seen corresponding path program 3 times [2024-05-06 03:38:57,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:57,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:57,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:38:57,426 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:38:57,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:38:58,097 INFO L85 PathProgramCache]: Analyzing trace with hash -1728422942, now seen corresponding path program 6 times [2024-05-06 03:38:58,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:58,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:58,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:58,245 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:58,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:58,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:58,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:58,339 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:59,204 INFO L85 PathProgramCache]: Analyzing trace with hash -1758342477, now seen corresponding path program 5 times [2024-05-06 03:38:59,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:59,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:59,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:59,293 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:59,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:38:59,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:38:59,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:38:59,383 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:38:59,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2024-05-06 03:39:04,025 INFO L85 PathProgramCache]: Analyzing trace with hash -2012997708, now seen corresponding path program 3 times [2024-05-06 03:39:04,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:04,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:04,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:39:04,043 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:39:04,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:39:04,958 INFO L85 PathProgramCache]: Analyzing trace with hash -1755479607, now seen corresponding path program 6 times [2024-05-06 03:39:04,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:04,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:04,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:05,053 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:05,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:05,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:05,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:05,213 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:06,134 INFO L85 PathProgramCache]: Analyzing trace with hash -1570315739, now seen corresponding path program 7 times [2024-05-06 03:39:06,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:06,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:06,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:06,251 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:06,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:06,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:06,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:06,360 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:06,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:39:11,016 INFO L85 PathProgramCache]: Analyzing trace with hash -1480959066, now seen corresponding path program 8 times [2024-05-06 03:39:11,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:11,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:11,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:11,113 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:11,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:11,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:11,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:11,213 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:12,058 INFO L85 PathProgramCache]: Analyzing trace with hash -1567452869, now seen corresponding path program 9 times [2024-05-06 03:39:12,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:12,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:12,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:12,213 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:12,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:12,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:12,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:12,321 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:12,979 INFO L85 PathProgramCache]: Analyzing trace with hash 894190565, now seen corresponding path program 5 times [2024-05-06 03:39:12,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:12,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:12,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:13,083 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:13,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:13,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:13,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:13,183 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:13,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:39:17,894 INFO L85 PathProgramCache]: Analyzing trace with hash -186797008, now seen corresponding path program 3 times [2024-05-06 03:39:17,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:17,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:17,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:39:17,912 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:39:17,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:39:18,615 INFO L85 PathProgramCache]: Analyzing trace with hash 876735995, now seen corresponding path program 6 times [2024-05-06 03:39:18,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:18,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:18,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:18,711 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:18,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:18,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:18,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:18,853 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:19,908 INFO L85 PathProgramCache]: Analyzing trace with hash 1658557690, now seen corresponding path program 5 times [2024-05-06 03:39:19,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:19,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:19,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:19,995 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:19,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:19,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:20,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:20,084 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:20,518 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2024-05-06 03:39:24,768 INFO L85 PathProgramCache]: Analyzing trace with hash 33013691, now seen corresponding path program 3 times [2024-05-06 03:39:24,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:24,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:24,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:39:24,797 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:39:24,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:39:25,702 INFO L85 PathProgramCache]: Analyzing trace with hash 1661420560, now seen corresponding path program 6 times [2024-05-06 03:39:25,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:25,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:25,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:25,792 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:25,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:25,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:25,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:25,959 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:26,647 INFO L85 PathProgramCache]: Analyzing trace with hash 294101469, now seen corresponding path program 7 times [2024-05-06 03:39:26,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:26,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:26,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:26,749 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:26,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:26,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:26,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:26,849 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:27,008 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:39:35,346 INFO L85 PathProgramCache]: Analyzing trace with hash 1895278942, now seen corresponding path program 8 times [2024-05-06 03:39:35,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:35,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:35,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:35,441 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:35,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:35,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:35,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:35,535 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:36,349 INFO L85 PathProgramCache]: Analyzing trace with hash 296964339, now seen corresponding path program 9 times [2024-05-06 03:39:36,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:36,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:36,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:36,532 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:36,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:36,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:36,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:36,655 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:37,319 INFO L85 PathProgramCache]: Analyzing trace with hash -1531932371, now seen corresponding path program 5 times [2024-05-06 03:39:37,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:37,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:37,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:37,430 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:37,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:39:37,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:39:37,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:39:37,577 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:39:37,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:40:44,295 INFO L85 PathProgramCache]: Analyzing trace with hash 302297976, now seen corresponding path program 3 times [2024-05-06 03:40:44,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:40:44,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:40:44,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:40:44,314 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:40:44,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:40:44,967 INFO L85 PathProgramCache]: Analyzing trace with hash -1549386941, now seen corresponding path program 6 times [2024-05-06 03:40:44,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:40:44,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:40:44,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:40:45,136 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:40:45,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:40:45,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:40:45,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:40:45,235 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:40:45,956 INFO L85 PathProgramCache]: Analyzing trace with hash -1891755342, now seen corresponding path program 5 times [2024-05-06 03:40:45,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:40:45,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:40:45,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:40:46,042 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:40:46,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:40:46,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:40:46,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:40:46,171 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:40:46,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2024-05-06 03:40:50,670 INFO L85 PathProgramCache]: Analyzing trace with hash 1513116531, now seen corresponding path program 3 times [2024-05-06 03:40:50,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:40:50,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:40:50,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:40:50,687 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:40:50,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:40:53,541 INFO L85 PathProgramCache]: Analyzing trace with hash -1888892472, now seen corresponding path program 6 times [2024-05-06 03:40:53,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:40:53,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:40:53,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:40:53,665 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:40:53,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:40:53,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:40:53,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:40:53,752 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:40:54,517 INFO L85 PathProgramCache]: Analyzing trace with hash -1614774959, now seen corresponding path program 7 times [2024-05-06 03:40:54,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:40:54,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:40:54,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:40:54,644 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:40:54,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:40:54,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:40:54,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:40:54,831 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:40:54,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:40:59,338 INFO L85 PathProgramCache]: Analyzing trace with hash -220671534, now seen corresponding path program 8 times [2024-05-06 03:40:59,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:40:59,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:40:59,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:40:59,466 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:40:59,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:40:59,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:40:59,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:40:59,560 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:00,261 INFO L85 PathProgramCache]: Analyzing trace with hash -1611912089, now seen corresponding path program 9 times [2024-05-06 03:41:00,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:00,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:00,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:00,371 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:00,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:00,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:00,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:00,481 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:01,059 INFO L85 PathProgramCache]: Analyzing trace with hash -1819189959, now seen corresponding path program 5 times [2024-05-06 03:41:01,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:01,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:01,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:01,194 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:01,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:01,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:01,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:01,290 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:01,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:41:05,880 INFO L85 PathProgramCache]: Analyzing trace with hash 780210820, now seen corresponding path program 3 times [2024-05-06 03:41:05,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:05,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:05,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:41:05,917 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:41:05,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:41:06,625 INFO L85 PathProgramCache]: Analyzing trace with hash -1836644529, now seen corresponding path program 6 times [2024-05-06 03:41:06,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:06,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:06,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:06,729 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:06,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:06,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:06,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:06,831 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:07,716 INFO L85 PathProgramCache]: Analyzing trace with hash 750319398, now seen corresponding path program 5 times [2024-05-06 03:41:07,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:07,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:07,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:07,808 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:07,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:07,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:07,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:07,896 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:08,245 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2024-05-06 03:41:12,576 INFO L85 PathProgramCache]: Analyzing trace with hash 635419879, now seen corresponding path program 3 times [2024-05-06 03:41:12,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:12,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:12,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:41:12,594 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:41:12,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:41:13,415 INFO L85 PathProgramCache]: Analyzing trace with hash 753182268, now seen corresponding path program 6 times [2024-05-06 03:41:13,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:13,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:13,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:13,504 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:13,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:13,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:13,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:13,599 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:14,412 INFO L85 PathProgramCache]: Analyzing trace with hash -1592513293, now seen corresponding path program 7 times [2024-05-06 03:41:14,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:14,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:14,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:14,518 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:14,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:14,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:14,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:14,634 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:14,780 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:41:19,513 INFO L85 PathProgramCache]: Analyzing trace with hash -1892154892, now seen corresponding path program 8 times [2024-05-06 03:41:19,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:19,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:19,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:19,671 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:19,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:19,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:19,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:19,763 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:20,374 INFO L85 PathProgramCache]: Analyzing trace with hash -1589650423, now seen corresponding path program 9 times [2024-05-06 03:41:20,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:20,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:20,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:20,495 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:20,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:20,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:20,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:20,650 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:21,299 INFO L85 PathProgramCache]: Analyzing trace with hash -1032654761, now seen corresponding path program 5 times [2024-05-06 03:41:21,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:21,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:21,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:21,396 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:21,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:21,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:21,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:21,538 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:21,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:41:26,343 INFO L85 PathProgramCache]: Analyzing trace with hash -1337404126, now seen corresponding path program 3 times [2024-05-06 03:41:26,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:26,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:26,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:41:26,362 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:41:26,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:41:27,035 INFO L85 PathProgramCache]: Analyzing trace with hash -1050109331, now seen corresponding path program 6 times [2024-05-06 03:41:27,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:27,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:27,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:27,189 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:27,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:27,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:27,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:27,291 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:28,274 INFO L85 PathProgramCache]: Analyzing trace with hash 412313928, now seen corresponding path program 5 times [2024-05-06 03:41:28,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:28,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:28,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:28,425 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:28,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:28,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:28,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:28,518 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:28,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2024-05-06 03:41:33,053 INFO L85 PathProgramCache]: Analyzing trace with hash -325824631, now seen corresponding path program 3 times [2024-05-06 03:41:33,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:33,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:33,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:41:33,072 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:41:33,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:41:33,941 INFO L85 PathProgramCache]: Analyzing trace with hash 415176798, now seen corresponding path program 6 times [2024-05-06 03:41:33,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:33,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:33,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:34,033 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:34,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:34,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:34,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:34,119 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:34,944 INFO L85 PathProgramCache]: Analyzing trace with hash 1429005104, now seen corresponding path program 7 times [2024-05-06 03:41:34,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:34,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:34,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:35,048 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:35,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:35,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:35,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:35,153 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:35,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:41:42,193 INFO L85 PathProgramCache]: Analyzing trace with hash 1838359409, now seen corresponding path program 8 times [2024-05-06 03:41:42,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:42,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:42,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:42,301 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:42,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:42,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:42,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:42,410 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:43,181 INFO L85 PathProgramCache]: Analyzing trace with hash 1431867974, now seen corresponding path program 9 times [2024-05-06 03:41:43,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:43,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:43,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:43,292 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:43,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:43,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:43,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:43,400 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:44,071 INFO L85 PathProgramCache]: Analyzing trace with hash 1747355642, now seen corresponding path program 5 times [2024-05-06 03:41:44,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:44,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:44,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:44,167 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:44,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:44,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:44,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:44,261 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:44,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:41:48,809 INFO L85 PathProgramCache]: Analyzing trace with hash -1540097659, now seen corresponding path program 3 times [2024-05-06 03:41:48,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:48,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:48,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:41:48,828 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:41:48,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:41:49,459 INFO L85 PathProgramCache]: Analyzing trace with hash 1729901072, now seen corresponding path program 6 times [2024-05-06 03:41:49,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:49,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:49,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:49,558 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:49,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:49,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:49,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:49,651 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:51,686 INFO L85 PathProgramCache]: Analyzing trace with hash -1873651771, now seen corresponding path program 5 times [2024-05-06 03:41:51,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:51,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:51,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:51,778 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:51,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:51,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:51,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:51,881 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:52,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2024-05-06 03:41:56,454 INFO L85 PathProgramCache]: Analyzing trace with hash 1195817286, now seen corresponding path program 3 times [2024-05-06 03:41:56,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:56,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:56,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:41:56,472 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:41:56,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:41:57,834 INFO L85 PathProgramCache]: Analyzing trace with hash -1870788901, now seen corresponding path program 6 times [2024-05-06 03:41:57,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:57,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:57,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:57,920 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:57,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:57,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:57,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:58,068 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:58,938 INFO L85 PathProgramCache]: Analyzing trace with hash 113759090, now seen corresponding path program 7 times [2024-05-06 03:41:58,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:58,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:58,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:59,098 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:59,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:41:59,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:41:59,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:41:59,207 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:41:59,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:42:03,779 INFO L85 PathProgramCache]: Analyzing trace with hash 1448164403, now seen corresponding path program 8 times [2024-05-06 03:42:03,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:03,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:03,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:03,885 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:03,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:03,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:03,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:04,034 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:04,716 INFO L85 PathProgramCache]: Analyzing trace with hash 116621960, now seen corresponding path program 9 times [2024-05-06 03:42:04,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:04,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:04,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:04,822 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:04,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:04,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:04,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:04,965 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:05,755 INFO L85 PathProgramCache]: Analyzing trace with hash -534579592, now seen corresponding path program 5 times [2024-05-06 03:42:05,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:05,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:05,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:05,865 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:05,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:05,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:05,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:06,003 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:06,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:42:10,771 INFO L85 PathProgramCache]: Analyzing trace with hash -1126830205, now seen corresponding path program 3 times [2024-05-06 03:42:10,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:10,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:10,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:42:10,808 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:42:10,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:42:11,610 INFO L85 PathProgramCache]: Analyzing trace with hash -552034162, now seen corresponding path program 6 times [2024-05-06 03:42:11,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:11,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:11,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:11,708 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:11,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:11,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:11,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:11,804 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:13,075 INFO L85 PathProgramCache]: Analyzing trace with hash -204582265, now seen corresponding path program 5 times [2024-05-06 03:42:13,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:13,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:13,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:13,164 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:13,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:13,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:13,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:13,253 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:13,703 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2024-05-06 03:42:17,788 INFO L85 PathProgramCache]: Analyzing trace with hash 1134984328, now seen corresponding path program 3 times [2024-05-06 03:42:17,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:17,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:17,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:42:17,822 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:42:17,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:42:18,553 INFO L85 PathProgramCache]: Analyzing trace with hash -201719395, now seen corresponding path program 6 times [2024-05-06 03:42:18,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:18,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:18,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:18,717 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:18,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:18,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:18,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:18,854 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:21,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:42:21,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:42:21,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-06 03:42:21,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-06 03:42:21,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-06 03:42:21,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-06 03:42:21,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-06 03:42:21,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-05-06 03:42:21,941 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-05-06 03:42:22,140 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable272,SelfDestructingSolverStorable273,SelfDestructingSolverStorable274,SelfDestructingSolverStorable275,SelfDestructingSolverStorable390,SelfDestructingSolverStorable270,SelfDestructingSolverStorable391,SelfDestructingSolverStorable271,SelfDestructingSolverStorable306,SelfDestructingSolverStorable307,SelfDestructingSolverStorable308,SelfDestructingSolverStorable309,SelfDestructingSolverStorable269,SelfDestructingSolverStorable302,SelfDestructingSolverStorable303,SelfDestructingSolverStorable304,SelfDestructingSolverStorable305,SelfDestructingSolverStorable265,SelfDestructingSolverStorable386,SelfDestructingSolverStorable266,SelfDestructingSolverStorable387,SelfDestructingSolverStorable267,SelfDestructingSolverStorable300,SelfDestructingSolverStorable388,SelfDestructingSolverStorable268,SelfDestructingSolverStorable301,SelfDestructingSolverStorable389,SelfDestructingSolverStorable382,SelfDestructingSolverStorable383,SelfDestructingSolverStorable263,SelfDestructingSolverStorable384,SelfDestructingSolverStorable264,SelfDestructingSolverStorable385,SelfDestructingSolverStorable380,SelfDestructingSolverStorable381,SelfDestructingSolverStorable379,SelfDestructingSolverStorable375,SelfDestructingSolverStorable376,SelfDestructingSolverStorable377,SelfDestructingSolverStorable378,SelfDestructingSolverStorable294,SelfDestructingSolverStorable295,SelfDestructingSolverStorable296,SelfDestructingSolverStorable297,SelfDestructingSolverStorable330,SelfDestructingSolverStorable290,SelfDestructingSolverStorable291,SelfDestructingSolverStorable292,SelfDestructingSolverStorable293,SelfDestructingSolverStorable328,SelfDestructingSolverStorable329,SelfDestructingSolverStorable324,SelfDestructingSolverStorable325,SelfDestructingSolverStorable326,SelfDestructingSolverStorable327,SelfDestructingSolverStorable287,SelfDestructingSolverStorable320,SelfDestructingSolverStorable288,SelfDestructingSolverStorable321,SelfDestructingSolverStorable289,SelfDestructingSolverStorable322,SelfDestructingSolverStorable323,SelfDestructingSolverStorable283,SelfDestructingSolverStorable284,SelfDestructingSolverStorable285,SelfDestructingSolverStorable286,SelfDestructingSolverStorable280,SelfDestructingSolverStorable281,SelfDestructingSolverStorable282,SelfDestructingSolverStorable317,SelfDestructingSolverStorable318,SelfDestructingSolverStorable319,SelfDestructingSolverStorable313,SelfDestructingSolverStorable314,SelfDestructingSolverStorable315,SelfDestructingSolverStorable316,SelfDestructingSolverStorable276,SelfDestructingSolverStorable277,SelfDestructingSolverStorable310,SelfDestructingSolverStorable278,SelfDestructingSolverStorable311,SelfDestructingSolverStorable279,SelfDestructingSolverStorable312,SelfDestructingSolverStorable350,SelfDestructingSolverStorable351,SelfDestructingSolverStorable352,SelfDestructingSolverStorable346,SelfDestructingSolverStorable347,SelfDestructingSolverStorable348,SelfDestructingSolverStorable349,SelfDestructingSolverStorable342,SelfDestructingSolverStorable343,SelfDestructingSolverStorable344,SelfDestructingSolverStorable345,SelfDestructingSolverStorable340,SelfDestructingSolverStorable341,SelfDestructingSolverStorable339,SelfDestructingSolverStorable335,SelfDestructingSolverStorable336,SelfDestructingSolverStorable337,SelfDestructingSolverStorable338,SelfDestructingSolverStorable298,SelfDestructingSolverStorable331,SelfDestructingSolverStorable299,SelfDestructingSolverStorable332,SelfDestructingSolverStorable333,SelfDestructingSolverStorable334,SelfDestructingSolverStorable371,SelfDestructingSolverStorable372,6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable373,SelfDestructingSolverStorable374,SelfDestructingSolverStorable370,SelfDestructingSolverStorable368,SelfDestructingSolverStorable369,SelfDestructingSolverStorable364,SelfDestructingSolverStorable365,SelfDestructingSolverStorable366,SelfDestructingSolverStorable367,SelfDestructingSolverStorable360,SelfDestructingSolverStorable361,SelfDestructingSolverStorable362,SelfDestructingSolverStorable363,SelfDestructingSolverStorable357,SelfDestructingSolverStorable358,SelfDestructingSolverStorable359,SelfDestructingSolverStorable353,SelfDestructingSolverStorable354,SelfDestructingSolverStorable355,SelfDestructingSolverStorable356 [2024-05-06 03:42:22,141 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [thread1Err3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thread1Err4INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2024-05-06 03:42:22,141 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:42:22,141 INFO L85 PathProgramCache]: Analyzing trace with hash 936138107, now seen corresponding path program 2 times [2024-05-06 03:42:22,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:42:22,141 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1181464800] [2024-05-06 03:42:22,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:22,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:22,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:22,192 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:42:22,193 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:42:22,193 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1181464800] [2024-05-06 03:42:22,193 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1181464800] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 03:42:22,193 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 03:42:22,193 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-05-06 03:42:22,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [130837635] [2024-05-06 03:42:22,193 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 03:42:22,193 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-05-06 03:42:22,193 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:42:22,194 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-05-06 03:42:22,194 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 03:42:22,194 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:42:22,194 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:42:22,194 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 72.0) internal successors, (216), 3 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:42:22,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:42:22,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-05-06 03:42:22,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-06 03:42:22,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-06 03:42:22,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-06 03:42:22,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-06 03:42:22,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-06 03:42:22,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 35 states. [2024-05-06 03:42:22,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:42:23,073 INFO L85 PathProgramCache]: Analyzing trace with hash -2039049466, now seen corresponding path program 10 times [2024-05-06 03:42:23,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:23,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:23,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:23,180 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:23,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:23,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:23,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:23,288 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:23,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:42:27,929 INFO L85 PathProgramCache]: Analyzing trace with hash 1074974919, now seen corresponding path program 11 times [2024-05-06 03:42:27,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:27,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:27,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:28,052 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:28,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:28,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:28,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:28,148 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:28,758 INFO L85 PathProgramCache]: Analyzing trace with hash -2036186596, now seen corresponding path program 12 times [2024-05-06 03:42:28,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:28,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:28,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:28,863 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:28,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:28,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:28,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:28,988 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:29,654 INFO L85 PathProgramCache]: Analyzing trace with hash -1372075420, now seen corresponding path program 7 times [2024-05-06 03:42:29,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:29,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:29,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:29,750 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:29,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:42:29,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:42:29,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:42:29,846 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:42:30,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:43:08,072 INFO L85 PathProgramCache]: Analyzing trace with hash -72954257, now seen corresponding path program 4 times [2024-05-06 03:43:08,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:43:08,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:43:08,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:43:08,092 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:43:08,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:43:08,742 INFO L85 PathProgramCache]: Analyzing trace with hash -1389529990, now seen corresponding path program 8 times [2024-05-06 03:43:08,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:43:08,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:43:08,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:43:08,841 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:43:08,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:43:08,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:43:08,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:43:08,951 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:43:10,541 INFO L85 PathProgramCache]: Analyzing trace with hash -2115519717, now seen corresponding path program 7 times [2024-05-06 03:43:10,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:43:10,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:43:10,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:43:10,632 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:43:10,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:43:10,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:43:10,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:43:10,723 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:43:15,289 INFO L85 PathProgramCache]: Analyzing trace with hash -127337956, now seen corresponding path program 4 times [2024-05-06 03:43:15,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:43:15,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:43:15,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:43:15,308 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:43:15,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:43:15,942 INFO L85 PathProgramCache]: Analyzing trace with hash -2112656847, now seen corresponding path program 8 times [2024-05-06 03:43:15,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:43:15,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:43:15,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:43:16,036 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:43:16,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:43:16,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:43:16,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:43:16,126 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:43:16,911 INFO L85 PathProgramCache]: Analyzing trace with hash -82178914, now seen corresponding path program 10 times [2024-05-06 03:43:16,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:43:16,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:43:16,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:43:17,019 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:43:17,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:43:17,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:43:17,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:43:17,132 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:43:17,324 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:44:44,216 INFO L85 PathProgramCache]: Analyzing trace with hash -1711812513, now seen corresponding path program 11 times [2024-05-06 03:44:44,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:44,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:44,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:44:44,310 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:44:44,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:44,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:44,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:44:44,404 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:44:45,200 INFO L85 PathProgramCache]: Analyzing trace with hash -79316044, now seen corresponding path program 12 times [2024-05-06 03:44:45,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:45,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:45,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:44:45,311 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:44:45,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:45,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:45,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:44:45,418 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:44:46,024 INFO L85 PathProgramCache]: Analyzing trace with hash -1710968372, now seen corresponding path program 7 times [2024-05-06 03:44:46,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:46,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:46,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:44:46,206 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:44:46,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:46,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:46,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:44:46,304 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:44:46,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2024-05-06 03:44:51,053 INFO L85 PathProgramCache]: Analyzing trace with hash 1960210391, now seen corresponding path program 4 times [2024-05-06 03:44:51,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:51,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:51,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:44:51,074 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:44:51,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:44:51,995 INFO L85 PathProgramCache]: Analyzing trace with hash -1728422942, now seen corresponding path program 8 times [2024-05-06 03:44:51,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:51,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:52,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:44:52,100 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:44:52,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:52,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:52,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:44:52,201 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:44:52,975 INFO L85 PathProgramCache]: Analyzing trace with hash -1758342477, now seen corresponding path program 7 times [2024-05-06 03:44:52,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:52,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:52,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:44:53,073 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:44:53,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:53,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:53,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:44:53,208 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:44:53,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2024-05-06 03:44:57,840 INFO L85 PathProgramCache]: Analyzing trace with hash -2012997708, now seen corresponding path program 4 times [2024-05-06 03:44:57,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:57,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:57,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:44:57,861 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:44:57,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:44:59,743 INFO L85 PathProgramCache]: Analyzing trace with hash -1755479607, now seen corresponding path program 8 times [2024-05-06 03:44:59,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:59,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:59,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:44:59,833 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:44:59,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:44:59,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:44:59,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:44:59,923 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:45:00,645 INFO L85 PathProgramCache]: Analyzing trace with hash -1570315739, now seen corresponding path program 10 times [2024-05-06 03:45:00,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:45:00,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:45:00,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:45:00,749 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:45:00,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:45:00,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:45:00,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:45:00,856 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:45:01,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 Received shutdown request... [2024-05-06 03:45:44,230 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 03:45:44,230 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 03:45:44,427 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable393,SelfDestructingSolverStorable394,SelfDestructingSolverStorable395,SelfDestructingSolverStorable396,SelfDestructingSolverStorable392,SelfDestructingSolverStorable409,SelfDestructingSolverStorable405,SelfDestructingSolverStorable406,SelfDestructingSolverStorable407,SelfDestructingSolverStorable408,SelfDestructingSolverStorable401,SelfDestructingSolverStorable423,SelfDestructingSolverStorable402,SelfDestructingSolverStorable424,SelfDestructingSolverStorable403,SelfDestructingSolverStorable425,SelfDestructingSolverStorable404,SelfDestructingSolverStorable426,SelfDestructingSolverStorable420,SelfDestructingSolverStorable421,SelfDestructingSolverStorable400,SelfDestructingSolverStorable422,SelfDestructingSolverStorable416,SelfDestructingSolverStorable417,SelfDestructingSolverStorable418,SelfDestructingSolverStorable419,SelfDestructingSolverStorable412,SelfDestructingSolverStorable413,SelfDestructingSolverStorable414,SelfDestructingSolverStorable415,SelfDestructingSolverStorable397,SelfDestructingSolverStorable398,SelfDestructingSolverStorable399,SelfDestructingSolverStorable410,SelfDestructingSolverStorable411 [2024-05-06 03:45:44,427 WARN L619 AbstractCegarLoop]: Verification canceled: while PolyPacSimplificationTermWalker was simplifying a ATOM-1 term,while PolyPacSimplificationTermWalker was simplifying 3 xjuncts wrt. a ∧-9-1 context. [2024-05-06 03:45:44,428 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location thread1Err3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (10 of 11 remaining) [2024-05-06 03:45:44,429 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location thread1Err4INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (9 of 11 remaining) [2024-05-06 03:45:44,429 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (8 of 11 remaining) [2024-05-06 03:45:44,429 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr8INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (7 of 11 remaining) [2024-05-06 03:45:44,429 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr9INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (6 of 11 remaining) [2024-05-06 03:45:44,429 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location thread4Err1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (5 of 11 remaining) [2024-05-06 03:45:44,429 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location thread4Err7INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (4 of 11 remaining) [2024-05-06 03:45:44,429 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location thread1Thread1of1ForFork1Err0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 11 remaining) [2024-05-06 03:45:44,429 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location thread1Thread1of1ForFork1Err5INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 11 remaining) [2024-05-06 03:45:44,430 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location thread4Thread1of1ForFork4Err2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 11 remaining) [2024-05-06 03:45:44,430 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location thread4Thread1of1ForFork4Err6INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 11 remaining) [2024-05-06 03:45:44,435 INFO L448 BasicCegarLoop]: Path program histogram: [12, 12, 10, 9, 9, 9, 9, 9, 8, 8, 8, 8, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1] [2024-05-06 03:45:44,436 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: clock still running: ConditionalCommutativityCheckTime at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopStatisticsGenerator.getValue(CegarLoopStatisticsGenerator.java:172) at de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData.aggregateBenchmarkData(StatisticsData.java:60) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:225) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2024-05-06 03:45:44,439 INFO L158 Benchmark]: Toolchain (without parser) took 839658.45ms. Allocated memory was 183.5MB in the beginning and 1.0GB in the end (delta: 827.3MB). Free memory was 117.5MB in the beginning and 508.8MB in the end (delta: -391.3MB). Peak memory consumption was 809.7MB. Max. memory is 8.0GB. [2024-05-06 03:45:44,439 INFO L158 Benchmark]: CDTParser took 0.10ms. Allocated memory is still 183.5MB. Free memory is still 115.6MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 03:45:44,439 INFO L158 Benchmark]: CACSL2BoogieTranslator took 233.22ms. Allocated memory is still 183.5MB. Free memory was 117.4MB in the beginning and 104.3MB in the end (delta: 13.1MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2024-05-06 03:45:44,439 INFO L158 Benchmark]: Boogie Procedure Inliner took 65.82ms. Allocated memory is still 183.5MB. Free memory was 104.3MB in the beginning and 101.5MB in the end (delta: 2.8MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. [2024-05-06 03:45:44,440 INFO L158 Benchmark]: Boogie Preprocessor took 88.03ms. Allocated memory was 183.5MB in the beginning and 297.8MB in the end (delta: 114.3MB). Free memory was 101.5MB in the beginning and 268.6MB in the end (delta: -167.0MB). Peak memory consumption was 8.1MB. Max. memory is 8.0GB. [2024-05-06 03:45:44,440 INFO L158 Benchmark]: RCFGBuilder took 820.31ms. Allocated memory is still 297.8MB. Free memory was 268.6MB in the beginning and 207.8MB in the end (delta: 60.8MB). Peak memory consumption was 60.8MB. Max. memory is 8.0GB. [2024-05-06 03:45:44,440 INFO L158 Benchmark]: TraceAbstraction took 838443.76ms. Allocated memory was 297.8MB in the beginning and 1.0GB in the end (delta: 713.0MB). Free memory was 206.7MB in the beginning and 508.8MB in the end (delta: -302.0MB). Peak memory consumption was 783.8MB. Max. memory is 8.0GB. [2024-05-06 03:45:44,441 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10ms. Allocated memory is still 183.5MB. Free memory is still 115.6MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 233.22ms. Allocated memory is still 183.5MB. Free memory was 117.4MB in the beginning and 104.3MB in the end (delta: 13.1MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 65.82ms. Allocated memory is still 183.5MB. Free memory was 104.3MB in the beginning and 101.5MB in the end (delta: 2.8MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 88.03ms. Allocated memory was 183.5MB in the beginning and 297.8MB in the end (delta: 114.3MB). Free memory was 101.5MB in the beginning and 268.6MB in the end (delta: -167.0MB). Peak memory consumption was 8.1MB. Max. memory is 8.0GB. * RCFGBuilder took 820.31ms. Allocated memory is still 297.8MB. Free memory was 268.6MB in the beginning and 207.8MB in the end (delta: 60.8MB). Peak memory consumption was 60.8MB. Max. memory is 8.0GB. * TraceAbstraction took 838443.76ms. Allocated memory was 297.8MB in the beginning and 1.0GB in the end (delta: 713.0MB). Free memory was 206.7MB in the beginning and 508.8MB in the end (delta: -302.0MB). Peak memory consumption was 783.8MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 66619, independent: 64681, independent conditional: 63167, independent unconditional: 1514, dependent: 1938, dependent conditional: 1938, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 65305, independent: 64681, independent conditional: 63167, independent unconditional: 1514, dependent: 624, dependent conditional: 624, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 65305, independent: 64681, independent conditional: 63167, independent unconditional: 1514, dependent: 624, dependent conditional: 624, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 65305, independent: 64681, independent conditional: 63167, independent unconditional: 1514, dependent: 624, dependent conditional: 624, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 66922, independent: 64681, independent conditional: 22322, independent unconditional: 42359, dependent: 2241, dependent conditional: 1593, dependent unconditional: 648, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 66922, independent: 64681, independent conditional: 5971, independent unconditional: 58710, dependent: 2241, dependent conditional: 800, dependent unconditional: 1441, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 66922, independent: 64681, independent conditional: 5971, independent unconditional: 58710, dependent: 2241, dependent conditional: 800, dependent unconditional: 1441, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1532, independent: 1499, independent conditional: 122, independent unconditional: 1377, dependent: 33, dependent conditional: 26, dependent unconditional: 7, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1532, independent: 1489, independent conditional: 0, independent unconditional: 1489, dependent: 43, dependent conditional: 0, dependent unconditional: 43, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 43, independent: 10, independent conditional: 3, independent unconditional: 7, dependent: 33, dependent conditional: 26, dependent unconditional: 7, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 43, independent: 10, independent conditional: 3, independent unconditional: 7, dependent: 33, dependent conditional: 26, dependent unconditional: 7, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 117, independent: 10, independent conditional: 5, independent unconditional: 5, dependent: 106, dependent conditional: 60, dependent unconditional: 47, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 66922, independent: 63182, independent conditional: 5849, independent unconditional: 57333, dependent: 2208, dependent conditional: 774, dependent unconditional: 1434, unknown: 1532, unknown conditional: 148, unknown unconditional: 1384] , Statistics on independence cache: Total cache size (in pairs): 1532, Positive cache size: 1499, Positive conditional cache size: 122, Positive unconditional cache size: 1377, Negative cache size: 33, Negative conditional cache size: 26, Negative unconditional cache size: 7, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 17144, Maximal queried relation: 4, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 66922, independent: 64681, independent conditional: 22322, independent unconditional: 42359, dependent: 2241, dependent conditional: 1593, dependent unconditional: 648, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 66922, independent: 64681, independent conditional: 5971, independent unconditional: 58710, dependent: 2241, dependent conditional: 800, dependent unconditional: 1441, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 66922, independent: 64681, independent conditional: 5971, independent unconditional: 58710, dependent: 2241, dependent conditional: 800, dependent unconditional: 1441, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1532, independent: 1499, independent conditional: 122, independent unconditional: 1377, dependent: 33, dependent conditional: 26, dependent unconditional: 7, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1532, independent: 1489, independent conditional: 0, independent unconditional: 1489, dependent: 43, dependent conditional: 0, dependent unconditional: 43, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 43, independent: 10, independent conditional: 3, independent unconditional: 7, dependent: 33, dependent conditional: 26, dependent unconditional: 7, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 43, independent: 10, independent conditional: 3, independent unconditional: 7, dependent: 33, dependent conditional: 26, dependent unconditional: 7, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 117, independent: 10, independent conditional: 5, independent unconditional: 5, dependent: 106, dependent conditional: 60, dependent unconditional: 47, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 66922, independent: 63182, independent conditional: 5849, independent unconditional: 57333, dependent: 2208, dependent conditional: 774, dependent unconditional: 1434, unknown: 1532, unknown conditional: 148, unknown unconditional: 1384] , Statistics on independence cache: Total cache size (in pairs): 1532, Positive cache size: 1499, Positive conditional cache size: 122, Positive unconditional cache size: 1377, Negative cache size: 33, Negative conditional cache size: 26, Negative unconditional cache size: 7, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 17144 ], Independence queries for same thread: 1314 - ExceptionOrErrorResult: AssertionError: clock still running: ConditionalCommutativityCheckTime de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: clock still running: ConditionalCommutativityCheckTime: de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopStatisticsGenerator.getValue(CegarLoopStatisticsGenerator.java:172) RESULT: Ultimate could not prove your program: Toolchain returned no result. Completed graceful shutdown