/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-min-max-dec.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 03:51:58,741 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 03:51:58,794 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 03:51:58,798 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 03:51:58,798 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 03:51:58,820 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 03:51:58,820 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 03:51:58,821 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 03:51:58,821 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 03:51:58,821 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 03:51:58,822 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 03:51:58,822 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 03:51:58,822 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 03:51:58,822 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 03:51:58,823 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 03:51:58,823 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 03:51:58,823 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 03:51:58,823 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 03:51:58,824 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 03:51:58,826 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 03:51:58,830 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 03:51:58,830 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 03:51:58,830 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 03:51:58,831 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 03:51:58,831 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 03:51:58,832 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 03:51:58,832 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 03:51:58,832 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 03:51:58,832 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 03:51:58,832 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 03:51:58,833 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 03:51:58,833 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 03:51:58,833 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 03:51:58,834 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 03:51:58,834 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 03:51:58,834 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 03:51:58,834 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 03:51:58,834 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 03:51:58,834 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 03:51:58,834 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT [2024-05-06 03:51:59,013 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 03:51:59,027 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 03:51:59,029 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 03:51:59,030 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 03:51:59,030 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 03:51:59,031 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-min-max-dec.wvr.c [2024-05-06 03:52:00,120 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 03:52:00,267 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 03:52:00,267 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-dec.wvr.c [2024-05-06 03:52:00,273 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/5d1a485b2/8529dda77b2a49da8fffef90cff49f60/FLAG6ff11a899 [2024-05-06 03:52:00,283 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/5d1a485b2/8529dda77b2a49da8fffef90cff49f60 [2024-05-06 03:52:00,284 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 03:52:00,285 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 03:52:00,286 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 03:52:00,286 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 03:52:00,289 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 03:52:00,290 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,291 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7b20ec65 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00, skipping insertion in model container [2024-05-06 03:52:00,291 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,306 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 03:52:00,428 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-dec.wvr.c[3019,3032] [2024-05-06 03:52:00,434 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 03:52:00,440 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 03:52:00,455 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-dec.wvr.c[3019,3032] [2024-05-06 03:52:00,458 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 03:52:00,463 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 03:52:00,463 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 03:52:00,468 INFO L206 MainTranslator]: Completed translation [2024-05-06 03:52:00,468 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00 WrapperNode [2024-05-06 03:52:00,468 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 03:52:00,469 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 03:52:00,469 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 03:52:00,469 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 03:52:00,474 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,481 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,496 INFO L138 Inliner]: procedures = 26, calls = 63, calls flagged for inlining = 8, calls inlined = 8, statements flattened = 140 [2024-05-06 03:52:00,497 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 03:52:00,497 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 03:52:00,497 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 03:52:00,497 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 03:52:00,504 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,504 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,506 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,506 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,512 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,515 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,516 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,517 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,519 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 03:52:00,519 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 03:52:00,519 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 03:52:00,519 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 03:52:00,520 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00" (1/1) ... [2024-05-06 03:52:00,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 03:52:00,540 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:52:00,562 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 03:52:00,613 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 03:52:00,632 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 03:52:00,633 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 03:52:00,633 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 03:52:00,633 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 03:52:00,633 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 03:52:00,633 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 03:52:00,633 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 03:52:00,634 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 03:52:00,634 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 03:52:00,634 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 03:52:00,634 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 03:52:00,635 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 03:52:00,636 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 03:52:00,636 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 03:52:00,636 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 03:52:00,636 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 03:52:00,636 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 03:52:00,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 03:52:00,636 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 03:52:00,637 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 03:52:00,719 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 03:52:00,721 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 03:52:00,953 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 03:52:01,052 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 03:52:01,052 INFO L309 CfgBuilder]: Removed 4 assume(true) statements. [2024-05-06 03:52:01,053 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 03:52:01 BoogieIcfgContainer [2024-05-06 03:52:01,053 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 03:52:01,055 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 03:52:01,055 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 03:52:01,057 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 03:52:01,057 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 03:52:00" (1/3) ... [2024-05-06 03:52:01,058 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@643e5ed5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 03:52:01, skipping insertion in model container [2024-05-06 03:52:01,058 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:00" (2/3) ... [2024-05-06 03:52:01,058 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@643e5ed5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 03:52:01, skipping insertion in model container [2024-05-06 03:52:01,058 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 03:52:01" (3/3) ... [2024-05-06 03:52:01,059 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-min-max-dec.wvr.c [2024-05-06 03:52:01,076 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 03:52:01,085 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 03:52:01,085 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 03:52:01,085 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 03:52:01,173 INFO L144 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2024-05-06 03:52:01,209 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 03:52:01,209 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 03:52:01,210 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:52:01,211 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 03:52:01,213 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 03:52:01,254 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 03:52:01,276 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:52:01,277 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 03:52:01,282 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2592ac56, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=false, mConComCheckerCriterionLimit=1, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 03:52:01,283 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-06 03:52:01,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:52:01,814 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:01,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:52:01,846 INFO L85 PathProgramCache]: Analyzing trace with hash 440850748, now seen corresponding path program 1 times [2024-05-06 03:52:01,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:01,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:01,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:02,035 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:02,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:02,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:02,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:02,091 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:02,108 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 03:52:02,108 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 03:52:02,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:52:02,303 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:02,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:52:02,322 INFO L85 PathProgramCache]: Analyzing trace with hash 154181502, now seen corresponding path program 1 times [2024-05-06 03:52:02,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:02,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:02,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:02,663 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:02,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:02,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:02,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:02,788 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:02,789 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 03:52:02,789 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-05-06 03:52:03,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:52:03,053 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:03,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:52:03,070 INFO L85 PathProgramCache]: Analyzing trace with hash -229856278, now seen corresponding path program 1 times [2024-05-06 03:52:03,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:03,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:03,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:03,330 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:03,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:03,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:03,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:03,495 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:03,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:52:03,600 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:03,600 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:52:03,732 INFO L85 PathProgramCache]: Analyzing trace with hash 358425867, now seen corresponding path program 2 times [2024-05-06 03:52:03,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:03,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:03,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:03,865 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:03,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:03,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:03,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:03,965 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:04,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:52:04,059 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:04,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:52:04,081 INFO L85 PathProgramCache]: Analyzing trace with hash 1257764385, now seen corresponding path program 1 times [2024-05-06 03:52:04,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:04,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:04,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:04,232 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:04,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:04,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:04,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:04,397 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:04,440 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:04,441 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:52:06,538 INFO L85 PathProgramCache]: Analyzing trace with hash -766650886, now seen corresponding path program 1 times [2024-05-06 03:52:06,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:06,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:06,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:06,660 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:06,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:06,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:06,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:06,780 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:06,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:52:06,863 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:06,864 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:52:06,880 INFO L85 PathProgramCache]: Analyzing trace with hash 1239757295, now seen corresponding path program 2 times [2024-05-06 03:52:06,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:06,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:06,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:07,018 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:07,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:07,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:07,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:07,134 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:07,167 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:07,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:52:09,252 INFO L85 PathProgramCache]: Analyzing trace with hash -2120086952, now seen corresponding path program 2 times [2024-05-06 03:52:09,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:09,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:09,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:09,358 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:09,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:09,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:09,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:09,489 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:09,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:52:09,568 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:09,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:52:09,584 INFO L85 PathProgramCache]: Analyzing trace with hash -1250216473, now seen corresponding path program 3 times [2024-05-06 03:52:09,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:09,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:09,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:09,686 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:09,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:09,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:09,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:09,811 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:09,844 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:09,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:52:11,922 INFO L85 PathProgramCache]: Analyzing trace with hash -1510959552, now seen corresponding path program 3 times [2024-05-06 03:52:11,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:11,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:11,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:12,065 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:12,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:12,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:12,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:12,183 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:12,259 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:52:12,263 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:12,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:52:12,279 INFO L85 PathProgramCache]: Analyzing trace with hash -1004622231, now seen corresponding path program 4 times [2024-05-06 03:52:12,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:12,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:12,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:12,408 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:12,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:12,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:12,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:12,504 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:12,536 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:12,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:52:14,599 INFO L85 PathProgramCache]: Analyzing trace with hash -333100514, now seen corresponding path program 4 times [2024-05-06 03:52:14,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:14,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:14,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:14,698 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:14,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:14,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:14,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:14,831 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:14,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:52:14,913 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:14,913 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:52:14,929 INFO L85 PathProgramCache]: Analyzing trace with hash 1863797475, now seen corresponding path program 5 times [2024-05-06 03:52:14,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:14,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:14,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:15,063 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:15,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:15,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:15,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:15,153 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:15,183 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:15,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:52:17,248 INFO L85 PathProgramCache]: Analyzing trace with hash 2074320956, now seen corresponding path program 5 times [2024-05-06 03:52:17,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:17,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:17,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:17,344 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:17,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:17,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:17,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:17,481 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:17,552 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:52:17,557 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:17,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:52:17,571 INFO L85 PathProgramCache]: Analyzing trace with hash 642804717, now seen corresponding path program 6 times [2024-05-06 03:52:17,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:17,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:17,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:17,658 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:17,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:17,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:17,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:17,744 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:17,774 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:17,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:52:19,834 INFO L85 PathProgramCache]: Analyzing trace with hash -1514053862, now seen corresponding path program 6 times [2024-05-06 03:52:19,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:19,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:19,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:19,920 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:19,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:19,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:19,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:20,100 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:20,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:52:20,189 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:20,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:52:20,208 INFO L85 PathProgramCache]: Analyzing trace with hash -1773699519, now seen corresponding path program 3 times [2024-05-06 03:52:20,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:20,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:20,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:20,294 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:20,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:20,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:20,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:20,393 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:20,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:52:20,470 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:20,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:52:22,537 INFO L85 PathProgramCache]: Analyzing trace with hash 849890254, now seen corresponding path program 4 times [2024-05-06 03:52:22,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:22,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:22,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:22,622 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:22,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:22,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:22,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:22,691 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:22,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:52:22,815 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:22,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:52:24,868 INFO L85 PathProgramCache]: Analyzing trace with hash 1117088227, now seen corresponding path program 7 times [2024-05-06 03:52:24,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:24,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:24,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:24,975 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:24,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:24,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:24,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:25,076 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:25,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:52:25,146 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:25,147 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:52:27,208 INFO L85 PathProgramCache]: Analyzing trace with hash 680518143, now seen corresponding path program 8 times [2024-05-06 03:52:27,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:27,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:27,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:27,299 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:27,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:27,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:27,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:27,389 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:27,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:52:27,512 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:27,515 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:52:27,532 INFO L85 PathProgramCache]: Analyzing trace with hash 680518143, now seen corresponding path program 9 times [2024-05-06 03:52:27,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:27,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:27,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:27,622 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:27,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:27,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:27,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:27,707 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:27,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:52:27,786 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:27,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:52:29,899 INFO L85 PathProgramCache]: Analyzing trace with hash -1774298156, now seen corresponding path program 10 times [2024-05-06 03:52:29,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:29,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:29,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:30,006 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:52:30,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:30,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:30,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:30,184 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:52:30,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:52:30,293 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:30,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:52:32,329 INFO L85 PathProgramCache]: Analyzing trace with hash -1965969463, now seen corresponding path program 11 times [2024-05-06 03:52:32,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:32,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:32,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:32,433 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:32,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:32,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:32,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:32,522 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:32,597 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:52:32,602 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:32,602 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:52:34,632 INFO L85 PathProgramCache]: Analyzing trace with hash -126047627, now seen corresponding path program 12 times [2024-05-06 03:52:34,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:34,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:34,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:34,802 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:52:34,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:34,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:34,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:34,970 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:52:35,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:52:35,053 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:35,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:52:37,089 INFO L85 PathProgramCache]: Analyzing trace with hash -892141432, now seen corresponding path program 13 times [2024-05-06 03:52:37,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:37,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:37,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:37,188 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:37,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:37,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:37,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:37,276 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:37,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:52:37,360 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:37,361 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:52:37,420 INFO L85 PathProgramCache]: Analyzing trace with hash -2053826830, now seen corresponding path program 14 times [2024-05-06 03:52:37,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:37,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:37,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:37,519 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:52:37,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:37,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:37,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:37,679 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:52:37,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:52:37,756 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:37,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:52:37,902 INFO L85 PathProgramCache]: Analyzing trace with hash -1147274773, now seen corresponding path program 15 times [2024-05-06 03:52:37,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:37,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:37,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:37,996 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:37,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:37,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:38,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:38,094 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:38,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:52:38,171 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:38,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:52:38,186 INFO L85 PathProgramCache]: Analyzing trace with hash -1732158298, now seen corresponding path program 16 times [2024-05-06 03:52:38,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:38,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:38,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:38,277 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:38,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:38,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:38,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:38,444 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:38,513 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:52:38,518 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:38,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:52:39,187 INFO L85 PathProgramCache]: Analyzing trace with hash 2137668115, now seen corresponding path program 17 times [2024-05-06 03:52:39,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:39,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:39,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:39,278 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:39,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:39,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:39,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:39,369 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:39,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:52:39,452 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:39,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:52:39,468 INFO L85 PathProgramCache]: Analyzing trace with hash 1843202633, now seen corresponding path program 18 times [2024-05-06 03:52:39,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:39,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:39,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:39,557 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:39,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:39,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:39,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:39,647 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:39,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:52:39,769 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:39,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:52:39,788 INFO L85 PathProgramCache]: Analyzing trace with hash 776362208, now seen corresponding path program 1 times [2024-05-06 03:52:39,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:39,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:39,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:39,874 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:39,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:39,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:39,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:39,963 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:52:40,029 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:52:40,034 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:40,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:52:40,049 INFO L85 PathProgramCache]: Analyzing trace with hash -985486280, now seen corresponding path program 2 times [2024-05-06 03:52:40,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:40,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:40,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:40,146 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:40,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:40,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:40,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:40,243 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:40,274 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:40,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:52:42,342 INFO L85 PathProgramCache]: Analyzing trace with hash 1874402129, now seen corresponding path program 1 times [2024-05-06 03:52:42,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:42,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:42,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:42,486 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:42,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:42,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:42,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:42,589 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:52:42,600 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 03:52:42,601 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:52:42,601 INFO L85 PathProgramCache]: Analyzing trace with hash -1283961915, now seen corresponding path program 1 times [2024-05-06 03:52:42,604 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:52:42,604 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434240690] [2024-05-06 03:52:42,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:42,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:42,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:42,773 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 41 proven. 2 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2024-05-06 03:52:42,774 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:52:42,774 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [434240690] [2024-05-06 03:52:42,775 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [434240690] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 03:52:42,775 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [525491103] [2024-05-06 03:52:42,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:42,775 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 03:52:42,775 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:52:42,798 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 03:52:42,799 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 03:52:42,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:42,999 INFO L262 TraceCheckSpWp]: Trace formula consists of 439 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-06 03:52:43,006 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 03:52:43,215 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 42 proven. 1 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2024-05-06 03:52:43,215 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 03:52:43,406 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 42 proven. 1 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2024-05-06 03:52:43,407 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [525491103] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 03:52:43,407 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 03:52:43,407 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 24 [2024-05-06 03:52:43,408 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [37536143] [2024-05-06 03:52:43,409 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 03:52:43,413 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-05-06 03:52:43,413 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:52:43,417 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-05-06 03:52:43,419 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=434, Unknown=0, NotChecked=0, Total=552 [2024-05-06 03:52:43,420 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:52:43,420 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:52:43,421 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 11.25) internal successors, (270), 24 states have internal predecessors, (270), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:52:43,421 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:52:43,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:52:43,874 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:43,874 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:52:43,890 INFO L85 PathProgramCache]: Analyzing trace with hash -1048867754, now seen corresponding path program 5 times [2024-05-06 03:52:43,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:43,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:43,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:52:43,950 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:52:43,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:52:44,108 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:52:44,114 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:44,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:52:46,200 INFO L85 PathProgramCache]: Analyzing trace with hash -2000312289, now seen corresponding path program 6 times [2024-05-06 03:52:46,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:46,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:46,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:46,317 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:52:46,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:46,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:46,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:46,375 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:52:46,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:52:46,457 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:46,457 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:52:46,476 INFO L85 PathProgramCache]: Analyzing trace with hash -186415563, now seen corresponding path program 19 times [2024-05-06 03:52:46,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:46,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:46,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:46,798 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:46,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:46,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:46,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:46,927 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:46,964 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:46,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:52:49,022 INFO L85 PathProgramCache]: Analyzing trace with hash -1729929970, now seen corresponding path program 7 times [2024-05-06 03:52:49,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:49,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:49,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:49,190 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:49,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:49,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:49,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:49,303 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:49,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:52:49,392 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:49,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:52:49,409 INFO L85 PathProgramCache]: Analyzing trace with hash -702749349, now seen corresponding path program 20 times [2024-05-06 03:52:49,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:49,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:49,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:49,519 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:49,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:49,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:49,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:49,632 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:49,663 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:49,663 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:52:51,725 INFO L85 PathProgramCache]: Analyzing trace with hash 730700396, now seen corresponding path program 8 times [2024-05-06 03:52:51,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:51,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:51,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:52:51,771 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:52:51,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:52:51,915 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:52:51,921 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:51,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:52:51,940 INFO L85 PathProgramCache]: Analyzing trace with hash 781407059, now seen corresponding path program 21 times [2024-05-06 03:52:51,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:51,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:51,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:52,118 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:52,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:52,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:52,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:52,252 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:52,283 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:52,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:52:54,352 INFO L85 PathProgramCache]: Analyzing trace with hash 1506008236, now seen corresponding path program 9 times [2024-05-06 03:52:54,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:54,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:54,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:54,462 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:54,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:54,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:54,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:54,570 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:54,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:52:54,647 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:54,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:52:54,665 INFO L85 PathProgramCache]: Analyzing trace with hash -374547075, now seen corresponding path program 22 times [2024-05-06 03:52:54,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:54,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:54,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:54,842 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:54,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:54,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:54,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:54,966 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:54,997 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:54,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:52:57,073 INFO L85 PathProgramCache]: Analyzing trace with hash 1698523018, now seen corresponding path program 10 times [2024-05-06 03:52:57,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:57,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:57,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:52:57,121 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:52:57,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:52:57,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:52:57,264 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:57,265 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:52:57,279 INFO L85 PathProgramCache]: Analyzing trace with hash -1257254921, now seen corresponding path program 23 times [2024-05-06 03:52:57,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:57,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:57,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:57,398 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:57,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:57,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:57,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:57,507 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:57,535 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:57,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:52:59,593 INFO L85 PathProgramCache]: Analyzing trace with hash 509074512, now seen corresponding path program 11 times [2024-05-06 03:52:59,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:59,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:59,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:59,758 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:59,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:59,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:59,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:59,865 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:52:59,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:52:59,941 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:59,941 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:52:59,957 INFO L85 PathProgramCache]: Analyzing trace with hash -445248935, now seen corresponding path program 24 times [2024-05-06 03:52:59,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:59,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:59,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:00,053 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:00,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:00,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:00,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:00,152 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:00,183 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:00,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:53:02,262 INFO L85 PathProgramCache]: Analyzing trace with hash -340138962, now seen corresponding path program 12 times [2024-05-06 03:53:02,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:02,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:02,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:53:02,315 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:53:02,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:53:02,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:53:02,441 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:02,441 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:53:02,456 INFO L85 PathProgramCache]: Analyzing trace with hash -1880138323, now seen corresponding path program 7 times [2024-05-06 03:53:02,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:02,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:02,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:02,609 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:02,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:02,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:02,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:02,696 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:02,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:02,776 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:02,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:04,907 INFO L85 PathProgramCache]: Analyzing trace with hash 1845254626, now seen corresponding path program 8 times [2024-05-06 03:53:04,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:04,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:04,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:04,963 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:53:04,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:04,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:04,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:05,012 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:53:05,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:05,087 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:05,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:07,115 INFO L85 PathProgramCache]: Analyzing trace with hash 1028924407, now seen corresponding path program 25 times [2024-05-06 03:53:07,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:07,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:07,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:07,208 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:07,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:07,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:07,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:07,298 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:07,367 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:07,372 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:07,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:09,419 INFO L85 PathProgramCache]: Analyzing trace with hash 98024723, now seen corresponding path program 26 times [2024-05-06 03:53:09,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:09,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:09,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:09,748 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:09,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:09,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:09,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:09,883 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:09,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:53:09,972 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:09,972 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:53:09,988 INFO L85 PathProgramCache]: Analyzing trace with hash 98024723, now seen corresponding path program 27 times [2024-05-06 03:53:09,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:09,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:10,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:10,201 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:10,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:10,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:10,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:10,308 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:10,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:10,388 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:10,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:12,415 INFO L85 PathProgramCache]: Analyzing trace with hash 582293992, now seen corresponding path program 28 times [2024-05-06 03:53:12,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:12,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:12,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:13,602 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:13,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:13,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:13,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:13,921 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:13,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:14,005 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:14,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:16,035 INFO L85 PathProgramCache]: Analyzing trace with hash 431584565, now seen corresponding path program 29 times [2024-05-06 03:53:16,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:16,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:16,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:16,354 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:16,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:16,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:16,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:16,538 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:16,617 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:16,622 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:16,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:18,677 INFO L85 PathProgramCache]: Analyzing trace with hash -1712596511, now seen corresponding path program 30 times [2024-05-06 03:53:18,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:18,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:18,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:18,931 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:18,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:18,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:18,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:19,232 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:19,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:19,318 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:19,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:21,349 INFO L85 PathProgramCache]: Analyzing trace with hash -1368990308, now seen corresponding path program 31 times [2024-05-06 03:53:21,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:21,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:21,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:21,457 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:21,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:21,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:21,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:21,568 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:21,644 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:21,650 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:21,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:23,694 INFO L85 PathProgramCache]: Analyzing trace with hash -1827911162, now seen corresponding path program 32 times [2024-05-06 03:53:23,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:23,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:23,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:23,943 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:23,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:23,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:23,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:24,234 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:24,316 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:24,321 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:24,322 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:26,362 INFO L85 PathProgramCache]: Analyzing trace with hash 777005655, now seen corresponding path program 33 times [2024-05-06 03:53:26,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:26,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:26,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:26,468 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:26,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:26,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:26,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:26,583 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:26,659 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:53:26,664 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:26,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:53:26,681 INFO L85 PathProgramCache]: Analyzing trace with hash -422427462, now seen corresponding path program 34 times [2024-05-06 03:53:26,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:26,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:26,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:26,874 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:53:26,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:26,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:26,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:27,006 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:53:27,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:27,076 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:27,076 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:29,104 INFO L85 PathProgramCache]: Analyzing trace with hash -210348929, now seen corresponding path program 35 times [2024-05-06 03:53:29,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:29,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:29,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:29,339 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:29,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:29,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:29,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:29,620 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:29,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:53:29,700 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:29,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:53:29,718 INFO L85 PathProgramCache]: Analyzing trace with hash 2069118301, now seen corresponding path program 36 times [2024-05-06 03:53:29,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:29,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:29,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:30,026 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:30,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:30,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:30,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:30,246 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:30,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:53:30,370 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:30,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:53:30,386 INFO L85 PathProgramCache]: Analyzing trace with hash -1121051060, now seen corresponding path program 3 times [2024-05-06 03:53:30,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:30,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:30,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:31,137 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:31,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:31,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:31,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:31,301 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:31,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:53:31,370 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:31,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:53:31,391 INFO L85 PathProgramCache]: Analyzing trace with hash 348250444, now seen corresponding path program 4 times [2024-05-06 03:53:31,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:31,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:31,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:32,095 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:32,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:32,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:32,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:32,302 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:32,344 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:32,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:53:34,421 INFO L85 PathProgramCache]: Analyzing trace with hash -1487403163, now seen corresponding path program 2 times [2024-05-06 03:53:34,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:34,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:34,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:34,741 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:34,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:34,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:34,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:34,973 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:34,999 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 03:53:35,007 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-05-06 03:53:35,205 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable110,SelfDestructingSolverStorable72,SelfDestructingSolverStorable73,SelfDestructingSolverStorable74,SelfDestructingSolverStorable75,SelfDestructingSolverStorable108,SelfDestructingSolverStorable109,SelfDestructingSolverStorable76,SelfDestructingSolverStorable104,SelfDestructingSolverStorable77,SelfDestructingSolverStorable105,SelfDestructingSolverStorable78,SelfDestructingSolverStorable106,SelfDestructingSolverStorable79,SelfDestructingSolverStorable107,SelfDestructingSolverStorable100,SelfDestructingSolverStorable101,SelfDestructingSolverStorable102,SelfDestructingSolverStorable103,SelfDestructingSolverStorable80,SelfDestructingSolverStorable81,SelfDestructingSolverStorable82,SelfDestructingSolverStorable83,SelfDestructingSolverStorable84,SelfDestructingSolverStorable85,SelfDestructingSolverStorable86,SelfDestructingSolverStorable87,SelfDestructingSolverStorable88,SelfDestructingSolverStorable89,SelfDestructingSolverStorable90,SelfDestructingSolverStorable91,SelfDestructingSolverStorable92,SelfDestructingSolverStorable93,SelfDestructingSolverStorable94,SelfDestructingSolverStorable95,SelfDestructingSolverStorable96,SelfDestructingSolverStorable97,SelfDestructingSolverStorable98,SelfDestructingSolverStorable99,SelfDestructingSolverStorable122,SelfDestructingSolverStorable123,SelfDestructingSolverStorable124,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable120,SelfDestructingSolverStorable121,SelfDestructingSolverStorable119,SelfDestructingSolverStorable115,SelfDestructingSolverStorable66,SelfDestructingSolverStorable116,SelfDestructingSolverStorable67,SelfDestructingSolverStorable117,SelfDestructingSolverStorable68,SelfDestructingSolverStorable118,SelfDestructingSolverStorable69,SelfDestructingSolverStorable111,SelfDestructingSolverStorable112,SelfDestructingSolverStorable113,SelfDestructingSolverStorable114 [2024-05-06 03:53:35,206 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 03:53:35,206 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:53:35,206 INFO L85 PathProgramCache]: Analyzing trace with hash 1272527833, now seen corresponding path program 2 times [2024-05-06 03:53:35,206 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:53:35,206 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661980692] [2024-05-06 03:53:35,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:35,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:35,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:35,434 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 58 proven. 15 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-05-06 03:53:35,434 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:53:35,434 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661980692] [2024-05-06 03:53:35,434 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [661980692] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 03:53:35,434 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [47989866] [2024-05-06 03:53:35,436 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 03:53:35,437 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 03:53:35,437 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:53:35,438 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 03:53:35,476 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 03:53:35,711 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-05-06 03:53:35,712 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 03:53:35,714 INFO L262 TraceCheckSpWp]: Trace formula consists of 317 conjuncts, 33 conjunts are in the unsatisfiable core [2024-05-06 03:53:35,729 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 03:53:35,740 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2024-05-06 03:53:35,770 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 03:53:35,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 13 [2024-05-06 03:53:35,812 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 03:53:35,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 03:53:35,987 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:35,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2024-05-06 03:53:36,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-05-06 03:53:36,136 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-05-06 03:53:36,320 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2024-05-06 03:53:36,320 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 03:53:36,320 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [47989866] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 03:53:36,320 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 03:53:36,320 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [15] total 30 [2024-05-06 03:53:36,320 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1734086386] [2024-05-06 03:53:36,320 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 03:53:36,322 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2024-05-06 03:53:36,322 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:53:36,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-05-06 03:53:36,322 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=799, Unknown=0, NotChecked=0, Total=870 [2024-05-06 03:53:36,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:53:36,323 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:53:36,323 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 8.529411764705882) internal successors, (145), 17 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:53:36,323 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 03:53:36,323 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:53:36,971 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:53:36,982 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:36,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:53:37,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:37,110 INFO L85 PathProgramCache]: Analyzing trace with hash -1048867754, now seen corresponding path program 9 times [2024-05-06 03:53:37,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:37,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:37,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:53:37,140 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:53:37,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:53:37,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:37,319 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:37,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:37,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:40,090 INFO L85 PathProgramCache]: Analyzing trace with hash -2000312289, now seen corresponding path program 10 times [2024-05-06 03:53:40,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:40,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:40,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:40,145 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:53:40,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:40,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:40,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:40,191 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:53:40,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:53:40,340 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:40,340 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:53:40,437 INFO L85 PathProgramCache]: Analyzing trace with hash -186415563, now seen corresponding path program 37 times [2024-05-06 03:53:40,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:40,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:40,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:40,536 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:40,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:40,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:40,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:40,636 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:40,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:53:40,785 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:40,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:53:40,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:40,877 INFO L85 PathProgramCache]: Analyzing trace with hash -702749349, now seen corresponding path program 38 times [2024-05-06 03:53:40,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:40,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:40,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:41,006 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:41,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:41,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:41,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:41,098 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:41,249 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:53:41,256 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:41,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:53:41,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:41,349 INFO L85 PathProgramCache]: Analyzing trace with hash 781407059, now seen corresponding path program 39 times [2024-05-06 03:53:41,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:41,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:41,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:41,449 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:41,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:41,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:41,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:41,550 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:41,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:53:41,713 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:41,713 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:53:41,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:41,793 INFO L85 PathProgramCache]: Analyzing trace with hash -374547075, now seen corresponding path program 40 times [2024-05-06 03:53:41,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:41,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:41,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:41,880 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:41,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:41,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:41,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:41,999 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:42,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:53:42,141 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:42,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:53:42,237 INFO L85 PathProgramCache]: Analyzing trace with hash -1257254921, now seen corresponding path program 41 times [2024-05-06 03:53:42,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:42,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:42,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:42,337 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:42,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:42,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:42,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:42,435 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:42,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:53:42,582 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:42,582 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:53:42,671 INFO L85 PathProgramCache]: Analyzing trace with hash -445248935, now seen corresponding path program 42 times [2024-05-06 03:53:42,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:42,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:42,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:42,759 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:42,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:42,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:42,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:42,846 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:43,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:53:43,027 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:43,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:53:43,118 INFO L85 PathProgramCache]: Analyzing trace with hash -1880138323, now seen corresponding path program 11 times [2024-05-06 03:53:43,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:43,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:43,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:43,200 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:43,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:43,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:43,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:43,282 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:43,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:43,426 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:43,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:45,563 INFO L85 PathProgramCache]: Analyzing trace with hash 1845254626, now seen corresponding path program 12 times [2024-05-06 03:53:45,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:45,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:45,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:45,610 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:53:45,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:45,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:45,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:45,656 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:53:45,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:45,782 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:45,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:45,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:47,945 INFO L85 PathProgramCache]: Analyzing trace with hash 1028924407, now seen corresponding path program 43 times [2024-05-06 03:53:47,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:47,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:47,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:48,043 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:48,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:48,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:48,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:48,195 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:53:48,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:48,358 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:48,358 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:48,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:48,729 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:49,320 INFO L85 PathProgramCache]: Analyzing trace with hash 98024723, now seen corresponding path program 44 times [2024-05-06 03:53:49,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:49,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:49,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:49,423 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:49,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:49,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:49,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:49,538 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:49,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:53:49,658 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:49,659 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:53:49,770 INFO L85 PathProgramCache]: Analyzing trace with hash 98024723, now seen corresponding path program 45 times [2024-05-06 03:53:49,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:49,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:49,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:49,865 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:49,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:49,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:49,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:49,998 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:50,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:50,151 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:50,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:50,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:50,518 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:52,548 INFO L85 PathProgramCache]: Analyzing trace with hash 582293992, now seen corresponding path program 46 times [2024-05-06 03:53:52,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:52,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:52,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:52,785 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:52,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:52,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:52,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:53,063 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:53,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:53,208 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:53,209 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:53,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:53,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:55,683 INFO L85 PathProgramCache]: Analyzing trace with hash 431584565, now seen corresponding path program 47 times [2024-05-06 03:53:55,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:55,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:55,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:55,785 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:55,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:55,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:55,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:55,887 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:53:56,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:56,038 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:56,038 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:56,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:56,511 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:53:58,937 INFO L85 PathProgramCache]: Analyzing trace with hash -1712596511, now seen corresponding path program 48 times [2024-05-06 03:53:58,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:58,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:58,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:59,243 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:59,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:59,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:59,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:59,480 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:53:59,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:53:59,625 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:59,626 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:53:59,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:01,767 INFO L85 PathProgramCache]: Analyzing trace with hash -1368990308, now seen corresponding path program 49 times [2024-05-06 03:54:01,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:01,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:01,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:01,869 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:01,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:01,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:01,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:02,013 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:02,151 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:02,158 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:02,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:02,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:02,567 INFO L85 PathProgramCache]: Analyzing trace with hash -1827911162, now seen corresponding path program 50 times [2024-05-06 03:54:02,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:02,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:02,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:02,805 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:54:02,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:02,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:02,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:03,082 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:54:03,234 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:03,242 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:03,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:03,302 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:05,464 INFO L85 PathProgramCache]: Analyzing trace with hash 777005655, now seen corresponding path program 51 times [2024-05-06 03:54:05,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:05,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:05,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:05,570 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:05,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:05,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:05,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:05,674 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:05,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:54:05,823 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:05,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:54:05,921 INFO L85 PathProgramCache]: Analyzing trace with hash -422427462, now seen corresponding path program 52 times [2024-05-06 03:54:05,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:05,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:05,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:06,023 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:06,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:06,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:06,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:06,180 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:06,329 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:06,337 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:06,337 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:06,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:08,465 INFO L85 PathProgramCache]: Analyzing trace with hash -210348929, now seen corresponding path program 53 times [2024-05-06 03:54:08,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:08,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:08,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:08,700 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:54:08,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:08,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:08,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:08,998 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:54:09,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:54:09,153 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:09,153 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:54:09,217 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:09,237 INFO L85 PathProgramCache]: Analyzing trace with hash 2069118301, now seen corresponding path program 54 times [2024-05-06 03:54:09,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:09,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:09,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:09,494 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:54:09,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:09,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:09,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:09,723 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:54:09,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:54:09,869 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:09,869 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:54:09,954 INFO L85 PathProgramCache]: Analyzing trace with hash -1121051060, now seen corresponding path program 5 times [2024-05-06 03:54:09,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:09,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:09,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:10,170 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:10,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:10,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:10,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:10,330 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:10,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:54:10,476 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:10,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:54:10,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:10,559 INFO L85 PathProgramCache]: Analyzing trace with hash 348250444, now seen corresponding path program 6 times [2024-05-06 03:54:10,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:10,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:10,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:10,768 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:10,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:10,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:10,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:11,037 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:11,125 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:11,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:54:11,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:13,452 INFO L85 PathProgramCache]: Analyzing trace with hash -49650012, now seen corresponding path program 1 times [2024-05-06 03:54:13,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:13,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:13,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:13,742 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:13,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:13,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:13,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:14,002 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:14,150 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:14,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:54:14,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:16,433 INFO L85 PathProgramCache]: Analyzing trace with hash -400848100, now seen corresponding path program 2 times [2024-05-06 03:54:16,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:16,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:16,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:16,745 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:16,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:16,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:16,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:16,950 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:17,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:54:17,076 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:17,076 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:54:17,146 INFO L85 PathProgramCache]: Analyzing trace with hash -2114372933, now seen corresponding path program 1 times [2024-05-06 03:54:17,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:17,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:17,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:17,306 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:17,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:17,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:17,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:17,506 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:17,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:54:17,627 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:17,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:54:17,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:17,691 INFO L85 PathProgramCache]: Analyzing trace with hash -2095417091, now seen corresponding path program 2 times [2024-05-06 03:54:17,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:17,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:17,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:18,019 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:18,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:18,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:18,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:18,233 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:18,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:54:18,430 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:18,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:54:18,508 INFO L85 PathProgramCache]: Analyzing trace with hash 70341742, now seen corresponding path program 1 times [2024-05-06 03:54:18,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:18,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:18,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:18,675 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:18,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:18,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:18,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:18,839 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:18,977 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:54:18,985 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:18,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:54:19,081 INFO L85 PathProgramCache]: Analyzing trace with hash 1099653866, now seen corresponding path program 2 times [2024-05-06 03:54:19,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:19,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:19,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:19,297 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:19,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:19,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:19,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:19,561 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:19,710 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:54:19,718 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:19,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:54:19,811 INFO L85 PathProgramCache]: Analyzing trace with hash -1937393571, now seen corresponding path program 1 times [2024-05-06 03:54:19,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:19,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:19,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:19,969 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:19,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:19,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:19,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:20,127 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:20,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:54:20,246 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:20,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:54:20,322 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:20,333 INFO L85 PathProgramCache]: Analyzing trace with hash -2035104997, now seen corresponding path program 2 times [2024-05-06 03:54:20,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:20,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:20,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:20,587 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:20,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:20,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:20,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:20,792 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:20,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:54:20,932 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:20,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:54:20,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:20,996 INFO L85 PathProgramCache]: Analyzing trace with hash -1725064559, now seen corresponding path program 55 times [2024-05-06 03:54:20,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:20,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:21,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:21,158 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:21,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:21,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:21,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:21,367 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:21,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:54:21,509 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:21,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:54:21,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:21,589 INFO L85 PathProgramCache]: Analyzing trace with hash 1319875175, now seen corresponding path program 56 times [2024-05-06 03:54:21,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:21,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:21,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:21,802 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:21,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:21,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:21,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:22,012 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:54:22,204 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:22,210 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:22,210 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:25,999 INFO L85 PathProgramCache]: Analyzing trace with hash -1549937964, now seen corresponding path program 1 times [2024-05-06 03:54:25,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:25,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:26,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:26,095 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:26,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:26,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:26,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:26,189 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:26,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:26,335 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:26,335 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:26,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:26,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:28,657 INFO L85 PathProgramCache]: Analyzing trace with hash 1461445790, now seen corresponding path program 2 times [2024-05-06 03:54:28,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:28,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:28,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:28,763 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:28,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:28,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:28,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:28,870 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:28,957 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:28,958 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:54:29,045 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:31,272 INFO L85 PathProgramCache]: Analyzing trace with hash -1664318736, now seen corresponding path program 3 times [2024-05-06 03:54:31,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:31,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:31,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:31,452 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:31,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:31,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:31,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:31,596 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:31,758 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:31,765 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:31,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:31,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:33,923 INFO L85 PathProgramCache]: Analyzing trace with hash -604187212, now seen corresponding path program 13 times [2024-05-06 03:54:33,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:33,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:33,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:34,022 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:34,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:34,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:34,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:34,117 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:34,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:34,264 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:34,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:34,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:36,493 INFO L85 PathProgramCache]: Analyzing trace with hash -130366018, now seen corresponding path program 14 times [2024-05-06 03:54:36,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:36,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:36,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:36,597 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:36,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:36,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:36,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:36,701 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:36,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:36,834 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:36,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:36,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:39,032 INFO L85 PathProgramCache]: Analyzing trace with hash -1404963093, now seen corresponding path program 1 times [2024-05-06 03:54:39,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:39,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:39,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:39,198 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:39,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:39,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:39,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:39,302 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:39,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:39,424 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:39,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:39,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:41,539 INFO L85 PathProgramCache]: Analyzing trace with hash 960901031, now seen corresponding path program 2 times [2024-05-06 03:54:41,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:41,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:41,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:41,643 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:41,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:41,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:41,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:41,746 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:41,867 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:41,892 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:41,893 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:44,033 INFO L85 PathProgramCache]: Analyzing trace with hash -322416092, now seen corresponding path program 1 times [2024-05-06 03:54:44,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:44,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:44,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:44,127 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:44,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:44,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:44,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:44,219 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:44,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:44,361 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:44,361 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:44,434 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:45,182 INFO L85 PathProgramCache]: Analyzing trace with hash 794352462, now seen corresponding path program 2 times [2024-05-06 03:54:45,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:45,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:45,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:45,282 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:45,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:45,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:45,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:45,399 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:45,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:45,574 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:45,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:47,721 INFO L85 PathProgramCache]: Analyzing trace with hash -287495184, now seen corresponding path program 1 times [2024-05-06 03:54:47,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:47,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:47,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:47,816 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:47,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:47,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:47,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:47,910 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:48,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:48,058 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:48,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:48,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:50,241 INFO L85 PathProgramCache]: Analyzing trace with hash -1475104766, now seen corresponding path program 2 times [2024-05-06 03:54:50,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:50,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:50,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:50,343 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:50,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:50,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:50,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:50,445 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:50,595 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:50,662 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:50,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:50,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:54:52,952 INFO L85 PathProgramCache]: Analyzing trace with hash -1256200026, now seen corresponding path program 1 times [2024-05-06 03:54:52,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:52,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:52,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:53,045 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:53,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:53,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:53,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:53,141 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:53,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:53,269 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:53,270 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:55,415 INFO L85 PathProgramCache]: Analyzing trace with hash -768266100, now seen corresponding path program 2 times [2024-05-06 03:54:55,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:55,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:55,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:55,517 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:55,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:55,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:55,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:55,619 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:54:55,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:55,790 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:55,790 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:58,019 INFO L85 PathProgramCache]: Analyzing trace with hash 98024754, now seen corresponding path program 1 times [2024-05-06 03:54:58,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:58,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:58,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:58,111 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:58,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:58,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:58,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:58,204 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:54:58,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:54:58,456 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:58,457 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:54:58,571 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:02,510 INFO L85 PathProgramCache]: Analyzing trace with hash 1142960768, now seen corresponding path program 2 times [2024-05-06 03:55:02,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:02,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:02,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:02,615 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:55:02,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:02,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:02,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:02,739 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:55:02,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:55:02,881 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:02,881 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:55:02,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:05,003 INFO L85 PathProgramCache]: Analyzing trace with hash 1942824745, now seen corresponding path program 57 times [2024-05-06 03:55:05,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:05,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:05,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:05,094 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:05,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:05,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:05,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:05,185 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:05,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:55:05,325 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:05,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:55:05,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:07,441 INFO L85 PathProgramCache]: Analyzing trace with hash 88652713, now seen corresponding path program 58 times [2024-05-06 03:55:07,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:07,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:07,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:07,543 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:55:07,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:07,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:07,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:07,710 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:55:07,797 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:07,797 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:07,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:10,053 INFO L85 PathProgramCache]: Analyzing trace with hash 1977853054, now seen corresponding path program 1 times [2024-05-06 03:55:10,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:10,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:10,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:10,070 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:55:10,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:10,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:55:10,282 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:10,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:55:10,340 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:10,360 INFO L85 PathProgramCache]: Analyzing trace with hash 1183903022, now seen corresponding path program 2 times [2024-05-06 03:55:10,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:10,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:10,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:10,376 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:55:10,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:10,479 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:10,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:10,552 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:12,785 INFO L85 PathProgramCache]: Analyzing trace with hash -1953711487, now seen corresponding path program 3 times [2024-05-06 03:55:12,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:12,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:12,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:12,809 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:55:12,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:12,899 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:12,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:12,978 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:15,178 INFO L85 PathProgramCache]: Analyzing trace with hash -307738324, now seen corresponding path program 1 times [2024-05-06 03:55:15,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:15,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:15,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:15,199 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:55:15,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:15,303 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:15,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:15,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:17,603 INFO L85 PathProgramCache]: Analyzing trace with hash -1941994161, now seen corresponding path program 1 times [2024-05-06 03:55:17,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:17,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:17,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:17,699 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:17,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:17,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:17,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:17,793 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:17,877 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:17,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:17,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:20,229 INFO L85 PathProgramCache]: Analyzing trace with hash -1586665640, now seen corresponding path program 1 times [2024-05-06 03:55:20,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:20,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:20,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:20,410 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:20,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:20,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:20,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:20,507 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:20,608 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:20,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:20,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:22,829 INFO L85 PathProgramCache]: Analyzing trace with hash -882466767, now seen corresponding path program 1 times [2024-05-06 03:55:22,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:22,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:22,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:22,920 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:22,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:22,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:22,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:23,012 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:23,087 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:23,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:23,166 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:25,372 INFO L85 PathProgramCache]: Analyzing trace with hash 1634101306, now seen corresponding path program 1 times [2024-05-06 03:55:25,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:25,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:25,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:25,468 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:25,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:25,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:25,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:25,588 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:25,665 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:25,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:25,761 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:28,001 INFO L85 PathProgramCache]: Analyzing trace with hash 1438186260, now seen corresponding path program 2 times [2024-05-06 03:55:28,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:28,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:28,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:28,095 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:28,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:28,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:28,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:28,277 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:28,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:55:28,417 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:28,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:55:30,811 INFO L85 PathProgramCache]: Analyzing trace with hash -949952947, now seen corresponding path program 3 times [2024-05-06 03:55:30,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:30,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:30,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:31,123 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:55:31,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:31,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:31,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:31,198 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:55:31,273 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:31,274 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:31,334 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:33,525 INFO L85 PathProgramCache]: Analyzing trace with hash 616230223, now seen corresponding path program 4 times [2024-05-06 03:55:33,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:33,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:33,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:33,623 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:55:33,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:33,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:33,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:33,716 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:55:33,792 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:33,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:33,844 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:35,985 INFO L85 PathProgramCache]: Analyzing trace with hash -798591791, now seen corresponding path program 5 times [2024-05-06 03:55:35,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:35,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:35,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:36,078 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:55:36,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:36,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:36,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:36,247 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:55:36,338 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:36,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:36,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:38,621 INFO L85 PathProgramCache]: Analyzing trace with hash -702663718, now seen corresponding path program 6 times [2024-05-06 03:55:38,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:38,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:38,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:38,640 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:55:38,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:38,746 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:38,746 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:38,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:41,008 INFO L85 PathProgramCache]: Analyzing trace with hash -1962329234, now seen corresponding path program 7 times [2024-05-06 03:55:41,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:41,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:41,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:41,029 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:55:41,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:41,130 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:41,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:41,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:43,441 INFO L85 PathProgramCache]: Analyzing trace with hash 887342512, now seen corresponding path program 8 times [2024-05-06 03:55:43,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:43,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:43,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:43,459 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:55:43,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:43,620 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:55:43,627 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:43,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:55:45,863 INFO L85 PathProgramCache]: Analyzing trace with hash 887342512, now seen corresponding path program 9 times [2024-05-06 03:55:45,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:45,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:45,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:45,883 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:55:45,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:46,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:55:46,059 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:46,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:55:48,324 INFO L85 PathProgramCache]: Analyzing trace with hash 715329095, now seen corresponding path program 4 times [2024-05-06 03:55:48,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:48,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:48,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:48,372 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:55:48,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:48,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:48,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:48,418 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:55:48,506 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:48,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:48,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:50,752 INFO L85 PathProgramCache]: Analyzing trace with hash 700365973, now seen corresponding path program 5 times [2024-05-06 03:55:50,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:50,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:50,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:50,773 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:55:50,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:50,873 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:50,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:50,974 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:53,226 INFO L85 PathProgramCache]: Analyzing trace with hash 236509193, now seen corresponding path program 6 times [2024-05-06 03:55:53,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:53,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:53,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:53,325 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:55:53,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:53,415 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:53,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:53,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:55,793 INFO L85 PathProgramCache]: Analyzing trace with hash -1258149097, now seen corresponding path program 7 times [2024-05-06 03:55:55,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:55,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:55,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:55,815 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:55:55,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:55:55,939 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:55,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:56,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:55:58,283 INFO L85 PathProgramCache]: Analyzing trace with hash -1104795281, now seen corresponding path program 10 times [2024-05-06 03:55:58,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:58,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:58,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:58,375 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:58,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:58,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:58,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:58,468 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:58,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:55:58,596 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:58,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:55:58,662 INFO L85 PathProgramCache]: Analyzing trace with hash 111085149, now seen corresponding path program 11 times [2024-05-06 03:55:58,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:58,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:58,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:58,761 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:58,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:58,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:58,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:58,861 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:58,927 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:58,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:55:59,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:01,177 INFO L85 PathProgramCache]: Analyzing trace with hash -851327182, now seen corresponding path program 12 times [2024-05-06 03:56:01,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:01,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:01,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:01,282 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:01,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:01,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:01,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:01,450 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:01,524 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:01,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:01,602 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:03,860 INFO L85 PathProgramCache]: Analyzing trace with hash -1005469884, now seen corresponding path program 13 times [2024-05-06 03:56:03,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:03,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:03,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:03,954 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:03,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:03,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:03,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:04,048 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:04,133 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:04,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:04,234 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:06,458 INFO L85 PathProgramCache]: Analyzing trace with hash 1075944145, now seen corresponding path program 14 times [2024-05-06 03:56:06,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:06,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:06,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:06,550 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:06,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:06,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:06,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:06,643 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:06,731 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:06,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:06,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:08,966 INFO L85 PathProgramCache]: Analyzing trace with hash 1802234931, now seen corresponding path program 15 times [2024-05-06 03:56:08,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:08,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:08,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:09,055 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:09,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:09,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:09,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:09,212 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:09,346 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:56:09,352 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:09,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:56:09,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:09,426 INFO L85 PathProgramCache]: Analyzing trace with hash 1802234931, now seen corresponding path program 16 times [2024-05-06 03:56:09,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:09,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:09,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:09,515 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:09,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:09,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:09,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:09,605 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:09,689 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:09,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:09,758 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:11,933 INFO L85 PathProgramCache]: Analyzing trace with hash 407067436, now seen corresponding path program 1 times [2024-05-06 03:56:11,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:11,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:11,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:12,029 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:12,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:12,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:12,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:12,138 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:12,220 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:12,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:12,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:14,462 INFO L85 PathProgramCache]: Analyzing trace with hash 1121509864, now seen corresponding path program 1 times [2024-05-06 03:56:14,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:14,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:14,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:14,558 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:14,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:14,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:14,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:14,718 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:14,802 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:14,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:14,869 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:17,089 INFO L85 PathProgramCache]: Analyzing trace with hash -933653586, now seen corresponding path program 1 times [2024-05-06 03:56:17,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:17,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:17,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:17,186 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:17,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:17,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:17,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:17,283 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:17,375 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:17,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:17,511 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:19,752 INFO L85 PathProgramCache]: Analyzing trace with hash 246976810, now seen corresponding path program 1 times [2024-05-06 03:56:19,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:19,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:19,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:19,847 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:19,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:19,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:19,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:19,943 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:20,008 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:20,008 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:20,078 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:22,216 INFO L85 PathProgramCache]: Analyzing trace with hash 839250993, now seen corresponding path program 17 times [2024-05-06 03:56:22,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:22,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:22,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:22,314 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:22,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:22,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:22,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:22,479 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:22,585 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:22,585 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:22,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:24,796 INFO L85 PathProgramCache]: Analyzing trace with hash -1677275167, now seen corresponding path program 18 times [2024-05-06 03:56:24,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:24,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:24,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:24,891 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:24,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:24,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:24,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:24,981 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:25,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:56:25,112 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:25,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:56:25,181 INFO L85 PathProgramCache]: Analyzing trace with hash -455922133, now seen corresponding path program 19 times [2024-05-06 03:56:25,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:25,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:25,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:25,282 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:25,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:25,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:25,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:25,384 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:25,449 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:25,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:25,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:27,712 INFO L85 PathProgramCache]: Analyzing trace with hash -1248683740, now seen corresponding path program 20 times [2024-05-06 03:56:27,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:27,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:27,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:27,814 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:27,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:27,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:27,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:27,917 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:28,058 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:28,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:28,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:30,375 INFO L85 PathProgramCache]: Analyzing trace with hash -1993768302, now seen corresponding path program 21 times [2024-05-06 03:56:30,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:30,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:30,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:30,467 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:30,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:30,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:30,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:30,560 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:30,646 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:30,646 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:30,720 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:32,915 INFO L85 PathProgramCache]: Analyzing trace with hash 1182610883, now seen corresponding path program 22 times [2024-05-06 03:56:32,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:32,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:32,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:33,021 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:33,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:33,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:33,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:33,115 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:33,190 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:33,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:33,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:35,454 INFO L85 PathProgramCache]: Analyzing trace with hash -847930459, now seen corresponding path program 23 times [2024-05-06 03:56:35,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:35,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:35,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:35,544 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:35,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:35,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:35,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:35,634 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:35,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:56:35,757 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:35,758 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:56:35,807 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:35,830 INFO L85 PathProgramCache]: Analyzing trace with hash -847930459, now seen corresponding path program 24 times [2024-05-06 03:56:35,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:35,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:35,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:35,978 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:35,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:35,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:35,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:36,068 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:36,136 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:36,136 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:36,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:38,422 INFO L85 PathProgramCache]: Analyzing trace with hash 1047647482, now seen corresponding path program 2 times [2024-05-06 03:56:38,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:38,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:38,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:38,518 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:38,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:38,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:38,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:38,624 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:38,690 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:38,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:38,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:40,891 INFO L85 PathProgramCache]: Analyzing trace with hash -1490225574, now seen corresponding path program 2 times [2024-05-06 03:56:40,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:40,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:40,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:40,993 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:40,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:40,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:41,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:41,091 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:41,176 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:41,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:41,245 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:43,419 INFO L85 PathProgramCache]: Analyzing trace with hash -740808452, now seen corresponding path program 2 times [2024-05-06 03:56:43,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:43,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:43,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:43,587 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:43,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:43,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:43,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:43,682 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:43,782 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:43,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:43,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:46,090 INFO L85 PathProgramCache]: Analyzing trace with hash -578086372, now seen corresponding path program 2 times [2024-05-06 03:56:46,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:46,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:46,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:46,185 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:46,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:46,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:46,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:46,281 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:46,366 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:46,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:46,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:48,594 INFO L85 PathProgramCache]: Analyzing trace with hash 119899391, now seen corresponding path program 25 times [2024-05-06 03:56:48,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:48,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:48,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:48,691 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:48,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:48,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:48,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:48,790 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:48,879 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:48,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:48,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:51,213 INFO L85 PathProgramCache]: Analyzing trace with hash 1236366701, now seen corresponding path program 26 times [2024-05-06 03:56:51,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:51,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:51,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:51,379 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:51,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:51,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:51,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:51,471 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:51,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:56:51,596 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:51,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:56:51,663 INFO L85 PathProgramCache]: Analyzing trace with hash -327337441, now seen corresponding path program 27 times [2024-05-06 03:56:51,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:51,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:51,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:51,761 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:51,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:51,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:51,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:51,861 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:51,925 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:51,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:51,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:54,223 INFO L85 PathProgramCache]: Analyzing trace with hash -1557525584, now seen corresponding path program 28 times [2024-05-06 03:56:54,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:54,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:54,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:54,323 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:54,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:54,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:54,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:54,433 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:54,507 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:54,508 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:54,585 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:56,786 INFO L85 PathProgramCache]: Analyzing trace with hash -1207043194, now seen corresponding path program 29 times [2024-05-06 03:56:56,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:56,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:56,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:56,982 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:56,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:56,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:56,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:57,072 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:57,140 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:57,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:57,210 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:56:59,413 INFO L85 PathProgramCache]: Analyzing trace with hash -177484209, now seen corresponding path program 30 times [2024-05-06 03:56:59,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:59,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:59,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:59,503 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:59,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:59,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:59,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:59,596 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:59,665 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:59,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:56:59,725 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:01,928 INFO L85 PathProgramCache]: Analyzing trace with hash -737614031, now seen corresponding path program 31 times [2024-05-06 03:57:01,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:01,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:01,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:02,017 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:02,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:02,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:02,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:02,105 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:02,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:57:02,237 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:02,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:57:02,300 INFO L85 PathProgramCache]: Analyzing trace with hash -737614031, now seen corresponding path program 32 times [2024-05-06 03:57:02,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:02,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:02,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:02,387 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:02,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:02,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:02,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:02,593 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:02,678 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:02,678 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:02,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:05,018 INFO L85 PathProgramCache]: Analyzing trace with hash 1041935598, now seen corresponding path program 3 times [2024-05-06 03:57:05,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:05,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:05,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:05,115 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:05,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:05,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:05,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:05,211 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:05,277 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:05,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:05,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:07,538 INFO L85 PathProgramCache]: Analyzing trace with hash 1003442150, now seen corresponding path program 3 times [2024-05-06 03:57:07,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:07,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:07,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:07,636 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:07,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:07,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:07,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:07,733 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:07,817 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:07,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:07,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:10,027 INFO L85 PathProgramCache]: Analyzing trace with hash 1140747760, now seen corresponding path program 3 times [2024-05-06 03:57:10,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:10,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:10,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:10,123 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:10,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:10,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:10,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:10,280 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:10,359 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:10,359 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:10,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:12,754 INFO L85 PathProgramCache]: Analyzing trace with hash 1976460968, now seen corresponding path program 3 times [2024-05-06 03:57:12,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:12,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:12,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:12,866 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:12,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:12,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:12,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:12,964 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:13,047 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:13,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:13,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:15,321 INFO L85 PathProgramCache]: Analyzing trace with hash -767527181, now seen corresponding path program 33 times [2024-05-06 03:57:15,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:15,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:15,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:15,417 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:15,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:15,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:15,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:15,514 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:15,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:57:15,664 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:15,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:57:15,757 INFO L85 PathProgramCache]: Analyzing trace with hash 700365957, now seen corresponding path program 8 times [2024-05-06 03:57:15,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:15,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:15,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:15,844 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:15,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:15,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:15,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:16,018 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:16,101 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:16,101 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:16,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:18,310 INFO L85 PathProgramCache]: Analyzing trace with hash 236508682, now seen corresponding path program 9 times [2024-05-06 03:57:18,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:18,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:18,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:18,396 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:18,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:18,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:18,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:18,506 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:18,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:57:18,638 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:18,639 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:57:20,782 INFO L85 PathProgramCache]: Analyzing trace with hash 236508682, now seen corresponding path program 10 times [2024-05-06 03:57:20,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:20,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:20,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:20,831 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:57:20,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:20,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:20,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:20,879 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:57:20,948 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:20,949 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:21,021 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:23,236 INFO L85 PathProgramCache]: Analyzing trace with hash 1374025759, now seen corresponding path program 34 times [2024-05-06 03:57:23,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:23,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:23,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:23,325 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:23,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:23,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:23,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:23,425 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:23,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:57:23,551 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:23,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:57:23,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:25,661 INFO L85 PathProgramCache]: Analyzing trace with hash 1374025759, now seen corresponding path program 35 times [2024-05-06 03:57:25,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:25,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:25,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:25,812 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:25,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:25,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:25,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:25,900 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:25,980 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:25,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:26,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:28,243 INFO L85 PathProgramCache]: Analyzing trace with hash -1766599877, now seen corresponding path program 36 times [2024-05-06 03:57:28,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:28,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:28,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:28,338 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:28,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:28,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:28,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:28,433 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:28,554 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:57:28,560 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:28,560 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:57:28,612 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:30,693 INFO L85 PathProgramCache]: Analyzing trace with hash -1766599877, now seen corresponding path program 37 times [2024-05-06 03:57:30,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:30,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:30,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:30,800 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:30,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:30,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:30,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:30,905 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:31,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 03:57:31,049 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:31,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 03:57:31,130 INFO L85 PathProgramCache]: Analyzing trace with hash -1766599877, now seen corresponding path program 38 times [2024-05-06 03:57:31,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:31,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:31,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:31,317 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:31,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:31,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:31,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:31,437 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:31,519 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:31,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:31,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:33,810 INFO L85 PathProgramCache]: Analyzing trace with hash 1269250435, now seen corresponding path program 4 times [2024-05-06 03:57:33,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:33,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:33,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:33,919 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:33,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:33,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:33,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:34,028 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:34,118 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:34,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:34,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:36,383 INFO L85 PathProgramCache]: Analyzing trace with hash -352057640, now seen corresponding path program 1 times [2024-05-06 03:57:36,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:36,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:36,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:36,496 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:36,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:36,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:36,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:36,608 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:36,692 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:36,692 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:36,766 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:38,916 INFO L85 PathProgramCache]: Analyzing trace with hash -1396830033, now seen corresponding path program 1 times [2024-05-06 03:57:38,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:38,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:38,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:39,140 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:39,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:39,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:39,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:39,279 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:39,379 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:39,379 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:39,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:41,765 INFO L85 PathProgramCache]: Analyzing trace with hash -1153437702, now seen corresponding path program 1 times [2024-05-06 03:57:41,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:41,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:41,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:41,876 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:41,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:41,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:41,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:41,987 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:42,082 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:42,083 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:42,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:44,418 INFO L85 PathProgramCache]: Analyzing trace with hash -1699775663, now seen corresponding path program 1 times [2024-05-06 03:57:44,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:44,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:44,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:44,530 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:44,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:44,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:44,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:44,711 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:44,800 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:44,800 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:44,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:47,141 INFO L85 PathProgramCache]: Analyzing trace with hash 637905181, now seen corresponding path program 5 times [2024-05-06 03:57:47,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:47,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:47,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:47,249 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:47,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:47,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:47,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:47,358 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:47,505 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:57:47,511 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:47,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:57:49,640 INFO L85 PathProgramCache]: Analyzing trace with hash 692058326, now seen corresponding path program 6 times [2024-05-06 03:57:49,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:49,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:49,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:49,747 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:49,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:49,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:49,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:49,852 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:49,920 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:49,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:49,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:52,134 INFO L85 PathProgramCache]: Analyzing trace with hash -21027866, now seen corresponding path program 7 times [2024-05-06 03:57:52,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:52,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:52,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:52,241 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:52,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:52,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:52,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:52,431 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:52,511 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:52,511 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:52,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:54,747 INFO L85 PathProgramCache]: Analyzing trace with hash -1717667449, now seen corresponding path program 8 times [2024-05-06 03:57:54,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:54,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:54,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:54,848 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:54,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:54,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:54,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:54,949 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:55,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:57:55,106 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:55,107 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:57:57,328 INFO L85 PathProgramCache]: Analyzing trace with hash -1717667449, now seen corresponding path program 9 times [2024-05-06 03:57:57,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:57,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:57,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:57,433 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:57,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:57,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:57,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:57,537 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:57,614 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:57,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:57,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:59,832 INFO L85 PathProgramCache]: Analyzing trace with hash -644362561, now seen corresponding path program 4 times [2024-05-06 03:57:59,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:59,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:59,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:00,010 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:00,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:00,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:00,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:00,113 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:00,189 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:00,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:00,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:02,540 INFO L85 PathProgramCache]: Analyzing trace with hash 186750236, now seen corresponding path program 1 times [2024-05-06 03:58:02,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:02,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:02,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:02,653 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:02,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:02,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:02,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:02,809 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:02,897 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:02,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:02,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:05,249 INFO L85 PathProgramCache]: Analyzing trace with hash -548165141, now seen corresponding path program 1 times [2024-05-06 03:58:05,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:05,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:05,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:05,358 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:05,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:05,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:05,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:05,467 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:05,528 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:05,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:05,654 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:07,836 INFO L85 PathProgramCache]: Analyzing trace with hash 120864574, now seen corresponding path program 1 times [2024-05-06 03:58:07,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:07,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:07,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:07,948 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:07,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:07,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:07,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:08,059 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:08,123 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:08,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:08,206 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:10,407 INFO L85 PathProgramCache]: Analyzing trace with hash 1527919501, now seen corresponding path program 1 times [2024-05-06 03:58:10,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:10,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:10,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:10,518 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:10,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:10,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:10,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:10,629 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:10,694 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:10,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:10,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:12,874 INFO L85 PathProgramCache]: Analyzing trace with hash 1988950369, now seen corresponding path program 5 times [2024-05-06 03:58:12,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:12,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:12,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:12,984 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:12,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:12,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:13,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:13,156 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:13,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:58:13,284 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:13,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:58:13,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:15,430 INFO L85 PathProgramCache]: Analyzing trace with hash 1499597594, now seen corresponding path program 6 times [2024-05-06 03:58:15,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:15,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:15,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:15,539 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:15,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:15,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:15,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:15,673 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:15,740 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:15,740 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:15,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:17,955 INFO L85 PathProgramCache]: Analyzing trace with hash -757114334, now seen corresponding path program 7 times [2024-05-06 03:58:17,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:17,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:17,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:18,061 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:18,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:18,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:18,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:18,190 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:18,278 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:18,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:18,359 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:20,542 INFO L85 PathProgramCache]: Analyzing trace with hash 1052970179, now seen corresponding path program 8 times [2024-05-06 03:58:20,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:20,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:20,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:20,748 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:20,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:20,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:20,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:20,853 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:20,984 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:58:20,990 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:20,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:58:21,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:23,120 INFO L85 PathProgramCache]: Analyzing trace with hash 1052970179, now seen corresponding path program 9 times [2024-05-06 03:58:23,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:23,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:23,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:23,224 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:23,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:23,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:23,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:23,337 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:23,425 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:23,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:23,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:25,755 INFO L85 PathProgramCache]: Analyzing trace with hash -1203023039, now seen corresponding path program 4 times [2024-05-06 03:58:25,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:25,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:25,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:25,864 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:25,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:25,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:25,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:25,976 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:26,140 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:26,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:26,236 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:28,464 INFO L85 PathProgramCache]: Analyzing trace with hash -244448550, now seen corresponding path program 1 times [2024-05-06 03:58:28,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:28,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:28,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:28,575 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:28,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:28,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:28,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:28,686 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:28,766 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:28,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:28,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:31,010 INFO L85 PathProgramCache]: Analyzing trace with hash -284980115, now seen corresponding path program 1 times [2024-05-06 03:58:31,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:31,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:31,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:31,121 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:31,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:31,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:31,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:31,234 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:31,306 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:31,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:31,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:33,542 INFO L85 PathProgramCache]: Analyzing trace with hash -1533213572, now seen corresponding path program 1 times [2024-05-06 03:58:33,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:33,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:33,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:33,732 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:33,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:33,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:33,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:33,868 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:33,937 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:33,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:34,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:36,222 INFO L85 PathProgramCache]: Analyzing trace with hash -1157837169, now seen corresponding path program 1 times [2024-05-06 03:58:36,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:36,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:36,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:36,330 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:36,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:36,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:36,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:36,448 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:36,523 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:36,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:36,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:38,855 INFO L85 PathProgramCache]: Analyzing trace with hash -314444257, now seen corresponding path program 5 times [2024-05-06 03:58:38,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:38,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:38,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:38,964 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:38,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:38,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:38,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:39,074 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:39,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:58:39,282 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:39,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:58:39,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:42,035 INFO L85 PathProgramCache]: Analyzing trace with hash 1360991960, now seen corresponding path program 6 times [2024-05-06 03:58:42,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:42,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:42,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:42,150 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:42,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:42,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:42,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:42,255 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:42,340 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:42,340 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:42,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:44,633 INFO L85 PathProgramCache]: Analyzing trace with hash -758921692, now seen corresponding path program 7 times [2024-05-06 03:58:44,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:44,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:44,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:44,741 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:44,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:44,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:44,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:44,852 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:44,930 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:44,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:45,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:47,261 INFO L85 PathProgramCache]: Analyzing trace with hash 1835082309, now seen corresponding path program 8 times [2024-05-06 03:58:47,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:47,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:47,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:47,422 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:47,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:47,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:47,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:47,528 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:47,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:58:47,680 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:47,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:58:49,816 INFO L85 PathProgramCache]: Analyzing trace with hash 1835082309, now seen corresponding path program 9 times [2024-05-06 03:58:49,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:49,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:49,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:49,939 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:49,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:49,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:49,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:50,042 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:50,141 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:50,142 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:50,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:52,461 INFO L85 PathProgramCache]: Analyzing trace with hash -1440880707, now seen corresponding path program 4 times [2024-05-06 03:58:52,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:52,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:52,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:52,570 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:52,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:52,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:52,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:52,746 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:52,839 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:52,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:52,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:55,101 INFO L85 PathProgramCache]: Analyzing trace with hash -1261127202, now seen corresponding path program 1 times [2024-05-06 03:58:55,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:55,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:55,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:55,213 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:55,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:55,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:55,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:55,328 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:55,426 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:55,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:55,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:57,788 INFO L85 PathProgramCache]: Analyzing trace with hash 1344791785, now seen corresponding path program 1 times [2024-05-06 03:58:57,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:57,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:57,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:57,900 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:57,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:57,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:57,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:58,011 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:58,112 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:58,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:58,206 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:00,409 INFO L85 PathProgramCache]: Analyzing trace with hash -510808960, now seen corresponding path program 1 times [2024-05-06 03:59:00,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:00,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:00,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:00,576 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:00,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:00,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:00,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:00,685 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:00,764 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:00,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:00,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:02,993 INFO L85 PathProgramCache]: Analyzing trace with hash 1091900939, now seen corresponding path program 1 times [2024-05-06 03:59:02,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:02,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:03,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:03,105 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:03,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:03,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:03,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:03,215 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:03,317 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:03,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:03,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:05,608 INFO L85 PathProgramCache]: Analyzing trace with hash -1350250717, now seen corresponding path program 5 times [2024-05-06 03:59:05,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:05,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:05,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:05,797 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:05,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:05,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:05,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:05,906 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:06,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:06,071 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:06,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:06,151 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:08,277 INFO L85 PathProgramCache]: Analyzing trace with hash -1717628452, now seen corresponding path program 6 times [2024-05-06 03:59:08,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:08,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:08,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:08,386 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:08,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:08,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:08,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:08,492 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:08,576 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:08,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:08,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:10,945 INFO L85 PathProgramCache]: Analyzing trace with hash -1706873952, now seen corresponding path program 7 times [2024-05-06 03:59:10,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:10,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:10,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:11,057 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:11,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:11,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:11,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:11,303 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:11,402 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:11,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:11,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:13,792 INFO L85 PathProgramCache]: Analyzing trace with hash 197743809, now seen corresponding path program 8 times [2024-05-06 03:59:13,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:13,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:13,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:13,904 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:13,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:13,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:13,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:14,039 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:14,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:14,199 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:14,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:14,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:16,388 INFO L85 PathProgramCache]: Analyzing trace with hash 197743809, now seen corresponding path program 9 times [2024-05-06 03:59:16,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:16,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:16,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:16,492 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:16,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:16,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:16,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:16,596 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:16,668 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:16,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:16,748 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:18,936 INFO L85 PathProgramCache]: Analyzing trace with hash -1362666082, now seen corresponding path program 39 times [2024-05-06 03:59:18,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:18,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:18,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:19,043 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:19,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:19,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:19,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:19,150 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:19,236 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:19,236 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:19,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:21,539 INFO L85 PathProgramCache]: Analyzing trace with hash 596332829, now seen corresponding path program 2 times [2024-05-06 03:59:21,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:21,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:21,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:21,647 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:21,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:21,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:21,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:21,758 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:21,842 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:21,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:21,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:24,182 INFO L85 PathProgramCache]: Analyzing trace with hash 850520522, now seen corresponding path program 2 times [2024-05-06 03:59:24,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:24,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:24,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:24,368 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:24,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:24,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:24,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:24,480 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:24,562 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:24,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:24,661 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:26,918 INFO L85 PathProgramCache]: Analyzing trace with hash 858720127, now seen corresponding path program 2 times [2024-05-06 03:59:26,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:26,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:26,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:27,031 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:27,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:27,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:27,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:27,153 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:27,236 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:27,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:27,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:29,513 INFO L85 PathProgramCache]: Analyzing trace with hash 443342636, now seen corresponding path program 2 times [2024-05-06 03:59:29,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:29,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:29,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:29,704 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:29,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:29,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:29,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:29,826 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:29,912 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:29,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:29,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:32,218 INFO L85 PathProgramCache]: Analyzing trace with hash 1399774690, now seen corresponding path program 40 times [2024-05-06 03:59:32,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:32,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:32,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:32,329 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:32,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:32,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:32,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:32,438 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:32,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:32,575 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:32,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:32,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:35,037 INFO L85 PathProgramCache]: Analyzing trace with hash 707024923, now seen corresponding path program 41 times [2024-05-06 03:59:35,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:35,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:35,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:35,352 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:35,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:35,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:35,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:35,609 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:35,694 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:35,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:35,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:37,997 INFO L85 PathProgramCache]: Analyzing trace with hash 442936641, now seen corresponding path program 42 times [2024-05-06 03:59:37,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:37,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:38,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:38,254 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:38,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:38,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:38,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:38,559 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:38,634 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:38,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:38,713 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:40,883 INFO L85 PathProgramCache]: Analyzing trace with hash -963452126, now seen corresponding path program 43 times [2024-05-06 03:59:40,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:40,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:40,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:41,005 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:41,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:41,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:41,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:41,114 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:41,249 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:41,256 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:41,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:43,732 INFO L85 PathProgramCache]: Analyzing trace with hash -963452126, now seen corresponding path program 44 times [2024-05-06 03:59:43,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:43,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:43,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:43,885 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:43,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:43,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:43,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:43,995 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:44,066 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:44,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:44,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:46,323 INFO L85 PathProgramCache]: Analyzing trace with hash 205434121, now seen corresponding path program 45 times [2024-05-06 03:59:46,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:46,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:46,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:46,464 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:46,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:46,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:46,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:46,574 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:46,665 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:46,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:46,748 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:48,977 INFO L85 PathProgramCache]: Analyzing trace with hash -1064359406, now seen corresponding path program 3 times [2024-05-06 03:59:48,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:48,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:48,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:49,134 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:59:49,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:49,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:49,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:49,248 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:59:49,324 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:49,324 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:49,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:51,625 INFO L85 PathProgramCache]: Analyzing trace with hash 1074044469, now seen corresponding path program 3 times [2024-05-06 03:59:51,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:51,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:51,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:51,736 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:59:51,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:51,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:51,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:51,848 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:59:51,932 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:51,933 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:52,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:54,229 INFO L85 PathProgramCache]: Analyzing trace with hash -103900748, now seen corresponding path program 3 times [2024-05-06 03:59:54,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:54,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:54,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:54,339 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:59:54,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:54,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:54,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:54,502 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:59:54,586 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:54,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:54,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:56,906 INFO L85 PathProgramCache]: Analyzing trace with hash 1797763671, now seen corresponding path program 3 times [2024-05-06 03:59:56,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:56,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:56,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:57,020 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:59:57,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:57,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:57,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:57,129 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:59:57,202 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:57,202 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:57,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:59,494 INFO L85 PathProgramCache]: Analyzing trace with hash 1304918359, now seen corresponding path program 46 times [2024-05-06 03:59:59,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:59,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:59,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:59,605 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:59,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:59,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:59,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:59,785 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:59,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:59,930 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:59,931 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:00:04,458 INFO L85 PathProgramCache]: Analyzing trace with hash 2073490960, now seen corresponding path program 47 times [2024-05-06 04:00:04,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:04,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:04,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:04,717 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:04,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:04,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:04,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:05,035 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:05,111 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:05,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:05,197 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:07,403 INFO L85 PathProgramCache]: Analyzing trace with hash -146289172, now seen corresponding path program 48 times [2024-05-06 04:00:07,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:07,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:07,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:07,641 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:07,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:07,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:07,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:07,957 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:08,031 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:08,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:08,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:10,339 INFO L85 PathProgramCache]: Analyzing trace with hash 676896781, now seen corresponding path program 49 times [2024-05-06 04:00:10,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:10,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:10,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:10,450 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:10,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:10,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:10,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:10,558 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:10,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:00:10,709 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:10,709 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:00:10,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:12,930 INFO L85 PathProgramCache]: Analyzing trace with hash 676896781, now seen corresponding path program 50 times [2024-05-06 04:00:12,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:12,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:12,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:13,038 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:13,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:13,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:13,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:13,229 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:13,315 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:13,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:13,395 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:15,642 INFO L85 PathProgramCache]: Analyzing trace with hash -884977344, now seen corresponding path program 51 times [2024-05-06 04:00:15,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:15,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:15,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:15,748 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:15,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:15,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:15,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:15,854 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:15,909 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:15,910 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:15,976 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:18,169 INFO L85 PathProgramCache]: Analyzing trace with hash -621980741, now seen corresponding path program 4 times [2024-05-06 04:00:18,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:18,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:18,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:18,279 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:18,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:18,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:18,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:18,439 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:18,528 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:18,528 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:18,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:20,866 INFO L85 PathProgramCache]: Analyzing trace with hash 534125420, now seen corresponding path program 4 times [2024-05-06 04:00:20,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:20,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:20,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:21,000 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:21,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:21,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:21,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:21,120 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:21,189 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:21,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:21,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:23,370 INFO L85 PathProgramCache]: Analyzing trace with hash 432871837, now seen corresponding path program 4 times [2024-05-06 04:00:23,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:23,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:23,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:23,477 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:23,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:23,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:23,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:23,632 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:23,724 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:23,724 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:23,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:26,073 INFO L85 PathProgramCache]: Analyzing trace with hash 13963598, now seen corresponding path program 4 times [2024-05-06 04:00:26,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:26,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:26,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:26,185 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:26,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:26,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:26,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:26,297 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:26,378 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:26,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:26,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:28,706 INFO L85 PathProgramCache]: Analyzing trace with hash 450432, now seen corresponding path program 52 times [2024-05-06 04:00:28,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:28,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:28,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:28,826 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:28,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:28,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:28,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:28,987 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:29,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:00:29,140 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:29,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:00:31,295 INFO L85 PathProgramCache]: Analyzing trace with hash -1664493383, now seen corresponding path program 53 times [2024-05-06 04:00:31,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:31,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:31,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:31,544 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:31,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:31,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:31,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:31,840 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:31,923 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:31,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:32,011 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:34,211 INFO L85 PathProgramCache]: Analyzing trace with hash -59686813, now seen corresponding path program 54 times [2024-05-06 04:00:34,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:34,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:34,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:34,456 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:34,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:34,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:34,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:34,746 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:34,835 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:34,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:34,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:37,097 INFO L85 PathProgramCache]: Analyzing trace with hash 1548416964, now seen corresponding path program 55 times [2024-05-06 04:00:37,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:37,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:37,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:37,204 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:37,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:37,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:37,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:37,311 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:37,438 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:00:37,445 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:37,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:00:37,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:39,577 INFO L85 PathProgramCache]: Analyzing trace with hash 1548416964, now seen corresponding path program 56 times [2024-05-06 04:00:39,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:39,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:39,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:39,790 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:39,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:39,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:39,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:39,998 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:40,088 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:40,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:40,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:42,436 INFO L85 PathProgramCache]: Analyzing trace with hash -1407683358, now seen corresponding path program 57 times [2024-05-06 04:00:42,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:42,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:42,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:42,545 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:42,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:42,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:42,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:42,655 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:42,797 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:00:42,804 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:42,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:00:42,877 INFO L85 PathProgramCache]: Analyzing trace with hash -1407683358, now seen corresponding path program 58 times [2024-05-06 04:00:42,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:42,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:42,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:42,989 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:42,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:42,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:43,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:43,170 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:43,264 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:43,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:43,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:45,559 INFO L85 PathProgramCache]: Analyzing trace with hash 235284057, now seen corresponding path program 5 times [2024-05-06 04:00:45,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:45,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:45,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:45,669 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:45,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:45,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:45,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:45,778 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:45,898 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:45,904 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:45,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:45,978 INFO L85 PathProgramCache]: Analyzing trace with hash 235284057, now seen corresponding path program 6 times [2024-05-06 04:00:45,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:45,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:46,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:46,101 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:46,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:46,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:46,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:46,259 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:46,332 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:46,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:46,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:48,557 INFO L85 PathProgramCache]: Analyzing trace with hash 136520173, now seen corresponding path program 7 times [2024-05-06 04:00:48,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:48,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:48,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:48,675 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:48,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:48,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:48,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:48,795 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:48,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:00:48,930 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:48,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:00:49,011 INFO L85 PathProgramCache]: Analyzing trace with hash -62841441, now seen corresponding path program 8 times [2024-05-06 04:00:49,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:49,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:49,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:49,178 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:49,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:49,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:49,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:49,313 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:49,420 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:49,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:49,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:51,740 INFO L85 PathProgramCache]: Analyzing trace with hash -1948084176, now seen corresponding path program 9 times [2024-05-06 04:00:51,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:51,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:51,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:51,861 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:51,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:51,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:51,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:51,981 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:52,058 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:52,058 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:52,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:54,389 INFO L85 PathProgramCache]: Analyzing trace with hash -685146866, now seen corresponding path program 5 times [2024-05-06 04:00:54,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:54,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:54,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:54,498 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:54,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:54,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:54,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:54,605 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:54,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:00:54,734 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:54,734 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:00:54,790 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:54,808 INFO L85 PathProgramCache]: Analyzing trace with hash -685146866, now seen corresponding path program 6 times [2024-05-06 04:00:54,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:54,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:54,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:54,916 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:54,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:54,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:54,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:55,025 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:00:55,168 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:55,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:55,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:57,595 INFO L85 PathProgramCache]: Analyzing trace with hash -707127326, now seen corresponding path program 7 times [2024-05-06 04:00:57,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:57,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:57,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:57,714 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:57,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:57,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:57,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:57,836 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:57,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:57,987 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:57,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:58,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:58,065 INFO L85 PathProgramCache]: Analyzing trace with hash -446110134, now seen corresponding path program 8 times [2024-05-06 04:00:58,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:58,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:58,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:58,185 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:58,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:58,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:58,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:58,401 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:58,492 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:58,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:58,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:00,764 INFO L85 PathProgramCache]: Analyzing trace with hash -944511771, now seen corresponding path program 9 times [2024-05-06 04:01:00,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:00,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:00,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:00,885 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:00,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:00,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:00,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:01,006 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:01,118 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:01,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:01,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:03,382 INFO L85 PathProgramCache]: Analyzing trace with hash -1684669509, now seen corresponding path program 5 times [2024-05-06 04:01:03,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:03,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:03,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:03,694 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:01:03,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:03,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:03,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:03,863 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:01:04,008 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:01:04,015 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:04,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:01:04,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:04,108 INFO L85 PathProgramCache]: Analyzing trace with hash -1684669509, now seen corresponding path program 6 times [2024-05-06 04:01:04,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:04,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:04,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:04,237 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:01:04,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:04,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:04,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:04,376 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:01:04,512 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:04,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:04,581 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:06,752 INFO L85 PathProgramCache]: Analyzing trace with hash 618193871, now seen corresponding path program 7 times [2024-05-06 04:01:06,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:06,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:06,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:06,869 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:06,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:06,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:06,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:06,985 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:07,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:01:07,115 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:07,115 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:01:07,193 INFO L85 PathProgramCache]: Analyzing trace with hash 1984141309, now seen corresponding path program 8 times [2024-05-06 04:01:07,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:07,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:07,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:07,309 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:07,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:07,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:07,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:07,516 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:07,621 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:07,621 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:07,711 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:09,908 INFO L85 PathProgramCache]: Analyzing trace with hash 1378838930, now seen corresponding path program 9 times [2024-05-06 04:01:09,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:09,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:09,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:10,029 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:10,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:10,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:10,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:10,147 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:10,232 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:10,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:10,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:12,479 INFO L85 PathProgramCache]: Analyzing trace with hash -747080848, now seen corresponding path program 5 times [2024-05-06 04:01:12,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:12,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:12,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:12,666 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:01:12,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:12,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:12,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:12,792 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:01:12,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:01:12,953 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:12,953 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:01:13,014 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:13,031 INFO L85 PathProgramCache]: Analyzing trace with hash -747080848, now seen corresponding path program 6 times [2024-05-06 04:01:13,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:13,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:13,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:13,157 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:01:13,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:13,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:13,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:13,326 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:01:13,414 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:13,414 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:13,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:15,778 INFO L85 PathProgramCache]: Analyzing trace with hash 1874934468, now seen corresponding path program 7 times [2024-05-06 04:01:15,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:15,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:15,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:15,898 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:15,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:15,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:15,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:16,018 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:16,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:01:16,178 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:16,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:01:16,261 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:16,274 INFO L85 PathProgramCache]: Analyzing trace with hash -2006573144, now seen corresponding path program 8 times [2024-05-06 04:01:16,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:16,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:16,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:16,441 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:16,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:16,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:16,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:16,560 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:16,643 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:16,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:16,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:18,947 INFO L85 PathProgramCache]: Analyzing trace with hash -2074224825, now seen corresponding path program 9 times [2024-05-06 04:01:18,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:18,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:18,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:19,067 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:19,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:19,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:19,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:19,243 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:19,358 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:19,358 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:19,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:21,720 INFO L85 PathProgramCache]: Analyzing trace with hash -1271025378, now seen corresponding path program 59 times [2024-05-06 04:01:21,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:21,833 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:21,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:21,945 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:22,083 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:01:22,091 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:22,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:01:22,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:22,182 INFO L85 PathProgramCache]: Analyzing trace with hash -1271025378, now seen corresponding path program 60 times [2024-05-06 04:01:22,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,333 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:22,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,444 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:22,533 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:22,533 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:22,620 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:24,870 INFO L85 PathProgramCache]: Analyzing trace with hash 1866067954, now seen corresponding path program 61 times [2024-05-06 04:01:24,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:24,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:24,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:24,989 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:01:24,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:24,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:25,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:25,152 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:01:25,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:01:25,312 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:25,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:01:25,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:25,398 INFO L85 PathProgramCache]: Analyzing trace with hash 2013532218, now seen corresponding path program 62 times [2024-05-06 04:01:25,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:25,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:25,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:25,533 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:01:25,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:25,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:25,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:25,669 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:01:25,756 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:25,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:25,867 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:28,186 INFO L85 PathProgramCache]: Analyzing trace with hash -2005010187, now seen corresponding path program 63 times [2024-05-06 04:01:28,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:28,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:28,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:28,378 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:01:28,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:28,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:28,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:28,496 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:01:28,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:28,631 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:28,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:28,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:29,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:30,004 INFO L85 PathProgramCache]: Analyzing trace with hash -688510633, now seen corresponding path program 64 times [2024-05-06 04:01:30,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:30,303 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:30,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:30,592 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:30,676 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:30,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:30,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:32,962 INFO L85 PathProgramCache]: Analyzing trace with hash 131007365, now seen corresponding path program 65 times [2024-05-06 04:01:32,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:32,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:32,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,238 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:33,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,525 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:33,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:01:33,675 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:33,675 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:01:33,742 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:33,761 INFO L85 PathProgramCache]: Analyzing trace with hash 131007365, now seen corresponding path program 66 times [2024-05-06 04:01:33,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:34,029 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:34,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:34,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:34,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:34,346 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:34,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:34,572 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:34,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:34,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:34,812 INFO L85 PathProgramCache]: Analyzing trace with hash 1253366651, now seen corresponding path program 1 times [2024-05-06 04:01:34,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:34,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:34,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:35,641 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:01:35,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:35,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:35,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:35,764 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:01:35,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:35,915 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:35,915 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:38,149 INFO L85 PathProgramCache]: Analyzing trace with hash 768984002, now seen corresponding path program 2 times [2024-05-06 04:01:38,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:38,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:38,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:38,226 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:38,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:38,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:38,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:38,302 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:38,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:38,487 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:38,487 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:40,645 INFO L85 PathProgramCache]: Analyzing trace with hash 270778325, now seen corresponding path program 1 times [2024-05-06 04:01:40,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:40,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:40,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:40,725 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:40,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:40,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:40,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:40,855 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:41,010 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:41,017 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:41,018 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:43,178 INFO L85 PathProgramCache]: Analyzing trace with hash -945025240, now seen corresponding path program 2 times [2024-05-06 04:01:43,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:43,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:43,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:43,254 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:43,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:43,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:43,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:43,330 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:43,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:43,477 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:43,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:43,528 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:45,624 INFO L85 PathProgramCache]: Analyzing trace with hash 1598447293, now seen corresponding path program 1 times [2024-05-06 04:01:45,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:45,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:45,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:45,752 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:45,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:45,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:45,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:45,830 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:45,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:45,998 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:45,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:48,933 INFO L85 PathProgramCache]: Analyzing trace with hash 1909178176, now seen corresponding path program 2 times [2024-05-06 04:01:48,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:48,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:48,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:49,010 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:49,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:49,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:49,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:49,086 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:49,292 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:49,299 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:49,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:51,537 INFO L85 PathProgramCache]: Analyzing trace with hash -47400617, now seen corresponding path program 1 times [2024-05-06 04:01:51,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:51,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:51,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:51,615 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:51,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:51,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:51,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:51,695 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:51,847 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:51,854 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:51,854 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:55,133 INFO L85 PathProgramCache]: Analyzing trace with hash -76960666, now seen corresponding path program 2 times [2024-05-06 04:01:55,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:55,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:55,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:55,302 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:55,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:55,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:55,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:55,379 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:55,518 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:55,524 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:55,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:57,651 INFO L85 PathProgramCache]: Analyzing trace with hash 483808576, now seen corresponding path program 1 times [2024-05-06 04:01:57,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:57,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:57,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:57,790 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:57,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:57,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:57,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:57,876 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:58,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:58,043 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:58,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:00,276 INFO L85 PathProgramCache]: Analyzing trace with hash 828801757, now seen corresponding path program 2 times [2024-05-06 04:02:00,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:00,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:00,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:02:00,299 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:02:00,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:02:00,494 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:02:00,501 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:00,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:02:00,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:00,579 INFO L85 PathProgramCache]: Analyzing trace with hash 336040510, now seen corresponding path program 1 times [2024-05-06 04:02:00,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:00,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:00,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:02:00,598 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:02:00,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:02:00,749 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:00,755 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:00,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:00,801 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:02,850 INFO L85 PathProgramCache]: Analyzing trace with hash 31003447, now seen corresponding path program 2 times [2024-05-06 04:02:02,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:02,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:02,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:02,901 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:02:02,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:02,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:02,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:02,960 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:02:03,089 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:02:03,095 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:03,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:02:03,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:03,235 INFO L85 PathProgramCache]: Analyzing trace with hash -1296980147, now seen corresponding path program 3 times [2024-05-06 04:02:03,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:03,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:03,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:03,344 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:03,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:03,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:03,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:03,451 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:03,583 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:02:03,590 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:03,590 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:02:03,669 INFO L85 PathProgramCache]: Analyzing trace with hash 2073326915, now seen corresponding path program 4 times [2024-05-06 04:02:03,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:03,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:03,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:03,807 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:03,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:03,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:03,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:03,917 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:04,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:02:04,077 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:04,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:02:04,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:04,160 INFO L85 PathProgramCache]: Analyzing trace with hash 745582395, now seen corresponding path program 5 times [2024-05-06 04:02:04,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:04,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:04,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:04,287 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:04,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:04,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:04,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:04,467 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:04,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:02:04,630 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:04,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:02:04,698 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:04,718 INFO L85 PathProgramCache]: Analyzing trace with hash 546287765, now seen corresponding path program 6 times [2024-05-06 04:02:04,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:04,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:04,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:04,831 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:04,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:04,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:04,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:05,020 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:05,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:02:05,186 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:05,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:02:05,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:05,273 INFO L85 PathProgramCache]: Analyzing trace with hash 1235441423, now seen corresponding path program 7 times [2024-05-06 04:02:05,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:05,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:05,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:05,435 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:05,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:05,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:05,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:05,557 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:05,708 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:02:05,716 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:05,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:02:05,802 INFO L85 PathProgramCache]: Analyzing trace with hash 2078307393, now seen corresponding path program 8 times [2024-05-06 04:02:05,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:05,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:05,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:05,926 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:05,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:05,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:05,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:06,017 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:06,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:02:06,144 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:06,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:02:06,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:06,223 INFO L85 PathProgramCache]: Analyzing trace with hash 961107349, now seen corresponding path program 3 times [2024-05-06 04:02:06,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:06,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:06,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:06,312 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:06,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:06,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:06,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:06,429 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:06,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:06,622 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:06,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:08,796 INFO L85 PathProgramCache]: Analyzing trace with hash -270442758, now seen corresponding path program 4 times [2024-05-06 04:02:08,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:08,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:08,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:08,851 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:02:08,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:08,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:08,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:08,912 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:02:09,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:09,065 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:09,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:09,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:11,245 INFO L85 PathProgramCache]: Analyzing trace with hash 1187942671, now seen corresponding path program 9 times [2024-05-06 04:02:11,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:11,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:11,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:11,389 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:11,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:11,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:11,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:11,484 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:11,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:11,622 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:11,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:13,754 INFO L85 PathProgramCache]: Analyzing trace with hash -2002651093, now seen corresponding path program 10 times [2024-05-06 04:02:13,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:13,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:13,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:13,863 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:13,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:13,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:13,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:14,032 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:14,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:02:14,197 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:14,197 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:02:14,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:14,280 INFO L85 PathProgramCache]: Analyzing trace with hash -2002651093, now seen corresponding path program 11 times [2024-05-06 04:02:14,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:14,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:14,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:14,397 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:14,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:14,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:14,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:14,561 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:14,709 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:14,716 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:14,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:14,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:16,907 INFO L85 PathProgramCache]: Analyzing trace with hash -746602752, now seen corresponding path program 12 times [2024-05-06 04:02:16,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:16,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:16,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:17,190 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:17,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:17,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:17,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:17,435 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:17,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:17,620 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:17,620 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:19,831 INFO L85 PathProgramCache]: Analyzing trace with hash 963772701, now seen corresponding path program 13 times [2024-05-06 04:02:19,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:19,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:19,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:19,953 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:02:19,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:19,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:19,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:20,063 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:02:20,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:20,260 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:20,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:22,478 INFO L85 PathProgramCache]: Analyzing trace with hash -785632823, now seen corresponding path program 14 times [2024-05-06 04:02:22,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:22,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:22,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:22,732 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:22,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:22,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:22,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:23,053 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:23,210 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:23,217 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:23,218 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:25,422 INFO L85 PathProgramCache]: Analyzing trace with hash -520538956, now seen corresponding path program 15 times [2024-05-06 04:02:25,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:25,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:25,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:25,597 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:02:25,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:25,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:25,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:25,705 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:02:25,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:25,820 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:25,821 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:28,412 INFO L85 PathProgramCache]: Analyzing trace with hash -135441122, now seen corresponding path program 16 times [2024-05-06 04:02:28,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:28,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:28,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:28,761 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:28,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:28,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:28,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:29,088 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:29,248 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:29,255 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:29,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:29,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:29,500 INFO L85 PathProgramCache]: Analyzing trace with hash -1828024257, now seen corresponding path program 17 times [2024-05-06 04:02:29,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:29,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:29,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:29,670 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:02:29,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:29,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:29,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:29,801 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:02:29,971 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:02:29,979 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:29,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:02:30,091 INFO L85 PathProgramCache]: Analyzing trace with hash -1104464430, now seen corresponding path program 18 times [2024-05-06 04:02:30,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:30,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:30,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:30,230 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:30,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:30,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:30,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:30,339 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:30,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:30,506 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:30,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:32,861 INFO L85 PathProgramCache]: Analyzing trace with hash 121341543, now seen corresponding path program 19 times [2024-05-06 04:02:32,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:32,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:32,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:33,157 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:33,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:33,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:33,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:33,456 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:33,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:02:33,620 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:33,620 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:02:33,707 INFO L85 PathProgramCache]: Analyzing trace with hash -533378955, now seen corresponding path program 20 times [2024-05-06 04:02:33,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:33,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:33,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:34,020 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:34,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:34,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:34,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:34,327 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:34,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:02:34,491 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:34,491 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:02:34,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:34,597 INFO L85 PathProgramCache]: Analyzing trace with hash -588862924, now seen corresponding path program 1 times [2024-05-06 04:02:34,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:34,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:34,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:34,834 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:34,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:34,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:34,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:35,075 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:35,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:02:35,235 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:35,235 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:02:35,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:35,320 INFO L85 PathProgramCache]: Analyzing trace with hash 766707812, now seen corresponding path program 2 times [2024-05-06 04:02:35,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:35,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:35,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:35,577 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:35,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:35,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:35,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:35,797 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:35,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:02:35,945 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:35,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:02:36,039 INFO L85 PathProgramCache]: Analyzing trace with hash -1265921581, now seen corresponding path program 1 times [2024-05-06 04:02:36,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:36,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:36,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:36,238 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:36,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:36,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:36,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:36,413 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:36,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:02:36,562 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:36,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:02:36,637 INFO L85 PathProgramCache]: Analyzing trace with hash 1381764837, now seen corresponding path program 2 times [2024-05-06 04:02:36,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:36,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:36,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:36,938 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:36,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:36,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:36,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:37,214 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:37,455 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:02:37,463 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:37,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:02:37,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:37,560 INFO L85 PathProgramCache]: Analyzing trace with hash 1760279126, now seen corresponding path program 1 times [2024-05-06 04:02:37,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:37,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:37,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:37,763 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:37,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:37,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:37,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:37,970 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:38,126 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:02:38,134 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:38,134 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:02:38,248 INFO L85 PathProgramCache]: Analyzing trace with hash -1974767614, now seen corresponding path program 2 times [2024-05-06 04:02:38,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:38,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:38,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:38,531 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:38,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:38,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:38,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:38,753 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:38,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:02:38,963 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:38,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:02:39,060 INFO L85 PathProgramCache]: Analyzing trace with hash 1165161845, now seen corresponding path program 1 times [2024-05-06 04:02:39,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:39,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:39,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:39,241 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:39,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:39,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:39,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:39,417 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:39,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:02:39,552 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:39,552 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:02:39,610 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:39,627 INFO L85 PathProgramCache]: Analyzing trace with hash 498119427, now seen corresponding path program 2 times [2024-05-06 04:02:39,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:39,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:39,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:39,950 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:39,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:39,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:39,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:40,230 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:40,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:02:40,383 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:40,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:02:40,474 INFO L85 PathProgramCache]: Analyzing trace with hash 1838701177, now seen corresponding path program 21 times [2024-05-06 04:02:40,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:40,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:40,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:40,694 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:40,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:40,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:40,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:40,891 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:41,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:02:41,062 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:41,062 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:02:41,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:41,157 INFO L85 PathProgramCache]: Analyzing trace with hash 431760767, now seen corresponding path program 22 times [2024-05-06 04:02:41,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:41,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:41,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:41,421 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:41,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:41,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:41,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:41,743 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:02:41,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:41,927 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:41,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:41,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:44,072 INFO L85 PathProgramCache]: Analyzing trace with hash -871887246, now seen corresponding path program 1 times [2024-05-06 04:02:44,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:44,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:44,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:44,153 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:02:44,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:44,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:44,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:44,232 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:02:44,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:44,392 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:44,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:47,021 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:49,036 INFO L85 PathProgramCache]: Analyzing trace with hash -1072803221, now seen corresponding path program 2 times [2024-05-06 04:02:49,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:49,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:49,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:49,114 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:02:49,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:49,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:49,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:49,192 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:02:49,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:49,351 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:49,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:53,538 INFO L85 PathProgramCache]: Analyzing trace with hash -1598893570, now seen corresponding path program 1 times [2024-05-06 04:02:53,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:53,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:53,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:53,730 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:02:53,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:53,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:53,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:53,811 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:02:53,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:53,964 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:53,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:56,173 INFO L85 PathProgramCache]: Analyzing trace with hash 1212319583, now seen corresponding path program 2 times [2024-05-06 04:02:56,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:56,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:56,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:56,252 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:02:56,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:56,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:56,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:56,332 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:02:56,491 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:56,498 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:56,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:58,638 INFO L85 PathProgramCache]: Analyzing trace with hash 1122493300, now seen corresponding path program 1 times [2024-05-06 04:02:58,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:58,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:58,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:58,741 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:02:58,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:58,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:58,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:58,828 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:02:58,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:02:58,967 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:58,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:02:59,107 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:59,469 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:00,645 INFO L85 PathProgramCache]: Analyzing trace with hash -1762008023, now seen corresponding path program 2 times [2024-05-06 04:03:00,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:00,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:00,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:00,744 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:00,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:00,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:00,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:00,840 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:01,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:03:01,037 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:01,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:03:03,302 INFO L85 PathProgramCache]: Analyzing trace with hash -478395968, now seen corresponding path program 1 times [2024-05-06 04:03:03,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:03,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:03,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:03,398 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:03,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:03,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:03,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:03,493 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:03,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:03:03,674 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:03,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:03:03,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:05,824 INFO L85 PathProgramCache]: Analyzing trace with hash 81708637, now seen corresponding path program 2 times [2024-05-06 04:03:05,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:05,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:05,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:05,900 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:05,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:05,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:05,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:05,977 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:06,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:03:06,131 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:06,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:03:08,283 INFO L85 PathProgramCache]: Analyzing trace with hash -777020489, now seen corresponding path program 1 times [2024-05-06 04:03:08,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:08,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:08,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:08,664 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:08,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:08,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:08,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:08,775 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:08,925 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:03:08,932 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:08,933 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:03:11,144 INFO L85 PathProgramCache]: Analyzing trace with hash 1249562118, now seen corresponding path program 2 times [2024-05-06 04:03:11,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:11,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:11,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:11,173 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:11,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:11,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:03:11,390 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:11,390 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:03:11,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:11,480 INFO L85 PathProgramCache]: Analyzing trace with hash -1174851211, now seen corresponding path program 1 times [2024-05-06 04:03:11,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:11,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:11,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:11,503 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:11,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:11,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:03:11,671 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:11,671 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:03:11,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:12,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:15,310 INFO L85 PathProgramCache]: Analyzing trace with hash 451763808, now seen corresponding path program 2 times [2024-05-06 04:03:15,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:15,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:15,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:15,363 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:03:15,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:15,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:15,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:15,415 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:03:15,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:03:15,558 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:15,558 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:03:15,639 INFO L85 PathProgramCache]: Analyzing trace with hash 84588214, now seen corresponding path program 3 times [2024-05-06 04:03:15,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:15,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:15,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:15,747 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:15,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:15,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:15,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:15,856 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:16,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:03:16,010 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:16,010 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:03:16,091 INFO L85 PathProgramCache]: Analyzing trace with hash -51926982, now seen corresponding path program 4 times [2024-05-06 04:03:16,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:16,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:16,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:16,189 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:16,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:16,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:16,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:16,407 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:16,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:03:16,550 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:16,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:03:16,627 INFO L85 PathProgramCache]: Analyzing trace with hash -1703702862, now seen corresponding path program 5 times [2024-05-06 04:03:16,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:16,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:16,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:16,734 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:16,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:16,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:16,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:16,842 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:16,984 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:03:16,990 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:16,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:03:17,076 INFO L85 PathProgramCache]: Analyzing trace with hash -1323384130, now seen corresponding path program 6 times [2024-05-06 04:03:17,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:17,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:17,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:17,173 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:17,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:17,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:17,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:17,273 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:17,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:03:17,425 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:17,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:03:17,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:17,505 INFO L85 PathProgramCache]: Analyzing trace with hash -90493768, now seen corresponding path program 7 times [2024-05-06 04:03:17,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:17,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:17,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:17,612 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:17,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:17,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:17,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:17,718 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:17,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:03:17,872 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:17,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:03:17,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:17,950 INFO L85 PathProgramCache]: Analyzing trace with hash 1602353400, now seen corresponding path program 8 times [2024-05-06 04:03:17,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:17,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:17,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:18,138 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:18,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:18,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:18,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:18,235 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:18,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 90 [2024-05-06 04:03:18,379 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:18,379 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 57 [2024-05-06 04:03:18,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:18,464 INFO L85 PathProgramCache]: Analyzing trace with hash 1119776652, now seen corresponding path program 3 times [2024-05-06 04:03:18,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:18,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:18,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:18,554 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:18,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:18,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:18,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:18,645 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:18,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:03:18,790 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:18,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:03:18,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:19,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:20,139 WARN L249 Executor]: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-05-06 04:03:20,140 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 101 [2024-05-06 04:03:20,145 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-05-06 04:03:20,341 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable550,SelfDestructingSolverStorable306,SelfDestructingSolverStorable427,SelfDestructingSolverStorable548,SelfDestructingSolverStorable307,SelfDestructingSolverStorable428,SelfDestructingSolverStorable549,SelfDestructingSolverStorable308,SelfDestructingSolverStorable429,SelfDestructingSolverStorable309,SelfDestructingSolverStorable302,SelfDestructingSolverStorable423,SelfDestructingSolverStorable544,SelfDestructingSolverStorable303,SelfDestructingSolverStorable424,SelfDestructingSolverStorable545,SelfDestructingSolverStorable304,SelfDestructingSolverStorable425,SelfDestructingSolverStorable546,SelfDestructingSolverStorable305,SelfDestructingSolverStorable426,SelfDestructingSolverStorable547,SelfDestructingSolverStorable540,SelfDestructingSolverStorable661,SelfDestructingSolverStorable420,SelfDestructingSolverStorable541,SelfDestructingSolverStorable300,SelfDestructingSolverStorable421,SelfDestructingSolverStorable542,SelfDestructingSolverStorable301,SelfDestructingSolverStorable422,SelfDestructingSolverStorable543,SelfDestructingSolverStorable660,SelfDestructingSolverStorable416,SelfDestructingSolverStorable537,SelfDestructingSolverStorable658,SelfDestructingSolverStorable417,SelfDestructingSolverStorable538,SelfDestructingSolverStorable659,SelfDestructingSolverStorable418,SelfDestructingSolverStorable539,SelfDestructingSolverStorable419,SelfDestructingSolverStorable412,SelfDestructingSolverStorable533,SelfDestructingSolverStorable654,SelfDestructingSolverStorable413,SelfDestructingSolverStorable534,SelfDestructingSolverStorable655,SelfDestructingSolverStorable414,SelfDestructingSolverStorable535,SelfDestructingSolverStorable656,SelfDestructingSolverStorable415,SelfDestructingSolverStorable536,SelfDestructingSolverStorable657,SelfDestructingSolverStorable650,SelfDestructingSolverStorable530,SelfDestructingSolverStorable651,SelfDestructingSolverStorable410,SelfDestructingSolverStorable531,SelfDestructingSolverStorable652,SelfDestructingSolverStorable411,SelfDestructingSolverStorable532,SelfDestructingSolverStorable653,SelfDestructingSolverStorable570,SelfDestructingSolverStorable450,SelfDestructingSolverStorable571,SelfDestructingSolverStorable330,SelfDestructingSolverStorable451,SelfDestructingSolverStorable572,SelfDestructingSolverStorable207,SelfDestructingSolverStorable328,SelfDestructingSolverStorable449,SelfDestructingSolverStorable208,SelfDestructingSolverStorable329,SelfDestructingSolverStorable209,SelfDestructingSolverStorable203,SelfDestructingSolverStorable324,SelfDestructingSolverStorable445,SelfDestructingSolverStorable566,SelfDestructingSolverStorable204,SelfDestructingSolverStorable325,SelfDestructingSolverStorable446,SelfDestructingSolverStorable567,SelfDestructingSolverStorable205,SelfDestructingSolverStorable326,SelfDestructingSolverStorable447,SelfDestructingSolverStorable568,SelfDestructingSolverStorable206,SelfDestructingSolverStorable327,SelfDestructingSolverStorable448,SelfDestructingSolverStorable569,SelfDestructingSolverStorable320,SelfDestructingSolverStorable441,SelfDestructingSolverStorable562,SelfDestructingSolverStorable200,SelfDestructingSolverStorable321,SelfDestructingSolverStorable442,SelfDestructingSolverStorable563,SelfDestructingSolverStorable201,SelfDestructingSolverStorable322,SelfDestructingSolverStorable443,SelfDestructingSolverStorable564,SelfDestructingSolverStorable202,SelfDestructingSolverStorable323,SelfDestructingSolverStorable444,SelfDestructingSolverStorable565,SelfDestructingSolverStorable560,SelfDestructingSolverStorable440,SelfDestructingSolverStorable561,SelfDestructingSolverStorable317,SelfDestructingSolverStorable438,SelfDestructingSolverStorable559,SelfDestructingSolverStorable318,SelfDestructingSolverStorable439,SelfDestructingSolverStorable319,SelfDestructingSolverStorable313,SelfDestructingSolverStorable434,SelfDestructingSolverStorable555,SelfDestructingSolverStorable314,SelfDestructingSolverStorable435,SelfDestructingSolverStorable556,SelfDestructingSolverStorable315,SelfDestructingSolverStorable436,SelfDestructingSolverStorable557,SelfDestructingSolverStorable316,SelfDestructingSolverStorable437,SelfDestructingSolverStorable558,SelfDestructingSolverStorable430,SelfDestructingSolverStorable551,SelfDestructingSolverStorable310,SelfDestructingSolverStorable431,SelfDestructingSolverStorable552,SelfDestructingSolverStorable311,SelfDestructingSolverStorable432,SelfDestructingSolverStorable553,SelfDestructingSolverStorable312,SelfDestructingSolverStorable433,SelfDestructingSolverStorable554,SelfDestructingSolverStorable508,SelfDestructingSolverStorable629,SelfDestructingSolverStorable509,SelfDestructingSolverStorable504,SelfDestructingSolverStorable625,SelfDestructingSolverStorable505,SelfDestructingSolverStorable626,SelfDestructingSolverStorable506,SelfDestructingSolverStorable627,SelfDestructingSolverStorable507,SelfDestructingSolverStorable628,SelfDestructingSolverStorable500,SelfDestructingSolverStorable621,SelfDestructingSolverStorable501,SelfDestructingSolverStorable622,SelfDestructingSolverStorable502,SelfDestructingSolverStorable623,SelfDestructingSolverStorable503,SelfDestructingSolverStorable624,SelfDestructingSolverStorable620,SelfDestructingSolverStorable618,SelfDestructingSolverStorable619,SelfDestructingSolverStorable614,SelfDestructingSolverStorable615,SelfDestructingSolverStorable616,SelfDestructingSolverStorable617,SelfDestructingSolverStorable610,SelfDestructingSolverStorable611,SelfDestructingSolverStorable612,SelfDestructingSolverStorable613,SelfDestructingSolverStorable409,SelfDestructingSolverStorable405,SelfDestructingSolverStorable526,SelfDestructingSolverStorable647,SelfDestructingSolverStorable406,SelfDestructingSolverStorable527,SelfDestructingSolverStorable648,SelfDestructingSolverStorable407,SelfDestructingSolverStorable528,SelfDestructingSolverStorable649,SelfDestructingSolverStorable408,SelfDestructingSolverStorable529,SelfDestructingSolverStorable401,SelfDestructingSolverStorable522,SelfDestructingSolverStorable643,SelfDestructingSolverStorable402,SelfDestructingSolverStorable523,SelfDestructingSolverStorable644,SelfDestructingSolverStorable403,SelfDestructingSolverStorable524,SelfDestructingSolverStorable645,SelfDestructingSolverStorable404,SelfDestructingSolverStorable525,SelfDestructingSolverStorable646,SelfDestructingSolverStorable640,SelfDestructingSolverStorable520,SelfDestructingSolverStorable641,SelfDestructingSolverStorable400,SelfDestructingSolverStorable521,SelfDestructingSolverStorable642,SelfDestructingSolverStorable519,SelfDestructingSolverStorable515,SelfDestructingSolverStorable636,SelfDestructingSolverStorable516,SelfDestructingSolverStorable637,SelfDestructingSolverStorable517,SelfDestructingSolverStorable638,SelfDestructingSolverStorable518,SelfDestructingSolverStorable639,SelfDestructingSolverStorable511,SelfDestructingSolverStorable632,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable512,SelfDestructingSolverStorable633,SelfDestructingSolverStorable513,SelfDestructingSolverStorable634,SelfDestructingSolverStorable514,SelfDestructingSolverStorable635,SelfDestructingSolverStorable630,SelfDestructingSolverStorable510,SelfDestructingSolverStorable631,SelfDestructingSolverStorable607,SelfDestructingSolverStorable608,SelfDestructingSolverStorable609,SelfDestructingSolverStorable603,SelfDestructingSolverStorable604,SelfDestructingSolverStorable605,SelfDestructingSolverStorable606,SelfDestructingSolverStorable600,SelfDestructingSolverStorable601,SelfDestructingSolverStorable602,SelfDestructingSolverStorable195,SelfDestructingSolverStorable196,SelfDestructingSolverStorable197,SelfDestructingSolverStorable198,SelfDestructingSolverStorable191,SelfDestructingSolverStorable192,SelfDestructingSolverStorable193,SelfDestructingSolverStorable194,SelfDestructingSolverStorable190,SelfDestructingSolverStorable188,SelfDestructingSolverStorable189,SelfDestructingSolverStorable184,SelfDestructingSolverStorable185,SelfDestructingSolverStorable186,SelfDestructingSolverStorable187,SelfDestructingSolverStorable180,SelfDestructingSolverStorable181,SelfDestructingSolverStorable182,SelfDestructingSolverStorable183,SelfDestructingSolverStorable177,SelfDestructingSolverStorable298,SelfDestructingSolverStorable178,SelfDestructingSolverStorable299,SelfDestructingSolverStorable179,SelfDestructingSolverStorable199,SelfDestructingSolverStorable151,SelfDestructingSolverStorable272,SelfDestructingSolverStorable393,SelfDestructingSolverStorable152,SelfDestructingSolverStorable273,SelfDestructingSolverStorable394,SelfDestructingSolverStorable153,SelfDestructingSolverStorable274,SelfDestructingSolverStorable395,SelfDestructingSolverStorable154,SelfDestructingSolverStorable275,SelfDestructingSolverStorable396,SelfDestructingSolverStorable390,SelfDestructingSolverStorable270,SelfDestructingSolverStorable391,SelfDestructingSolverStorable150,SelfDestructingSolverStorable271,SelfDestructingSolverStorable392,SelfDestructingSolverStorable148,SelfDestructingSolverStorable269,SelfDestructingSolverStorable149,SelfDestructingSolverStorable144,SelfDestructingSolverStorable265,SelfDestructingSolverStorable386,SelfDestructingSolverStorable145,SelfDestructingSolverStorable266,SelfDestructingSolverStorable387,SelfDestructingSolverStorable146,SelfDestructingSolverStorable267,SelfDestructingSolverStorable388,SelfDestructingSolverStorable147,SelfDestructingSolverStorable268,SelfDestructingSolverStorable389,SelfDestructingSolverStorable140,SelfDestructingSolverStorable261,SelfDestructingSolverStorable382,SelfDestructingSolverStorable141,SelfDestructingSolverStorable262,SelfDestructingSolverStorable383,SelfDestructingSolverStorable142,SelfDestructingSolverStorable263,SelfDestructingSolverStorable384,SelfDestructingSolverStorable143,SelfDestructingSolverStorable264,SelfDestructingSolverStorable385,SelfDestructingSolverStorable380,SelfDestructingSolverStorable260,SelfDestructingSolverStorable381,SelfDestructingSolverStorable137,SelfDestructingSolverStorable258,SelfDestructingSolverStorable379,SelfDestructingSolverStorable138,SelfDestructingSolverStorable259,SelfDestructingSolverStorable139,SelfDestructingSolverStorable133,SelfDestructingSolverStorable254,SelfDestructingSolverStorable375,SelfDestructingSolverStorable496,SelfDestructingSolverStorable134,SelfDestructingSolverStorable255,SelfDestructingSolverStorable376,SelfDestructingSolverStorable497,SelfDestructingSolverStorable135,SelfDestructingSolverStorable256,SelfDestructingSolverStorable377,SelfDestructingSolverStorable498,SelfDestructingSolverStorable136,SelfDestructingSolverStorable257,SelfDestructingSolverStorable378,SelfDestructingSolverStorable499,SelfDestructingSolverStorable173,SelfDestructingSolverStorable294,SelfDestructingSolverStorable174,SelfDestructingSolverStorable295,SelfDestructingSolverStorable175,SelfDestructingSolverStorable296,SelfDestructingSolverStorable176,SelfDestructingSolverStorable297,SelfDestructingSolverStorable290,SelfDestructingSolverStorable170,SelfDestructingSolverStorable291,SelfDestructingSolverStorable171,SelfDestructingSolverStorable292,SelfDestructingSolverStorable172,SelfDestructingSolverStorable293,SelfDestructingSolverStorable166,SelfDestructingSolverStorable287,SelfDestructingSolverStorable167,SelfDestructingSolverStorable288,SelfDestructingSolverStorable168,SelfDestructingSolverStorable289,SelfDestructingSolverStorable169,SelfDestructingSolverStorable162,SelfDestructingSolverStorable283,SelfDestructingSolverStorable163,SelfDestructingSolverStorable284,SelfDestructingSolverStorable164,SelfDestructingSolverStorable285,SelfDestructingSolverStorable165,SelfDestructingSolverStorable286,SelfDestructingSolverStorable280,SelfDestructingSolverStorable160,SelfDestructingSolverStorable281,SelfDestructingSolverStorable161,SelfDestructingSolverStorable282,SelfDestructingSolverStorable159,SelfDestructingSolverStorab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tingSolverStorable236,SelfDestructingSolverStorable357,SelfDestructingSolverStorable478,SelfDestructingSolverStorable599,SelfDestructingSolverStorable237,SelfDestructingSolverStorable358,SelfDestructingSolverStorable479,SelfDestructingSolverStorable238,SelfDestructingSolverStorable359,SelfDestructingSolverStorable239,SelfDestructingSolverStorable232,SelfDestructingSolverStorable353,SelfDestructingSolverStorable474,SelfDestructingSolverStorable595,SelfDestructingSolverStorable233,SelfDestructingSolverStorable354,SelfDestructingSolverStorable475,SelfDestructingSolverStorable596,SelfDestructingSolverStorable234,SelfDestructingSolverStorable355,SelfDestructingSolverStorable476,SelfDestructingSolverStorable597,SelfDestructingSolverStorable235,SelfDestructingSolverStorable356,SelfDestructingSolverStorable477,SelfDestructingSolverStorable598 [2024-05-06 04:03:20,342 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.Util.checkSat(Util.java:61) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SmtUtils.checkSatTerm(SmtUtils.java:332) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:144) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:159) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.(MaximumUniversalSetComputation.java:94) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem(Abducer.java:208) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.abduce(Abducer.java:175) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.SemanticIndependenceConditionGenerator.generateCondition(SemanticIndependenceConditionGenerator.java:151) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityChecker.checkConditionalCommutativity(ConditionalCommutativityChecker.java:150) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityCheckerVisitor.discoverState(ConditionalCommutativityCheckerVisitor.java:186) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityCheckerVisitor.discoverState(ConditionalCommutativityCheckerVisitor.java:1) at de.uni_freiburg.informatik.ultimate.automata.partialorder.visitors.DeadEndOptimizingSearchVisitor.discoverState(DeadEndOptimizingSearchVisitor.java:73) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.visitState(DepthFirstTraversal.java:222) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.traverse(DepthFirstTraversal.java:165) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.(DepthFirstTraversal.java:98) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.traverse(DepthFirstTraversal.java:122) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.PartialOrderReductionFacade.apply(PartialOrderReductionFacade.java:321) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.concurrency.PartialOrderCegarLoop.isAbstractionEmpty(PartialOrderCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:466) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:225) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 46 more [2024-05-06 04:03:20,349 INFO L158 Benchmark]: Toolchain (without parser) took 680064.03ms. Allocated memory was 261.1MB in the beginning and 2.4GB in the end (delta: 2.1GB). Free memory was 190.4MB in the beginning and 946.3MB in the end (delta: -755.9MB). Peak memory consumption was 1.4GB. Max. memory is 8.0GB. [2024-05-06 04:03:20,349 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 164.6MB. Free memory is still 97.6MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 04:03:20,350 INFO L158 Benchmark]: CACSL2BoogieTranslator took 182.48ms. Allocated memory is still 261.1MB. Free memory was 190.4MB in the beginning and 177.8MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2024-05-06 04:03:20,350 INFO L158 Benchmark]: Boogie Procedure Inliner took 27.67ms. Allocated memory is still 261.1MB. Free memory was 177.8MB in the beginning and 175.7MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 04:03:20,350 INFO L158 Benchmark]: Boogie Preprocessor took 21.61ms. Allocated memory is still 261.1MB. Free memory was 175.7MB in the beginning and 174.2MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2024-05-06 04:03:20,350 INFO L158 Benchmark]: RCFGBuilder took 534.15ms. Allocated memory is still 261.1MB. Free memory was 174.2MB in the beginning and 227.2MB in the end (delta: -53.1MB). Peak memory consumption was 33.4MB. Max. memory is 8.0GB. [2024-05-06 04:03:20,350 INFO L158 Benchmark]: TraceAbstraction took 679294.05ms. Allocated memory was 261.1MB in the beginning and 2.4GB in the end (delta: 2.1GB). Free memory was 225.7MB in the beginning and 946.3MB in the end (delta: -720.7MB). Peak memory consumption was 1.4GB. Max. memory is 8.0GB. [2024-05-06 04:03:20,350 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 164.6MB. Free memory is still 97.6MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 182.48ms. Allocated memory is still 261.1MB. Free memory was 190.4MB in the beginning and 177.8MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 27.67ms. Allocated memory is still 261.1MB. Free memory was 177.8MB in the beginning and 175.7MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 21.61ms. Allocated memory is still 261.1MB. Free memory was 175.7MB in the beginning and 174.2MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 534.15ms. Allocated memory is still 261.1MB. Free memory was 174.2MB in the beginning and 227.2MB in the end (delta: -53.1MB). Peak memory consumption was 33.4MB. Max. memory is 8.0GB. * TraceAbstraction took 679294.05ms. Allocated memory was 261.1MB in the beginning and 2.4GB in the end (delta: 2.1GB). Free memory was 225.7MB in the beginning and 946.3MB in the end (delta: -720.7MB). Peak memory consumption was 1.4GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2024-05-06 04:03:20,371 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Ended with exit code 0 Received shutdown request...