/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 03:52:14,068 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 03:52:14,104 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 03:52:14,107 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 03:52:14,107 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 03:52:14,122 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 03:52:14,122 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 03:52:14,122 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 03:52:14,123 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 03:52:14,123 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 03:52:14,123 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 03:52:14,124 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 03:52:14,124 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 03:52:14,124 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 03:52:14,124 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 03:52:14,125 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 03:52:14,125 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 03:52:14,125 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 03:52:14,125 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 03:52:14,126 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 03:52:14,126 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 03:52:14,126 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 03:52:14,126 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 03:52:14,127 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 03:52:14,127 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 03:52:14,127 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 03:52:14,128 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 03:52:14,128 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 03:52:14,128 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 03:52:14,128 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 03:52:14,128 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 03:52:14,129 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 03:52:14,129 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 03:52:14,129 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 03:52:14,129 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 03:52:14,129 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 03:52:14,130 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 03:52:14,130 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 03:52:14,130 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 03:52:14,130 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT [2024-05-06 03:52:14,350 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 03:52:14,378 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 03:52:14,380 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 03:52:14,380 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 03:52:14,383 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 03:52:14,384 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c [2024-05-06 03:52:15,496 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 03:52:15,622 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 03:52:15,623 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c [2024-05-06 03:52:15,632 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/18f64d3fb/a84a5a0cd6034486b52d30e5d01bcc3f/FLAGa0739a1f4 [2024-05-06 03:52:15,643 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/18f64d3fb/a84a5a0cd6034486b52d30e5d01bcc3f [2024-05-06 03:52:15,645 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 03:52:15,646 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 03:52:15,647 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 03:52:15,647 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 03:52:15,650 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 03:52:15,650 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,651 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@59edc833 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15, skipping insertion in model container [2024-05-06 03:52:15,651 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,669 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 03:52:15,792 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c[3271,3284] [2024-05-06 03:52:15,798 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 03:52:15,805 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 03:52:15,826 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c[3271,3284] [2024-05-06 03:52:15,828 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 03:52:15,836 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 03:52:15,836 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 03:52:15,841 INFO L206 MainTranslator]: Completed translation [2024-05-06 03:52:15,842 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15 WrapperNode [2024-05-06 03:52:15,842 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 03:52:15,842 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 03:52:15,843 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 03:52:15,843 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 03:52:15,847 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,857 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,884 INFO L138 Inliner]: procedures = 27, calls = 75, calls flagged for inlining = 9, calls inlined = 9, statements flattened = 178 [2024-05-06 03:52:15,885 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 03:52:15,886 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 03:52:15,886 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 03:52:15,886 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 03:52:15,893 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,893 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,895 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,895 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,908 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,911 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,912 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,919 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,922 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 03:52:15,923 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 03:52:15,930 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 03:52:15,931 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 03:52:15,931 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15" (1/1) ... [2024-05-06 03:52:15,935 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 03:52:15,948 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:52:15,977 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 03:52:15,985 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 03:52:16,030 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 03:52:16,030 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 03:52:16,030 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 03:52:16,030 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 03:52:16,031 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 03:52:16,031 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 03:52:16,031 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 03:52:16,031 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 03:52:16,031 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 03:52:16,032 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 03:52:16,032 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 03:52:16,033 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 03:52:16,033 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 03:52:16,034 INFO L130 BoogieDeclarations]: Found specification of procedure thread5 [2024-05-06 03:52:16,034 INFO L138 BoogieDeclarations]: Found implementation of procedure thread5 [2024-05-06 03:52:16,034 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 03:52:16,034 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 03:52:16,034 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 03:52:16,034 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 03:52:16,034 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 03:52:16,034 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 03:52:16,035 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 03:52:16,139 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 03:52:16,141 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 03:52:16,411 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 03:52:16,480 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 03:52:16,480 INFO L309 CfgBuilder]: Removed 5 assume(true) statements. [2024-05-06 03:52:16,482 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 03:52:16 BoogieIcfgContainer [2024-05-06 03:52:16,482 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 03:52:16,483 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 03:52:16,483 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 03:52:16,486 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 03:52:16,486 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 03:52:15" (1/3) ... [2024-05-06 03:52:16,486 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@180752e9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 03:52:16, skipping insertion in model container [2024-05-06 03:52:16,486 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:52:15" (2/3) ... [2024-05-06 03:52:16,487 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@180752e9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 03:52:16, skipping insertion in model container [2024-05-06 03:52:16,487 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 03:52:16" (3/3) ... [2024-05-06 03:52:16,487 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-min-max-inc-dec.wvr.c [2024-05-06 03:52:16,493 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 03:52:16,500 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 03:52:16,500 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 03:52:16,500 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 03:52:16,566 INFO L144 ThreadInstanceAdder]: Constructed 5 joinOtherThreadTransitions. [2024-05-06 03:52:16,597 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 03:52:16,597 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 03:52:16,598 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:52:16,600 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 03:52:16,604 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 03:52:16,639 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 03:52:16,649 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:52:16,651 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 03:52:16,655 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@10dbae1d, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=false, mConComCheckerCriterionLimit=1, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 03:52:16,656 INFO L358 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2024-05-06 03:52:17,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:52:17,079 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:17,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:52:17,125 INFO L85 PathProgramCache]: Analyzing trace with hash 285893693, now seen corresponding path program 1 times [2024-05-06 03:52:17,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:17,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:17,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:17,429 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:52:17,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:17,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:17,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:17,502 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:52:17,543 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 03:52:17,543 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 03:52:17,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:52:17,730 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:17,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:52:17,752 INFO L85 PathProgramCache]: Analyzing trace with hash 37769194, now seen corresponding path program 1 times [2024-05-06 03:52:17,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:17,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:17,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:18,143 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:52:18,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:18,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:18,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:18,333 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:52:18,334 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 03:52:18,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-05-06 03:52:18,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:52:18,622 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:18,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:52:18,643 INFO L85 PathProgramCache]: Analyzing trace with hash 1283129111, now seen corresponding path program 1 times [2024-05-06 03:52:18,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:18,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:18,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:19,010 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:52:19,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:19,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:19,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:19,205 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:52:19,250 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:19,251 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:21,366 INFO L85 PathProgramCache]: Analyzing trace with hash -650050623, now seen corresponding path program 1 times [2024-05-06 03:52:21,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:21,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:21,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:21,569 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:52:21,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:21,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:21,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:21,722 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:52:21,829 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:52:21,844 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:21,844 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:52:21,861 INFO L85 PathProgramCache]: Analyzing trace with hash -1510575009, now seen corresponding path program 2 times [2024-05-06 03:52:21,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:21,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:21,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:22,002 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:22,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:22,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:22,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:22,165 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:22,211 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:22,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:24,304 INFO L85 PathProgramCache]: Analyzing trace with hash -2094717341, now seen corresponding path program 2 times [2024-05-06 03:52:24,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:24,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:24,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:24,482 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:24,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:24,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:24,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:24,649 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:24,694 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:24,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:26,800 INFO L85 PathProgramCache]: Analyzing trace with hash 843536889, now seen corresponding path program 1 times [2024-05-06 03:52:26,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:26,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:26,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:26,984 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:26,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:26,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:27,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:27,116 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:27,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:52:27,199 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:27,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:52:27,217 INFO L85 PathProgramCache]: Analyzing trace with hash 379840377, now seen corresponding path program 2 times [2024-05-06 03:52:27,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:27,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:27,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:27,341 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:27,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:27,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:27,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:27,538 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:27,588 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:27,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:29,673 INFO L85 PathProgramCache]: Analyzing trace with hash -1109849604, now seen corresponding path program 3 times [2024-05-06 03:52:29,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:29,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:29,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:29,829 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:29,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:29,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:29,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:29,959 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:29,992 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:29,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:32,068 INFO L85 PathProgramCache]: Analyzing trace with hash 771765853, now seen corresponding path program 4 times [2024-05-06 03:52:32,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:32,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:32,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:32,225 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:32,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:32,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:32,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:32,388 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:32,427 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:32,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:34,492 INFO L85 PathProgramCache]: Analyzing trace with hash 165758182, now seen corresponding path program 5 times [2024-05-06 03:52:34,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:34,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:34,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:34,606 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:34,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:34,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:34,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:34,724 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:34,755 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:34,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:36,830 INFO L85 PathProgramCache]: Analyzing trace with hash 420989019, now seen corresponding path program 6 times [2024-05-06 03:52:36,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:36,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:36,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:36,954 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:36,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:36,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:37,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:37,115 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:37,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:52:37,194 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:37,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:52:37,213 INFO L85 PathProgramCache]: Analyzing trace with hash -464365891, now seen corresponding path program 7 times [2024-05-06 03:52:37,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:37,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:37,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:37,316 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:37,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:37,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:37,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:37,421 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:37,450 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:37,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:39,506 INFO L85 PathProgramCache]: Analyzing trace with hash -464365891, now seen corresponding path program 8 times [2024-05-06 03:52:39,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:39,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:39,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:39,610 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:39,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:39,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:39,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:39,763 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:39,794 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:39,794 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:41,870 INFO L85 PathProgramCache]: Analyzing trace with hash 857953915, now seen corresponding path program 1 times [2024-05-06 03:52:41,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:41,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:41,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:41,980 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:41,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:41,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:41,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:42,111 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:42,141 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:42,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:44,211 INFO L85 PathProgramCache]: Analyzing trace with hash 858959909, now seen corresponding path program 1 times [2024-05-06 03:52:44,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:44,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:44,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:44,377 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:44,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:44,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:44,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:44,519 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:44,551 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:44,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:46,618 INFO L85 PathProgramCache]: Analyzing trace with hash -665028291, now seen corresponding path program 1 times [2024-05-06 03:52:46,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:46,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:46,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:46,792 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:46,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:46,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:46,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:46,898 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:46,927 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:46,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:49,004 INFO L85 PathProgramCache]: Analyzing trace with hash 1086926119, now seen corresponding path program 1 times [2024-05-06 03:52:49,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:49,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:49,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:49,110 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:49,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:49,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:49,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:49,252 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:49,282 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:49,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:51,349 INFO L85 PathProgramCache]: Analyzing trace with hash 727798784, now seen corresponding path program 9 times [2024-05-06 03:52:51,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:51,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:51,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:51,474 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:51,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:51,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:51,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:51,576 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:51,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:52:51,660 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:51,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:52:51,675 INFO L85 PathProgramCache]: Analyzing trace with hash 57592259, now seen corresponding path program 1 times [2024-05-06 03:52:51,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:51,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:51,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:51,772 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:51,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:51,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:51,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:51,872 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:52,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:52:52,023 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:52,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:52:52,037 INFO L85 PathProgramCache]: Analyzing trace with hash 400666163, now seen corresponding path program 2 times [2024-05-06 03:52:52,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:52,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:52,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:52,152 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:52,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:52,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:52,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:52,255 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:52,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:52:52,348 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:52,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:52:52,362 INFO L85 PathProgramCache]: Analyzing trace with hash -1886042796, now seen corresponding path program 1 times [2024-05-06 03:52:52,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:52,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:52,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:52,476 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:52,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:52,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:52,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:52,574 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:52,638 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:52:52,644 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:52,646 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:52:52,659 INFO L85 PathProgramCache]: Analyzing trace with hash -1511097342, now seen corresponding path program 2 times [2024-05-06 03:52:52,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:52,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:52,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:52,845 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:52,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:52,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:52,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:52,945 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:53,018 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:52:53,022 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:53,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:52:53,040 INFO L85 PathProgramCache]: Analyzing trace with hash -523229611, now seen corresponding path program 1 times [2024-05-06 03:52:53,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:53,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:53,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:53,134 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:53,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:53,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:53,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:53,231 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:53,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:52:53,308 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:53,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:52:53,326 INFO L85 PathProgramCache]: Analyzing trace with hash -2126954911, now seen corresponding path program 2 times [2024-05-06 03:52:53,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:53,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:53,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:53,420 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:53,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:53,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:53,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:53,587 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:53,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:52:53,667 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:53,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:52:53,684 INFO L85 PathProgramCache]: Analyzing trace with hash 603002806, now seen corresponding path program 1 times [2024-05-06 03:52:53,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:53,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:53,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:53,779 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:53,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:53,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:53,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:53,872 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:53,943 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:52:53,948 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:53,948 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:52:53,965 INFO L85 PathProgramCache]: Analyzing trace with hash 208483424, now seen corresponding path program 2 times [2024-05-06 03:52:53,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:53,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:53,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:54,061 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:54,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:54,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:54,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:54,158 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:54,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:52:54,276 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:54,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:52:54,293 INFO L85 PathProgramCache]: Analyzing trace with hash -772248393, now seen corresponding path program 1 times [2024-05-06 03:52:54,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:54,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:54,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:54,382 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:54,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:54,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:54,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:54,470 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:54,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:52:54,543 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:54,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:52:54,557 INFO L85 PathProgramCache]: Analyzing trace with hash 838009535, now seen corresponding path program 2 times [2024-05-06 03:52:54,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:54,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:54,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:54,645 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:54,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:54,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:54,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:54,731 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:54,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:52:54,823 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:54,823 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:52:54,841 INFO L85 PathProgramCache]: Analyzing trace with hash -1479236263, now seen corresponding path program 1 times [2024-05-06 03:52:54,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:54,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:54,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:54,970 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:54,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:54,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:54,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:55,068 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:55,142 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:52:55,147 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:55,147 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:52:55,163 INFO L85 PathProgramCache]: Analyzing trace with hash -111514403, now seen corresponding path program 2 times [2024-05-06 03:52:55,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:55,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:55,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:55,251 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:55,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:55,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:55,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:55,339 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:52:55,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:52:55,448 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:55,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:52:55,596 INFO L85 PathProgramCache]: Analyzing trace with hash -1182200329, now seen corresponding path program 3 times [2024-05-06 03:52:55,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:55,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:55,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:55,682 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:52:55,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:55,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:55,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:55,812 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:52:55,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:52:55,884 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:55,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:52:55,899 INFO L85 PathProgramCache]: Analyzing trace with hash -909312713, now seen corresponding path program 4 times [2024-05-06 03:52:55,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:55,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:55,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:55,989 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:52:55,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:55,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:56,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:56,080 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:52:56,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:52:56,156 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:56,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:52:56,211 INFO L85 PathProgramCache]: Analyzing trace with hash 503740205, now seen corresponding path program 5 times [2024-05-06 03:52:56,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:56,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:56,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:56,305 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:52:56,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:56,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:56,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:56,396 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:52:56,426 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:52:56,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:52:58,551 INFO L85 PathProgramCache]: Analyzing trace with hash 2084364625, now seen corresponding path program 10 times [2024-05-06 03:52:58,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:58,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:58,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:58,687 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:52:58,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:52:58,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:52:58,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:52:58,800 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:52:58,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:52:58,878 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:52:58,878 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:00,918 INFO L85 PathProgramCache]: Analyzing trace with hash -1066082532, now seen corresponding path program 6 times [2024-05-06 03:53:00,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:00,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:00,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:01,007 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:01,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:01,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:01,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:01,095 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:01,164 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:01,170 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:01,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:03,216 INFO L85 PathProgramCache]: Analyzing trace with hash -720350508, now seen corresponding path program 7 times [2024-05-06 03:53:03,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:03,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:03,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:03,311 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:03,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:03,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:03,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:03,438 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:03,466 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:03,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:53:05,521 INFO L85 PathProgramCache]: Analyzing trace with hash -2111727560, now seen corresponding path program 11 times [2024-05-06 03:53:05,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:05,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:05,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:05,649 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:05,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:05,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:05,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:05,755 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:05,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:05,840 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:05,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:08,032 INFO L85 PathProgramCache]: Analyzing trace with hash -247720171, now seen corresponding path program 8 times [2024-05-06 03:53:08,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:08,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:08,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:08,128 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:08,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:08,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:08,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:08,212 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:08,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:08,286 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:08,287 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:08,340 INFO L85 PathProgramCache]: Analyzing trace with hash -1998435377, now seen corresponding path program 9 times [2024-05-06 03:53:08,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:08,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:08,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:08,480 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:08,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:08,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:08,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:08,567 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:08,597 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:08,597 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:53:10,667 INFO L85 PathProgramCache]: Analyzing trace with hash -300362893, now seen corresponding path program 12 times [2024-05-06 03:53:10,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:10,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:10,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:10,759 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:10,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:10,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:10,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:10,851 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:10,924 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:10,929 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:10,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:12,971 INFO L85 PathProgramCache]: Analyzing trace with hash 1082862906, now seen corresponding path program 10 times [2024-05-06 03:53:12,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:12,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:12,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:13,056 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:13,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:13,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:13,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:13,139 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:13,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:13,212 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:13,213 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:15,262 INFO L85 PathProgramCache]: Analyzing trace with hash 1876077550, now seen corresponding path program 11 times [2024-05-06 03:53:15,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:15,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:15,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:15,422 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:15,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:15,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:15,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:15,502 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:15,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:53:15,599 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:15,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:53:15,615 INFO L85 PathProgramCache]: Analyzing trace with hash -1971137510, now seen corresponding path program 12 times [2024-05-06 03:53:15,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:15,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:15,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:15,698 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:15,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:15,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:15,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:15,780 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:15,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:53:15,864 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:15,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:53:15,882 INFO L85 PathProgramCache]: Analyzing trace with hash -1644469585, now seen corresponding path program 13 times [2024-05-06 03:53:15,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:15,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:15,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:15,972 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:15,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:15,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:15,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:16,067 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:16,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:53:16,193 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:16,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:53:16,218 INFO L85 PathProgramCache]: Analyzing trace with hash 1912757035, now seen corresponding path program 14 times [2024-05-06 03:53:16,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:16,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:16,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:16,303 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:16,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:16,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:16,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:16,388 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:16,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:16,476 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:16,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:16,943 INFO L85 PathProgramCache]: Analyzing trace with hash 1912757035, now seen corresponding path program 15 times [2024-05-06 03:53:16,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:16,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:16,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:17,033 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:17,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:17,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:17,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:17,121 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:17,210 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:53:17,215 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:17,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:53:17,230 INFO L85 PathProgramCache]: Analyzing trace with hash -1930189280, now seen corresponding path program 16 times [2024-05-06 03:53:17,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:17,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:17,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:17,329 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:53:17,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:17,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:17,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:17,500 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:53:17,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:53:17,595 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:17,595 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:53:17,614 INFO L85 PathProgramCache]: Analyzing trace with hash 1148308406, now seen corresponding path program 17 times [2024-05-06 03:53:17,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:17,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:17,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:17,733 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:17,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:17,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:17,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:17,827 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:17,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:53:17,906 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:17,907 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:53:17,927 INFO L85 PathProgramCache]: Analyzing trace with hash 1808586274, now seen corresponding path program 18 times [2024-05-06 03:53:17,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:17,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:17,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:18,024 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:53:18,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:18,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:18,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:18,133 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:53:18,210 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:53:18,217 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:18,218 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:53:18,238 INFO L85 PathProgramCache]: Analyzing trace with hash 1840718452, now seen corresponding path program 19 times [2024-05-06 03:53:18,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:18,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:18,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:18,336 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:18,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:18,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:18,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:18,483 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:18,590 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:53:18,595 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:18,595 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:53:18,609 INFO L85 PathProgramCache]: Analyzing trace with hash -190303970, now seen corresponding path program 20 times [2024-05-06 03:53:18,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:18,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:18,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:18,722 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:53:18,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:18,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:18,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:18,815 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:53:18,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:53:18,894 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:18,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:53:18,914 INFO L85 PathProgramCache]: Analyzing trace with hash 464902648, now seen corresponding path program 21 times [2024-05-06 03:53:18,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:18,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:18,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:19,009 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:19,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:19,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:19,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:19,101 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:19,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:19,177 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:19,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:21,227 INFO L85 PathProgramCache]: Analyzing trace with hash 321175218, now seen corresponding path program 22 times [2024-05-06 03:53:21,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:21,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:21,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:21,325 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:21,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:21,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:21,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:21,523 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:21,581 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:53:21,586 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:21,587 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:53:21,603 INFO L85 PathProgramCache]: Analyzing trace with hash 1366497760, now seen corresponding path program 23 times [2024-05-06 03:53:21,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:21,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:21,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:21,698 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:21,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:21,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:21,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:21,796 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:21,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:21,875 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:21,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:23,924 INFO L85 PathProgramCache]: Analyzing trace with hash -588241803, now seen corresponding path program 24 times [2024-05-06 03:53:23,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:23,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:23,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:24,020 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:24,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:24,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:24,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:24,113 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:24,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:24,190 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:24,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:24,438 INFO L85 PathProgramCache]: Analyzing trace with hash -404327219, now seen corresponding path program 1 times [2024-05-06 03:53:24,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:24,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:24,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:24,596 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:24,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:24,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:24,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:24,744 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:24,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:24,819 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:24,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:26,847 INFO L85 PathProgramCache]: Analyzing trace with hash -2065830108, now seen corresponding path program 2 times [2024-05-06 03:53:26,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:26,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:26,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:26,946 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:26,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:26,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:26,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:27,045 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:27,077 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:27,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:53:29,152 INFO L85 PathProgramCache]: Analyzing trace with hash 2048135304, now seen corresponding path program 2 times [2024-05-06 03:53:29,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:29,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:29,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:29,256 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:29,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:29,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:29,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:29,360 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:29,389 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:29,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:53:31,452 INFO L85 PathProgramCache]: Analyzing trace with hash 1693891199, now seen corresponding path program 3 times [2024-05-06 03:53:31,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:31,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:31,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:31,609 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:31,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:31,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:31,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:31,717 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:31,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:31,798 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:31,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:33,839 INFO L85 PathProgramCache]: Analyzing trace with hash 1095335827, now seen corresponding path program 1 times [2024-05-06 03:53:33,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:33,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:33,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:33,929 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:33,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:33,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:33,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:34,019 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:34,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:34,089 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:34,089 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:34,159 INFO L85 PathProgramCache]: Analyzing trace with hash 43466654, now seen corresponding path program 2 times [2024-05-06 03:53:34,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:34,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:34,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:34,255 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:34,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:34,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:34,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:34,351 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:34,381 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:34,381 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:53:36,450 INFO L85 PathProgramCache]: Analyzing trace with hash 1365676162, now seen corresponding path program 2 times [2024-05-06 03:53:36,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:36,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:36,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:36,656 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:36,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:36,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:36,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:36,761 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:36,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:36,839 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:36,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:39,397 INFO L85 PathProgramCache]: Analyzing trace with hash -241761265, now seen corresponding path program 1 times [2024-05-06 03:53:39,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:39,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:39,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:39,489 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:39,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:39,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:39,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:39,582 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:39,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:39,656 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:39,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:41,712 INFO L85 PathProgramCache]: Analyzing trace with hash -2017938526, now seen corresponding path program 2 times [2024-05-06 03:53:41,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:41,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:41,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:41,811 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:41,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:41,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:41,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:41,926 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:41,957 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:41,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:53:44,133 INFO L85 PathProgramCache]: Analyzing trace with hash -1780887674, now seen corresponding path program 2 times [2024-05-06 03:53:44,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:44,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:44,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:44,239 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:44,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:44,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:44,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:44,343 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:44,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:44,423 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:44,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:46,573 INFO L85 PathProgramCache]: Analyzing trace with hash -7798763, now seen corresponding path program 1 times [2024-05-06 03:53:46,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:46,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:46,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:46,666 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:46,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:46,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:46,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:46,756 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:46,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:46,825 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:46,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:46,908 INFO L85 PathProgramCache]: Analyzing trace with hash -1720030500, now seen corresponding path program 2 times [2024-05-06 03:53:46,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:46,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:46,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:47,003 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:47,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:47,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:47,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:47,164 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:47,196 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:47,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:53:49,264 INFO L85 PathProgramCache]: Analyzing trace with hash 1643333184, now seen corresponding path program 2 times [2024-05-06 03:53:49,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:49,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:49,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:49,399 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:49,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:49,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:49,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:49,524 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:49,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:49,598 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:49,598 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:49,771 INFO L85 PathProgramCache]: Analyzing trace with hash 553937746, now seen corresponding path program 25 times [2024-05-06 03:53:49,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:49,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:49,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:49,863 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:49,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:49,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:49,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:49,954 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:53:50,024 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:53:50,030 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:50,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:53:52,090 INFO L85 PathProgramCache]: Analyzing trace with hash -1440907777, now seen corresponding path program 26 times [2024-05-06 03:53:52,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:52,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:52,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:52,185 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:52,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:52,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:52,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:52,280 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:52,310 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:52,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:53:54,364 INFO L85 PathProgramCache]: Analyzing trace with hash -1755379293, now seen corresponding path program 13 times [2024-05-06 03:53:54,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:54,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:54,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:54,535 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:54,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:54,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:54,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:54,636 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:53:54,671 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:54,672 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:53:56,734 INFO L85 PathProgramCache]: Analyzing trace with hash 1144543951, now seen corresponding path program 14 times [2024-05-06 03:53:56,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:56,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:56,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:56,821 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:56,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:56,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:56,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:56,907 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:56,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:53:57,002 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:57,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:53:57,016 INFO L85 PathProgramCache]: Analyzing trace with hash 1121124567, now seen corresponding path program 3 times [2024-05-06 03:53:57,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:57,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:57,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:57,128 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:57,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:57,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:57,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:57,217 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:57,248 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:57,248 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:53:59,320 INFO L85 PathProgramCache]: Analyzing trace with hash -879727890, now seen corresponding path program 15 times [2024-05-06 03:53:59,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:59,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:59,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:59,400 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:59,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:59,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:59,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:59,479 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:53:59,654 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:53:59,662 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:53:59,663 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:53:59,676 INFO L85 PathProgramCache]: Analyzing trace with hash 933709676, now seen corresponding path program 1 times [2024-05-06 03:53:59,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:59,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:59,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:59,759 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:53:59,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:53:59,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:53:59,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:53:59,842 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:53:59,873 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:53:59,874 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:01,929 INFO L85 PathProgramCache]: Analyzing trace with hash 2141365718, now seen corresponding path program 1 times [2024-05-06 03:54:01,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:01,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:01,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:02,017 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:54:02,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:02,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:02,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:02,105 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:54:02,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:54:02,178 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:02,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:54:02,192 INFO L85 PathProgramCache]: Analyzing trace with hash -864449814, now seen corresponding path program 2 times [2024-05-06 03:54:02,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:02,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:02,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:02,273 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:02,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:02,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:02,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:02,355 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:02,394 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:02,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:04,465 INFO L85 PathProgramCache]: Analyzing trace with hash 1850830520, now seen corresponding path program 2 times [2024-05-06 03:54:04,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:04,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:04,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:04,560 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:04,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:04,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:04,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:04,645 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:04,741 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:04,741 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:06,802 INFO L85 PathProgramCache]: Analyzing trace with hash -484199538, now seen corresponding path program 1 times [2024-05-06 03:54:06,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:06,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:06,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:06,886 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:06,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:06,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:06,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:06,970 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:07,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:54:07,048 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:07,048 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:54:07,065 INFO L85 PathProgramCache]: Analyzing trace with hash -2125283196, now seen corresponding path program 2 times [2024-05-06 03:54:07,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:07,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:07,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:07,149 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:07,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:07,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:07,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:07,233 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:07,263 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:07,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:09,330 INFO L85 PathProgramCache]: Analyzing trace with hash -1459269039, now seen corresponding path program 3 times [2024-05-06 03:54:09,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:09,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:09,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:09,417 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:09,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:09,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:09,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:09,502 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:09,535 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:09,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:11,594 INFO L85 PathProgramCache]: Analyzing trace with hash -867378392, now seen corresponding path program 4 times [2024-05-06 03:54:11,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:11,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:11,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:11,681 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:11,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:11,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:11,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:11,833 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:11,891 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:11,891 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:13,969 INFO L85 PathProgramCache]: Analyzing trace with hash -1678187343, now seen corresponding path program 5 times [2024-05-06 03:54:13,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:13,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:13,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:14,052 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:14,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:14,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:14,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:14,135 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:14,166 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:14,166 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:16,240 INFO L85 PathProgramCache]: Analyzing trace with hash -1023966416, now seen corresponding path program 6 times [2024-05-06 03:54:16,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:16,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:16,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:16,322 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:16,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:16,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:16,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:16,404 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:16,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:54:16,488 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:16,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:54:16,517 INFO L85 PathProgramCache]: Analyzing trace with hash 387760850, now seen corresponding path program 7 times [2024-05-06 03:54:16,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:16,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:16,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:16,599 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:16,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:16,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:16,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:16,683 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:16,723 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:16,724 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:18,795 INFO L85 PathProgramCache]: Analyzing trace with hash 387760850, now seen corresponding path program 8 times [2024-05-06 03:54:18,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:18,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:18,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:18,882 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:18,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:18,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:18,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:19,031 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:19,077 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:19,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:21,132 INFO L85 PathProgramCache]: Analyzing trace with hash 1893332102, now seen corresponding path program 1 times [2024-05-06 03:54:21,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:21,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:21,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:21,221 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:21,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:21,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:21,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:21,308 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:21,338 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:21,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:23,401 INFO L85 PathProgramCache]: Analyzing trace with hash 1585095866, now seen corresponding path program 1 times [2024-05-06 03:54:23,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:23,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:23,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:23,488 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:23,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:23,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:23,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:23,573 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:23,599 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:23,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:25,691 INFO L85 PathProgramCache]: Analyzing trace with hash 1990794760, now seen corresponding path program 1 times [2024-05-06 03:54:25,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:25,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:25,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:25,781 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:25,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:25,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:25,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:25,874 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:25,902 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:25,902 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:27,972 INFO L85 PathProgramCache]: Analyzing trace with hash -1321254148, now seen corresponding path program 1 times [2024-05-06 03:54:27,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:27,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:27,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:28,062 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:28,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:28,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:28,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:28,210 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:28,241 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:28,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:30,305 INFO L85 PathProgramCache]: Analyzing trace with hash -2120831093, now seen corresponding path program 9 times [2024-05-06 03:54:30,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:30,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:30,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:30,392 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:30,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:30,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:30,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:30,478 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:30,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:54:30,556 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:30,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:54:30,573 INFO L85 PathProgramCache]: Analyzing trace with hash -1270144168, now seen corresponding path program 1 times [2024-05-06 03:54:30,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:30,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:30,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:30,658 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:30,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:30,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:30,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:30,741 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:30,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:54:30,815 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:30,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:54:30,833 INFO L85 PathProgramCache]: Analyzing trace with hash 12512126, now seen corresponding path program 2 times [2024-05-06 03:54:30,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:30,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:30,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:30,915 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:30,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:30,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:30,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:30,996 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:31,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:54:31,076 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:31,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:54:31,094 INFO L85 PathProgramCache]: Analyzing trace with hash 564978975, now seen corresponding path program 1 times [2024-05-06 03:54:31,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:31,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:31,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:31,177 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:31,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:31,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:31,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:31,379 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:31,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:54:31,449 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:31,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:54:31,464 INFO L85 PathProgramCache]: Analyzing trace with hash 1662970199, now seen corresponding path program 2 times [2024-05-06 03:54:31,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:31,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:31,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:31,547 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:31,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:31,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:31,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:31,630 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:31,692 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:54:31,696 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:31,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:54:31,709 INFO L85 PathProgramCache]: Analyzing trace with hash -1968185046, now seen corresponding path program 1 times [2024-05-06 03:54:31,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:31,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:31,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:31,790 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:31,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:31,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:31,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:31,872 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:31,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:54:31,959 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:31,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:54:31,977 INFO L85 PathProgramCache]: Analyzing trace with hash 1716212332, now seen corresponding path program 2 times [2024-05-06 03:54:31,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:31,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:31,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:32,063 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:32,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:32,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:32,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:32,210 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:32,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:54:32,294 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:32,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:54:32,307 INFO L85 PathProgramCache]: Analyzing trace with hash 1249128001, now seen corresponding path program 1 times [2024-05-06 03:54:32,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:32,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:32,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:32,390 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:32,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:32,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:32,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:32,560 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:32,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:54:32,646 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:32,646 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:54:32,662 INFO L85 PathProgramCache]: Analyzing trace with hash 471003893, now seen corresponding path program 2 times [2024-05-06 03:54:32,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:32,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:32,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:32,743 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:32,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:32,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:32,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:32,823 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:32,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:54:32,901 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:32,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:54:32,917 INFO L85 PathProgramCache]: Analyzing trace with hash 79878348, now seen corresponding path program 1 times [2024-05-06 03:54:32,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:32,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:32,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:33,001 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:33,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:33,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:33,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:33,084 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:33,183 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:54:33,187 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:33,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:54:33,200 INFO L85 PathProgramCache]: Analyzing trace with hash 1677761930, now seen corresponding path program 2 times [2024-05-06 03:54:33,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:33,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:33,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:33,343 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:33,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:33,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:33,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:33,429 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:33,497 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:54:33,501 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:33,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:54:33,514 INFO L85 PathProgramCache]: Analyzing trace with hash -1867390300, now seen corresponding path program 1 times [2024-05-06 03:54:33,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:33,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:33,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:33,600 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:33,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:33,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:33,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:33,755 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:33,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:54:33,857 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:33,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:54:33,874 INFO L85 PathProgramCache]: Analyzing trace with hash 2132331698, now seen corresponding path program 2 times [2024-05-06 03:54:33,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:33,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:33,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:33,954 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:33,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:33,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:33,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:34,055 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:54:34,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:54:34,156 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:34,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:54:36,208 INFO L85 PathProgramCache]: Analyzing trace with hash 23682306, now seen corresponding path program 3 times [2024-05-06 03:54:36,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:36,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:36,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:36,286 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:36,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:36,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:36,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:36,367 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:36,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:54:36,434 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:36,434 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:54:36,449 INFO L85 PathProgramCache]: Analyzing trace with hash 1334533388, now seen corresponding path program 4 times [2024-05-06 03:54:36,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:36,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:36,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:36,528 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:36,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:36,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:36,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:36,606 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:36,678 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:54:36,685 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:36,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:54:38,804 INFO L85 PathProgramCache]: Analyzing trace with hash -280887742, now seen corresponding path program 5 times [2024-05-06 03:54:38,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:38,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:38,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:38,893 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:38,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:38,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:38,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:39,043 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:39,072 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:39,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:41,132 INFO L85 PathProgramCache]: Analyzing trace with hash 280908326, now seen corresponding path program 10 times [2024-05-06 03:54:41,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:41,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:41,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:41,227 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:41,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:41,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:41,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:41,316 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:41,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:54:41,426 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:41,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:54:43,457 INFO L85 PathProgramCache]: Analyzing trace with hash 1384939239, now seen corresponding path program 6 times [2024-05-06 03:54:43,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:43,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:43,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:43,541 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:43,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:43,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:43,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:43,623 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:43,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:54:43,701 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:43,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:54:45,743 INFO L85 PathProgramCache]: Analyzing trace with hash 1332548895, now seen corresponding path program 7 times [2024-05-06 03:54:45,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:45,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:45,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:45,829 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:45,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:45,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:45,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:45,915 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:45,946 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:45,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:48,157 INFO L85 PathProgramCache]: Analyzing trace with hash -1477166909, now seen corresponding path program 11 times [2024-05-06 03:54:48,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:48,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:48,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:48,344 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:48,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:48,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:48,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:48,436 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:48,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:54:48,504 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:48,504 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:54:50,573 INFO L85 PathProgramCache]: Analyzing trace with hash -1692675606, now seen corresponding path program 8 times [2024-05-06 03:54:50,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:50,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:50,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:50,655 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:50,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:50,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:50,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:50,736 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:50,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:54:50,819 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:50,819 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:54:52,879 INFO L85 PathProgramCache]: Analyzing trace with hash 1947112484, now seen corresponding path program 9 times [2024-05-06 03:54:52,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:52,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:52,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:52,965 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:52,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:52,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:52,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:53,072 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:53,111 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:54:53,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:54:55,184 INFO L85 PathProgramCache]: Analyzing trace with hash -1803913848, now seen corresponding path program 12 times [2024-05-06 03:54:55,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:55,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:55,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:55,281 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:55,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:55,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:55,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:55,371 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:55,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:54:55,451 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:55,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:54:57,555 INFO L85 PathProgramCache]: Analyzing trace with hash 1728988101, now seen corresponding path program 10 times [2024-05-06 03:54:57,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:57,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:57,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:57,638 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:57,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:57,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:57,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:57,720 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:57,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:54:57,793 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:57,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:54:57,868 INFO L85 PathProgramCache]: Analyzing trace with hash -1579137351, now seen corresponding path program 11 times [2024-05-06 03:54:57,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:57,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:57,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:57,948 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:57,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:57,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:57,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:58,026 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:58,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:54:58,091 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:58,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:54:58,105 INFO L85 PathProgramCache]: Analyzing trace with hash -1708617041, now seen corresponding path program 12 times [2024-05-06 03:54:58,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:58,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:58,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:58,184 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:58,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:58,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:58,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:58,264 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:58,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:54:58,332 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:58,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:54:58,346 INFO L85 PathProgramCache]: Analyzing trace with hash 1322761284, now seen corresponding path program 13 times [2024-05-06 03:54:58,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:58,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:58,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:58,430 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:58,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:58,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:58,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:58,513 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:54:58,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:54:58,704 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:58,704 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:54:58,723 INFO L85 PathProgramCache]: Analyzing trace with hash -495423232, now seen corresponding path program 14 times [2024-05-06 03:54:58,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:58,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:58,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:58,811 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:58,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:54:58,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:54:58,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:54:58,930 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:54:59,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:54:59,006 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:54:59,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:01,028 INFO L85 PathProgramCache]: Analyzing trace with hash -495423232, now seen corresponding path program 15 times [2024-05-06 03:55:01,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:01,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:01,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:01,115 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:55:01,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:01,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:01,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:01,207 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:55:01,268 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:55:01,275 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:01,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:55:01,289 INFO L85 PathProgramCache]: Analyzing trace with hash 615633077, now seen corresponding path program 16 times [2024-05-06 03:55:01,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:01,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:01,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:01,384 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:55:01,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:01,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:01,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:01,478 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:55:01,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:55:01,545 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:01,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:55:01,560 INFO L85 PathProgramCache]: Analyzing trace with hash -489777151, now seen corresponding path program 17 times [2024-05-06 03:55:01,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:01,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:01,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:01,653 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:01,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:01,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:01,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:01,817 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:01,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:55:01,912 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:01,913 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:55:01,939 INFO L85 PathProgramCache]: Analyzing trace with hash -1157331731, now seen corresponding path program 18 times [2024-05-06 03:55:01,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:01,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:01,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:02,035 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:55:02,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:02,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:02,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:02,178 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:55:02,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:55:02,272 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:02,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:55:02,287 INFO L85 PathProgramCache]: Analyzing trace with hash 263856329, now seen corresponding path program 19 times [2024-05-06 03:55:02,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:02,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:02,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:02,380 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:02,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:02,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:02,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:02,473 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:02,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:55:02,555 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:02,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:55:02,572 INFO L85 PathProgramCache]: Analyzing trace with hash -978715405, now seen corresponding path program 20 times [2024-05-06 03:55:02,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:02,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:02,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:02,669 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:55:02,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:02,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:02,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:02,763 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:55:02,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:55:02,893 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:02,893 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:55:02,906 INFO L85 PathProgramCache]: Analyzing trace with hash -555795197, now seen corresponding path program 21 times [2024-05-06 03:55:02,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:02,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:02,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:02,993 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:02,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:02,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:03,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:03,083 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:03,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:03,152 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:03,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:05,249 INFO L85 PathProgramCache]: Analyzing trace with hash 1080130503, now seen corresponding path program 22 times [2024-05-06 03:55:05,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:05,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:05,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:05,341 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:05,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:05,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:05,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:05,432 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:05,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:55:05,505 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:05,505 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:55:05,520 INFO L85 PathProgramCache]: Analyzing trace with hash -875692181, now seen corresponding path program 23 times [2024-05-06 03:55:05,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:05,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:05,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:05,613 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:05,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:05,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:05,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:05,706 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:05,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:05,782 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:05,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:07,834 INFO L85 PathProgramCache]: Analyzing trace with hash -1376653238, now seen corresponding path program 24 times [2024-05-06 03:55:07,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:07,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:07,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:08,046 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:08,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:08,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:08,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:08,141 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:08,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:08,219 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:08,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:08,342 INFO L85 PathProgramCache]: Analyzing trace with hash -2042412776, now seen corresponding path program 1 times [2024-05-06 03:55:08,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:08,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:08,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:08,467 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:55:08,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:08,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:08,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:08,564 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:55:08,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:08,638 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:08,638 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:10,691 INFO L85 PathProgramCache]: Analyzing trace with hash 898343801, now seen corresponding path program 2 times [2024-05-06 03:55:10,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:10,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:10,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:10,789 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:10,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:10,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:10,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:10,886 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:10,916 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:10,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:12,980 INFO L85 PathProgramCache]: Analyzing trace with hash 874520221, now seen corresponding path program 2 times [2024-05-06 03:55:12,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:12,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:13,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:13,087 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:13,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:13,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:13,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:13,296 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:13,326 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:13,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:15,367 INFO L85 PathProgramCache]: Analyzing trace with hash -439257014, now seen corresponding path program 3 times [2024-05-06 03:55:15,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:15,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:15,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:15,476 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:15,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:15,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:15,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:15,584 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:15,659 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:15,664 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:15,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:17,712 INFO L85 PathProgramCache]: Analyzing trace with hash -481526296, now seen corresponding path program 1 times [2024-05-06 03:55:17,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:17,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:17,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:17,806 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:55:17,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:17,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:17,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:17,899 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:55:17,977 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:17,983 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:17,984 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:20,048 INFO L85 PathProgramCache]: Analyzing trace with hash 2078747817, now seen corresponding path program 2 times [2024-05-06 03:55:20,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:20,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:20,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:20,148 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:20,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:20,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:20,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:20,250 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:20,343 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:20,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:22,414 INFO L85 PathProgramCache]: Analyzing trace with hash -750392371, now seen corresponding path program 2 times [2024-05-06 03:55:22,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:22,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:22,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:22,521 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:22,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:22,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:22,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:22,625 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:22,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:22,699 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:22,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:22,751 INFO L85 PathProgramCache]: Analyzing trace with hash -1262459110, now seen corresponding path program 1 times [2024-05-06 03:55:22,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:22,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:22,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:22,843 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:55:22,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:22,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:22,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:22,935 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:55:23,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:23,012 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:23,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:25,041 INFO L85 PathProgramCache]: Analyzing trace with hash 125925687, now seen corresponding path program 2 times [2024-05-06 03:55:25,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:25,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:25,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:25,141 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:25,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:25,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:25,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:25,241 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:25,273 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:25,273 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:27,327 INFO L85 PathProgramCache]: Analyzing trace with hash -1572053285, now seen corresponding path program 2 times [2024-05-06 03:55:27,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:27,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:27,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:27,553 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:27,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:27,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:27,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:27,660 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:27,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:27,745 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:27,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:29,797 INFO L85 PathProgramCache]: Analyzing trace with hash 2037485482, now seen corresponding path program 1 times [2024-05-06 03:55:29,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:29,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:29,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:29,888 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:55:29,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:29,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:29,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:29,979 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:55:30,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:30,067 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:30,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:32,111 INFO L85 PathProgramCache]: Analyzing trace with hash -681042265, now seen corresponding path program 2 times [2024-05-06 03:55:32,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:32,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:32,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:32,207 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:32,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:32,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:32,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:32,304 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:32,330 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:32,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:34,387 INFO L85 PathProgramCache]: Analyzing trace with hash -705234869, now seen corresponding path program 2 times [2024-05-06 03:55:34,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:34,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:34,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:34,489 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:34,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:34,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:34,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:34,656 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:34,742 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:34,751 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:34,752 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:36,808 INFO L85 PathProgramCache]: Analyzing trace with hash 481367325, now seen corresponding path program 25 times [2024-05-06 03:55:36,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:36,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:36,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:36,901 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:55:36,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:36,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:36,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:36,995 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:55:37,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:37,077 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:37,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:37,148 INFO L85 PathProgramCache]: Analyzing trace with hash -1961581356, now seen corresponding path program 26 times [2024-05-06 03:55:37,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:37,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:37,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:37,248 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:37,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:37,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:37,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:37,346 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:37,373 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:37,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:39,430 INFO L85 PathProgramCache]: Analyzing trace with hash -999855560, now seen corresponding path program 13 times [2024-05-06 03:55:39,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:39,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:39,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:39,536 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:39,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:39,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:39,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:39,720 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:39,754 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:39,754 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:41,802 INFO L85 PathProgramCache]: Analyzing trace with hash -1263636316, now seen corresponding path program 14 times [2024-05-06 03:55:41,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:41,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:41,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:41,889 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:55:41,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:41,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:41,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:42,003 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:55:42,078 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:55:42,083 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:42,083 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:55:42,101 INFO L85 PathProgramCache]: Analyzing trace with hash -518019678, now seen corresponding path program 3 times [2024-05-06 03:55:42,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:42,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:42,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:42,264 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:55:42,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:42,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:42,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:42,352 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:55:42,381 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:42,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:44,429 INFO L85 PathProgramCache]: Analyzing trace with hash 1364118211, now seen corresponding path program 15 times [2024-05-06 03:55:44,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:44,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:44,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:44,510 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:55:44,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:44,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:44,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:44,592 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:55:44,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:55:44,696 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:44,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:55:44,715 INFO L85 PathProgramCache]: Analyzing trace with hash -185210503, now seen corresponding path program 1 times [2024-05-06 03:55:44,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:44,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:44,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:44,905 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:55:44,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:44,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:44,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:44,991 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:55:45,020 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:45,020 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:47,070 INFO L85 PathProgramCache]: Analyzing trace with hash -1137976413, now seen corresponding path program 1 times [2024-05-06 03:55:47,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:47,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:47,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:47,164 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:55:47,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:47,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:47,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:47,253 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:55:47,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:55:47,330 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:47,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:55:47,347 INFO L85 PathProgramCache]: Analyzing trace with hash -146336579, now seen corresponding path program 2 times [2024-05-06 03:55:47,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:47,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:47,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:47,432 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:47,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:47,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:47,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:47,516 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:47,547 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:47,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:49,616 INFO L85 PathProgramCache]: Analyzing trace with hash 731910341, now seen corresponding path program 2 times [2024-05-06 03:55:49,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:49,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:49,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:49,705 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:49,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:49,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:49,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:49,793 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:49,826 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:49,826 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:51,889 INFO L85 PathProgramCache]: Analyzing trace with hash -404917029, now seen corresponding path program 1 times [2024-05-06 03:55:51,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:51,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:51,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:52,070 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:52,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:52,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:52,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:52,160 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:52,245 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:55:52,253 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:52,254 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:55:52,275 INFO L85 PathProgramCache]: Analyzing trace with hash 332474583, now seen corresponding path program 2 times [2024-05-06 03:55:52,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:52,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:52,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:52,362 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:52,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:52,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:52,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:52,450 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:52,482 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:52,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:54,534 INFO L85 PathProgramCache]: Analyzing trace with hash 1716778078, now seen corresponding path program 3 times [2024-05-06 03:55:54,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:54,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:54,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:54,640 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:54,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:54,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:54,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:54,726 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:54,753 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:54,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:56,822 INFO L85 PathProgramCache]: Analyzing trace with hash -1224574661, now seen corresponding path program 4 times [2024-05-06 03:55:56,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:56,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:56,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:56,919 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:56,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:56,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:56,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:57,121 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:57,154 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:57,154 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:59,214 INFO L85 PathProgramCache]: Analyzing trace with hash 1233864132, now seen corresponding path program 5 times [2024-05-06 03:55:59,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:59,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:59,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:59,298 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:59,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:59,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:59,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:59,383 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:55:59,418 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:59,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:01,523 INFO L85 PathProgramCache]: Analyzing trace with hash -237292611, now seen corresponding path program 6 times [2024-05-06 03:56:01,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:01,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:01,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:01,610 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:01,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:01,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:01,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:01,696 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:01,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:01,773 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:01,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:01,793 INFO L85 PathProgramCache]: Analyzing trace with hash -1805831521, now seen corresponding path program 7 times [2024-05-06 03:56:01,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:01,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:01,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:01,883 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:01,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:01,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:01,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:01,969 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:01,999 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:01,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:04,072 INFO L85 PathProgramCache]: Analyzing trace with hash -1805831521, now seen corresponding path program 8 times [2024-05-06 03:56:04,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:04,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:04,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:04,270 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:04,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:04,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:04,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:04,357 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:04,386 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:04,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:06,428 INFO L85 PathProgramCache]: Analyzing trace with hash -2069866023, now seen corresponding path program 1 times [2024-05-06 03:56:06,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:06,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:06,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:06,519 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:06,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:06,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:06,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:06,609 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:06,635 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:06,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:08,704 INFO L85 PathProgramCache]: Analyzing trace with hash -898053881, now seen corresponding path program 1 times [2024-05-06 03:56:08,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:08,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:08,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:08,793 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:08,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:08,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:08,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:08,882 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:08,910 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:08,910 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:10,972 INFO L85 PathProgramCache]: Analyzing trace with hash 1633598491, now seen corresponding path program 1 times [2024-05-06 03:56:10,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:10,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:10,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:11,067 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:11,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:11,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:11,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:11,227 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:11,253 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:11,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:13,311 INFO L85 PathProgramCache]: Analyzing trace with hash 52696713, now seen corresponding path program 1 times [2024-05-06 03:56:13,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:13,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:13,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:13,400 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:13,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:13,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:13,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:13,488 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:13,514 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:13,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:15,579 INFO L85 PathProgramCache]: Analyzing trace with hash 1664267870, now seen corresponding path program 9 times [2024-05-06 03:56:15,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:15,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:15,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:15,669 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:15,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:15,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:15,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:15,762 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:15,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:15,845 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:15,846 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:15,864 INFO L85 PathProgramCache]: Analyzing trace with hash -1190861659, now seen corresponding path program 1 times [2024-05-06 03:56:15,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:15,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:15,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:15,950 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:15,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:15,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:15,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:16,038 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:16,166 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:16,171 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:16,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:16,188 INFO L85 PathProgramCache]: Analyzing trace with hash -889532911, now seen corresponding path program 2 times [2024-05-06 03:56:16,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:16,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:16,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:16,274 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:16,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:16,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:16,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:16,358 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:16,434 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:16,440 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:16,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:16,457 INFO L85 PathProgramCache]: Analyzing trace with hash -817936846, now seen corresponding path program 1 times [2024-05-06 03:56:16,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:16,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:16,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:16,542 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:16,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:16,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:16,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:16,627 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:16,698 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:16,704 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:16,704 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:16,722 INFO L85 PathProgramCache]: Analyzing trace with hash 1633871972, now seen corresponding path program 2 times [2024-05-06 03:56:16,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:16,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:16,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:16,805 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:16,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:16,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:16,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:16,889 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:16,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:56:16,968 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:16,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:56:16,986 INFO L85 PathProgramCache]: Analyzing trace with hash -1181511241, now seen corresponding path program 1 times [2024-05-06 03:56:16,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:16,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:17,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:17,129 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:17,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:17,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:17,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:17,213 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:17,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:56:17,297 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:17,298 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:56:17,315 INFO L85 PathProgramCache]: Analyzing trace with hash 1161084351, now seen corresponding path program 2 times [2024-05-06 03:56:17,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:17,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:17,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:17,398 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:17,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:17,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:17,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:17,481 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:17,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:56:17,561 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:17,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:56:17,579 INFO L85 PathProgramCache]: Analyzing trace with hash 1967241236, now seen corresponding path program 1 times [2024-05-06 03:56:17,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:17,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:17,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:17,666 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:17,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:17,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:17,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:17,749 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:17,821 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:17,826 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:17,826 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:17,843 INFO L85 PathProgramCache]: Analyzing trace with hash -378187454, now seen corresponding path program 2 times [2024-05-06 03:56:17,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:17,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:17,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:17,925 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:17,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:17,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:18,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:18,065 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:18,137 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:18,142 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:18,142 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:18,161 INFO L85 PathProgramCache]: Analyzing trace with hash -2113714023, now seen corresponding path program 1 times [2024-05-06 03:56:18,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:18,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:18,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:18,244 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:18,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:18,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:18,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:18,327 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:18,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:18,402 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:18,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:18,419 INFO L85 PathProgramCache]: Analyzing trace with hash 1927463325, now seen corresponding path program 2 times [2024-05-06 03:56:18,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:18,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:18,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:18,500 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:18,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:18,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:18,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:18,582 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:18,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:18,660 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:18,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:18,679 INFO L85 PathProgramCache]: Analyzing trace with hash 1525531959, now seen corresponding path program 1 times [2024-05-06 03:56:18,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:18,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:18,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:18,761 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:18,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:18,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:18,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:18,903 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:18,974 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:18,979 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:18,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:18,997 INFO L85 PathProgramCache]: Analyzing trace with hash -769107393, now seen corresponding path program 2 times [2024-05-06 03:56:18,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:18,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:19,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:19,077 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:19,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:19,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:19,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:19,158 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:19,252 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:19,258 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:19,258 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:21,400 INFO L85 PathProgramCache]: Analyzing trace with hash 1567673173, now seen corresponding path program 3 times [2024-05-06 03:56:21,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:21,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:21,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:21,480 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:21,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:21,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:21,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:21,559 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:21,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:21,634 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:21,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:21,653 INFO L85 PathProgramCache]: Analyzing trace with hash -1566905703, now seen corresponding path program 4 times [2024-05-06 03:56:21,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:21,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:21,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:21,734 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:21,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:21,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:21,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:21,866 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:21,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:21,942 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:21,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:23,970 INFO L85 PathProgramCache]: Analyzing trace with hash -1821355761, now seen corresponding path program 5 times [2024-05-06 03:56:23,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:23,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:23,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:24,058 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:24,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:24,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:24,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:24,145 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:24,172 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:24,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:26,233 INFO L85 PathProgramCache]: Analyzing trace with hash 1339115699, now seen corresponding path program 10 times [2024-05-06 03:56:26,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:26,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:26,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:26,326 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:26,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:26,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:26,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:26,419 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:26,484 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:26,489 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:26,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:26,606 INFO L85 PathProgramCache]: Analyzing trace with hash 2023418, now seen corresponding path program 6 times [2024-05-06 03:56:26,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:26,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:26,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:26,692 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:26,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:26,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:26,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:26,827 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:26,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:26,891 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:26,891 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:28,929 INFO L85 PathProgramCache]: Analyzing trace with hash 1005761714, now seen corresponding path program 7 times [2024-05-06 03:56:28,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:28,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:28,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:29,016 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:29,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:29,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:29,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:29,103 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:29,130 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:29,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:31,187 INFO L85 PathProgramCache]: Analyzing trace with hash -57557866, now seen corresponding path program 11 times [2024-05-06 03:56:31,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:31,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:31,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:31,281 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:31,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:31,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:31,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:31,373 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:31,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:31,440 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:31,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:33,504 INFO L85 PathProgramCache]: Analyzing trace with hash -906001801, now seen corresponding path program 8 times [2024-05-06 03:56:33,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:33,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:33,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:33,636 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:33,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:33,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:33,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:33,721 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:33,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:33,788 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:33,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:35,842 INFO L85 PathProgramCache]: Analyzing trace with hash 828192305, now seen corresponding path program 9 times [2024-05-06 03:56:35,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:35,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:35,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:35,928 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:35,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:35,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:35,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:36,013 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:36,050 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:36,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:38,116 INFO L85 PathProgramCache]: Analyzing trace with hash -788288683, now seen corresponding path program 12 times [2024-05-06 03:56:38,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:38,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:38,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:38,217 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:38,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:38,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:38,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:38,307 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:38,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:38,375 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:38,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:38,462 INFO L85 PathProgramCache]: Analyzing trace with hash -1847865960, now seen corresponding path program 10 times [2024-05-06 03:56:38,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:38,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:38,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:38,592 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:38,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:38,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:38,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:38,678 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:38,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:38,744 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:38,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:40,782 INFO L85 PathProgramCache]: Analyzing trace with hash -1329435956, now seen corresponding path program 11 times [2024-05-06 03:56:40,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:40,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:40,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:40,864 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:40,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:40,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:40,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:40,948 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:41,020 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:56:41,026 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:41,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:56:41,045 INFO L85 PathProgramCache]: Analyzing trace with hash 1737158908, now seen corresponding path program 12 times [2024-05-06 03:56:41,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:41,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:41,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:41,130 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:41,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:41,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:41,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:41,231 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:41,291 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:41,296 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:41,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:41,309 INFO L85 PathProgramCache]: Analyzing trace with hash 1402043793, now seen corresponding path program 13 times [2024-05-06 03:56:41,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:41,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:41,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:41,448 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:41,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:41,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:41,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:41,534 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:41,595 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:41,599 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:41,600 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:41,614 INFO L85 PathProgramCache]: Analyzing trace with hash 878527629, now seen corresponding path program 14 times [2024-05-06 03:56:41,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:41,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:41,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:41,704 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:41,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:41,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:41,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:41,792 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:41,854 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:41,858 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:41,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:43,904 INFO L85 PathProgramCache]: Analyzing trace with hash 878527629, now seen corresponding path program 15 times [2024-05-06 03:56:43,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:43,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:43,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:43,992 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:43,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:43,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:44,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:44,135 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:44,231 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:44,236 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:44,236 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:44,260 INFO L85 PathProgramCache]: Analyzing trace with hash -83903742, now seen corresponding path program 16 times [2024-05-06 03:56:44,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:44,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:44,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:44,358 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:56:44,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:44,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:44,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:44,453 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:56:44,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:44,540 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:44,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:44,554 INFO L85 PathProgramCache]: Analyzing trace with hash -138366572, now seen corresponding path program 17 times [2024-05-06 03:56:44,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:44,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:44,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:44,648 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:44,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:44,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:44,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:44,772 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:44,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:44,839 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:44,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:44,853 INFO L85 PathProgramCache]: Analyzing trace with hash 1868143872, now seen corresponding path program 18 times [2024-05-06 03:56:44,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:44,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:44,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:45,000 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:56:45,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:45,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:45,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:45,098 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:56:45,161 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:56:45,169 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:45,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:56:45,185 INFO L85 PathProgramCache]: Analyzing trace with hash 136644822, now seen corresponding path program 19 times [2024-05-06 03:56:45,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:45,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:45,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:45,278 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:45,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:45,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:45,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:45,378 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:45,442 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:45,446 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:45,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:45,461 INFO L85 PathProgramCache]: Analyzing trace with hash 1058543232, now seen corresponding path program 20 times [2024-05-06 03:56:45,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:45,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:45,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:45,556 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:56:45,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:45,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:45,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:45,695 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:56:45,759 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:45,764 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:45,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:45,778 INFO L85 PathProgramCache]: Analyzing trace with hash -559898794, now seen corresponding path program 21 times [2024-05-06 03:56:45,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:45,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:45,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:45,871 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:45,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:45,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:45,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:45,964 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:46,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:46,036 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:46,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:48,062 INFO L85 PathProgramCache]: Analyzing trace with hash -911043436, now seen corresponding path program 22 times [2024-05-06 03:56:48,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:48,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:48,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:48,158 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:48,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:48,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:48,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:48,297 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:48,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:48,376 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:48,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:48,395 INFO L85 PathProgramCache]: Analyzing trace with hash 1822425150, now seen corresponding path program 23 times [2024-05-06 03:56:48,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:48,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:48,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:48,492 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:48,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:48,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:48,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:48,588 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:48,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:48,668 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:48,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:50,709 INFO L85 PathProgramCache]: Analyzing trace with hash 660605399, now seen corresponding path program 24 times [2024-05-06 03:56:50,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:50,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:50,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:50,807 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:50,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:50,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:50,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:50,905 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:50,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:50,986 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:50,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:53,030 INFO L85 PathProgramCache]: Analyzing trace with hash -1691002197, now seen corresponding path program 1 times [2024-05-06 03:56:53,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:53,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:53,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:53,217 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:53,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:53,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:53,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:53,329 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:56:53,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:53,413 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:53,413 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:55,447 INFO L85 PathProgramCache]: Analyzing trace with hash 600232326, now seen corresponding path program 2 times [2024-05-06 03:56:55,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:55,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:55,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:55,549 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:55,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:55,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:55,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:55,649 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:55,676 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:55,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:57,728 INFO L85 PathProgramCache]: Analyzing trace with hash 2086068330, now seen corresponding path program 2 times [2024-05-06 03:56:57,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:57,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:57,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:57,876 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:57,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:57,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:57,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:57,983 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:56:58,014 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:58,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:57:00,081 INFO L85 PathProgramCache]: Analyzing trace with hash -2114697379, now seen corresponding path program 3 times [2024-05-06 03:57:00,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:00,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:00,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:00,193 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:00,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:00,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:00,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:00,304 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:00,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:00,381 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:00,381 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:02,412 INFO L85 PathProgramCache]: Analyzing trace with hash -608737803, now seen corresponding path program 1 times [2024-05-06 03:57:02,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:02,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:02,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:02,571 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:57:02,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:02,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:02,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:02,705 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:57:02,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:02,791 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:02,792 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:04,854 INFO L85 PathProgramCache]: Analyzing trace with hash 129468668, now seen corresponding path program 2 times [2024-05-06 03:57:04,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:04,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:04,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:04,955 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:04,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:04,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:04,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:05,056 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:05,082 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:05,083 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:57:07,150 INFO L85 PathProgramCache]: Analyzing trace with hash 1366899808, now seen corresponding path program 2 times [2024-05-06 03:57:07,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:07,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:07,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:07,305 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:07,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:07,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:07,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:07,408 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:07,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:07,507 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:07,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:09,562 INFO L85 PathProgramCache]: Analyzing trace with hash -1266562707, now seen corresponding path program 1 times [2024-05-06 03:57:09,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:09,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:09,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:09,654 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:57:09,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:09,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:09,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:09,747 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:57:09,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:09,815 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:09,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:11,863 INFO L85 PathProgramCache]: Analyzing trace with hash 1725613700, now seen corresponding path program 2 times [2024-05-06 03:57:11,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:11,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:11,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:12,042 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:12,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:12,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:12,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:12,161 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:12,193 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:12,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:57:14,272 INFO L85 PathProgramCache]: Analyzing trace with hash -118280216, now seen corresponding path program 2 times [2024-05-06 03:57:14,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:14,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:14,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:14,382 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:14,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:14,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:14,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:14,487 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:14,564 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:14,570 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:14,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:14,919 INFO L85 PathProgramCache]: Analyzing trace with hash 1067521783, now seen corresponding path program 1 times [2024-05-06 03:57:14,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:14,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:14,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:15,067 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:57:15,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:15,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:15,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:15,163 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:57:15,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:15,238 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:15,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:15,386 INFO L85 PathProgramCache]: Analyzing trace with hash -767986758, now seen corresponding path program 2 times [2024-05-06 03:57:15,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:15,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:15,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:15,487 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:15,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:15,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:15,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:15,586 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:15,614 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:15,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:57:17,667 INFO L85 PathProgramCache]: Analyzing trace with hash 1004229022, now seen corresponding path program 2 times [2024-05-06 03:57:17,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:17,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:17,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:17,819 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:17,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:17,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:17,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:17,940 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:18,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:18,021 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:18,021 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:20,099 INFO L85 PathProgramCache]: Analyzing trace with hash -1073942480, now seen corresponding path program 25 times [2024-05-06 03:57:20,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:20,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:20,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:20,194 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:57:20,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:20,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:20,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:20,290 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:57:20,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:20,376 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:20,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:22,436 INFO L85 PathProgramCache]: Analyzing trace with hash 252371297, now seen corresponding path program 26 times [2024-05-06 03:57:22,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:22,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:22,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:22,620 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:22,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:22,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:22,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:22,719 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:22,751 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:22,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:57:24,826 INFO L85 PathProgramCache]: Analyzing trace with hash -390522235, now seen corresponding path program 13 times [2024-05-06 03:57:24,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:24,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:24,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:24,935 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:24,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:24,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:24,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:25,042 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:25,079 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:25,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:57:27,153 INFO L85 PathProgramCache]: Analyzing trace with hash 110314545, now seen corresponding path program 14 times [2024-05-06 03:57:27,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:27,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:27,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:27,293 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:57:27,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:27,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:27,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:27,397 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:57:27,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:57:27,476 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:27,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:57:27,497 INFO L85 PathProgramCache]: Analyzing trace with hash -875215947, now seen corresponding path program 3 times [2024-05-06 03:57:27,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:27,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:27,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:27,602 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:57:27,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:27,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:27,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:27,706 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:57:27,742 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:27,742 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:57:29,792 INFO L85 PathProgramCache]: Analyzing trace with hash -1537320880, now seen corresponding path program 15 times [2024-05-06 03:57:29,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:29,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:29,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:29,916 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:57:29,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:29,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:29,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:30,000 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:57:30,093 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:57:30,099 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:30,100 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:57:30,133 INFO L85 PathProgramCache]: Analyzing trace with hash 1388270714, now seen corresponding path program 1 times [2024-05-06 03:57:30,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:30,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:30,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:30,209 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:30,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:30,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:30,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:30,285 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:30,367 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:57:30,372 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:30,373 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:57:32,439 INFO L85 PathProgramCache]: Analyzing trace with hash -719499116, now seen corresponding path program 2 times [2024-05-06 03:57:32,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:32,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:32,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:32,556 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:32,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:32,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:32,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:32,758 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:32,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 03:57:32,834 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:32,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 03:57:32,926 INFO L85 PathProgramCache]: Analyzing trace with hash 2000167301, now seen corresponding path program 3 times [2024-05-06 03:57:32,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:32,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:33,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:33,259 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:33,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:33,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:33,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:33,498 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:33,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:57:33,620 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:33,620 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:57:33,650 INFO L85 PathProgramCache]: Analyzing trace with hash 1855618507, now seen corresponding path program 1 times [2024-05-06 03:57:33,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:33,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:33,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:33,884 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:33,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:33,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:33,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:34,153 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:34,252 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:57:34,257 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:34,258 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:57:35,523 INFO L85 PathProgramCache]: Analyzing trace with hash 1795969507, now seen corresponding path program 2 times [2024-05-06 03:57:35,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:35,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:35,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:35,636 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:35,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:35,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:35,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:35,732 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:35,813 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:57:35,819 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:35,819 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:57:35,838 INFO L85 PathProgramCache]: Analyzing trace with hash 1038577006, now seen corresponding path program 3 times [2024-05-06 03:57:35,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:35,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:35,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:35,940 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:35,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:35,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:36,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:36,173 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:36,211 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:36,211 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:38,249 INFO L85 PathProgramCache]: Analyzing trace with hash -705447342, now seen corresponding path program 1 times [2024-05-06 03:57:38,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:38,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:38,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:38,354 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:38,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:38,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:38,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:38,457 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:38,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:57:38,543 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:38,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:57:38,563 INFO L85 PathProgramCache]: Analyzing trace with hash 1676773051, now seen corresponding path program 4 times [2024-05-06 03:57:38,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:38,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:38,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:38,737 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:38,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:38,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:38,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:38,863 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:38,908 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:38,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:41,002 INFO L85 PathProgramCache]: Analyzing trace with hash 1955705872, now seen corresponding path program 2 times [2024-05-06 03:57:41,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:41,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:41,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:41,109 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:41,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:41,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:41,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:41,284 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:41,380 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:57:41,386 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:41,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:57:41,406 INFO L85 PathProgramCache]: Analyzing trace with hash -1275710403, now seen corresponding path program 5 times [2024-05-06 03:57:41,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:41,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:41,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:41,507 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:41,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:41,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:41,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:41,606 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:41,639 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:41,639 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:43,697 INFO L85 PathProgramCache]: Analyzing trace with hash -642807199, now seen corresponding path program 3 times [2024-05-06 03:57:43,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:43,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:43,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:43,800 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:43,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:43,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:43,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:43,986 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:44,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:57:44,069 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:44,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:57:44,089 INFO L85 PathProgramCache]: Analyzing trace with hash 155679372, now seen corresponding path program 6 times [2024-05-06 03:57:44,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:44,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:44,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:44,200 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:44,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:44,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:44,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:44,311 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:44,344 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:44,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:46,425 INFO L85 PathProgramCache]: Analyzing trace with hash -358581537, now seen corresponding path program 4 times [2024-05-06 03:57:46,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:46,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:46,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:46,593 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:46,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:46,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:46,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:46,702 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:46,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:57:46,778 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:46,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:57:46,797 INFO L85 PathProgramCache]: Analyzing trace with hash 1013267728, now seen corresponding path program 7 times [2024-05-06 03:57:46,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:46,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:46,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:46,925 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:46,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:46,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:46,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:47,067 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:47,110 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:47,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:49,161 INFO L85 PathProgramCache]: Analyzing trace with hash -1049368716, now seen corresponding path program 5 times [2024-05-06 03:57:49,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:49,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:49,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:49,264 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:49,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:49,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:49,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:49,369 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:49,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:57:49,445 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:49,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:57:49,461 INFO L85 PathProgramCache]: Analyzing trace with hash 1272248793, now seen corresponding path program 8 times [2024-05-06 03:57:49,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:49,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:49,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:49,607 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:49,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:49,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:49,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:49,702 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:49,730 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:49,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:57:51,791 INFO L85 PathProgramCache]: Analyzing trace with hash 1930396594, now seen corresponding path program 6 times [2024-05-06 03:57:51,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:51,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:51,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:51,891 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:51,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:51,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:51,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:52,040 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:52,134 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:57:52,140 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:52,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:57:52,161 INFO L85 PathProgramCache]: Analyzing trace with hash -159519550, now seen corresponding path program 9 times [2024-05-06 03:57:52,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:52,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:52,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:52,280 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:52,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:52,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:52,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:52,390 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:52,486 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:57:52,492 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:52,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:57:54,572 INFO L85 PathProgramCache]: Analyzing trace with hash -650138170, now seen corresponding path program 10 times [2024-05-06 03:57:54,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:54,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:54,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:54,737 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:54,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:54,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:54,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:54,832 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:54,910 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:57:54,916 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:54,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:57:56,956 INFO L85 PathProgramCache]: Analyzing trace with hash -524575962, now seen corresponding path program 11 times [2024-05-06 03:57:56,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:56,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:56,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:57,053 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:57,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:57,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:57,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:57,196 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:57:57,297 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:57:57,303 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:57,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:57:59,389 INFO L85 PathProgramCache]: Analyzing trace with hash -1406953171, now seen corresponding path program 12 times [2024-05-06 03:57:59,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:59,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:59,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:59,487 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:59,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:59,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:59,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:59,587 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:59,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:57:59,656 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:59,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:57:59,671 INFO L85 PathProgramCache]: Analyzing trace with hash -1406953171, now seen corresponding path program 13 times [2024-05-06 03:57:59,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:59,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:59,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:59,803 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:59,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:59,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:59,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:59,901 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:57:59,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:57:59,968 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:59,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:58:00,014 INFO L85 PathProgramCache]: Analyzing trace with hash -2032111807, now seen corresponding path program 14 times [2024-05-06 03:58:00,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:00,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:00,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:00,188 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 03:58:00,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:00,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:00,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:00,320 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 03:58:00,414 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:58:00,419 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:00,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:58:00,603 INFO L85 PathProgramCache]: Analyzing trace with hash 46290037, now seen corresponding path program 15 times [2024-05-06 03:58:00,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:00,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:00,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:00,735 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:00,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:00,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:00,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:00,954 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:01,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:58:01,042 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:01,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:58:03,096 INFO L85 PathProgramCache]: Analyzing trace with hash 1103443637, now seen corresponding path program 16 times [2024-05-06 03:58:03,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:03,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:03,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:03,211 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 03:58:03,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:03,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:03,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:03,397 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 03:58:03,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:58:03,485 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:03,486 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:58:05,552 INFO L85 PathProgramCache]: Analyzing trace with hash 1815327873, now seen corresponding path program 17 times [2024-05-06 03:58:05,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:05,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:05,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:05,671 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:05,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:05,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:05,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:05,870 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:05,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:58:05,971 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:05,971 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:58:08,055 INFO L85 PathProgramCache]: Analyzing trace with hash -1746189313, now seen corresponding path program 18 times [2024-05-06 03:58:08,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:08,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:08,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:08,165 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 03:58:08,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:08,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:08,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:08,274 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 03:58:08,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:58:08,410 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:08,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:58:12,362 INFO L85 PathProgramCache]: Analyzing trace with hash 1859715319, now seen corresponding path program 19 times [2024-05-06 03:58:12,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:12,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:12,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:12,491 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:12,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:12,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:12,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:12,640 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:12,720 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:58:12,725 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:12,726 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:58:12,745 INFO L85 PathProgramCache]: Analyzing trace with hash 654457215, now seen corresponding path program 20 times [2024-05-06 03:58:12,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:12,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:12,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:12,859 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:12,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:12,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:12,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:13,046 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:13,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:58:13,138 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:13,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:58:13,219 INFO L85 PathProgramCache]: Analyzing trace with hash -1186662221, now seen corresponding path program 21 times [2024-05-06 03:58:13,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:13,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:13,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:13,356 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:13,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:13,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:13,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:13,485 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:13,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:58:13,556 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:13,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:58:13,573 INFO L85 PathProgramCache]: Analyzing trace with hash 1868177410, now seen corresponding path program 22 times [2024-05-06 03:58:13,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:13,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:13,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:13,794 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:13,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:13,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:13,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:13,921 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:14,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:58:14,013 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:14,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:58:14,040 INFO L85 PathProgramCache]: Analyzing trace with hash 1961728470, now seen corresponding path program 1 times [2024-05-06 03:58:14,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:14,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:14,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:14,165 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:14,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:14,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:14,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:14,339 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:14,421 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:58:14,427 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:14,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:58:14,450 INFO L85 PathProgramCache]: Analyzing trace with hash -1654908912, now seen corresponding path program 2 times [2024-05-06 03:58:14,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:14,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:14,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:14,613 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:14,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:14,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:14,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:14,725 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:14,766 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:14,766 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:16,851 INFO L85 PathProgramCache]: Analyzing trace with hash -1948974476, now seen corresponding path program 1 times [2024-05-06 03:58:16,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:16,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:16,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:17,043 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:17,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:17,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:17,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:17,167 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:17,201 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:17,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:19,270 INFO L85 PathProgramCache]: Analyzing trace with hash 1530558073, now seen corresponding path program 1 times [2024-05-06 03:58:19,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:19,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:19,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:19,402 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:19,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:19,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:19,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:19,537 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:19,569 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:19,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:21,695 INFO L85 PathProgramCache]: Analyzing trace with hash 1764716819, now seen corresponding path program 2 times [2024-05-06 03:58:21,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:21,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:21,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:21,814 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:21,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:21,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:21,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:21,934 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:21,968 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:21,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:24,028 INFO L85 PathProgramCache]: Analyzing trace with hash -737780046, now seen corresponding path program 2 times [2024-05-06 03:58:24,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:24,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:24,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:24,141 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:24,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:24,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:24,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:24,360 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:24,442 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:58:24,447 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:24,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:58:24,467 INFO L85 PathProgramCache]: Analyzing trace with hash -1737833760, now seen corresponding path program 1 times [2024-05-06 03:58:24,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:24,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:24,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:24,575 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:24,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:24,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:24,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:24,696 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:24,758 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:58:24,762 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:24,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:58:24,778 INFO L85 PathProgramCache]: Analyzing trace with hash -1669695034, now seen corresponding path program 2 times [2024-05-06 03:58:24,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:24,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:24,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:25,005 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:25,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:25,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:25,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:25,138 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:25,173 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:25,173 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:27,253 INFO L85 PathProgramCache]: Analyzing trace with hash 1069889706, now seen corresponding path program 1 times [2024-05-06 03:58:27,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:27,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:27,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:27,372 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:27,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:27,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:27,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:27,556 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:27,591 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:27,591 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:29,640 INFO L85 PathProgramCache]: Analyzing trace with hash -752566168, now seen corresponding path program 2 times [2024-05-06 03:58:29,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:29,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:29,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:29,755 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:29,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:29,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:29,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:29,870 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:29,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:58:29,960 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:29,960 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:58:29,979 INFO L85 PathProgramCache]: Analyzing trace with hash 1467961496, now seen corresponding path program 1 times [2024-05-06 03:58:29,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:29,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:30,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:30,087 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:30,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:30,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:30,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:30,273 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:30,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:58:30,354 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:30,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:58:30,374 INFO L85 PathProgramCache]: Analyzing trace with hash -890125042, now seen corresponding path program 2 times [2024-05-06 03:58:30,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:30,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:30,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:30,511 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:30,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:30,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:30,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:30,645 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:30,680 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:30,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:32,880 INFO L85 PathProgramCache]: Analyzing trace with hash -433255950, now seen corresponding path program 1 times [2024-05-06 03:58:32,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:32,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:32,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:33,060 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:33,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:33,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:33,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:33,177 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:33,212 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:33,213 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:35,261 INFO L85 PathProgramCache]: Analyzing trace with hash 27003824, now seen corresponding path program 2 times [2024-05-06 03:58:35,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:35,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:35,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:35,376 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:35,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:35,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:35,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:35,550 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:35,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:58:35,637 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:35,637 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:58:35,656 INFO L85 PathProgramCache]: Analyzing trace with hash -783930398, now seen corresponding path program 1 times [2024-05-06 03:58:35,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:35,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:35,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:35,782 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:35,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:35,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:35,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:35,909 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:35,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:58:35,991 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:35,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:58:36,010 INFO L85 PathProgramCache]: Analyzing trace with hash -916214652, now seen corresponding path program 2 times [2024-05-06 03:58:36,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:36,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:36,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:36,197 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:36,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:36,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:36,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:36,333 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:36,367 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:36,367 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:38,417 INFO L85 PathProgramCache]: Analyzing trace with hash 1242863080, now seen corresponding path program 1 times [2024-05-06 03:58:38,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:38,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:38,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:38,536 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:38,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:38,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:38,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:38,755 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:38,790 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:38,790 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:40,844 INFO L85 PathProgramCache]: Analyzing trace with hash 914214, now seen corresponding path program 2 times [2024-05-06 03:58:40,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:40,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:40,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:40,959 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:40,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:40,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:40,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:41,077 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:41,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:58:41,163 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:41,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:58:41,182 INFO L85 PathProgramCache]: Analyzing trace with hash -856572069, now seen corresponding path program 23 times [2024-05-06 03:58:41,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:41,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:41,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:41,335 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:41,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:41,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:41,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:41,460 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:41,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:58:41,552 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:41,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:58:41,573 INFO L85 PathProgramCache]: Analyzing trace with hash 45193195, now seen corresponding path program 24 times [2024-05-06 03:58:41,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:41,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:41,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:41,705 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:41,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:41,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:41,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:41,887 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:41,923 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:41,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:43,986 INFO L85 PathProgramCache]: Analyzing trace with hash -549671793, now seen corresponding path program 7 times [2024-05-06 03:58:43,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:43,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:44,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:44,105 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:44,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:44,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:44,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:44,222 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:44,260 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:44,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:46,337 INFO L85 PathProgramCache]: Analyzing trace with hash 962322061, now seen corresponding path program 8 times [2024-05-06 03:58:46,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:46,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:46,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:46,551 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:46,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:46,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:46,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:46,666 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:46,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:58:46,750 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:46,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:58:46,801 INFO L85 PathProgramCache]: Analyzing trace with hash -1224232532, now seen corresponding path program 1 times [2024-05-06 03:58:46,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:46,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:46,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:46,905 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:46,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:46,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:46,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:47,100 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:47,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:58:47,185 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:47,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:58:49,280 INFO L85 PathProgramCache]: Analyzing trace with hash -1643449772, now seen corresponding path program 2 times [2024-05-06 03:58:49,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:49,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:49,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:49,425 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:49,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:49,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:49,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:49,557 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:49,591 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:49,591 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:51,668 INFO L85 PathProgramCache]: Analyzing trace with hash 1413205694, now seen corresponding path program 3 times [2024-05-06 03:58:51,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:51,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:51,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:51,787 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:51,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:51,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:51,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:51,993 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:52,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:58:52,076 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:52,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:58:52,127 INFO L85 PathProgramCache]: Analyzing trace with hash -178038562, now seen corresponding path program 9 times [2024-05-06 03:58:52,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:52,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:52,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:52,231 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:52,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:52,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:52,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:52,334 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:52,368 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:52,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:54,443 INFO L85 PathProgramCache]: Analyzing trace with hash -178038562, now seen corresponding path program 10 times [2024-05-06 03:58:54,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:54,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:54,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:54,548 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:54,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:54,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:54,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:54,713 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:58:54,747 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:54,748 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:56,800 INFO L85 PathProgramCache]: Analyzing trace with hash -1426313360, now seen corresponding path program 11 times [2024-05-06 03:58:56,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:56,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:56,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:56,915 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:56,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:56,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:56,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:57,026 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:57,101 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:58:57,107 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:57,108 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:58:57,160 INFO L85 PathProgramCache]: Analyzing trace with hash -1266040606, now seen corresponding path program 12 times [2024-05-06 03:58:57,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:57,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:57,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:57,329 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:57,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:57,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:57,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:57,440 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:57,473 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:57,474 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:58:59,555 INFO L85 PathProgramCache]: Analyzing trace with hash -592552525, now seen corresponding path program 13 times [2024-05-06 03:58:59,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:59,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:59,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:59,670 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:59,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:59,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:59,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:59,786 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:58:59,863 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:58:59,869 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:59,869 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:01,900 INFO L85 PathProgramCache]: Analyzing trace with hash 1379730264, now seen corresponding path program 1 times [2024-05-06 03:59:01,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:01,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:01,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:02,099 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:02,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:02,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:02,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:02,220 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:02,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:59:02,302 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:02,302 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:59:02,353 INFO L85 PathProgramCache]: Analyzing trace with hash 1198166824, now seen corresponding path program 2 times [2024-05-06 03:59:02,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:02,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:02,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:02,483 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:02,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:02,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:02,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:02,613 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:02,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:59:02,699 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:02,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:59:04,763 INFO L85 PathProgramCache]: Analyzing trace with hash 44507385, now seen corresponding path program 1 times [2024-05-06 03:59:04,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:04,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:04,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:04,922 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:04,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:04,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:04,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:05,025 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:05,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:05,105 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:05,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:07,155 INFO L85 PathProgramCache]: Analyzing trace with hash -660643993, now seen corresponding path program 2 times [2024-05-06 03:59:07,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:07,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:07,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:07,266 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:07,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:07,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:07,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:07,377 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:07,455 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:07,461 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:07,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:09,511 INFO L85 PathProgramCache]: Analyzing trace with hash 832719722, now seen corresponding path program 1 times [2024-05-06 03:59:09,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:09,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:09,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:09,680 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:09,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:09,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:09,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:09,798 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:09,876 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:59:09,882 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:09,882 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:59:11,937 INFO L85 PathProgramCache]: Analyzing trace with hash -200416042, now seen corresponding path program 2 times [2024-05-06 03:59:11,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:11,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:11,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:12,058 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:12,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:12,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:12,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:12,169 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:12,236 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:59:12,240 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:12,240 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:59:14,296 INFO L85 PathProgramCache]: Analyzing trace with hash -665874725, now seen corresponding path program 1 times [2024-05-06 03:59:14,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:14,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:14,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:14,460 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:14,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:14,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:14,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:14,559 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:14,642 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:14,647 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:14,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:15,814 INFO L85 PathProgramCache]: Analyzing trace with hash 1010118981, now seen corresponding path program 2 times [2024-05-06 03:59:15,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:15,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:15,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:15,937 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:15,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:15,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:15,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:16,047 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:16,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:16,118 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:16,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:18,581 INFO L85 PathProgramCache]: Analyzing trace with hash -1406953140, now seen corresponding path program 1 times [2024-05-06 03:59:18,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:18,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:18,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:18,806 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:18,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:18,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:18,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:18,930 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:19,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:59:19,013 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:19,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:59:19,066 INFO L85 PathProgramCache]: Analyzing trace with hash 166647476, now seen corresponding path program 2 times [2024-05-06 03:59:19,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:19,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:19,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:19,229 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:19,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:19,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:19,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:19,357 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:19,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:59:19,451 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:19,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:59:21,602 INFO L85 PathProgramCache]: Analyzing trace with hash 1062993086, now seen corresponding path program 25 times [2024-05-06 03:59:21,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:21,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:21,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:21,822 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:21,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:21,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:21,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:21,923 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:21,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:22,005 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:22,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:24,029 INFO L85 PathProgramCache]: Analyzing trace with hash 2071519490, now seen corresponding path program 26 times [2024-05-06 03:59:24,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:24,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:24,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:24,139 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:24,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:24,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:24,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:24,248 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:24,285 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:24,286 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:26,365 INFO L85 PathProgramCache]: Analyzing trace with hash 1794383366, now seen corresponding path program 14 times [2024-05-06 03:59:26,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:26,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:26,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:26,529 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:26,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:26,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:26,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:26,648 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:26,729 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:26,736 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:26,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:29,342 INFO L85 PathProgramCache]: Analyzing trace with hash -208690048, now seen corresponding path program 3 times [2024-05-06 03:59:29,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:29,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:29,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:29,443 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:29,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:29,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:29,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:29,543 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:29,575 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:29,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:31,650 INFO L85 PathProgramCache]: Analyzing trace with hash 1825554330, now seen corresponding path program 15 times [2024-05-06 03:59:31,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:31,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:31,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:31,847 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:31,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:31,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:31,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:31,941 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:32,034 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:59:32,040 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:32,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:59:32,058 INFO L85 PathProgramCache]: Analyzing trace with hash 2001919765, now seen corresponding path program 27 times [2024-05-06 03:59:32,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:32,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:32,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:32,154 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:32,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:32,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:32,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:32,251 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:32,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:59:32,319 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:32,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:59:34,365 INFO L85 PathProgramCache]: Analyzing trace with hash 430911193, now seen corresponding path program 28 times [2024-05-06 03:59:34,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:34,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:34,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:34,459 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:34,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:34,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:34,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:34,624 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:34,719 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:59:34,724 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:34,724 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:59:34,750 INFO L85 PathProgramCache]: Analyzing trace with hash -1859034140, now seen corresponding path program 29 times [2024-05-06 03:59:34,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:34,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:34,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:34,867 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:34,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:34,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:34,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:34,985 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:35,041 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:35,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:37,123 INFO L85 PathProgramCache]: Analyzing trace with hash -953379512, now seen corresponding path program 16 times [2024-05-06 03:59:37,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:37,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:37,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:37,235 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:37,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:37,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:37,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:37,403 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:37,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:59:37,497 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:37,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:59:37,518 INFO L85 PathProgramCache]: Analyzing trace with hash -413606267, now seen corresponding path program 30 times [2024-05-06 03:59:37,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:37,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:37,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:37,623 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:37,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:37,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:37,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:37,723 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:37,752 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:37,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:39,793 INFO L85 PathProgramCache]: Analyzing trace with hash -941905274, now seen corresponding path program 17 times [2024-05-06 03:59:39,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:39,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:39,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:39,958 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:39,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:39,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:39,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:40,078 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:40,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:59:40,181 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:40,181 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:59:40,201 INFO L85 PathProgramCache]: Analyzing trace with hash 16291591, now seen corresponding path program 31 times [2024-05-06 03:59:40,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:40,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:40,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:40,318 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:40,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:40,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:40,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:40,435 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:40,473 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:40,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:42,527 INFO L85 PathProgramCache]: Analyzing trace with hash 1427404971, now seen corresponding path program 18 times [2024-05-06 03:59:42,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:42,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:42,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:42,704 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:42,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:42,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:42,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:42,813 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:42,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:59:42,918 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:42,918 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:59:42,937 INFO L85 PathProgramCache]: Analyzing trace with hash 1058079106, now seen corresponding path program 32 times [2024-05-06 03:59:42,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:42,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:42,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:43,038 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:43,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:43,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:43,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:43,171 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:43,205 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:43,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:45,285 INFO L85 PathProgramCache]: Analyzing trace with hash 933420457, now seen corresponding path program 19 times [2024-05-06 03:59:45,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:45,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:45,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:45,474 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:45,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:45,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:45,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:45,593 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:45,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:59:45,694 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:45,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:59:45,722 INFO L85 PathProgramCache]: Analyzing trace with hash -746170106, now seen corresponding path program 33 times [2024-05-06 03:59:45,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:45,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:45,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:45,842 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:45,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:45,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:45,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:46,030 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:46,071 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:46,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:48,148 INFO L85 PathProgramCache]: Analyzing trace with hash -705493014, now seen corresponding path program 20 times [2024-05-06 03:59:48,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:48,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:48,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:48,254 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:48,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:48,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:48,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:48,364 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:48,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:59:48,456 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:48,456 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:59:48,474 INFO L85 PathProgramCache]: Analyzing trace with hash -1746682845, now seen corresponding path program 34 times [2024-05-06 03:59:48,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:48,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:48,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:48,574 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:48,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:48,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:48,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:48,729 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:48,764 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:48,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 03:59:50,827 INFO L85 PathProgramCache]: Analyzing trace with hash 170958760, now seen corresponding path program 21 times [2024-05-06 03:59:50,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:50,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:50,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:50,930 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:50,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:50,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:50,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:51,034 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:51,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:59:51,117 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:51,117 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:59:51,137 INFO L85 PathProgramCache]: Analyzing trace with hash 473345676, now seen corresponding path program 35 times [2024-05-06 03:59:51,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:51,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:51,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:51,281 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:51,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:51,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:51,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:51,395 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:51,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:59:51,479 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:51,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:59:51,538 INFO L85 PathProgramCache]: Analyzing trace with hash 1788814652, now seen corresponding path program 36 times [2024-05-06 03:59:51,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:51,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:51,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:51,662 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:51,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:51,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:51,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:51,842 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:51,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:51,927 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:51,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:54,233 INFO L85 PathProgramCache]: Analyzing trace with hash -901825380, now seen corresponding path program 37 times [2024-05-06 03:59:54,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:54,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:54,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:54,334 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:54,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:54,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:54,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:54,437 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:54,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 03:59:54,521 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:54,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 03:59:54,576 INFO L85 PathProgramCache]: Analyzing trace with hash 1422510627, now seen corresponding path program 38 times [2024-05-06 03:59:54,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:54,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:54,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:54,731 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:54,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:54,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:54,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:54,835 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:54,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 03:59:54,921 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:54,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 03:59:54,939 INFO L85 PathProgramCache]: Analyzing trace with hash 1422510627, now seen corresponding path program 39 times [2024-05-06 03:59:54,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:54,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:54,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:55,042 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:55,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:55,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:55,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:55,147 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 03:59:55,248 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 03:59:55,254 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:55,254 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 03:59:57,306 INFO L85 PathProgramCache]: Analyzing trace with hash 638881463, now seen corresponding path program 40 times [2024-05-06 03:59:57,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:57,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:57,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:57,421 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 03:59:57,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:57,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:57,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:57,534 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 03:59:57,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 03:59:57,621 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:57,621 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 03:59:59,645 INFO L85 PathProgramCache]: Analyzing trace with hash -1194728641, now seen corresponding path program 41 times [2024-05-06 03:59:59,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:59,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:59,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:59,862 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 03:59:59,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:59,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:59,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:59,973 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:00,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:00:00,060 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:00,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:00:02,097 INFO L85 PathProgramCache]: Analyzing trace with hash 2020888703, now seen corresponding path program 42 times [2024-05-06 04:00:02,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:02,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:02,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:02,212 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:00:02,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:02,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:02,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:02,401 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:00:02,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:00:02,489 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:02,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:00:04,549 INFO L85 PathProgramCache]: Analyzing trace with hash 251274359, now seen corresponding path program 43 times [2024-05-06 04:00:04,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:04,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:04,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:04,669 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:04,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:04,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:04,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:04,783 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:04,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:00:04,949 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:04,949 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:00:07,002 INFO L85 PathProgramCache]: Analyzing trace with hash -1855141643, now seen corresponding path program 44 times [2024-05-06 04:00:07,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:07,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:07,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:07,114 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:00:07,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:07,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:07,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:07,227 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:00:07,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:00:07,315 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:07,316 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:00:09,377 INFO L85 PathProgramCache]: Analyzing trace with hash -1238779327, now seen corresponding path program 45 times [2024-05-06 04:00:09,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:09,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:09,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:09,525 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:09,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:09,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:09,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:09,634 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:09,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:09,721 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:09,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:09,740 INFO L85 PathProgramCache]: Analyzing trace with hash 837583861, now seen corresponding path program 46 times [2024-05-06 04:00:09,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:09,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:09,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:09,901 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:09,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:09,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:09,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:10,039 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:10,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:00:10,151 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:10,151 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:00:12,224 INFO L85 PathProgramCache]: Analyzing trace with hash 195296509, now seen corresponding path program 47 times [2024-05-06 04:00:12,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:12,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:12,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:12,336 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:12,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:12,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:12,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:12,545 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:12,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:12,625 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:12,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:12,644 INFO L85 PathProgramCache]: Analyzing trace with hash 1759225080, now seen corresponding path program 48 times [2024-05-06 04:00:12,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:12,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:12,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:12,758 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:12,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:12,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:12,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:12,913 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:12,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:12,999 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:13,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:13,019 INFO L85 PathProgramCache]: Analyzing trace with hash 720709792, now seen corresponding path program 3 times [2024-05-06 04:00:13,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:13,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:13,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:13,133 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:13,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:13,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:13,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:13,242 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:13,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:13,347 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:13,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:13,362 INFO L85 PathProgramCache]: Analyzing trace with hash 513793030, now seen corresponding path program 4 times [2024-05-06 04:00:13,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:13,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:13,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:13,478 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:13,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:13,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:13,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:13,593 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:13,626 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:13,626 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:15,703 INFO L85 PathProgramCache]: Analyzing trace with hash -582694166, now seen corresponding path program 3 times [2024-05-06 04:00:15,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:15,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:15,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:15,871 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:15,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:15,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:15,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:16,013 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:16,049 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:16,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:18,136 INFO L85 PathProgramCache]: Analyzing trace with hash -1678939921, now seen corresponding path program 4 times [2024-05-06 04:00:18,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:18,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:18,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:18,316 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:18,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:18,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:18,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:18,443 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:18,478 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:18,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:20,551 INFO L85 PathProgramCache]: Analyzing trace with hash 1216367837, now seen corresponding path program 5 times [2024-05-06 04:00:20,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:20,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:20,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:20,706 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:20,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:20,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:20,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:20,828 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:20,865 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:20,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:22,923 INFO L85 PathProgramCache]: Analyzing trace with hash 1430921896, now seen corresponding path program 4 times [2024-05-06 04:00:22,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:22,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:22,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:23,112 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:23,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:23,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:23,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:23,254 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:23,340 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:23,347 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:23,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:23,370 INFO L85 PathProgramCache]: Analyzing trace with hash 993080022, now seen corresponding path program 3 times [2024-05-06 04:00:23,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:23,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:23,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:23,536 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:23,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:23,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:23,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:23,664 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:23,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:23,763 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:23,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:23,785 INFO L85 PathProgramCache]: Analyzing trace with hash 1448304400, now seen corresponding path program 4 times [2024-05-06 04:00:23,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:23,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:23,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:23,962 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:23,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:23,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:23,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:24,104 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:24,140 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:24,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:26,221 INFO L85 PathProgramCache]: Analyzing trace with hash 698321268, now seen corresponding path program 3 times [2024-05-06 04:00:26,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:26,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:26,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:26,395 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:26,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:26,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:26,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:26,517 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:26,551 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:26,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:28,606 INFO L85 PathProgramCache]: Analyzing trace with hash -1929534030, now seen corresponding path program 4 times [2024-05-06 04:00:28,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:28,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:28,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:28,762 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:28,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:28,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:28,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:28,900 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:29,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:29,010 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:29,010 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:29,029 INFO L85 PathProgramCache]: Analyzing trace with hash -1630533150, now seen corresponding path program 3 times [2024-05-06 04:00:29,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:29,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:29,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:29,161 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:29,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:29,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:29,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:29,287 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:29,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:29,398 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:29,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:29,417 INFO L85 PathProgramCache]: Analyzing trace with hash -1759375740, now seen corresponding path program 4 times [2024-05-06 04:00:29,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:29,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:29,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:29,553 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:29,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:29,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:29,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:29,728 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:29,764 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:29,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:31,830 INFO L85 PathProgramCache]: Analyzing trace with hash 247494632, now seen corresponding path program 3 times [2024-05-06 04:00:31,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:31,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:31,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:31,959 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:31,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:31,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:31,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:32,128 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:32,165 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:32,166 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:34,242 INFO L85 PathProgramCache]: Analyzing trace with hash -842246874, now seen corresponding path program 4 times [2024-05-06 04:00:34,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:34,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:34,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:34,406 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:34,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:34,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:34,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:34,544 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:34,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:34,633 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:34,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:34,653 INFO L85 PathProgramCache]: Analyzing trace with hash 1471422808, now seen corresponding path program 3 times [2024-05-06 04:00:34,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:34,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:34,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:34,822 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:34,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:34,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:34,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:34,948 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:35,029 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:35,035 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:35,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:35,055 INFO L85 PathProgramCache]: Analyzing trace with hash -1914086322, now seen corresponding path program 4 times [2024-05-06 04:00:35,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:35,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:35,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:35,212 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:35,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:35,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:35,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:35,378 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:35,413 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:35,413 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:37,490 INFO L85 PathProgramCache]: Analyzing trace with hash -1090481870, now seen corresponding path program 3 times [2024-05-06 04:00:37,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:37,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:37,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:37,614 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:37,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:37,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:37,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:37,787 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:37,824 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:37,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:39,904 INFO L85 PathProgramCache]: Analyzing trace with hash -996957456, now seen corresponding path program 4 times [2024-05-06 04:00:39,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:39,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:39,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:40,049 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:40,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:40,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:40,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:40,203 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:40,287 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:40,293 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:40,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:40,315 INFO L85 PathProgramCache]: Analyzing trace with hash 47465253, now seen corresponding path program 49 times [2024-05-06 04:00:40,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:40,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:40,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:40,443 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:40,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:40,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:40,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:40,603 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:40,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:00:40,692 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:40,692 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:00:40,712 INFO L85 PathProgramCache]: Analyzing trace with hash -1372469535, now seen corresponding path program 50 times [2024-05-06 04:00:40,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:40,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:40,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:40,872 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:40,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:40,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:40,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:41,036 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:41,072 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:41,072 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:43,139 INFO L85 PathProgramCache]: Analyzing trace with hash 1453268997, now seen corresponding path program 22 times [2024-05-06 04:00:43,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:43,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:43,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:43,300 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:43,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:43,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:43,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:43,427 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:43,467 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:43,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:45,551 INFO L85 PathProgramCache]: Analyzing trace with hash -455340669, now seen corresponding path program 23 times [2024-05-06 04:00:45,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:45,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:45,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:45,687 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:45,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:45,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:45,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:45,844 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:45,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:00:45,932 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:45,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:00:47,998 INFO L85 PathProgramCache]: Analyzing trace with hash -880356830, now seen corresponding path program 4 times [2024-05-06 04:00:47,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:47,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:48,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:48,193 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:48,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:48,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:48,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:48,382 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:48,490 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:00:48,496 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:48,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:00:50,567 INFO L85 PathProgramCache]: Analyzing trace with hash 1352931102, now seen corresponding path program 5 times [2024-05-06 04:00:50,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:50,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:50,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:50,720 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:50,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:50,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:50,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:50,877 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:50,914 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:50,915 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:52,969 INFO L85 PathProgramCache]: Analyzing trace with hash 19726088, now seen corresponding path program 6 times [2024-05-06 04:00:52,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:52,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:52,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:53,126 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:53,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:53,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:53,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:53,272 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:00:53,350 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:00:53,356 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:53,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:00:55,382 INFO L85 PathProgramCache]: Analyzing trace with hash 1357074856, now seen corresponding path program 24 times [2024-05-06 04:00:55,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:55,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:55,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:55,525 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:55,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:55,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:55,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:55,683 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:55,722 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:55,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:00:57,809 INFO L85 PathProgramCache]: Analyzing trace with hash 1357074856, now seen corresponding path program 25 times [2024-05-06 04:00:57,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:57,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:57,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:58,003 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:58,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:58,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:58,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:58,131 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:00:58,166 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:58,166 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:00,219 INFO L85 PathProgramCache]: Analyzing trace with hash -229900614, now seen corresponding path program 26 times [2024-05-06 04:01:00,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:00,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:00,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:00,361 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:00,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:00,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:00,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:00,510 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:00,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:01:00,597 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:00,598 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:01:02,636 INFO L85 PathProgramCache]: Analyzing trace with hash 1463016152, now seen corresponding path program 27 times [2024-05-06 04:01:02,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:02,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:02,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:02,825 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:02,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:02,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:02,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:02,961 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:02,995 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:02,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:05,059 INFO L85 PathProgramCache]: Analyzing trace with hash -1891138947, now seen corresponding path program 28 times [2024-05-06 04:01:05,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:05,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:05,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:05,198 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:05,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:05,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:05,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:05,359 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:05,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:05,441 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:05,441 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:07,518 INFO L85 PathProgramCache]: Analyzing trace with hash -371865266, now seen corresponding path program 3 times [2024-05-06 04:01:07,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:07,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:07,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:07,662 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:07,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:07,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:07,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:07,804 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:07,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:01:07,896 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:07,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:01:09,966 INFO L85 PathProgramCache]: Analyzing trace with hash -1900387726, now seen corresponding path program 4 times [2024-05-06 04:01:09,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:09,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:09,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:10,102 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:10,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:10,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:10,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:10,271 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:10,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:01:10,343 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:10,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:01:10,399 INFO L85 PathProgramCache]: Analyzing trace with hash -427637693, now seen corresponding path program 3 times [2024-05-06 04:01:10,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:10,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:10,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:10,557 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:10,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:10,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:10,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:10,694 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:10,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:01:10,776 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:10,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:01:10,826 INFO L85 PathProgramCache]: Analyzing trace with hash 2010349277, now seen corresponding path program 4 times [2024-05-06 04:01:10,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:10,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:10,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:10,957 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:10,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:10,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:10,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:11,103 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:11,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:01:11,190 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:11,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:01:13,254 INFO L85 PathProgramCache]: Analyzing trace with hash 1233131232, now seen corresponding path program 3 times [2024-05-06 04:01:13,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:13,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:13,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:13,389 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:13,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:13,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:13,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:13,553 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:13,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:01:13,633 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:13,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:01:15,709 INFO L85 PathProgramCache]: Analyzing trace with hash 717029024, now seen corresponding path program 4 times [2024-05-06 04:01:15,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:15,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:15,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:15,821 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:15,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:15,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:15,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:15,975 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:16,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:16,055 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:16,055 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:16,538 INFO L85 PathProgramCache]: Analyzing trace with hash 1148157093, now seen corresponding path program 3 times [2024-05-06 04:01:16,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:16,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:16,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:16,646 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:16,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:16,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:16,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:16,754 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:16,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:01:16,861 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:16,861 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:01:18,913 INFO L85 PathProgramCache]: Analyzing trace with hash 901166651, now seen corresponding path program 4 times [2024-05-06 04:01:18,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:18,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:18,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:19,028 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:19,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:19,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:19,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:19,141 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:19,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:01:19,225 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:19,226 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:01:21,305 INFO L85 PathProgramCache]: Analyzing trace with hash 1422510658, now seen corresponding path program 3 times [2024-05-06 04:01:21,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:21,451 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:21,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:21,561 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:21,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:01:21,631 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:21,632 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:01:21,725 INFO L85 PathProgramCache]: Analyzing trace with hash 1548606206, now seen corresponding path program 4 times [2024-05-06 04:01:21,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:21,873 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:21,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:21,986 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:22,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:01:22,060 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:22,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:01:22,107 INFO L85 PathProgramCache]: Analyzing trace with hash 1431360776, now seen corresponding path program 51 times [2024-05-06 04:01:22,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,247 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:22,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,354 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:22,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:22,442 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:22,442 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:22,529 INFO L85 PathProgramCache]: Analyzing trace with hash -2040321160, now seen corresponding path program 52 times [2024-05-06 04:01:22,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,644 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:22,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,804 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:22,842 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:22,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:24,897 INFO L85 PathProgramCache]: Analyzing trace with hash 328879868, now seen corresponding path program 29 times [2024-05-06 04:01:24,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:24,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:24,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:25,004 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:25,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:25,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:25,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:25,147 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:25,222 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:01:25,228 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:25,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:01:27,352 INFO L85 PathProgramCache]: Analyzing trace with hash 1605341770, now seen corresponding path program 6 times [2024-05-06 04:01:27,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:27,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:27,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:27,459 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:27,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:27,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:27,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:27,598 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:27,634 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:27,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:29,715 INFO L85 PathProgramCache]: Analyzing trace with hash 460496016, now seen corresponding path program 30 times [2024-05-06 04:01:29,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:29,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:29,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:29,816 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:29,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:29,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:29,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:29,916 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:30,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:01:30,011 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:30,011 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:01:30,031 INFO L85 PathProgramCache]: Analyzing trace with hash -538449847, now seen corresponding path program 53 times [2024-05-06 04:01:30,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:30,149 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:30,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:30,245 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:30,322 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:01:30,327 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:30,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:01:30,382 INFO L85 PathProgramCache]: Analyzing trace with hash 2056504869, now seen corresponding path program 54 times [2024-05-06 04:01:30,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:30,509 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:30,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:30,608 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:30,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:01:30,692 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:30,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:01:30,713 INFO L85 PathProgramCache]: Analyzing trace with hash -1411037648, now seen corresponding path program 55 times [2024-05-06 04:01:30,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:30,852 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:30,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:30,956 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:30,991 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:30,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:33,056 INFO L85 PathProgramCache]: Analyzing trace with hash 2010318996, now seen corresponding path program 31 times [2024-05-06 04:01:33,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,165 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:33,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,305 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:33,388 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:01:33,393 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:33,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:01:33,412 INFO L85 PathProgramCache]: Analyzing trace with hash 511425721, now seen corresponding path program 56 times [2024-05-06 04:01:33,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,515 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:33,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,648 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:33,684 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:33,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:35,752 INFO L85 PathProgramCache]: Analyzing trace with hash -493908782, now seen corresponding path program 32 times [2024-05-06 04:01:35,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:35,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:35,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:35,862 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:35,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:35,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:35,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:36,005 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:36,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:01:36,092 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:36,092 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:01:36,110 INFO L85 PathProgramCache]: Analyzing trace with hash 307837755, now seen corresponding path program 57 times [2024-05-06 04:01:36,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:36,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:36,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:36,214 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:36,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:36,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:36,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:36,351 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:36,381 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:36,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:38,455 INFO L85 PathProgramCache]: Analyzing trace with hash -278107169, now seen corresponding path program 33 times [2024-05-06 04:01:38,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:38,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:38,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:38,562 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:38,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:38,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:38,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:38,699 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:38,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:01:38,776 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:38,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:01:38,792 INFO L85 PathProgramCache]: Analyzing trace with hash -574649138, now seen corresponding path program 58 times [2024-05-06 04:01:38,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:38,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:38,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:38,919 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:38,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:38,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:38,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:39,021 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:39,076 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:39,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:41,153 INFO L85 PathProgramCache]: Analyzing trace with hash 1224966621, now seen corresponding path program 34 times [2024-05-06 04:01:41,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:41,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:41,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:41,283 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:41,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:41,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:41,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:41,387 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:41,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:01:41,463 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:41,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:01:41,479 INFO L85 PathProgramCache]: Analyzing trace with hash 371613266, now seen corresponding path program 59 times [2024-05-06 04:01:41,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:41,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:41,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:41,612 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:41,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:41,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:41,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:41,714 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:41,742 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:41,742 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:43,823 INFO L85 PathProgramCache]: Analyzing trace with hash -67772874, now seen corresponding path program 35 times [2024-05-06 04:01:43,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:43,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:43,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:43,954 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:43,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:43,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:43,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:44,060 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:44,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:01:44,152 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:44,153 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:01:44,168 INFO L85 PathProgramCache]: Analyzing trace with hash -690972841, now seen corresponding path program 60 times [2024-05-06 04:01:44,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:44,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:44,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:44,269 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:44,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:44,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:44,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:44,399 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:44,440 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:44,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:01:46,477 INFO L85 PathProgramCache]: Analyzing trace with hash 1288742132, now seen corresponding path program 36 times [2024-05-06 04:01:46,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:46,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:46,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:46,585 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:46,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:46,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:46,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:46,724 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:46,795 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:01:46,799 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:46,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:01:46,815 INFO L85 PathProgramCache]: Analyzing trace with hash -672857920, now seen corresponding path program 61 times [2024-05-06 04:01:46,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:46,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:46,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:46,917 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:46,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:46,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:46,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:47,036 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:47,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:01:47,104 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:47,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:01:47,172 INFO L85 PathProgramCache]: Analyzing trace with hash 616241544, now seen corresponding path program 62 times [2024-05-06 04:01:47,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:47,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:47,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:47,292 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:47,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:47,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:47,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:47,393 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:47,456 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:01:47,461 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:47,462 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:01:47,523 INFO L85 PathProgramCache]: Analyzing trace with hash 2004362472, now seen corresponding path program 63 times [2024-05-06 04:01:47,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:47,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:47,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:47,624 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:47,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:47,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:47,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:47,756 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:47,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 04:01:47,837 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:47,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 04:01:49,898 INFO L85 PathProgramCache]: Analyzing trace with hash -1844557457, now seen corresponding path program 64 times [2024-05-06 04:01:49,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:49,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:49,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:50,029 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:50,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:50,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:50,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:50,136 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:50,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:01:50,217 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:50,217 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:01:50,236 INFO L85 PathProgramCache]: Analyzing trace with hash -1844557457, now seen corresponding path program 65 times [2024-05-06 04:01:50,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:50,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:50,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:50,354 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:50,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:50,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:50,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:50,484 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:50,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:01:50,567 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:50,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:01:52,051 INFO L85 PathProgramCache]: Analyzing trace with hash -1351855357, now seen corresponding path program 66 times [2024-05-06 04:01:52,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:52,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:52,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:52,193 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:01:52,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:52,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:52,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:52,326 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:01:52,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:01:52,412 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:52,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:01:54,465 INFO L85 PathProgramCache]: Analyzing trace with hash 1055104883, now seen corresponding path program 67 times [2024-05-06 04:01:54,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:54,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:54,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:54,596 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:54,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:54,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:54,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:54,730 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:54,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:01:54,814 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:54,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:01:54,865 INFO L85 PathProgramCache]: Analyzing trace with hash -1507011917, now seen corresponding path program 68 times [2024-05-06 04:01:54,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:54,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:54,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:54,997 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:01:54,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:54,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:55,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:55,130 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:01:55,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:01:55,204 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:55,204 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:01:57,270 INFO L85 PathProgramCache]: Analyzing trace with hash 1432228291, now seen corresponding path program 69 times [2024-05-06 04:01:57,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:57,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:57,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:57,401 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:57,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:57,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:57,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:57,534 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:01:57,602 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 04:01:57,606 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:57,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 04:01:59,637 INFO L85 PathProgramCache]: Analyzing trace with hash -29282239, now seen corresponding path program 70 times [2024-05-06 04:01:59,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:59,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:59,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:59,767 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:01:59,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:59,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:59,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:59,899 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:01:59,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:01:59,972 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:59,972 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:02:02,052 INFO L85 PathProgramCache]: Analyzing trace with hash -1339231371, now seen corresponding path program 71 times [2024-05-06 04:02:02,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:02,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:02,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:02,187 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:02,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:02,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:02,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:02,319 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:02,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:02:02,408 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:02,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:02:02,427 INFO L85 PathProgramCache]: Analyzing trace with hash 1862946369, now seen corresponding path program 72 times [2024-05-06 04:02:02,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:02,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:02,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:02,557 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:02,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:02,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:02,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:02,689 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:02,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 04:02:02,774 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:02,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 04:02:04,845 INFO L85 PathProgramCache]: Analyzing trace with hash 1916763185, now seen corresponding path program 73 times [2024-05-06 04:02:04,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:04,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:04,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:04,971 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:04,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:04,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:05,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:05,104 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:05,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:02:05,171 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:05,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:02:05,186 INFO L85 PathProgramCache]: Analyzing trace with hash -709882812, now seen corresponding path program 74 times [2024-05-06 04:02:05,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:05,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:05,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:05,315 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:05,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:05,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:05,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:05,441 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:05,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:02:05,524 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:05,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:02:05,564 INFO L85 PathProgramCache]: Analyzing trace with hash -1324423980, now seen corresponding path program 5 times [2024-05-06 04:02:05,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:05,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:05,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:05,705 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:05,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:05,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:05,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:05,842 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:05,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 04:02:05,915 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:05,915 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 04:02:05,931 INFO L85 PathProgramCache]: Analyzing trace with hash 1945612626, now seen corresponding path program 6 times [2024-05-06 04:02:05,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:05,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:05,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:06,061 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:06,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:06,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:06,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:06,239 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:06,281 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:02:06,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:02:08,371 INFO L85 PathProgramCache]: Analyzing trace with hash 779841846, now seen corresponding path program 5 times [2024-05-06 04:02:08,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:08,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:08,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:08,549 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:08,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:08,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:08,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:08,744 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:08,820 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:02:08,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 04:02:09,306 WARN L249 Executor]: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-05-06 04:02:09,307 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.Util.checkSat(Util.java:61) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SmtUtils.checkSatTerm(SmtUtils.java:332) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:144) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:159) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.(MaximumUniversalSetComputation.java:94) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem(Abducer.java:208) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.abduce(Abducer.java:175) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.SemanticIndependenceConditionGenerator.generateCondition(SemanticIndependenceConditionGenerator.java:151) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IIndependenceConditionGenerator.generateCondition(IIndependenceConditionGenerator.java:63) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityChecker.checkConditionalCommutativity(ConditionalCommutativityChecker.java:154) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityCheckerVisitor.discoverState(ConditionalCommutativityCheckerVisitor.java:189) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityCheckerVisitor.discoverState(ConditionalCommutativityCheckerVisitor.java:1) at de.uni_freiburg.informatik.ultimate.automata.partialorder.visitors.DeadEndOptimizingSearchVisitor.discoverState(DeadEndOptimizingSearchVisitor.java:73) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.visitState(DepthFirstTraversal.java:222) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.traverse(DepthFirstTraversal.java:165) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.(DepthFirstTraversal.java:98) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.traverse(DepthFirstTraversal.java:122) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.PartialOrderReductionFacade.apply(PartialOrderReductionFacade.java:321) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.concurrency.PartialOrderCegarLoop.isAbstractionEmpty(PartialOrderCegarLoop.java:371) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.computeInitialAbstraction(AbstractCegarLoop.java:404) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:365) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:225) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 43 more [2024-05-06 04:02:09,309 INFO L158 Benchmark]: Toolchain (without parser) took 593663.29ms. Allocated memory was 362.8MB in the beginning and 2.7GB in the end (delta: 2.3GB). Free memory was 291.0MB in the beginning and 732.4MB in the end (delta: -441.4MB). Peak memory consumption was 1.9GB. Max. memory is 8.0GB. [2024-05-06 04:02:09,309 INFO L158 Benchmark]: CDTParser took 0.11ms. Allocated memory is still 362.8MB. Free memory is still 330.0MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 04:02:09,309 INFO L158 Benchmark]: CACSL2BoogieTranslator took 195.40ms. Allocated memory is still 362.8MB. Free memory was 290.7MB in the beginning and 278.4MB in the end (delta: 12.3MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. [2024-05-06 04:02:09,309 INFO L158 Benchmark]: Boogie Procedure Inliner took 42.79ms. Allocated memory is still 362.8MB. Free memory was 278.1MB in the beginning and 276.0MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 04:02:09,309 INFO L158 Benchmark]: Boogie Preprocessor took 36.22ms. Allocated memory is still 362.8MB. Free memory was 276.0MB in the beginning and 274.2MB in the end (delta: 1.9MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2024-05-06 04:02:09,309 INFO L158 Benchmark]: RCFGBuilder took 559.18ms. Allocated memory is still 362.8MB. Free memory was 274.2MB in the beginning and 309.9MB in the end (delta: -35.8MB). Peak memory consumption was 18.2MB. Max. memory is 8.0GB. [2024-05-06 04:02:09,310 INFO L158 Benchmark]: TraceAbstraction took 592825.43ms. Allocated memory was 362.8MB in the beginning and 2.7GB in the end (delta: 2.3GB). Free memory was 308.4MB in the beginning and 732.4MB in the end (delta: -424.1MB). Peak memory consumption was 1.9GB. Max. memory is 8.0GB. [2024-05-06 04:02:09,310 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### [2024-05-06 04:02:09,307 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 101 --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11ms. Allocated memory is still 362.8MB. Free memory is still 330.0MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 195.40ms. Allocated memory is still 362.8MB. Free memory was 290.7MB in the beginning and 278.4MB in the end (delta: 12.3MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 42.79ms. Allocated memory is still 362.8MB. Free memory was 278.1MB in the beginning and 276.0MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 36.22ms. Allocated memory is still 362.8MB. Free memory was 276.0MB in the beginning and 274.2MB in the end (delta: 1.9MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 559.18ms. Allocated memory is still 362.8MB. Free memory was 274.2MB in the beginning and 309.9MB in the end (delta: -35.8MB). Peak memory consumption was 18.2MB. Max. memory is 8.0GB. * TraceAbstraction took 592825.43ms. Allocated memory was 362.8MB in the beginning and 2.7GB in the end (delta: 2.3GB). Free memory was 308.4MB in the beginning and 732.4MB in the end (delta: -424.1MB). Peak memory consumption was 1.9GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2024-05-06 04:02:09,337 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Ended with exit code 0 Received shutdown request...